EE445M RTOS
Taken at the University of Texas Spring 2015
hw_comp.h
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1 //*****************************************************************************
2 //
3 // hw_comp.h - Macros used when accessing the comparator hardware.
4 //
5 // Copyright (c) 2005-2014 Texas Instruments Incorporated. All rights reserved.
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35 //
36 // This is part of revision 2.1.0.12573 of the Tiva Firmware Development Package.
37 //
38 //*****************************************************************************
39 
40 #ifndef __HW_COMP_H__
41 #define __HW_COMP_H__
42 
43 //*****************************************************************************
44 //
45 // The following are defines for the Comparator register offsets.
46 //
47 //*****************************************************************************
48 #define COMP_O_ACMIS 0x00000000 // Analog Comparator Masked
49  // Interrupt Status
50 #define COMP_O_ACRIS 0x00000004 // Analog Comparator Raw Interrupt
51  // Status
52 #define COMP_O_ACINTEN 0x00000008 // Analog Comparator Interrupt
53  // Enable
54 #define COMP_O_ACREFCTL 0x00000010 // Analog Comparator Reference
55  // Voltage Control
56 #define COMP_O_ACSTAT0 0x00000020 // Analog Comparator Status 0
57 #define COMP_O_ACCTL0 0x00000024 // Analog Comparator Control 0
58 #define COMP_O_ACSTAT1 0x00000040 // Analog Comparator Status 1
59 #define COMP_O_ACCTL1 0x00000044 // Analog Comparator Control 1
60 #define COMP_O_ACSTAT2 0x00000060 // Analog Comparator Status 2
61 #define COMP_O_ACCTL2 0x00000064 // Analog Comparator Control 2
62 #define COMP_O_PP 0x00000FC0 // Analog Comparator Peripheral
63  // Properties
64 
65 //*****************************************************************************
66 //
67 // The following are defines for the bit fields in the COMP_O_ACMIS register.
68 //
69 //*****************************************************************************
70 #define COMP_ACMIS_IN2 0x00000004 // Comparator 2 Masked Interrupt
71  // Status
72 #define COMP_ACMIS_IN1 0x00000002 // Comparator 1 Masked Interrupt
73  // Status
74 #define COMP_ACMIS_IN0 0x00000001 // Comparator 0 Masked Interrupt
75  // Status
76 
77 //*****************************************************************************
78 //
79 // The following are defines for the bit fields in the COMP_O_ACRIS register.
80 //
81 //*****************************************************************************
82 #define COMP_ACRIS_IN2 0x00000004 // Comparator 2 Interrupt Status
83 #define COMP_ACRIS_IN1 0x00000002 // Comparator 1 Interrupt Status
84 #define COMP_ACRIS_IN0 0x00000001 // Comparator 0 Interrupt Status
85 
86 //*****************************************************************************
87 //
88 // The following are defines for the bit fields in the COMP_O_ACINTEN register.
89 //
90 //*****************************************************************************
91 #define COMP_ACINTEN_IN2 0x00000004 // Comparator 2 Interrupt Enable
92 #define COMP_ACINTEN_IN1 0x00000002 // Comparator 1 Interrupt Enable
93 #define COMP_ACINTEN_IN0 0x00000001 // Comparator 0 Interrupt Enable
94 
95 //*****************************************************************************
96 //
97 // The following are defines for the bit fields in the COMP_O_ACREFCTL
98 // register.
99 //
100 //*****************************************************************************
101 #define COMP_ACREFCTL_EN 0x00000200 // Resistor Ladder Enable
102 #define COMP_ACREFCTL_RNG 0x00000100 // Resistor Ladder Range
103 #define COMP_ACREFCTL_VREF_M 0x0000000F // Resistor Ladder Voltage Ref
104 #define COMP_ACREFCTL_VREF_S 0
105 
106 //*****************************************************************************
107 //
108 // The following are defines for the bit fields in the COMP_O_ACSTAT0 register.
109 //
110 //*****************************************************************************
111 #define COMP_ACSTAT0_OVAL 0x00000002 // Comparator Output Value
112 
113 //*****************************************************************************
114 //
115 // The following are defines for the bit fields in the COMP_O_ACCTL0 register.
116 //
117 //*****************************************************************************
118 #define COMP_ACCTL0_TOEN 0x00000800 // Trigger Output Enable
119 #define COMP_ACCTL0_ASRCP_M 0x00000600 // Analog Source Positive
120 #define COMP_ACCTL0_ASRCP_PIN 0x00000000 // Pin value of Cn+
121 #define COMP_ACCTL0_ASRCP_PIN0 0x00000200 // Pin value of C0+
122 #define COMP_ACCTL0_ASRCP_REF 0x00000400 // Internal voltage reference
123 #define COMP_ACCTL0_TSLVAL 0x00000080 // Trigger Sense Level Value
124 #define COMP_ACCTL0_TSEN_M 0x00000060 // Trigger Sense
125 #define COMP_ACCTL0_TSEN_LEVEL 0x00000000 // Level sense, see TSLVAL
126 #define COMP_ACCTL0_TSEN_FALL 0x00000020 // Falling edge
127 #define COMP_ACCTL0_TSEN_RISE 0x00000040 // Rising edge
128 #define COMP_ACCTL0_TSEN_BOTH 0x00000060 // Either edge
129 #define COMP_ACCTL0_ISLVAL 0x00000010 // Interrupt Sense Level Value
130 #define COMP_ACCTL0_ISEN_M 0x0000000C // Interrupt Sense
131 #define COMP_ACCTL0_ISEN_LEVEL 0x00000000 // Level sense, see ISLVAL
132 #define COMP_ACCTL0_ISEN_FALL 0x00000004 // Falling edge
133 #define COMP_ACCTL0_ISEN_RISE 0x00000008 // Rising edge
134 #define COMP_ACCTL0_ISEN_BOTH 0x0000000C // Either edge
135 #define COMP_ACCTL0_CINV 0x00000002 // Comparator Output Invert
136 
137 //*****************************************************************************
138 //
139 // The following are defines for the bit fields in the COMP_O_ACSTAT1 register.
140 //
141 //*****************************************************************************
142 #define COMP_ACSTAT1_OVAL 0x00000002 // Comparator Output Value
143 
144 //*****************************************************************************
145 //
146 // The following are defines for the bit fields in the COMP_O_ACCTL1 register.
147 //
148 //*****************************************************************************
149 #define COMP_ACCTL1_TOEN 0x00000800 // Trigger Output Enable
150 #define COMP_ACCTL1_ASRCP_M 0x00000600 // Analog Source Positive
151 #define COMP_ACCTL1_ASRCP_PIN 0x00000000 // Pin value of Cn+
152 #define COMP_ACCTL1_ASRCP_PIN0 0x00000200 // Pin value of C0+
153 #define COMP_ACCTL1_ASRCP_REF 0x00000400 // Internal voltage reference
154 #define COMP_ACCTL1_TSLVAL 0x00000080 // Trigger Sense Level Value
155 #define COMP_ACCTL1_TSEN_M 0x00000060 // Trigger Sense
156 #define COMP_ACCTL1_TSEN_LEVEL 0x00000000 // Level sense, see TSLVAL
157 #define COMP_ACCTL1_TSEN_FALL 0x00000020 // Falling edge
158 #define COMP_ACCTL1_TSEN_RISE 0x00000040 // Rising edge
159 #define COMP_ACCTL1_TSEN_BOTH 0x00000060 // Either edge
160 #define COMP_ACCTL1_ISLVAL 0x00000010 // Interrupt Sense Level Value
161 #define COMP_ACCTL1_ISEN_M 0x0000000C // Interrupt Sense
162 #define COMP_ACCTL1_ISEN_LEVEL 0x00000000 // Level sense, see ISLVAL
163 #define COMP_ACCTL1_ISEN_FALL 0x00000004 // Falling edge
164 #define COMP_ACCTL1_ISEN_RISE 0x00000008 // Rising edge
165 #define COMP_ACCTL1_ISEN_BOTH 0x0000000C // Either edge
166 #define COMP_ACCTL1_CINV 0x00000002 // Comparator Output Invert
167 
168 //*****************************************************************************
169 //
170 // The following are defines for the bit fields in the COMP_O_ACSTAT2 register.
171 //
172 //*****************************************************************************
173 #define COMP_ACSTAT2_OVAL 0x00000002 // Comparator Output Value
174 
175 //*****************************************************************************
176 //
177 // The following are defines for the bit fields in the COMP_O_ACCTL2 register.
178 //
179 //*****************************************************************************
180 #define COMP_ACCTL2_TOEN 0x00000800 // Trigger Output Enable
181 #define COMP_ACCTL2_ASRCP_M 0x00000600 // Analog Source Positive
182 #define COMP_ACCTL2_ASRCP_PIN 0x00000000 // Pin value of Cn+
183 #define COMP_ACCTL2_ASRCP_PIN0 0x00000200 // Pin value of C0+
184 #define COMP_ACCTL2_ASRCP_REF 0x00000400 // Internal voltage reference
185 #define COMP_ACCTL2_TSLVAL 0x00000080 // Trigger Sense Level Value
186 #define COMP_ACCTL2_TSEN_M 0x00000060 // Trigger Sense
187 #define COMP_ACCTL2_TSEN_LEVEL 0x00000000 // Level sense, see TSLVAL
188 #define COMP_ACCTL2_TSEN_FALL 0x00000020 // Falling edge
189 #define COMP_ACCTL2_TSEN_RISE 0x00000040 // Rising edge
190 #define COMP_ACCTL2_TSEN_BOTH 0x00000060 // Either edge
191 #define COMP_ACCTL2_ISLVAL 0x00000010 // Interrupt Sense Level Value
192 #define COMP_ACCTL2_ISEN_M 0x0000000C // Interrupt Sense
193 #define COMP_ACCTL2_ISEN_LEVEL 0x00000000 // Level sense, see ISLVAL
194 #define COMP_ACCTL2_ISEN_FALL 0x00000004 // Falling edge
195 #define COMP_ACCTL2_ISEN_RISE 0x00000008 // Rising edge
196 #define COMP_ACCTL2_ISEN_BOTH 0x0000000C // Either edge
197 #define COMP_ACCTL2_CINV 0x00000002 // Comparator Output Invert
198 
199 //*****************************************************************************
200 //
201 // The following are defines for the bit fields in the COMP_O_PP register.
202 //
203 //*****************************************************************************
204 #define COMP_PP_C2O 0x00040000 // Comparator Output 2 Present
205 #define COMP_PP_C1O 0x00020000 // Comparator Output 1 Present
206 #define COMP_PP_C0O 0x00010000 // Comparator Output 0 Present
207 #define COMP_PP_CMP2 0x00000004 // Comparator 2 Present
208 #define COMP_PP_CMP1 0x00000002 // Comparator 1 Present
209 #define COMP_PP_CMP0 0x00000001 // Comparator 0 Present
210 
211 #endif // __HW_COMP_H__