EE445M RTOS
Taken at the University of Texas Spring 2015
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hw_qei.h
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//*****************************************************************************
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//
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// hw_qei.h - Macros used when accessing the QEI hardware.
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//
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// Copyright (c) 2005-2014 Texas Instruments Incorporated. All rights reserved.
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// Software License Agreement
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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//
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// Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the
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// distribution.
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//
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// Neither the name of Texas Instruments Incorporated nor the names of
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// its contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// This is part of revision 2.1.0.12573 of the Tiva Firmware Development Package.
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//
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//*****************************************************************************
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#ifndef __HW_QEI_H__
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#define __HW_QEI_H__
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//*****************************************************************************
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//
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// The following are defines for the QEI register offsets.
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//
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//*****************************************************************************
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#define QEI_O_CTL 0x00000000 // QEI Control
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#define QEI_O_STAT 0x00000004 // QEI Status
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#define QEI_O_POS 0x00000008 // QEI Position
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#define QEI_O_MAXPOS 0x0000000C // QEI Maximum Position
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#define QEI_O_LOAD 0x00000010 // QEI Timer Load
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#define QEI_O_TIME 0x00000014 // QEI Timer
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#define QEI_O_COUNT 0x00000018 // QEI Velocity Counter
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#define QEI_O_SPEED 0x0000001C // QEI Velocity
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#define QEI_O_INTEN 0x00000020 // QEI Interrupt Enable
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#define QEI_O_RIS 0x00000024 // QEI Raw Interrupt Status
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#define QEI_O_ISC 0x00000028 // QEI Interrupt Status and Clear
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the QEI_O_CTL register.
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//
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//*****************************************************************************
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#define QEI_CTL_FILTCNT_M 0x000F0000 // Input Filter Prescale Count
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#define QEI_CTL_FILTEN 0x00002000 // Enable Input Filter
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#define QEI_CTL_STALLEN 0x00001000 // Stall QEI
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#define QEI_CTL_INVI 0x00000800 // Invert Index Pulse
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#define QEI_CTL_INVB 0x00000400 // Invert PhB
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#define QEI_CTL_INVA 0x00000200 // Invert PhA
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#define QEI_CTL_VELDIV_M 0x000001C0 // Predivide Velocity
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#define QEI_CTL_VELDIV_1 0x00000000 // QEI clock /1
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#define QEI_CTL_VELDIV_2 0x00000040 // QEI clock /2
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#define QEI_CTL_VELDIV_4 0x00000080 // QEI clock /4
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#define QEI_CTL_VELDIV_8 0x000000C0 // QEI clock /8
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#define QEI_CTL_VELDIV_16 0x00000100 // QEI clock /16
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#define QEI_CTL_VELDIV_32 0x00000140 // QEI clock /32
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#define QEI_CTL_VELDIV_64 0x00000180 // QEI clock /64
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#define QEI_CTL_VELDIV_128 0x000001C0 // QEI clock /128
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#define QEI_CTL_VELEN 0x00000020 // Capture Velocity
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#define QEI_CTL_RESMODE 0x00000010 // Reset Mode
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#define QEI_CTL_CAPMODE 0x00000008 // Capture Mode
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#define QEI_CTL_SIGMODE 0x00000004 // Signal Mode
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#define QEI_CTL_SWAP 0x00000002 // Swap Signals
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#define QEI_CTL_ENABLE 0x00000001 // Enable QEI
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#define QEI_CTL_FILTCNT_S 16
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the QEI_O_STAT register.
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//
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//*****************************************************************************
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#define QEI_STAT_DIRECTION 0x00000002 // Direction of Rotation
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#define QEI_STAT_ERROR 0x00000001 // Error Detected
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the QEI_O_POS register.
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//
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//*****************************************************************************
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#define QEI_POS_M 0xFFFFFFFF // Current Position Integrator
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// Value
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#define QEI_POS_S 0
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the QEI_O_MAXPOS register.
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//
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//*****************************************************************************
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#define QEI_MAXPOS_M 0xFFFFFFFF // Maximum Position Integrator
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// Value
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#define QEI_MAXPOS_S 0
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the QEI_O_LOAD register.
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//
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//*****************************************************************************
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#define QEI_LOAD_M 0xFFFFFFFF // Velocity Timer Load Value
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#define QEI_LOAD_S 0
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the QEI_O_TIME register.
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//
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//*****************************************************************************
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#define QEI_TIME_M 0xFFFFFFFF // Velocity Timer Current Value
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#define QEI_TIME_S 0
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the QEI_O_COUNT register.
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//
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//*****************************************************************************
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#define QEI_COUNT_M 0xFFFFFFFF // Velocity Pulse Count
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#define QEI_COUNT_S 0
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the QEI_O_SPEED register.
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//
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//*****************************************************************************
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#define QEI_SPEED_M 0xFFFFFFFF // Velocity
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#define QEI_SPEED_S 0
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the QEI_O_INTEN register.
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//
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//*****************************************************************************
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#define QEI_INTEN_ERROR 0x00000008 // Phase Error Interrupt Enable
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#define QEI_INTEN_DIR 0x00000004 // Direction Change Interrupt
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// Enable
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#define QEI_INTEN_TIMER 0x00000002 // Timer Expires Interrupt Enable
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#define QEI_INTEN_INDEX 0x00000001 // Index Pulse Detected Interrupt
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// Enable
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the QEI_O_RIS register.
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//
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//*****************************************************************************
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#define QEI_RIS_ERROR 0x00000008 // Phase Error Detected
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#define QEI_RIS_DIR 0x00000004 // Direction Change Detected
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#define QEI_RIS_TIMER 0x00000002 // Velocity Timer Expired
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#define QEI_RIS_INDEX 0x00000001 // Index Pulse Asserted
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the QEI_O_ISC register.
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//
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//*****************************************************************************
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#define QEI_ISC_ERROR 0x00000008 // Phase Error Interrupt
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#define QEI_ISC_DIR 0x00000004 // Direction Change Interrupt
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#define QEI_ISC_TIMER 0x00000002 // Velocity Timer Expired Interrupt
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#define QEI_ISC_INDEX 0x00000001 // Index Pulse Interrupt
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#endif // __HW_QEI_H__
inc
hw_qei.h
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