EE445M RTOS
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rom.h
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//*****************************************************************************
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//
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// rom.h - Macros to facilitate calling functions in the ROM.
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//
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// Copyright (c) 2007-2014 Texas Instruments Incorporated. All rights reserved.
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// Software License Agreement
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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//
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// Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the
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// distribution.
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//
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// Neither the name of Texas Instruments Incorporated nor the names of
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// its contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
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//
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//*****************************************************************************
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#ifndef __DRIVERLIB_ROM_H__
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#define __DRIVERLIB_ROM_H__
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#ifndef DEPRECATED
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//*****************************************************************************
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//
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// ROM selection labels changed between TivaWare 2.0.1 and 2.1. The following
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// labels are intended to ensure backwards compatibility for applications
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// which have not yet been updated to use the replacement labels.
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//
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//*****************************************************************************
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#ifdef TARGET_IS_SNOWFLAKE_RA0
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#define TARGET_IS_TM4C129_RA0
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#endif
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#ifdef TARGET_IS_SNOWFLAKE_RA1
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#define TARGET_IS_TM4C129_RA1
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#endif
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#ifdef TARGET_IS_BLIZZARD_RA1
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#define TARGET_IS_TM4C123_RA1
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#endif
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#ifdef TARGET_IS_BLIZZARD_RA2
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#define TARGET_IS_TM4C123_RA2
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#endif
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#ifdef TARGET_IS_BLIZZARD_RA3
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#define TARGET_IS_TM4C123_RA3
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#endif
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#ifdef TARGET_IS_BLIZZARD_RB0
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#define TARGET_IS_TM4C123_RB0
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#endif
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#ifdef TARGET_IS_BLIZZARD_RB1
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#define TARGET_IS_TM4C123_RB1
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#endif
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#endif
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//*****************************************************************************
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//
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// Pointers to the main API tables.
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//
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//*****************************************************************************
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#define ROM_APITABLE ((uint32_t *)0x01000010)
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#define ROM_VERSION (ROM_APITABLE[0])
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#define ROM_UARTTABLE ((uint32_t *)(ROM_APITABLE[1]))
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#define ROM_SSITABLE ((uint32_t *)(ROM_APITABLE[2]))
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#define ROM_I2CTABLE ((uint32_t *)(ROM_APITABLE[3]))
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#define ROM_GPIOTABLE ((uint32_t *)(ROM_APITABLE[4]))
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#define ROM_ADCTABLE ((uint32_t *)(ROM_APITABLE[5]))
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#define ROM_COMPARATORTABLE ((uint32_t *)(ROM_APITABLE[6]))
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#define ROM_FLASHTABLE ((uint32_t *)(ROM_APITABLE[7]))
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#define ROM_PWMTABLE ((uint32_t *)(ROM_APITABLE[8]))
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#define ROM_QEITABLE ((uint32_t *)(ROM_APITABLE[9]))
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#define ROM_SYSTICKTABLE ((uint32_t *)(ROM_APITABLE[10]))
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#define ROM_TIMERTABLE ((uint32_t *)(ROM_APITABLE[11]))
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#define ROM_WATCHDOGTABLE ((uint32_t *)(ROM_APITABLE[12]))
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#define ROM_SYSCTLTABLE ((uint32_t *)(ROM_APITABLE[13]))
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#define ROM_INTERRUPTTABLE ((uint32_t *)(ROM_APITABLE[14]))
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#define ROM_USBTABLE ((uint32_t *)(ROM_APITABLE[16]))
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#define ROM_UDMATABLE ((uint32_t *)(ROM_APITABLE[17]))
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#define ROM_CANTABLE ((uint32_t *)(ROM_APITABLE[18]))
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#define ROM_HIBERNATETABLE ((uint32_t *)(ROM_APITABLE[19]))
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#define ROM_MPUTABLE ((uint32_t *)(ROM_APITABLE[20]))
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#define ROM_SOFTWARETABLE ((uint32_t *)(ROM_APITABLE[21]))
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#define ROM_EPITABLE ((uint32_t *)(ROM_APITABLE[23]))
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#define ROM_EEPROMTABLE ((uint32_t *)(ROM_APITABLE[24]))
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#define ROM_FPUTABLE ((uint32_t *)(ROM_APITABLE[26]))
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#define ROM_SMBUSTABLE ((uint32_t *)(ROM_APITABLE[29]))
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#define ROM_SYSEXCTABLE ((uint32_t *)(ROM_APITABLE[30]))
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#define ROM_ONEWIRETABLE ((uint32_t *)(ROM_APITABLE[34]))
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#define ROM_SPIFLASHTABLE ((uint32_t *)(ROM_APITABLE[38]))
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#define ROM_LCDTABLE ((uint32_t *)(ROM_APITABLE[41]))
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#define ROM_EMACTABLE ((uint32_t *)(ROM_APITABLE[42]))
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#define ROM_AESTABLE ((uint32_t *)(ROM_APITABLE[43]))
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#define ROM_CRCTABLE ((uint32_t *)(ROM_APITABLE[44]))
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#define ROM_DESTABLE ((uint32_t *)(ROM_APITABLE[45]))
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#define ROM_SHAMD5TABLE ((uint32_t *)(ROM_APITABLE[46]))
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//*****************************************************************************
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//
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// Macros for calling ROM functions in the ADC API.
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//
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//*****************************************************************************
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#if defined(TARGET_IS_TM4C123_RA1) || \
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defined(TARGET_IS_TM4C123_RA3) || \
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defined(TARGET_IS_TM4C123_RB1) || \
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defined(TARGET_IS_TM4C129_RA0) || \
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defined(TARGET_IS_TM4C129_RA1)
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#define ROM_ADCSequenceDataGet \
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((int32_t (*)(uint32_t ui32Base, \
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uint32_t ui32SequenceNum, \
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uint32_t *pui32Buffer))ROM_ADCTABLE[0])
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#endif
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#if defined(TARGET_IS_TM4C123_RA1) || \
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defined(TARGET_IS_TM4C123_RA3) || \
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defined(TARGET_IS_TM4C123_RB1) || \
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defined(TARGET_IS_TM4C129_RA0) || \
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defined(TARGET_IS_TM4C129_RA1)
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#define ROM_ADCIntDisable \
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((void (*)(uint32_t ui32Base, \
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uint32_t ui32SequenceNum))ROM_ADCTABLE[1])
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#endif
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#if defined(TARGET_IS_TM4C123_RA1) || \
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defined(TARGET_IS_TM4C123_RA3) || \
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defined(TARGET_IS_TM4C123_RB1) || \
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defined(TARGET_IS_TM4C129_RA0) || \
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defined(TARGET_IS_TM4C129_RA1)
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#define ROM_ADCIntEnable \
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((void (*)(uint32_t ui32Base, \
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uint32_t ui32SequenceNum))ROM_ADCTABLE[2])
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#endif
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#if defined(TARGET_IS_TM4C123_RA1) || \
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defined(TARGET_IS_TM4C123_RA3) || \
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defined(TARGET_IS_TM4C123_RB1) || \
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defined(TARGET_IS_TM4C129_RA0) || \
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defined(TARGET_IS_TM4C129_RA1)
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#define ROM_ADCIntStatus \
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((uint32_t (*)(uint32_t ui32Base, \
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uint32_t ui32SequenceNum, \
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bool bMasked))ROM_ADCTABLE[3])
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#endif
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#if defined(TARGET_IS_TM4C123_RA1) || \
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defined(TARGET_IS_TM4C123_RA3) || \
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defined(TARGET_IS_TM4C123_RB1) || \
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defined(TARGET_IS_TM4C129_RA0) || \
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defined(TARGET_IS_TM4C129_RA1)
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#define ROM_ADCIntClear \
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((void (*)(uint32_t ui32Base, \
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uint32_t ui32SequenceNum))ROM_ADCTABLE[4])
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#endif
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#if defined(TARGET_IS_TM4C123_RA1) || \
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defined(TARGET_IS_TM4C123_RA3) || \
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defined(TARGET_IS_TM4C123_RB1) || \
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defined(TARGET_IS_TM4C129_RA0) || \
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defined(TARGET_IS_TM4C129_RA1)
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#define ROM_ADCSequenceEnable \
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((void (*)(uint32_t ui32Base, \
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uint32_t ui32SequenceNum))ROM_ADCTABLE[5])
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#endif
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#if defined(TARGET_IS_TM4C123_RA1) || \
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defined(TARGET_IS_TM4C123_RA3) || \
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defined(TARGET_IS_TM4C123_RB1) || \
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defined(TARGET_IS_TM4C129_RA0) || \
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defined(TARGET_IS_TM4C129_RA1)
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#define ROM_ADCSequenceDisable \
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((void (*)(uint32_t ui32Base, \
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uint32_t ui32SequenceNum))ROM_ADCTABLE[6])
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#endif
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#if defined(TARGET_IS_TM4C123_RA1) || \
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defined(TARGET_IS_TM4C123_RA3) || \
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defined(TARGET_IS_TM4C123_RB1) || \
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defined(TARGET_IS_TM4C129_RA0) || \
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defined(TARGET_IS_TM4C129_RA1)
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#define ROM_ADCSequenceConfigure \
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((void (*)(uint32_t ui32Base, \
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uint32_t ui32SequenceNum, \
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uint32_t ui32Trigger, \
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uint32_t ui32Priority))ROM_ADCTABLE[7])
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#endif
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#if defined(TARGET_IS_TM4C123_RA1) || \
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defined(TARGET_IS_TM4C123_RA3) || \
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defined(TARGET_IS_TM4C123_RB1) || \
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defined(TARGET_IS_TM4C129_RA0) || \
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defined(TARGET_IS_TM4C129_RA1)
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#define ROM_ADCSequenceStepConfigure \
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((void (*)(uint32_t ui32Base, \
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uint32_t ui32SequenceNum, \
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uint32_t ui32Step, \
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uint32_t ui32Config))ROM_ADCTABLE[8])
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#endif
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#if defined(TARGET_IS_TM4C123_RA1) || \
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defined(TARGET_IS_TM4C123_RA3) || \
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defined(TARGET_IS_TM4C123_RB1) || \
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defined(TARGET_IS_TM4C129_RA0) || \
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defined(TARGET_IS_TM4C129_RA1)
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#define ROM_ADCSequenceOverflow \
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((int32_t (*)(uint32_t ui32Base, \
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uint32_t ui32SequenceNum))ROM_ADCTABLE[9])
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#endif
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#if defined(TARGET_IS_TM4C123_RA1) || \
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defined(TARGET_IS_TM4C123_RA3) || \
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defined(TARGET_IS_TM4C123_RB1) || \
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defined(TARGET_IS_TM4C129_RA0) || \
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defined(TARGET_IS_TM4C129_RA1)
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#define ROM_ADCSequenceOverflowClear \
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((void (*)(uint32_t ui32Base, \
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uint32_t ui32SequenceNum))ROM_ADCTABLE[10])
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#endif
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#if defined(TARGET_IS_TM4C123_RA1) || \
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defined(TARGET_IS_TM4C123_RA3) || \
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defined(TARGET_IS_TM4C123_RB1) || \
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defined(TARGET_IS_TM4C129_RA0) || \
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defined(TARGET_IS_TM4C129_RA1)
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#define ROM_ADCSequenceUnderflow \
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((int32_t (*)(uint32_t ui32Base, \
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uint32_t ui32SequenceNum))ROM_ADCTABLE[11])
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#endif
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#if defined(TARGET_IS_TM4C123_RA1) || \
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defined(TARGET_IS_TM4C123_RA3) || \
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defined(TARGET_IS_TM4C123_RB1) || \
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defined(TARGET_IS_TM4C129_RA0) || \
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defined(TARGET_IS_TM4C129_RA1)
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#define ROM_ADCSequenceUnderflowClear \
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((void (*)(uint32_t ui32Base, \
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uint32_t ui32SequenceNum))ROM_ADCTABLE[12])
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#endif
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#if defined(TARGET_IS_TM4C123_RA1) || \
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defined(TARGET_IS_TM4C123_RA3) || \
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defined(TARGET_IS_TM4C123_RB1) || \
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defined(TARGET_IS_TM4C129_RA0) || \
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defined(TARGET_IS_TM4C129_RA1)
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#define ROM_ADCProcessorTrigger \
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((void (*)(uint32_t ui32Base, \
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uint32_t ui32SequenceNum))ROM_ADCTABLE[13])
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#endif
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#if defined(TARGET_IS_TM4C123_RA1) || \
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defined(TARGET_IS_TM4C123_RA3) || \
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defined(TARGET_IS_TM4C123_RB1) || \
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defined(TARGET_IS_TM4C129_RA0) || \
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defined(TARGET_IS_TM4C129_RA1)
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#define ROM_ADCHardwareOversampleConfigure \
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((void (*)(uint32_t ui32Base, \
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uint32_t ui32Factor))ROM_ADCTABLE[14])
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#endif
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#if defined(TARGET_IS_TM4C123_RA1) || \
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defined(TARGET_IS_TM4C123_RA3) || \
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defined(TARGET_IS_TM4C123_RB1) || \
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defined(TARGET_IS_TM4C129_RA0) || \
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defined(TARGET_IS_TM4C129_RA1)
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#define ROM_ADCComparatorConfigure \
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((void (*)(uint32_t ui32Base, \
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uint32_t ui32Comp, \
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uint32_t ui32Config))ROM_ADCTABLE[15])
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#endif
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#if defined(TARGET_IS_TM4C123_RA1) || \
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defined(TARGET_IS_TM4C123_RA3) || \
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defined(TARGET_IS_TM4C123_RB1) || \
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defined(TARGET_IS_TM4C129_RA0) || \
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defined(TARGET_IS_TM4C129_RA1)
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#define ROM_ADCComparatorRegionSet \
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((void (*)(uint32_t ui32Base, \
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uint32_t ui32Comp, \
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uint32_t ui32LowRef, \
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uint32_t ui32HighRef))ROM_ADCTABLE[16])
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#endif
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#if defined(TARGET_IS_TM4C123_RA1) || \
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defined(TARGET_IS_TM4C123_RA3) || \
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defined(TARGET_IS_TM4C123_RB1) || \
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defined(TARGET_IS_TM4C129_RA0) || \
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defined(TARGET_IS_TM4C129_RA1)
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#define ROM_ADCComparatorReset \
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((void (*)(uint32_t ui32Base, \
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uint32_t ui32Comp, \
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bool bTrigger, \
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bool bInterrupt))ROM_ADCTABLE[17])
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#endif
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#if defined(TARGET_IS_TM4C123_RA1) || \
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defined(TARGET_IS_TM4C123_RA3) || \
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defined(TARGET_IS_TM4C123_RB1) || \
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defined(TARGET_IS_TM4C129_RA0) || \
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defined(TARGET_IS_TM4C129_RA1)
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#define ROM_ADCComparatorIntDisable \
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((void (*)(uint32_t ui32Base, \
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uint32_t ui32SequenceNum))ROM_ADCTABLE[18])
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#endif
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#if defined(TARGET_IS_TM4C123_RA1) || \
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defined(TARGET_IS_TM4C123_RA3) || \
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defined(TARGET_IS_TM4C123_RB1) || \
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defined(TARGET_IS_TM4C129_RA0) || \
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defined(TARGET_IS_TM4C129_RA1)
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#define ROM_ADCComparatorIntEnable \
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((void (*)(uint32_t ui32Base, \
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uint32_t ui32SequenceNum))ROM_ADCTABLE[19])
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#endif
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#if defined(TARGET_IS_TM4C123_RA1) || \
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defined(TARGET_IS_TM4C123_RA3) || \
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defined(TARGET_IS_TM4C123_RB1) || \
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defined(TARGET_IS_TM4C129_RA0) || \
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defined(TARGET_IS_TM4C129_RA1)
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#define ROM_ADCComparatorIntStatus \
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((uint32_t (*)(uint32_t ui32Base))ROM_ADCTABLE[20])
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#endif
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#if defined(TARGET_IS_TM4C123_RA1) || \
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defined(TARGET_IS_TM4C123_RA3) || \
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defined(TARGET_IS_TM4C123_RB1) || \
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defined(TARGET_IS_TM4C129_RA0) || \
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defined(TARGET_IS_TM4C129_RA1)
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#define ROM_ADCComparatorIntClear \
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((void (*)(uint32_t ui32Base, \
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uint32_t ui32Status))ROM_ADCTABLE[21])
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#endif
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#if defined(TARGET_IS_TM4C123_RA1) || \
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defined(TARGET_IS_TM4C123_RA3) || \
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defined(TARGET_IS_TM4C123_RB1) || \
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defined(TARGET_IS_TM4C129_RA0) || \
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defined(TARGET_IS_TM4C129_RA1)
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#define ROM_ADCReferenceSet \
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((void (*)(uint32_t ui32Base, \
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uint32_t ui32Ref))ROM_ADCTABLE[22])
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#endif
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#if defined(TARGET_IS_TM4C123_RA1) || \
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defined(TARGET_IS_TM4C123_RA3) || \
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defined(TARGET_IS_TM4C123_RB1) || \
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defined(TARGET_IS_TM4C129_RA0) || \
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defined(TARGET_IS_TM4C129_RA1)
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#define ROM_ADCReferenceGet \
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((uint32_t (*)(uint32_t ui32Base))ROM_ADCTABLE[23])
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#endif
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#if defined(TARGET_IS_TM4C123_RA1) || \
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defined(TARGET_IS_TM4C123_RA3) || \
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defined(TARGET_IS_TM4C123_RB1) || \
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defined(TARGET_IS_TM4C129_RA0) || \
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defined(TARGET_IS_TM4C129_RA1)
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#define ROM_ADCPhaseDelaySet \
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((void (*)(uint32_t ui32Base, \
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uint32_t ui32Phase))ROM_ADCTABLE[24])
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#endif
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#if defined(TARGET_IS_TM4C123_RA1) || \
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defined(TARGET_IS_TM4C123_RA3) || \
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defined(TARGET_IS_TM4C123_RB1) || \
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defined(TARGET_IS_TM4C129_RA0) || \
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defined(TARGET_IS_TM4C129_RA1)
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#define ROM_ADCPhaseDelayGet \
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((uint32_t (*)(uint32_t ui32Base))ROM_ADCTABLE[25])
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#endif
362
#if defined(TARGET_IS_TM4C129_RA0) || \
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defined(TARGET_IS_TM4C129_RA1)
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#define ROM_ADCIntClearEx \
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((void (*)(uint32_t ui32Base, \
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uint32_t ui32IntFlags))ROM_ADCTABLE[28])
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#endif
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#if defined(TARGET_IS_TM4C129_RA0) || \
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defined(TARGET_IS_TM4C129_RA1)
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#define ROM_ADCIntDisableEx \
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((void (*)(uint32_t ui32Base, \
372
uint32_t ui32IntFlags))ROM_ADCTABLE[29])
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#endif
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#if defined(TARGET_IS_TM4C129_RA0) || \
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defined(TARGET_IS_TM4C129_RA1)
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#define ROM_ADCIntEnableEx \
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((void (*)(uint32_t ui32Base, \
378
uint32_t ui32IntFlags))ROM_ADCTABLE[30])
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#endif
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#if defined(TARGET_IS_TM4C129_RA0) || \
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defined(TARGET_IS_TM4C129_RA1)
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#define ROM_ADCIntStatusEx \
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((uint32_t (*)(uint32_t ui32Base, \
384
bool bMasked))ROM_ADCTABLE[31])
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#endif
386
#if defined(TARGET_IS_TM4C129_RA0) || \
387
defined(TARGET_IS_TM4C129_RA1)
388
#define ROM_ADCSequenceDMAEnable \
389
((void (*)(uint32_t ui32Base, \
390
uint32_t ui32SequenceNum))ROM_ADCTABLE[32])
391
#endif
392
#if defined(TARGET_IS_TM4C129_RA0) || \
393
defined(TARGET_IS_TM4C129_RA1)
394
#define ROM_ADCSequenceDMADisable \
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((void (*)(uint32_t ui32Base, \
396
uint32_t ui32SequenceNum))ROM_ADCTABLE[33])
397
#endif
398
#if defined(TARGET_IS_TM4C129_RA0) || \
399
defined(TARGET_IS_TM4C129_RA1)
400
#define ROM_ADCBusy \
401
((bool (*)(uint32_t ui32Base))ROM_ADCTABLE[34])
402
#endif
403
404
//*****************************************************************************
405
//
406
// Macros for calling ROM functions in the AES API.
407
//
408
//*****************************************************************************
409
#if defined(TARGET_IS_TM4C129_RA0) || \
410
defined(TARGET_IS_TM4C129_RA1)
411
#define ROM_AESIntStatus \
412
((uint32_t (*)(uint32_t ui32Base, \
413
bool bMasked))ROM_AESTABLE[0])
414
#endif
415
#if defined(TARGET_IS_TM4C129_RA0) || \
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defined(TARGET_IS_TM4C129_RA1)
417
#define ROM_AESAuthLengthSet \
418
((void (*)(uint32_t ui32Base, \
419
uint32_t ui32Length))ROM_AESTABLE[1])
420
#endif
421
#if defined(TARGET_IS_TM4C129_RA0) || \
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defined(TARGET_IS_TM4C129_RA1)
423
#define ROM_AESConfigSet \
424
((void (*)(uint32_t ui32Base, \
425
uint32_t ui32Config))ROM_AESTABLE[2])
426
#endif
427
#if defined(TARGET_IS_TM4C129_RA0) || \
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defined(TARGET_IS_TM4C129_RA1)
429
#define ROM_AESDataAuth \
430
((bool (*)(uint32_t ui32Base, \
431
uint32_t *pui32Src, \
432
uint32_t ui32Length, \
433
uint32_t *pui32Tag))ROM_AESTABLE[3])
434
#endif
435
#if defined(TARGET_IS_TM4C129_RA0) || \
436
defined(TARGET_IS_TM4C129_RA1)
437
#define ROM_AESDataProcess \
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((bool (*)(uint32_t ui32Base, \
439
uint32_t *pui32Src, \
440
uint32_t *pui32Dest, \
441
uint32_t ui32Length))ROM_AESTABLE[4])
442
#endif
443
#if defined(TARGET_IS_TM4C129_RA0) || \
444
defined(TARGET_IS_TM4C129_RA1)
445
#define ROM_AESDataProcessAuth \
446
((bool (*)(uint32_t ui32Base, \
447
uint32_t *pui32Src, \
448
uint32_t *pui32Dest, \
449
uint32_t ui32Length, \
450
uint32_t *pui32AuthSrc, \
451
uint32_t ui32AuthLength, \
452
uint32_t *pui32Tag))ROM_AESTABLE[5])
453
#endif
454
#if defined(TARGET_IS_TM4C129_RA0) || \
455
defined(TARGET_IS_TM4C129_RA1)
456
#define ROM_AESDataRead \
457
((void (*)(uint32_t ui32Base, \
458
uint32_t *pui32Dest))ROM_AESTABLE[6])
459
#endif
460
#if defined(TARGET_IS_TM4C129_RA0) || \
461
defined(TARGET_IS_TM4C129_RA1)
462
#define ROM_AESDataReadNonBlocking \
463
((bool (*)(uint32_t ui32Base, \
464
uint32_t *pui32Dest))ROM_AESTABLE[7])
465
#endif
466
#if defined(TARGET_IS_TM4C129_RA0) || \
467
defined(TARGET_IS_TM4C129_RA1)
468
#define ROM_AESDataWrite \
469
((void (*)(uint32_t ui32Base, \
470
uint32_t *pui32Src))ROM_AESTABLE[8])
471
#endif
472
#if defined(TARGET_IS_TM4C129_RA0) || \
473
defined(TARGET_IS_TM4C129_RA1)
474
#define ROM_AESDataWriteNonBlocking \
475
((bool (*)(uint32_t ui32Base, \
476
uint32_t *pui32Src))ROM_AESTABLE[9])
477
#endif
478
#if defined(TARGET_IS_TM4C129_RA0) || \
479
defined(TARGET_IS_TM4C129_RA1)
480
#define ROM_AESDMADisable \
481
((void (*)(uint32_t ui32Base, \
482
uint32_t ui32Flags))ROM_AESTABLE[10])
483
#endif
484
#if defined(TARGET_IS_TM4C129_RA0) || \
485
defined(TARGET_IS_TM4C129_RA1)
486
#define ROM_AESDMAEnable \
487
((void (*)(uint32_t ui32Base, \
488
uint32_t ui32Flags))ROM_AESTABLE[11])
489
#endif
490
#if defined(TARGET_IS_TM4C129_RA0) || \
491
defined(TARGET_IS_TM4C129_RA1)
492
#define ROM_AESIntClear \
493
((void (*)(uint32_t ui32Base, \
494
uint32_t ui32IntFlags))ROM_AESTABLE[12])
495
#endif
496
#if defined(TARGET_IS_TM4C129_RA0) || \
497
defined(TARGET_IS_TM4C129_RA1)
498
#define ROM_AESIntDisable \
499
((void (*)(uint32_t ui32Base, \
500
uint32_t ui32IntFlags))ROM_AESTABLE[13])
501
#endif
502
#if defined(TARGET_IS_TM4C129_RA0) || \
503
defined(TARGET_IS_TM4C129_RA1)
504
#define ROM_AESIntEnable \
505
((void (*)(uint32_t ui32Base, \
506
uint32_t ui32IntFlags))ROM_AESTABLE[14])
507
#endif
508
#if defined(TARGET_IS_TM4C129_RA0) || \
509
defined(TARGET_IS_TM4C129_RA1)
510
#define ROM_AESIVSet \
511
((void (*)(uint32_t ui32Base, \
512
uint32_t *pui32IVdata))ROM_AESTABLE[15])
513
#endif
514
#if defined(TARGET_IS_TM4C129_RA0) || \
515
defined(TARGET_IS_TM4C129_RA1)
516
#define ROM_AESKey1Set \
517
((void (*)(uint32_t ui32Base, \
518
uint32_t *pui32Key, \
519
uint32_t ui32Keysize))ROM_AESTABLE[16])
520
#endif
521
#if defined(TARGET_IS_TM4C129_RA0) || \
522
defined(TARGET_IS_TM4C129_RA1)
523
#define ROM_AESKey2Set \
524
((void (*)(uint32_t ui32Base, \
525
uint32_t *pui32Key, \
526
uint32_t ui32Keysize))ROM_AESTABLE[17])
527
#endif
528
#if defined(TARGET_IS_TM4C129_RA0) || \
529
defined(TARGET_IS_TM4C129_RA1)
530
#define ROM_AESKey3Set \
531
((void (*)(uint32_t ui32Base, \
532
uint32_t *pui32Key))ROM_AESTABLE[18])
533
#endif
534
#if defined(TARGET_IS_TM4C129_RA0) || \
535
defined(TARGET_IS_TM4C129_RA1)
536
#define ROM_AESLengthSet \
537
((void (*)(uint32_t ui32Base, \
538
uint64_t ui64Length))ROM_AESTABLE[19])
539
#endif
540
#if defined(TARGET_IS_TM4C129_RA0) || \
541
defined(TARGET_IS_TM4C129_RA1)
542
#define ROM_AESReset \
543
((void (*)(uint32_t ui32Base))ROM_AESTABLE[20])
544
#endif
545
#if defined(TARGET_IS_TM4C129_RA0) || \
546
defined(TARGET_IS_TM4C129_RA1)
547
#define ROM_AESTagRead \
548
((void (*)(uint32_t ui32Base, \
549
uint32_t *pui32TagData))ROM_AESTABLE[21])
550
#endif
551
#if defined(TARGET_IS_TM4C129_RA1)
552
#define ROM_AESIVRead \
553
((void (*)(uint32_t ui32Base, \
554
uint32_t *pui32IVdata))ROM_AESTABLE[22])
555
#endif
556
557
//*****************************************************************************
558
//
559
// Macros for calling ROM functions in the CAN API.
560
//
561
//*****************************************************************************
562
#if defined(TARGET_IS_TM4C123_RA1) || \
563
defined(TARGET_IS_TM4C123_RA3) || \
564
defined(TARGET_IS_TM4C123_RB1) || \
565
defined(TARGET_IS_TM4C129_RA0) || \
566
defined(TARGET_IS_TM4C129_RA1)
567
#define ROM_CANIntClear \
568
((void (*)(uint32_t ui32Base, \
569
uint32_t ui32IntClr))ROM_CANTABLE[0])
570
#endif
571
#if defined(TARGET_IS_TM4C123_RA1) || \
572
defined(TARGET_IS_TM4C123_RA3) || \
573
defined(TARGET_IS_TM4C123_RB1) || \
574
defined(TARGET_IS_TM4C129_RA0) || \
575
defined(TARGET_IS_TM4C129_RA1)
576
#define ROM_CANInit \
577
((void (*)(uint32_t ui32Base))ROM_CANTABLE[1])
578
#endif
579
#if defined(TARGET_IS_TM4C123_RA1) || \
580
defined(TARGET_IS_TM4C123_RA3) || \
581
defined(TARGET_IS_TM4C123_RB1) || \
582
defined(TARGET_IS_TM4C129_RA0) || \
583
defined(TARGET_IS_TM4C129_RA1)
584
#define ROM_CANEnable \
585
((void (*)(uint32_t ui32Base))ROM_CANTABLE[2])
586
#endif
587
#if defined(TARGET_IS_TM4C123_RA1) || \
588
defined(TARGET_IS_TM4C123_RA3) || \
589
defined(TARGET_IS_TM4C123_RB1) || \
590
defined(TARGET_IS_TM4C129_RA0) || \
591
defined(TARGET_IS_TM4C129_RA1)
592
#define ROM_CANDisable \
593
((void (*)(uint32_t ui32Base))ROM_CANTABLE[3])
594
#endif
595
#if defined(TARGET_IS_TM4C123_RA1) || \
596
defined(TARGET_IS_TM4C123_RA3) || \
597
defined(TARGET_IS_TM4C123_RB1) || \
598
defined(TARGET_IS_TM4C129_RA0) || \
599
defined(TARGET_IS_TM4C129_RA1)
600
#define ROM_CANBitTimingSet \
601
((void (*)(uint32_t ui32Base, \
602
tCANBitClkParms *psClkParms))ROM_CANTABLE[4])
603
#endif
604
#if defined(TARGET_IS_TM4C123_RA1) || \
605
defined(TARGET_IS_TM4C123_RA3) || \
606
defined(TARGET_IS_TM4C123_RB1) || \
607
defined(TARGET_IS_TM4C129_RA0) || \
608
defined(TARGET_IS_TM4C129_RA1)
609
#define ROM_CANBitTimingGet \
610
((void (*)(uint32_t ui32Base, \
611
tCANBitClkParms *psClkParms))ROM_CANTABLE[5])
612
#endif
613
#if defined(TARGET_IS_TM4C123_RA1) || \
614
defined(TARGET_IS_TM4C123_RA3) || \
615
defined(TARGET_IS_TM4C123_RB1) || \
616
defined(TARGET_IS_TM4C129_RA0) || \
617
defined(TARGET_IS_TM4C129_RA1)
618
#define ROM_CANMessageSet \
619
((void (*)(uint32_t ui32Base, \
620
uint32_t ui32ObjID, \
621
tCANMsgObject *psMsgObject, \
622
tMsgObjType eMsgType))ROM_CANTABLE[6])
623
#endif
624
#if defined(TARGET_IS_TM4C123_RA1) || \
625
defined(TARGET_IS_TM4C123_RA3) || \
626
defined(TARGET_IS_TM4C123_RB1) || \
627
defined(TARGET_IS_TM4C129_RA0) || \
628
defined(TARGET_IS_TM4C129_RA1)
629
#define ROM_CANMessageGet \
630
((void (*)(uint32_t ui32Base, \
631
uint32_t ui32ObjID, \
632
tCANMsgObject *psMsgObject, \
633
bool bClrPendingInt))ROM_CANTABLE[7])
634
#endif
635
#if defined(TARGET_IS_TM4C123_RA1) || \
636
defined(TARGET_IS_TM4C123_RA3) || \
637
defined(TARGET_IS_TM4C123_RB1) || \
638
defined(TARGET_IS_TM4C129_RA0) || \
639
defined(TARGET_IS_TM4C129_RA1)
640
#define ROM_CANStatusGet \
641
((uint32_t (*)(uint32_t ui32Base, \
642
tCANStsReg eStatusReg))ROM_CANTABLE[8])
643
#endif
644
#if defined(TARGET_IS_TM4C123_RA1) || \
645
defined(TARGET_IS_TM4C123_RA3) || \
646
defined(TARGET_IS_TM4C123_RB1) || \
647
defined(TARGET_IS_TM4C129_RA0) || \
648
defined(TARGET_IS_TM4C129_RA1)
649
#define ROM_CANMessageClear \
650
((void (*)(uint32_t ui32Base, \
651
uint32_t ui32ObjID))ROM_CANTABLE[9])
652
#endif
653
#if defined(TARGET_IS_TM4C123_RA1) || \
654
defined(TARGET_IS_TM4C123_RA3) || \
655
defined(TARGET_IS_TM4C123_RB1) || \
656
defined(TARGET_IS_TM4C129_RA0) || \
657
defined(TARGET_IS_TM4C129_RA1)
658
#define ROM_CANIntEnable \
659
((void (*)(uint32_t ui32Base, \
660
uint32_t ui32IntFlags))ROM_CANTABLE[10])
661
#endif
662
#if defined(TARGET_IS_TM4C123_RA1) || \
663
defined(TARGET_IS_TM4C123_RA3) || \
664
defined(TARGET_IS_TM4C123_RB1) || \
665
defined(TARGET_IS_TM4C129_RA0) || \
666
defined(TARGET_IS_TM4C129_RA1)
667
#define ROM_CANIntDisable \
668
((void (*)(uint32_t ui32Base, \
669
uint32_t ui32IntFlags))ROM_CANTABLE[11])
670
#endif
671
#if defined(TARGET_IS_TM4C123_RA1) || \
672
defined(TARGET_IS_TM4C123_RA3) || \
673
defined(TARGET_IS_TM4C123_RB1) || \
674
defined(TARGET_IS_TM4C129_RA0) || \
675
defined(TARGET_IS_TM4C129_RA1)
676
#define ROM_CANIntStatus \
677
((uint32_t (*)(uint32_t ui32Base, \
678
tCANIntStsReg eIntStsReg))ROM_CANTABLE[12])
679
#endif
680
#if defined(TARGET_IS_TM4C123_RA1) || \
681
defined(TARGET_IS_TM4C123_RA3) || \
682
defined(TARGET_IS_TM4C123_RB1) || \
683
defined(TARGET_IS_TM4C129_RA0) || \
684
defined(TARGET_IS_TM4C129_RA1)
685
#define ROM_CANRetryGet \
686
((bool (*)(uint32_t ui32Base))ROM_CANTABLE[13])
687
#endif
688
#if defined(TARGET_IS_TM4C123_RA1) || \
689
defined(TARGET_IS_TM4C123_RA3) || \
690
defined(TARGET_IS_TM4C123_RB1) || \
691
defined(TARGET_IS_TM4C129_RA0) || \
692
defined(TARGET_IS_TM4C129_RA1)
693
#define ROM_CANRetrySet \
694
((void (*)(uint32_t ui32Base, \
695
bool bAutoRetry))ROM_CANTABLE[14])
696
#endif
697
#if defined(TARGET_IS_TM4C123_RA1) || \
698
defined(TARGET_IS_TM4C123_RA3) || \
699
defined(TARGET_IS_TM4C123_RB1) || \
700
defined(TARGET_IS_TM4C129_RA0) || \
701
defined(TARGET_IS_TM4C129_RA1)
702
#define ROM_CANErrCntrGet \
703
((bool (*)(uint32_t ui32Base, \
704
uint32_t *pui32RxCount, \
705
uint32_t *pui32TxCount))ROM_CANTABLE[15])
706
#endif
707
#if defined(TARGET_IS_TM4C123_RA1) || \
708
defined(TARGET_IS_TM4C123_RA3) || \
709
defined(TARGET_IS_TM4C123_RB1) || \
710
defined(TARGET_IS_TM4C129_RA0) || \
711
defined(TARGET_IS_TM4C129_RA1)
712
#define ROM_CANBitRateSet \
713
((uint32_t (*)(uint32_t ui32Base, \
714
uint32_t ui32SourceClock, \
715
uint32_t ui32BitRate))ROM_CANTABLE[16])
716
#endif
717
718
//*****************************************************************************
719
//
720
// Macros for calling ROM functions in the Comparator API.
721
//
722
//*****************************************************************************
723
#if defined(TARGET_IS_TM4C123_RA1) || \
724
defined(TARGET_IS_TM4C123_RA3) || \
725
defined(TARGET_IS_TM4C123_RB1) || \
726
defined(TARGET_IS_TM4C129_RA0) || \
727
defined(TARGET_IS_TM4C129_RA1)
728
#define ROM_ComparatorIntClear \
729
((void (*)(uint32_t ui32Base, \
730
uint32_t ui32Comp))ROM_COMPARATORTABLE[0])
731
#endif
732
#if defined(TARGET_IS_TM4C123_RA1) || \
733
defined(TARGET_IS_TM4C123_RA3) || \
734
defined(TARGET_IS_TM4C123_RB1) || \
735
defined(TARGET_IS_TM4C129_RA0) || \
736
defined(TARGET_IS_TM4C129_RA1)
737
#define ROM_ComparatorConfigure \
738
((void (*)(uint32_t ui32Base, \
739
uint32_t ui32Comp, \
740
uint32_t ui32Config))ROM_COMPARATORTABLE[1])
741
#endif
742
#if defined(TARGET_IS_TM4C123_RA1) || \
743
defined(TARGET_IS_TM4C123_RA3) || \
744
defined(TARGET_IS_TM4C123_RB1) || \
745
defined(TARGET_IS_TM4C129_RA0) || \
746
defined(TARGET_IS_TM4C129_RA1)
747
#define ROM_ComparatorRefSet \
748
((void (*)(uint32_t ui32Base, \
749
uint32_t ui32Ref))ROM_COMPARATORTABLE[2])
750
#endif
751
#if defined(TARGET_IS_TM4C123_RA1) || \
752
defined(TARGET_IS_TM4C123_RA3) || \
753
defined(TARGET_IS_TM4C123_RB1) || \
754
defined(TARGET_IS_TM4C129_RA0) || \
755
defined(TARGET_IS_TM4C129_RA1)
756
#define ROM_ComparatorValueGet \
757
((bool (*)(uint32_t ui32Base, \
758
uint32_t ui32Comp))ROM_COMPARATORTABLE[3])
759
#endif
760
#if defined(TARGET_IS_TM4C123_RA1) || \
761
defined(TARGET_IS_TM4C123_RA3) || \
762
defined(TARGET_IS_TM4C123_RB1) || \
763
defined(TARGET_IS_TM4C129_RA0) || \
764
defined(TARGET_IS_TM4C129_RA1)
765
#define ROM_ComparatorIntEnable \
766
((void (*)(uint32_t ui32Base, \
767
uint32_t ui32Comp))ROM_COMPARATORTABLE[4])
768
#endif
769
#if defined(TARGET_IS_TM4C123_RA1) || \
770
defined(TARGET_IS_TM4C123_RA3) || \
771
defined(TARGET_IS_TM4C123_RB1) || \
772
defined(TARGET_IS_TM4C129_RA0) || \
773
defined(TARGET_IS_TM4C129_RA1)
774
#define ROM_ComparatorIntDisable \
775
((void (*)(uint32_t ui32Base, \
776
uint32_t ui32Comp))ROM_COMPARATORTABLE[5])
777
#endif
778
#if defined(TARGET_IS_TM4C123_RA1) || \
779
defined(TARGET_IS_TM4C123_RA3) || \
780
defined(TARGET_IS_TM4C123_RB1) || \
781
defined(TARGET_IS_TM4C129_RA0) || \
782
defined(TARGET_IS_TM4C129_RA1)
783
#define ROM_ComparatorIntStatus \
784
((bool (*)(uint32_t ui32Base, \
785
uint32_t ui32Comp, \
786
bool bMasked))ROM_COMPARATORTABLE[6])
787
#endif
788
789
//*****************************************************************************
790
//
791
// Macros for calling ROM functions in the CRC API.
792
//
793
//*****************************************************************************
794
#if defined(TARGET_IS_TM4C129_RA0) || \
795
defined(TARGET_IS_TM4C129_RA1)
796
#define ROM_CRCConfigSet \
797
((void (*)(uint32_t ui32Base, \
798
uint32_t ui32CRCConfig))ROM_CRCTABLE[0])
799
#endif
800
#if defined(TARGET_IS_TM4C129_RA0) || \
801
defined(TARGET_IS_TM4C129_RA1)
802
#define ROM_CRCDataProcess \
803
((uint32_t (*)(uint32_t ui32Base, \
804
uint32_t *pui32DataIn, \
805
uint32_t ui32DataLength, \
806
bool bPPResult))ROM_CRCTABLE[1])
807
#endif
808
#if defined(TARGET_IS_TM4C129_RA0) || \
809
defined(TARGET_IS_TM4C129_RA1)
810
#define ROM_CRCDataWrite \
811
((void (*)(uint32_t ui32Base, \
812
uint32_t ui32Data))ROM_CRCTABLE[2])
813
#endif
814
#if defined(TARGET_IS_TM4C129_RA0) || \
815
defined(TARGET_IS_TM4C129_RA1)
816
#define ROM_CRCResultRead \
817
((uint32_t (*)(uint32_t ui32Base, \
818
bool bPPResult))ROM_CRCTABLE[3])
819
#endif
820
#if defined(TARGET_IS_TM4C129_RA0) || \
821
defined(TARGET_IS_TM4C129_RA1)
822
#define ROM_CRCSeedSet \
823
((void (*)(uint32_t ui32Base, \
824
uint32_t ui32Seed))ROM_CRCTABLE[4])
825
#endif
826
827
//*****************************************************************************
828
//
829
// Macros for calling ROM functions in the DES API.
830
//
831
//*****************************************************************************
832
#if defined(TARGET_IS_TM4C129_RA0) || \
833
defined(TARGET_IS_TM4C129_RA1)
834
#define ROM_DESIntStatus \
835
((uint32_t (*)(uint32_t ui32Base, \
836
bool bMasked))ROM_DESTABLE[0])
837
#endif
838
#if defined(TARGET_IS_TM4C129_RA0) || \
839
defined(TARGET_IS_TM4C129_RA1)
840
#define ROM_DESConfigSet \
841
((void (*)(uint32_t ui32Base, \
842
uint32_t ui32Config))ROM_DESTABLE[1])
843
#endif
844
#if defined(TARGET_IS_TM4C129_RA0) || \
845
defined(TARGET_IS_TM4C129_RA1)
846
#define ROM_DESDataRead \
847
((void (*)(uint32_t ui32Base, \
848
uint32_t *pui32Dest))ROM_DESTABLE[2])
849
#endif
850
#if defined(TARGET_IS_TM4C129_RA0) || \
851
defined(TARGET_IS_TM4C129_RA1)
852
#define ROM_DESDataReadNonBlocking \
853
((bool (*)(uint32_t ui32Base, \
854
uint32_t *pui32Dest))ROM_DESTABLE[3])
855
#endif
856
#if defined(TARGET_IS_TM4C129_RA0) || \
857
defined(TARGET_IS_TM4C129_RA1)
858
#define ROM_DESDataProcess \
859
((bool (*)(uint32_t ui32Base, \
860
uint32_t *pui32Src, \
861
uint32_t *pui32Dest, \
862
uint32_t ui32Length))ROM_DESTABLE[4])
863
#endif
864
#if defined(TARGET_IS_TM4C129_RA0) || \
865
defined(TARGET_IS_TM4C129_RA1)
866
#define ROM_DESDataWrite \
867
((void (*)(uint32_t ui32Base, \
868
uint32_t *pui32Src))ROM_DESTABLE[5])
869
#endif
870
#if defined(TARGET_IS_TM4C129_RA0) || \
871
defined(TARGET_IS_TM4C129_RA1)
872
#define ROM_DESDataWriteNonBlocking \
873
((bool (*)(uint32_t ui32Base, \
874
uint32_t *pui32Src))ROM_DESTABLE[6])
875
#endif
876
#if defined(TARGET_IS_TM4C129_RA0) || \
877
defined(TARGET_IS_TM4C129_RA1)
878
#define ROM_DESDMADisable \
879
((void (*)(uint32_t ui32Base, \
880
uint32_t ui32Flags))ROM_DESTABLE[7])
881
#endif
882
#if defined(TARGET_IS_TM4C129_RA0) || \
883
defined(TARGET_IS_TM4C129_RA1)
884
#define ROM_DESDMAEnable \
885
((void (*)(uint32_t ui32Base, \
886
uint32_t ui32Flags))ROM_DESTABLE[8])
887
#endif
888
#if defined(TARGET_IS_TM4C129_RA0) || \
889
defined(TARGET_IS_TM4C129_RA1)
890
#define ROM_DESIntClear \
891
((void (*)(uint32_t ui32Base, \
892
uint32_t ui32IntFlags))ROM_DESTABLE[9])
893
#endif
894
#if defined(TARGET_IS_TM4C129_RA0) || \
895
defined(TARGET_IS_TM4C129_RA1)
896
#define ROM_DESIntDisable \
897
((void (*)(uint32_t ui32Base, \
898
uint32_t ui32IntFlags))ROM_DESTABLE[10])
899
#endif
900
#if defined(TARGET_IS_TM4C129_RA0) || \
901
defined(TARGET_IS_TM4C129_RA1)
902
#define ROM_DESIntEnable \
903
((void (*)(uint32_t ui32Base, \
904
uint32_t ui32IntFlags))ROM_DESTABLE[11])
905
#endif
906
#if defined(TARGET_IS_TM4C129_RA0) || \
907
defined(TARGET_IS_TM4C129_RA1)
908
#define ROM_DESIVSet \
909
((bool (*)(uint32_t ui32Base, \
910
uint32_t *pui32IVdata))ROM_DESTABLE[12])
911
#endif
912
#if defined(TARGET_IS_TM4C129_RA0) || \
913
defined(TARGET_IS_TM4C129_RA1)
914
#define ROM_DESKeySet \
915
((void (*)(uint32_t ui32Base, \
916
uint32_t *pui32Key))ROM_DESTABLE[13])
917
#endif
918
#if defined(TARGET_IS_TM4C129_RA0) || \
919
defined(TARGET_IS_TM4C129_RA1)
920
#define ROM_DESLengthSet \
921
((void (*)(uint32_t ui32Base, \
922
uint32_t ui32Length))ROM_DESTABLE[14])
923
#endif
924
#if defined(TARGET_IS_TM4C129_RA0) || \
925
defined(TARGET_IS_TM4C129_RA1)
926
#define ROM_DESReset \
927
((void (*)(uint32_t ui32Base))ROM_DESTABLE[15])
928
#endif
929
930
//*****************************************************************************
931
//
932
// Macros for calling ROM functions in the EEPROM API.
933
//
934
//*****************************************************************************
935
#if defined(TARGET_IS_TM4C123_RA3) || \
936
defined(TARGET_IS_TM4C123_RB1) || \
937
defined(TARGET_IS_TM4C129_RA0) || \
938
defined(TARGET_IS_TM4C129_RA1)
939
#define ROM_EEPROMRead \
940
((void (*)(uint32_t *pui32Data, \
941
uint32_t ui32Address, \
942
uint32_t ui32Count))ROM_EEPROMTABLE[0])
943
#endif
944
#if defined(TARGET_IS_TM4C123_RA3) || \
945
defined(TARGET_IS_TM4C123_RB1) || \
946
defined(TARGET_IS_TM4C129_RA0) || \
947
defined(TARGET_IS_TM4C129_RA1)
948
#define ROM_EEPROMBlockCountGet \
949
((uint32_t (*)(void))ROM_EEPROMTABLE[1])
950
#endif
951
#if defined(TARGET_IS_TM4C123_RA3) || \
952
defined(TARGET_IS_TM4C123_RB1) || \
953
defined(TARGET_IS_TM4C129_RA0) || \
954
defined(TARGET_IS_TM4C129_RA1)
955
#define ROM_EEPROMBlockHide \
956
((void (*)(uint32_t ui32Block))ROM_EEPROMTABLE[2])
957
#endif
958
#if defined(TARGET_IS_TM4C123_RA3) || \
959
defined(TARGET_IS_TM4C123_RB1) || \
960
defined(TARGET_IS_TM4C129_RA0) || \
961
defined(TARGET_IS_TM4C129_RA1)
962
#define ROM_EEPROMBlockLock \
963
((uint32_t (*)(uint32_t ui32Block))ROM_EEPROMTABLE[3])
964
#endif
965
#if defined(TARGET_IS_TM4C123_RA3) || \
966
defined(TARGET_IS_TM4C123_RB1) || \
967
defined(TARGET_IS_TM4C129_RA0) || \
968
defined(TARGET_IS_TM4C129_RA1)
969
#define ROM_EEPROMBlockPasswordSet \
970
((uint32_t (*)(uint32_t ui32Block, \
971
uint32_t *pui32Password, \
972
uint32_t ui32Count))ROM_EEPROMTABLE[4])
973
#endif
974
#if defined(TARGET_IS_TM4C123_RA3) || \
975
defined(TARGET_IS_TM4C123_RB1) || \
976
defined(TARGET_IS_TM4C129_RA0) || \
977
defined(TARGET_IS_TM4C129_RA1)
978
#define ROM_EEPROMBlockProtectGet \
979
((uint32_t (*)(uint32_t ui32Block))ROM_EEPROMTABLE[5])
980
#endif
981
#if defined(TARGET_IS_TM4C123_RA3) || \
982
defined(TARGET_IS_TM4C123_RB1) || \
983
defined(TARGET_IS_TM4C129_RA0) || \
984
defined(TARGET_IS_TM4C129_RA1)
985
#define ROM_EEPROMBlockProtectSet \
986
((uint32_t (*)(uint32_t ui32Block, \
987
uint32_t ui32Protect))ROM_EEPROMTABLE[6])
988
#endif
989
#if defined(TARGET_IS_TM4C123_RA3) || \
990
defined(TARGET_IS_TM4C123_RB1) || \
991
defined(TARGET_IS_TM4C129_RA0) || \
992
defined(TARGET_IS_TM4C129_RA1)
993
#define ROM_EEPROMBlockUnlock \
994
((uint32_t (*)(uint32_t ui32Block, \
995
uint32_t *pui32Password, \
996
uint32_t ui32Count))ROM_EEPROMTABLE[7])
997
#endif
998
#if defined(TARGET_IS_TM4C123_RA3) || \
999
defined(TARGET_IS_TM4C123_RB1) || \
1000
defined(TARGET_IS_TM4C129_RA0) || \
1001
defined(TARGET_IS_TM4C129_RA1)
1002
#define ROM_EEPROMIntClear \
1003
((void (*)(uint32_t ui32IntFlags))ROM_EEPROMTABLE[8])
1004
#endif
1005
#if defined(TARGET_IS_TM4C123_RA3) || \
1006
defined(TARGET_IS_TM4C123_RB1) || \
1007
defined(TARGET_IS_TM4C129_RA0) || \
1008
defined(TARGET_IS_TM4C129_RA1)
1009
#define ROM_EEPROMIntDisable \
1010
((void (*)(uint32_t ui32IntFlags))ROM_EEPROMTABLE[9])
1011
#endif
1012
#if defined(TARGET_IS_TM4C123_RA3) || \
1013
defined(TARGET_IS_TM4C123_RB1) || \
1014
defined(TARGET_IS_TM4C129_RA0) || \
1015
defined(TARGET_IS_TM4C129_RA1)
1016
#define ROM_EEPROMIntEnable \
1017
((void (*)(uint32_t ui32IntFlags))ROM_EEPROMTABLE[10])
1018
#endif
1019
#if defined(TARGET_IS_TM4C123_RA3) || \
1020
defined(TARGET_IS_TM4C123_RB1) || \
1021
defined(TARGET_IS_TM4C129_RA0) || \
1022
defined(TARGET_IS_TM4C129_RA1)
1023
#define ROM_EEPROMIntStatus \
1024
((uint32_t (*)(bool bMasked))ROM_EEPROMTABLE[11])
1025
#endif
1026
#if defined(TARGET_IS_TM4C123_RA3) || \
1027
defined(TARGET_IS_TM4C123_RB1)
1028
#define ROM_EEPROMMassErase \
1029
((uint32_t (*)(void))ROM_EEPROMTABLE[12])
1030
#endif
1031
#if defined(TARGET_IS_TM4C123_RA3) || \
1032
defined(TARGET_IS_TM4C123_RB1) || \
1033
defined(TARGET_IS_TM4C129_RA0) || \
1034
defined(TARGET_IS_TM4C129_RA1)
1035
#define ROM_EEPROMProgram \
1036
((uint32_t (*)(uint32_t *pui32Data, \
1037
uint32_t ui32Address, \
1038
uint32_t ui32Count))ROM_EEPROMTABLE[13])
1039
#endif
1040
#if defined(TARGET_IS_TM4C123_RA3) || \
1041
defined(TARGET_IS_TM4C123_RB1) || \
1042
defined(TARGET_IS_TM4C129_RA0) || \
1043
defined(TARGET_IS_TM4C129_RA1)
1044
#define ROM_EEPROMProgramNonBlocking \
1045
((uint32_t (*)(uint32_t ui32Data, \
1046
uint32_t ui32Address))ROM_EEPROMTABLE[14])
1047
#endif
1048
#if defined(TARGET_IS_TM4C123_RA3) || \
1049
defined(TARGET_IS_TM4C123_RB1) || \
1050
defined(TARGET_IS_TM4C129_RA0) || \
1051
defined(TARGET_IS_TM4C129_RA1)
1052
#define ROM_EEPROMSizeGet \
1053
((uint32_t (*)(void))ROM_EEPROMTABLE[15])
1054
#endif
1055
#if defined(TARGET_IS_TM4C123_RA3) || \
1056
defined(TARGET_IS_TM4C123_RB1) || \
1057
defined(TARGET_IS_TM4C129_RA0) || \
1058
defined(TARGET_IS_TM4C129_RA1)
1059
#define ROM_EEPROMStatusGet \
1060
((uint32_t (*)(void))ROM_EEPROMTABLE[16])
1061
#endif
1062
#if defined(TARGET_IS_TM4C123_RA3) || \
1063
defined(TARGET_IS_TM4C123_RB1) || \
1064
defined(TARGET_IS_TM4C129_RA0) || \
1065
defined(TARGET_IS_TM4C129_RA1)
1066
#define ROM_EEPROMInit \
1067
((uint32_t (*)(void))ROM_EEPROMTABLE[17])
1068
#endif
1069
1070
//*****************************************************************************
1071
//
1072
// Macros for calling ROM functions in the EPI API.
1073
//
1074
//*****************************************************************************
1075
#if defined(TARGET_IS_TM4C129_RA0) || \
1076
defined(TARGET_IS_TM4C129_RA1)
1077
#define ROM_EPIIntStatus \
1078
((uint32_t (*)(uint32_t ui32Base, \
1079
bool bMasked))ROM_EPITABLE[0])
1080
#endif
1081
#if defined(TARGET_IS_TM4C129_RA0) || \
1082
defined(TARGET_IS_TM4C129_RA1)
1083
#define ROM_EPIModeSet \
1084
((void (*)(uint32_t ui32Base, \
1085
uint32_t ui32Mode))ROM_EPITABLE[1])
1086
#endif
1087
#if defined(TARGET_IS_TM4C129_RA0) || \
1088
defined(TARGET_IS_TM4C129_RA1)
1089
#define ROM_EPIDividerSet \
1090
((void (*)(uint32_t ui32Base, \
1091
uint32_t ui32Divider))ROM_EPITABLE[2])
1092
#endif
1093
#if defined(TARGET_IS_TM4C129_RA0) || \
1094
defined(TARGET_IS_TM4C129_RA1)
1095
#define ROM_EPIConfigSDRAMSet \
1096
((void (*)(uint32_t ui32Base, \
1097
uint32_t ui32Config, \
1098
uint32_t ui32Refresh))ROM_EPITABLE[3])
1099
#endif
1100
#if defined(TARGET_IS_TM4C129_RA0) || \
1101
defined(TARGET_IS_TM4C129_RA1)
1102
#define ROM_EPIConfigGPModeSet \
1103
((void (*)(uint32_t ui32Base, \
1104
uint32_t ui32Config, \
1105
uint32_t ui32FrameCount, \
1106
uint32_t ui32MaxWait))ROM_EPITABLE[4])
1107
#endif
1108
#if defined(TARGET_IS_TM4C129_RA0) || \
1109
defined(TARGET_IS_TM4C129_RA1)
1110
#define ROM_EPIConfigHB8Set \
1111
((void (*)(uint32_t ui32Base, \
1112
uint32_t ui32Config, \
1113
uint32_t ui32MaxWait))ROM_EPITABLE[5])
1114
#endif
1115
#if defined(TARGET_IS_TM4C129_RA0) || \
1116
defined(TARGET_IS_TM4C129_RA1)
1117
#define ROM_EPIConfigHB16Set \
1118
((void (*)(uint32_t ui32Base, \
1119
uint32_t ui32Config, \
1120
uint32_t ui32MaxWait))ROM_EPITABLE[6])
1121
#endif
1122
#if defined(TARGET_IS_TM4C129_RA0) || \
1123
defined(TARGET_IS_TM4C129_RA1)
1124
#define ROM_EPIAddressMapSet \
1125
((void (*)(uint32_t ui32Base, \
1126
uint32_t ui32Map))ROM_EPITABLE[7])
1127
#endif
1128
#if defined(TARGET_IS_TM4C129_RA0) || \
1129
defined(TARGET_IS_TM4C129_RA1)
1130
#define ROM_EPINonBlockingReadConfigure \
1131
((void (*)(uint32_t ui32Base, \
1132
uint32_t ui32Channel, \
1133
uint32_t ui32DataSize, \
1134
uint32_t ui32Address))ROM_EPITABLE[8])
1135
#endif
1136
#if defined(TARGET_IS_TM4C129_RA0) || \
1137
defined(TARGET_IS_TM4C129_RA1)
1138
#define ROM_EPINonBlockingReadStart \
1139
((void (*)(uint32_t ui32Base, \
1140
uint32_t ui32Channel, \
1141
uint32_t ui32Count))ROM_EPITABLE[9])
1142
#endif
1143
#if defined(TARGET_IS_TM4C129_RA0) || \
1144
defined(TARGET_IS_TM4C129_RA1)
1145
#define ROM_EPINonBlockingReadStop \
1146
((void (*)(uint32_t ui32Base, \
1147
uint32_t ui32Channel))ROM_EPITABLE[10])
1148
#endif
1149
#if defined(TARGET_IS_TM4C129_RA0) || \
1150
defined(TARGET_IS_TM4C129_RA1)
1151
#define ROM_EPINonBlockingReadCount \
1152
((uint32_t (*)(uint32_t ui32Base, \
1153
uint32_t ui32Channel))ROM_EPITABLE[11])
1154
#endif
1155
#if defined(TARGET_IS_TM4C129_RA0) || \
1156
defined(TARGET_IS_TM4C129_RA1)
1157
#define ROM_EPINonBlockingReadAvail \
1158
((uint32_t (*)(uint32_t ui32Base))ROM_EPITABLE[12])
1159
#endif
1160
#if defined(TARGET_IS_TM4C129_RA0) || \
1161
defined(TARGET_IS_TM4C129_RA1)
1162
#define ROM_EPINonBlockingReadGet32 \
1163
((uint32_t (*)(uint32_t ui32Base, \
1164
uint32_t ui32Count, \
1165
uint32_t *pui32Buf))ROM_EPITABLE[13])
1166
#endif
1167
#if defined(TARGET_IS_TM4C129_RA0) || \
1168
defined(TARGET_IS_TM4C129_RA1)
1169
#define ROM_EPINonBlockingReadGet16 \
1170
((uint32_t (*)(uint32_t ui32Base, \
1171
uint32_t ui32Count, \
1172
uint16_t *pui16Buf))ROM_EPITABLE[14])
1173
#endif
1174
#if defined(TARGET_IS_TM4C129_RA0) || \
1175
defined(TARGET_IS_TM4C129_RA1)
1176
#define ROM_EPINonBlockingReadGet8 \
1177
((uint32_t (*)(uint32_t ui32Base, \
1178
uint32_t ui32Count, \
1179
uint8_t *pui8Buf))ROM_EPITABLE[15])
1180
#endif
1181
#if defined(TARGET_IS_TM4C129_RA0) || \
1182
defined(TARGET_IS_TM4C129_RA1)
1183
#define ROM_EPIFIFOConfig \
1184
((void (*)(uint32_t ui32Base, \
1185
uint32_t ui32Config))ROM_EPITABLE[16])
1186
#endif
1187
#if defined(TARGET_IS_TM4C129_RA0) || \
1188
defined(TARGET_IS_TM4C129_RA1)
1189
#define ROM_EPIWriteFIFOCountGet \
1190
((uint32_t (*)(uint32_t ui32Base))ROM_EPITABLE[17])
1191
#endif
1192
#if defined(TARGET_IS_TM4C129_RA0) || \
1193
defined(TARGET_IS_TM4C129_RA1)
1194
#define ROM_EPIIntEnable \
1195
((void (*)(uint32_t ui32Base, \
1196
uint32_t ui32IntFlags))ROM_EPITABLE[18])
1197
#endif
1198
#if defined(TARGET_IS_TM4C129_RA0) || \
1199
defined(TARGET_IS_TM4C129_RA1)
1200
#define ROM_EPIIntDisable \
1201
((void (*)(uint32_t ui32Base, \
1202
uint32_t ui32IntFlags))ROM_EPITABLE[19])
1203
#endif
1204
#if defined(TARGET_IS_TM4C129_RA0) || \
1205
defined(TARGET_IS_TM4C129_RA1)
1206
#define ROM_EPIIntErrorStatus \
1207
((uint32_t (*)(uint32_t ui32Base))ROM_EPITABLE[20])
1208
#endif
1209
#if defined(TARGET_IS_TM4C129_RA0) || \
1210
defined(TARGET_IS_TM4C129_RA1)
1211
#define ROM_EPIIntErrorClear \
1212
((void (*)(uint32_t ui32Base, \
1213
uint32_t ui32ErrFlags))ROM_EPITABLE[21])
1214
#endif
1215
#if defined(TARGET_IS_TM4C129_RA0) || \
1216
defined(TARGET_IS_TM4C129_RA1)
1217
#define ROM_EPIDividerCSSet \
1218
((void (*)(uint32_t ui32Base, \
1219
uint32_t ui32CS, \
1220
uint32_t ui32Divider))ROM_EPITABLE[22])
1221
#endif
1222
#if defined(TARGET_IS_TM4C129_RA0) || \
1223
defined(TARGET_IS_TM4C129_RA1)
1224
#define ROM_EPIDMATxCount \
1225
((void (*)(uint32_t ui32Base, \
1226
uint32_t ui32Count))ROM_EPITABLE[23])
1227
#endif
1228
#if defined(TARGET_IS_TM4C129_RA0) || \
1229
defined(TARGET_IS_TM4C129_RA1)
1230
#define ROM_EPIConfigHB8CSSet \
1231
((void (*)(uint32_t ui32Base, \
1232
uint32_t ui32CS, \
1233
uint32_t ui32Config))ROM_EPITABLE[24])
1234
#endif
1235
#if defined(TARGET_IS_TM4C129_RA0) || \
1236
defined(TARGET_IS_TM4C129_RA1)
1237
#define ROM_EPIConfigHB16CSSet \
1238
((void (*)(uint32_t ui32Base, \
1239
uint32_t ui32CS, \
1240
uint32_t ui32Config))ROM_EPITABLE[25])
1241
#endif
1242
#if defined(TARGET_IS_TM4C129_RA0) || \
1243
defined(TARGET_IS_TM4C129_RA1)
1244
#define ROM_EPIConfigHB8TimingSet \
1245
((void (*)(uint32_t ui32Base, \
1246
uint32_t ui32CS, \
1247
uint32_t ui32Config))ROM_EPITABLE[26])
1248
#endif
1249
#if defined(TARGET_IS_TM4C129_RA0) || \
1250
defined(TARGET_IS_TM4C129_RA1)
1251
#define ROM_EPIConfigHB16TimingSet \
1252
((void (*)(uint32_t ui32Base, \
1253
uint32_t ui32CS, \
1254
uint32_t ui32Config))ROM_EPITABLE[27])
1255
#endif
1256
#if defined(TARGET_IS_TM4C129_RA0) || \
1257
defined(TARGET_IS_TM4C129_RA1)
1258
#define ROM_EPIPSRAMConfigRegSet \
1259
((void (*)(uint32_t ui32Base, \
1260
uint32_t ui32CS, \
1261
uint32_t ui32CR))ROM_EPITABLE[28])
1262
#endif
1263
#if defined(TARGET_IS_TM4C129_RA0) || \
1264
defined(TARGET_IS_TM4C129_RA1)
1265
#define ROM_EPIPSRAMConfigRegRead \
1266
((void (*)(uint32_t ui32Base, \
1267
uint32_t ui32CS))ROM_EPITABLE[29])
1268
#endif
1269
#if defined(TARGET_IS_TM4C129_RA0) || \
1270
defined(TARGET_IS_TM4C129_RA1)
1271
#define ROM_EPIPSRAMConfigRegGetNonBlocking \
1272
((bool (*)(uint32_t ui32Base, \
1273
uint32_t ui32CS, \
1274
uint32_t *pui32CR))ROM_EPITABLE[30])
1275
#endif
1276
#if defined(TARGET_IS_TM4C129_RA0) || \
1277
defined(TARGET_IS_TM4C129_RA1)
1278
#define ROM_EPIPSRAMConfigRegGet \
1279
((uint32_t (*)(uint32_t ui32Base, \
1280
uint32_t ui32CS))ROM_EPITABLE[31])
1281
#endif
1282
1283
//*****************************************************************************
1284
//
1285
// Macros for calling ROM functions in the EMAC API.
1286
//
1287
//*****************************************************************************
1288
#if defined(TARGET_IS_TM4C129_RA0) || \
1289
defined(TARGET_IS_TM4C129_RA1)
1290
#define ROM_EMACIntStatus \
1291
((uint32_t (*)(uint32_t ui32Base, \
1292
bool bMasked))ROM_EMACTABLE[0])
1293
#endif
1294
#if defined(TARGET_IS_TM4C129_RA0) || \
1295
defined(TARGET_IS_TM4C129_RA1)
1296
#define ROM_EMACAddrGet \
1297
((void (*)(uint32_t ui32Base, \
1298
uint32_t ui32Index, \
1299
uint8_t *pui8MACAddr))ROM_EMACTABLE[1])
1300
#endif
1301
#if defined(TARGET_IS_TM4C129_RA0) || \
1302
defined(TARGET_IS_TM4C129_RA1)
1303
#define ROM_EMACAddrSet \
1304
((void (*)(uint32_t ui32Base, \
1305
uint32_t ui32Index, \
1306
const uint8_t *pui8MACAddr))ROM_EMACTABLE[2])
1307
#endif
1308
#if defined(TARGET_IS_TM4C129_RA0) || \
1309
defined(TARGET_IS_TM4C129_RA1)
1310
#define ROM_EMACConfigGet \
1311
((void (*)(uint32_t ui32Base, \
1312
uint32_t *pui32Config, \
1313
uint32_t *pui32Mode, \
1314
uint32_t *pui32RxMaxFrameSize))ROM_EMACTABLE[3])
1315
#endif
1316
#if defined(TARGET_IS_TM4C129_RA0) || \
1317
defined(TARGET_IS_TM4C129_RA1)
1318
#define ROM_EMACConfigSet \
1319
((void (*)(uint32_t ui32Base, \
1320
uint32_t ui32Config, \
1321
uint32_t ui32ModeFlags, \
1322
uint32_t ui32RxMaxFrameSize))ROM_EMACTABLE[4])
1323
#endif
1324
#if defined(TARGET_IS_TM4C129_RA0) || \
1325
defined(TARGET_IS_TM4C129_RA1)
1326
#define ROM_EMACDMAStateGet \
1327
((uint32_t (*)(uint32_t ui32Base))ROM_EMACTABLE[5])
1328
#endif
1329
#if defined(TARGET_IS_TM4C129_RA0) || \
1330
defined(TARGET_IS_TM4C129_RA1)
1331
#define ROM_EMACFrameFilterGet \
1332
((uint32_t (*)(uint32_t ui32Base))ROM_EMACTABLE[6])
1333
#endif
1334
#if defined(TARGET_IS_TM4C129_RA0) || \
1335
defined(TARGET_IS_TM4C129_RA1)
1336
#define ROM_EMACFrameFilterSet \
1337
((void (*)(uint32_t ui32Base, \
1338
uint32_t ui32FilterOpts))ROM_EMACTABLE[7])
1339
#endif
1340
#if defined(TARGET_IS_TM4C129_RA0) || \
1341
defined(TARGET_IS_TM4C129_RA1)
1342
#define ROM_EMACInit \
1343
((void (*)(uint32_t ui32Base, \
1344
uint32_t ui32SysClk, \
1345
uint32_t ui32BusConfig, \
1346
uint32_t ui32RxBurst, \
1347
uint32_t ui32TxBurst, \
1348
uint32_t ui32DescSkipSize))ROM_EMACTABLE[8])
1349
#endif
1350
#if defined(TARGET_IS_TM4C129_RA0) || \
1351
defined(TARGET_IS_TM4C129_RA1)
1352
#define ROM_EMACIntClear \
1353
((void (*)(uint32_t ui32Base, \
1354
uint32_t ui32IntFlags))ROM_EMACTABLE[9])
1355
#endif
1356
#if defined(TARGET_IS_TM4C129_RA0) || \
1357
defined(TARGET_IS_TM4C129_RA1)
1358
#define ROM_EMACIntDisable \
1359
((void (*)(uint32_t ui32Base, \
1360
uint32_t ui32IntFlags))ROM_EMACTABLE[10])
1361
#endif
1362
#if defined(TARGET_IS_TM4C129_RA0) || \
1363
defined(TARGET_IS_TM4C129_RA1)
1364
#define ROM_EMACIntEnable \
1365
((void (*)(uint32_t ui32Base, \
1366
uint32_t ui32IntFlags))ROM_EMACTABLE[11])
1367
#endif
1368
#if defined(TARGET_IS_TM4C129_RA1)
1369
#define ROM_EMACPHYConfigSet \
1370
((void (*)(uint32_t ui32Base, \
1371
uint32_t ui32Config))ROM_EMACTABLE[12])
1372
#endif
1373
#if defined(TARGET_IS_TM4C129_RA0) || \
1374
defined(TARGET_IS_TM4C129_RA1)
1375
#define ROM_EMACPHYPowerOff \
1376
((void (*)(uint32_t ui32Base, \
1377
uint8_t ui8PhyAddr))ROM_EMACTABLE[13])
1378
#endif
1379
#if defined(TARGET_IS_TM4C129_RA0) || \
1380
defined(TARGET_IS_TM4C129_RA1)
1381
#define ROM_EMACPHYPowerOn \
1382
((void (*)(uint32_t ui32Base, \
1383
uint8_t ui8PhyAddr))ROM_EMACTABLE[14])
1384
#endif
1385
#if defined(TARGET_IS_TM4C129_RA0) || \
1386
defined(TARGET_IS_TM4C129_RA1)
1387
#define ROM_EMACPHYRead \
1388
((uint16_t (*)(uint32_t ui32Base, \
1389
uint8_t ui8PhyAddr, \
1390
uint8_t ui8RegAddr))ROM_EMACTABLE[15])
1391
#endif
1392
#if defined(TARGET_IS_TM4C129_RA0) || \
1393
defined(TARGET_IS_TM4C129_RA1)
1394
#define ROM_EMACPHYWrite \
1395
((void (*)(uint32_t ui32Base, \
1396
uint8_t ui8PhyAddr, \
1397
uint8_t ui8RegAddr, \
1398
uint16_t ui16Data))ROM_EMACTABLE[16])
1399
#endif
1400
#if defined(TARGET_IS_TM4C129_RA0) || \
1401
defined(TARGET_IS_TM4C129_RA1)
1402
#define ROM_EMACReset \
1403
((void (*)(uint32_t ui32Base))ROM_EMACTABLE[17])
1404
#endif
1405
#if defined(TARGET_IS_TM4C129_RA0) || \
1406
defined(TARGET_IS_TM4C129_RA1)
1407
#define ROM_EMACRxDisable \
1408
((void (*)(uint32_t ui32Base))ROM_EMACTABLE[18])
1409
#endif
1410
#if defined(TARGET_IS_TM4C129_RA0) || \
1411
defined(TARGET_IS_TM4C129_RA1)
1412
#define ROM_EMACRxDMACurrentBufferGet \
1413
((uint8_t * (*)(uint32_t ui32Base))ROM_EMACTABLE[19])
1414
#endif
1415
#if defined(TARGET_IS_TM4C129_RA0) || \
1416
defined(TARGET_IS_TM4C129_RA1)
1417
#define ROM_EMACRxDMACurrentDescriptorGet \
1418
((tEMACDMADescriptor * (*)(uint32_t ui32Base))ROM_EMACTABLE[20])
1419
#endif
1420
#if defined(TARGET_IS_TM4C129_RA0) || \
1421
defined(TARGET_IS_TM4C129_RA1)
1422
#define ROM_EMACRxDMADescriptorListGet \
1423
((tEMACDMADescriptor * (*)(uint32_t ui32Base))ROM_EMACTABLE[21])
1424
#endif
1425
#if defined(TARGET_IS_TM4C129_RA0) || \
1426
defined(TARGET_IS_TM4C129_RA1)
1427
#define ROM_EMACRxDMADescriptorListSet \
1428
((void (*)(uint32_t ui32Base, \
1429
tEMACDMADescriptor *pDescriptor))ROM_EMACTABLE[22])
1430
#endif
1431
#if defined(TARGET_IS_TM4C129_RA0) || \
1432
defined(TARGET_IS_TM4C129_RA1)
1433
#define ROM_EMACRxDMAPollDemand \
1434
((void (*)(uint32_t ui32Base))ROM_EMACTABLE[23])
1435
#endif
1436
#if defined(TARGET_IS_TM4C129_RA0) || \
1437
defined(TARGET_IS_TM4C129_RA1)
1438
#define ROM_EMACRxEnable \
1439
((void (*)(uint32_t ui32Base))ROM_EMACTABLE[24])
1440
#endif
1441
#if defined(TARGET_IS_TM4C129_RA0) || \
1442
defined(TARGET_IS_TM4C129_RA1)
1443
#define ROM_EMACRxWatchdogTimerSet \
1444
((void (*)(uint32_t ui32Base, \
1445
uint8_t ui8Timeout))ROM_EMACTABLE[25])
1446
#endif
1447
#if defined(TARGET_IS_TM4C129_RA0) || \
1448
defined(TARGET_IS_TM4C129_RA1)
1449
#define ROM_EMACStatusGet \
1450
((uint32_t (*)(uint32_t ui32Base))ROM_EMACTABLE[26])
1451
#endif
1452
#if defined(TARGET_IS_TM4C129_RA0) || \
1453
defined(TARGET_IS_TM4C129_RA1)
1454
#define ROM_EMACTxDisable \
1455
((void (*)(uint32_t ui32Base))ROM_EMACTABLE[27])
1456
#endif
1457
#if defined(TARGET_IS_TM4C129_RA0) || \
1458
defined(TARGET_IS_TM4C129_RA1)
1459
#define ROM_EMACTxDMACurrentBufferGet \
1460
((uint8_t * (*)(uint32_t ui32Base))ROM_EMACTABLE[28])
1461
#endif
1462
#if defined(TARGET_IS_TM4C129_RA0) || \
1463
defined(TARGET_IS_TM4C129_RA1)
1464
#define ROM_EMACTxDMACurrentDescriptorGet \
1465
((tEMACDMADescriptor * (*)(uint32_t ui32Base))ROM_EMACTABLE[29])
1466
#endif
1467
#if defined(TARGET_IS_TM4C129_RA0) || \
1468
defined(TARGET_IS_TM4C129_RA1)
1469
#define ROM_EMACTxDMADescriptorListGet \
1470
((tEMACDMADescriptor * (*)(uint32_t ui32Base))ROM_EMACTABLE[30])
1471
#endif
1472
#if defined(TARGET_IS_TM4C129_RA0) || \
1473
defined(TARGET_IS_TM4C129_RA1)
1474
#define ROM_EMACTxDMADescriptorListSet \
1475
((void (*)(uint32_t ui32Base, \
1476
tEMACDMADescriptor *pDescriptor))ROM_EMACTABLE[31])
1477
#endif
1478
#if defined(TARGET_IS_TM4C129_RA0) || \
1479
defined(TARGET_IS_TM4C129_RA1)
1480
#define ROM_EMACTxDMAPollDemand \
1481
((void (*)(uint32_t ui32Base))ROM_EMACTABLE[32])
1482
#endif
1483
#if defined(TARGET_IS_TM4C129_RA0) || \
1484
defined(TARGET_IS_TM4C129_RA1)
1485
#define ROM_EMACTxEnable \
1486
((void (*)(uint32_t ui32Base))ROM_EMACTABLE[33])
1487
#endif
1488
#if defined(TARGET_IS_TM4C129_RA0) || \
1489
defined(TARGET_IS_TM4C129_RA1)
1490
#define ROM_EMACTxFlush \
1491
((void (*)(uint32_t ui32Base))ROM_EMACTABLE[34])
1492
#endif
1493
#if defined(TARGET_IS_TM4C129_RA1)
1494
#define ROM_EMACAddrFilterGet \
1495
((uint32_t (*)(uint32_t ui32Base, \
1496
uint32_t ui32Index))ROM_EMACTABLE[35])
1497
#endif
1498
#if defined(TARGET_IS_TM4C129_RA1)
1499
#define ROM_EMACAddrFilterSet \
1500
((void (*)(uint32_t ui32Base, \
1501
uint32_t ui32Index, \
1502
uint32_t ui32Config))ROM_EMACTABLE[36])
1503
#endif
1504
#if defined(TARGET_IS_TM4C129_RA1)
1505
#define ROM_EMACHashFilterBitCalculate \
1506
((uint32_t (*)(uint8_t *pui8MACAddr))ROM_EMACTABLE[37])
1507
#endif
1508
#if defined(TARGET_IS_TM4C129_RA1)
1509
#define ROM_EMACHashFilterGet \
1510
((void (*)(uint32_t ui32Base, \
1511
uint32_t *pui32HashHi, \
1512
uint32_t *pui32HashLo))ROM_EMACTABLE[38])
1513
#endif
1514
#if defined(TARGET_IS_TM4C129_RA0) || \
1515
defined(TARGET_IS_TM4C129_RA1)
1516
#define ROM_EMACHashFilterSet \
1517
((void (*)(uint32_t ui32Base, \
1518
uint32_t ui32HashHi, \
1519
uint32_t ui32HashLo))ROM_EMACTABLE[39])
1520
#endif
1521
#if defined(TARGET_IS_TM4C129_RA1)
1522
#define ROM_EMACNumAddrGet \
1523
((uint32_t (*)(uint32_t ui32Base))ROM_EMACTABLE[40])
1524
#endif
1525
#if defined(TARGET_IS_TM4C129_RA1)
1526
#define ROM_EMACPHYExtendedRead \
1527
((uint16_t (*)(uint32_t ui32Base, \
1528
uint8_t ui8PhyAddr, \
1529
uint16_t ui16RegAddr))ROM_EMACTABLE[41])
1530
#endif
1531
#if defined(TARGET_IS_TM4C129_RA1)
1532
#define ROM_EMACPHYExtendedWrite \
1533
((void (*)(uint32_t ui32Base, \
1534
uint8_t ui8PhyAddr, \
1535
uint16_t ui16RegAddr, \
1536
uint16_t ui16Data))ROM_EMACTABLE[42])
1537
#endif
1538
#if defined(TARGET_IS_TM4C129_RA1)
1539
#define ROM_EMACPowerManagementControlGet \
1540
((uint32_t (*)(uint32_t ui32Base))ROM_EMACTABLE[43])
1541
#endif
1542
#if defined(TARGET_IS_TM4C129_RA1)
1543
#define ROM_EMACPowerManagementControlSet \
1544
((void (*)(uint32_t ui32Base, \
1545
uint32_t ui32Flags))ROM_EMACTABLE[44])
1546
#endif
1547
#if defined(TARGET_IS_TM4C129_RA1)
1548
#define ROM_EMACPowerManagementStatusGet \
1549
((uint32_t (*)(uint32_t ui32Base))ROM_EMACTABLE[45])
1550
#endif
1551
#if defined(TARGET_IS_TM4C129_RA1)
1552
#define ROM_EMACRemoteWakeUpFrameFilterGet \
1553
((void (*)(uint32_t ui32Base, \
1554
tEMACWakeUpFrameFilter *pFilter))ROM_EMACTABLE[46])
1555
#endif
1556
#if defined(TARGET_IS_TM4C129_RA1)
1557
#define ROM_EMACRemoteWakeUpFrameFilterSet \
1558
((void (*)(uint32_t ui32Base, \
1559
const tEMACWakeUpFrameFilter *pFilter))ROM_EMACTABLE[47])
1560
#endif
1561
#if defined(TARGET_IS_TM4C129_RA1)
1562
#define ROM_EMACTimestampAddendSet \
1563
((void (*)(uint32_t ui32Base, \
1564
uint32_t ui32Seconds))ROM_EMACTABLE[48])
1565
#endif
1566
#if defined(TARGET_IS_TM4C129_RA1)
1567
#define ROM_EMACTimestampConfigGet \
1568
((uint32_t (*)(uint32_t ui32Base, \
1569
uint32_t *pui32SubSecondInc))ROM_EMACTABLE[49])
1570
#endif
1571
#if defined(TARGET_IS_TM4C129_RA1)
1572
#define ROM_EMACTimestampConfigSet \
1573
((void (*)(uint32_t ui32Base, \
1574
uint32_t ui32Config, \
1575
uint32_t ui32SubSecondInc))ROM_EMACTABLE[50])
1576
#endif
1577
#if defined(TARGET_IS_TM4C129_RA1)
1578
#define ROM_EMACTimestampDisable \
1579
((void (*)(uint32_t ui32Base))ROM_EMACTABLE[51])
1580
#endif
1581
#if defined(TARGET_IS_TM4C129_RA1)
1582
#define ROM_EMACTimestampEnable \
1583
((void (*)(uint32_t ui32Base))ROM_EMACTABLE[52])
1584
#endif
1585
#if defined(TARGET_IS_TM4C129_RA1)
1586
#define ROM_EMACTimestampIntStatus \
1587
((uint32_t (*)(uint32_t ui32Base))ROM_EMACTABLE[53])
1588
#endif
1589
#if defined(TARGET_IS_TM4C129_RA1)
1590
#define ROM_EMACTimestampPPSCommand \
1591
((void (*)(uint32_t ui32Base, \
1592
uint8_t ui8Cmd))ROM_EMACTABLE[54])
1593
#endif
1594
#if defined(TARGET_IS_TM4C129_RA1)
1595
#define ROM_EMACTimestampPPSCommandModeSet \
1596
((void (*)(uint32_t ui32Base, \
1597
uint32_t ui32Config))ROM_EMACTABLE[55])
1598
#endif
1599
#if defined(TARGET_IS_TM4C129_RA1)
1600
#define ROM_EMACTimestampPPSPeriodSet \
1601
((void (*)(uint32_t ui32Base, \
1602
uint32_t ui32Period, \
1603
uint32_t ui32Width))ROM_EMACTABLE[56])
1604
#endif
1605
#if defined(TARGET_IS_TM4C129_RA1)
1606
#define ROM_EMACTimestampPPSSimpleModeSet \
1607
((void (*)(uint32_t ui32Base, \
1608
uint32_t ui32FreqConfig))ROM_EMACTABLE[57])
1609
#endif
1610
#if defined(TARGET_IS_TM4C129_RA1)
1611
#define ROM_EMACTimestampSysTimeGet \
1612
((void (*)(uint32_t ui32Base, \
1613
uint32_t *pui32Seconds, \
1614
uint32_t *pui32SubSeconds))ROM_EMACTABLE[58])
1615
#endif
1616
#if defined(TARGET_IS_TM4C129_RA1)
1617
#define ROM_EMACTimestampSysTimeSet \
1618
((void (*)(uint32_t ui32Base, \
1619
uint32_t ui32Seconds, \
1620
uint32_t ui32SubSeconds))ROM_EMACTABLE[59])
1621
#endif
1622
#if defined(TARGET_IS_TM4C129_RA1)
1623
#define ROM_EMACTimestampSysTimeUpdate \
1624
((void (*)(uint32_t ui32Base, \
1625
uint32_t ui32Seconds, \
1626
uint32_t ui32SubSeconds, \
1627
bool bInc))ROM_EMACTABLE[60])
1628
#endif
1629
#if defined(TARGET_IS_TM4C129_RA1)
1630
#define ROM_EMACTimestampTargetIntDisable \
1631
((void (*)(uint32_t ui32Base))ROM_EMACTABLE[61])
1632
#endif
1633
#if defined(TARGET_IS_TM4C129_RA1)
1634
#define ROM_EMACTimestampTargetIntEnable \
1635
((void (*)(uint32_t ui32Base))ROM_EMACTABLE[62])
1636
#endif
1637
#if defined(TARGET_IS_TM4C129_RA1)
1638
#define ROM_EMACTimestampTargetSet \
1639
((void (*)(uint32_t ui32Base, \
1640
uint32_t ui32Seconds, \
1641
uint32_t ui32Nanoseconds))ROM_EMACTABLE[63])
1642
#endif
1643
#if defined(TARGET_IS_TM4C129_RA1)
1644
#define ROM_EMACVLANHashFilterBitCalculate \
1645
((uint32_t (*)(uint16_t ui16Tag))ROM_EMACTABLE[64])
1646
#endif
1647
#if defined(TARGET_IS_TM4C129_RA1)
1648
#define ROM_EMACVLANHashFilterGet \
1649
((uint32_t (*)(uint32_t ui32Base))ROM_EMACTABLE[65])
1650
#endif
1651
#if defined(TARGET_IS_TM4C129_RA1)
1652
#define ROM_EMACVLANHashFilterSet \
1653
((void (*)(uint32_t ui32Base, \
1654
uint32_t ui32Hash))ROM_EMACTABLE[66])
1655
#endif
1656
#if defined(TARGET_IS_TM4C129_RA1)
1657
#define ROM_EMACVLANRxConfigGet \
1658
((uint32_t (*)(uint32_t ui32Base, \
1659
uint16_t *pui16Tag))ROM_EMACTABLE[67])
1660
#endif
1661
#if defined(TARGET_IS_TM4C129_RA1)
1662
#define ROM_EMACVLANRxConfigSet \
1663
((void (*)(uint32_t ui32Base, \
1664
uint16_t ui16Tag, \
1665
uint32_t ui32Config))ROM_EMACTABLE[68])
1666
#endif
1667
#if defined(TARGET_IS_TM4C129_RA1)
1668
#define ROM_EMACVLANTxConfigGet \
1669
((uint32_t (*)(uint32_t ui32Base, \
1670
uint16_t *pui16Tag))ROM_EMACTABLE[69])
1671
#endif
1672
#if defined(TARGET_IS_TM4C129_RA1)
1673
#define ROM_EMACVLANTxConfigSet \
1674
((void (*)(uint32_t ui32Base, \
1675
uint16_t ui16Tag, \
1676
uint32_t ui32Config))ROM_EMACTABLE[70])
1677
#endif
1678
#if defined(TARGET_IS_TM4C129_RA1)
1679
#define ROM_UpdateEMAC \
1680
((void (*)(uint32_t ui32Clock))ROM_EMACTABLE[71])
1681
#endif
1682
1683
//*****************************************************************************
1684
//
1685
// Macros for calling ROM functions in the Flash API.
1686
//
1687
//*****************************************************************************
1688
#if defined(TARGET_IS_TM4C123_RA1) || \
1689
defined(TARGET_IS_TM4C123_RA3) || \
1690
defined(TARGET_IS_TM4C123_RB1) || \
1691
defined(TARGET_IS_TM4C129_RA0) || \
1692
defined(TARGET_IS_TM4C129_RA1)
1693
#define ROM_FlashProgram \
1694
((int32_t (*)(uint32_t *pui32Data, \
1695
uint32_t ui32Address, \
1696
uint32_t ui32Count))ROM_FLASHTABLE[0])
1697
#endif
1698
#if defined(TARGET_IS_TM4C123_RA1) || \
1699
defined(TARGET_IS_TM4C123_RA3) || \
1700
defined(TARGET_IS_TM4C123_RB1) || \
1701
defined(TARGET_IS_TM4C129_RA0) || \
1702
defined(TARGET_IS_TM4C129_RA1)
1703
#define ROM_FlashErase \
1704
((int32_t (*)(uint32_t ui32Address))ROM_FLASHTABLE[3])
1705
#endif
1706
#if defined(TARGET_IS_TM4C123_RA1) || \
1707
defined(TARGET_IS_TM4C123_RA3) || \
1708
defined(TARGET_IS_TM4C123_RB1) || \
1709
defined(TARGET_IS_TM4C129_RA0) || \
1710
defined(TARGET_IS_TM4C129_RA1)
1711
#define ROM_FlashProtectGet \
1712
((tFlashProtection (*)(uint32_t ui32Address))ROM_FLASHTABLE[4])
1713
#endif
1714
#if defined(TARGET_IS_TM4C123_RA1) || \
1715
defined(TARGET_IS_TM4C123_RA3) || \
1716
defined(TARGET_IS_TM4C123_RB1) || \
1717
defined(TARGET_IS_TM4C129_RA0) || \
1718
defined(TARGET_IS_TM4C129_RA1)
1719
#define ROM_FlashProtectSet \
1720
((int32_t (*)(uint32_t ui32Address, \
1721
tFlashProtection eProtect))ROM_FLASHTABLE[5])
1722
#endif
1723
#if defined(TARGET_IS_TM4C123_RA1) || \
1724
defined(TARGET_IS_TM4C123_RA3) || \
1725
defined(TARGET_IS_TM4C123_RB1) || \
1726
defined(TARGET_IS_TM4C129_RA0) || \
1727
defined(TARGET_IS_TM4C129_RA1)
1728
#define ROM_FlashProtectSave \
1729
((int32_t (*)(void))ROM_FLASHTABLE[6])
1730
#endif
1731
#if defined(TARGET_IS_TM4C123_RA1) || \
1732
defined(TARGET_IS_TM4C123_RA3) || \
1733
defined(TARGET_IS_TM4C123_RB1) || \
1734
defined(TARGET_IS_TM4C129_RA0) || \
1735
defined(TARGET_IS_TM4C129_RA1)
1736
#define ROM_FlashUserGet \
1737
((int32_t (*)(uint32_t *pui32User0, \
1738
uint32_t *pui32User1))ROM_FLASHTABLE[7])
1739
#endif
1740
#if defined(TARGET_IS_TM4C123_RA1) || \
1741
defined(TARGET_IS_TM4C123_RA3) || \
1742
defined(TARGET_IS_TM4C123_RB1) || \
1743
defined(TARGET_IS_TM4C129_RA0) || \
1744
defined(TARGET_IS_TM4C129_RA1)
1745
#define ROM_FlashUserSet \
1746
((int32_t (*)(uint32_t ui32User0, \
1747
uint32_t ui32User1))ROM_FLASHTABLE[8])
1748
#endif
1749
#if defined(TARGET_IS_TM4C123_RA1) || \
1750
defined(TARGET_IS_TM4C123_RA3) || \
1751
defined(TARGET_IS_TM4C123_RB1) || \
1752
defined(TARGET_IS_TM4C129_RA0) || \
1753
defined(TARGET_IS_TM4C129_RA1)
1754
#define ROM_FlashUserSave \
1755
((int32_t (*)(void))ROM_FLASHTABLE[9])
1756
#endif
1757
#if defined(TARGET_IS_TM4C123_RA1) || \
1758
defined(TARGET_IS_TM4C123_RA3) || \
1759
defined(TARGET_IS_TM4C123_RB1) || \
1760
defined(TARGET_IS_TM4C129_RA0) || \
1761
defined(TARGET_IS_TM4C129_RA1)
1762
#define ROM_FlashIntEnable \
1763
((void (*)(uint32_t ui32IntFlags))ROM_FLASHTABLE[10])
1764
#endif
1765
#if defined(TARGET_IS_TM4C123_RA1) || \
1766
defined(TARGET_IS_TM4C123_RA3) || \
1767
defined(TARGET_IS_TM4C123_RB1) || \
1768
defined(TARGET_IS_TM4C129_RA0) || \
1769
defined(TARGET_IS_TM4C129_RA1)
1770
#define ROM_FlashIntDisable \
1771
((void (*)(uint32_t ui32IntFlags))ROM_FLASHTABLE[11])
1772
#endif
1773
#if defined(TARGET_IS_TM4C123_RA1) || \
1774
defined(TARGET_IS_TM4C123_RA3) || \
1775
defined(TARGET_IS_TM4C123_RB1) || \
1776
defined(TARGET_IS_TM4C129_RA0) || \
1777
defined(TARGET_IS_TM4C129_RA1)
1778
#define ROM_FlashIntStatus \
1779
((uint32_t (*)(bool bMasked))ROM_FLASHTABLE[12])
1780
#endif
1781
#if defined(TARGET_IS_TM4C123_RA1) || \
1782
defined(TARGET_IS_TM4C123_RA3) || \
1783
defined(TARGET_IS_TM4C123_RB1) || \
1784
defined(TARGET_IS_TM4C129_RA0) || \
1785
defined(TARGET_IS_TM4C129_RA1)
1786
#define ROM_FlashIntClear \
1787
((void (*)(uint32_t ui32IntFlags))ROM_FLASHTABLE[13])
1788
#endif
1789
1790
//*****************************************************************************
1791
//
1792
// Macros for calling ROM functions in the FPU API.
1793
//
1794
//*****************************************************************************
1795
#if defined(TARGET_IS_TM4C123_RA1) || \
1796
defined(TARGET_IS_TM4C123_RA3) || \
1797
defined(TARGET_IS_TM4C123_RB1) || \
1798
defined(TARGET_IS_TM4C129_RA0) || \
1799
defined(TARGET_IS_TM4C129_RA1)
1800
#define ROM_FPUEnable \
1801
((void (*)(void))ROM_FPUTABLE[0])
1802
#endif
1803
#if defined(TARGET_IS_TM4C123_RA1) || \
1804
defined(TARGET_IS_TM4C123_RA3) || \
1805
defined(TARGET_IS_TM4C123_RB1) || \
1806
defined(TARGET_IS_TM4C129_RA0) || \
1807
defined(TARGET_IS_TM4C129_RA1)
1808
#define ROM_FPUDisable \
1809
((void (*)(void))ROM_FPUTABLE[1])
1810
#endif
1811
#if defined(TARGET_IS_TM4C123_RA1) || \
1812
defined(TARGET_IS_TM4C123_RA3) || \
1813
defined(TARGET_IS_TM4C123_RB1) || \
1814
defined(TARGET_IS_TM4C129_RA0) || \
1815
defined(TARGET_IS_TM4C129_RA1)
1816
#define ROM_FPUFlushToZeroModeSet \
1817
((void (*)(uint32_t ui32Mode))ROM_FPUTABLE[2])
1818
#endif
1819
#if defined(TARGET_IS_TM4C123_RA1) || \
1820
defined(TARGET_IS_TM4C123_RA3) || \
1821
defined(TARGET_IS_TM4C123_RB1) || \
1822
defined(TARGET_IS_TM4C129_RA0) || \
1823
defined(TARGET_IS_TM4C129_RA1)
1824
#define ROM_FPUHalfPrecisionModeSet \
1825
((void (*)(uint32_t ui32Mode))ROM_FPUTABLE[3])
1826
#endif
1827
#if defined(TARGET_IS_TM4C123_RA1) || \
1828
defined(TARGET_IS_TM4C123_RA3) || \
1829
defined(TARGET_IS_TM4C123_RB1) || \
1830
defined(TARGET_IS_TM4C129_RA0) || \
1831
defined(TARGET_IS_TM4C129_RA1)
1832
#define ROM_FPULazyStackingEnable \
1833
((void (*)(void))ROM_FPUTABLE[4])
1834
#endif
1835
#if defined(TARGET_IS_TM4C123_RA1) || \
1836
defined(TARGET_IS_TM4C123_RA3) || \
1837
defined(TARGET_IS_TM4C123_RB1) || \
1838
defined(TARGET_IS_TM4C129_RA0) || \
1839
defined(TARGET_IS_TM4C129_RA1)
1840
#define ROM_FPUNaNModeSet \
1841
((void (*)(uint32_t ui32Mode))ROM_FPUTABLE[5])
1842
#endif
1843
#if defined(TARGET_IS_TM4C123_RA1) || \
1844
defined(TARGET_IS_TM4C123_RA3) || \
1845
defined(TARGET_IS_TM4C123_RB1) || \
1846
defined(TARGET_IS_TM4C129_RA0) || \
1847
defined(TARGET_IS_TM4C129_RA1)
1848
#define ROM_FPURoundingModeSet \
1849
((void (*)(uint32_t ui32Mode))ROM_FPUTABLE[6])
1850
#endif
1851
#if defined(TARGET_IS_TM4C123_RA1) || \
1852
defined(TARGET_IS_TM4C123_RA3) || \
1853
defined(TARGET_IS_TM4C123_RB1) || \
1854
defined(TARGET_IS_TM4C129_RA0) || \
1855
defined(TARGET_IS_TM4C129_RA1)
1856
#define ROM_FPUStackingDisable \
1857
((void (*)(void))ROM_FPUTABLE[7])
1858
#endif
1859
#if defined(TARGET_IS_TM4C123_RA1) || \
1860
defined(TARGET_IS_TM4C123_RA3) || \
1861
defined(TARGET_IS_TM4C123_RB1) || \
1862
defined(TARGET_IS_TM4C129_RA0) || \
1863
defined(TARGET_IS_TM4C129_RA1)
1864
#define ROM_FPUStackingEnable \
1865
((void (*)(void))ROM_FPUTABLE[8])
1866
#endif
1867
1868
//*****************************************************************************
1869
//
1870
// Macros for calling ROM functions in the GPIO API.
1871
//
1872
//*****************************************************************************
1873
#if defined(TARGET_IS_TM4C123_RA1) || \
1874
defined(TARGET_IS_TM4C123_RA3) || \
1875
defined(TARGET_IS_TM4C123_RB1) || \
1876
defined(TARGET_IS_TM4C129_RA0) || \
1877
defined(TARGET_IS_TM4C129_RA1)
1878
#define ROM_GPIOPinWrite \
1879
((void (*)(uint32_t ui32Port, \
1880
uint8_t ui8Pins, \
1881
uint8_t ui8Val))ROM_GPIOTABLE[0])
1882
#endif
1883
#if defined(TARGET_IS_TM4C123_RA1) || \
1884
defined(TARGET_IS_TM4C123_RA3) || \
1885
defined(TARGET_IS_TM4C123_RB1) || \
1886
defined(TARGET_IS_TM4C129_RA0) || \
1887
defined(TARGET_IS_TM4C129_RA1)
1888
#define ROM_GPIODirModeSet \
1889
((void (*)(uint32_t ui32Port, \
1890
uint8_t ui8Pins, \
1891
uint32_t ui32PinIO))ROM_GPIOTABLE[1])
1892
#endif
1893
#if defined(TARGET_IS_TM4C123_RA1) || \
1894
defined(TARGET_IS_TM4C123_RA3) || \
1895
defined(TARGET_IS_TM4C123_RB1) || \
1896
defined(TARGET_IS_TM4C129_RA0) || \
1897
defined(TARGET_IS_TM4C129_RA1)
1898
#define ROM_GPIODirModeGet \
1899
((uint32_t (*)(uint32_t ui32Port, \
1900
uint8_t ui8Pin))ROM_GPIOTABLE[2])
1901
#endif
1902
#if defined(TARGET_IS_TM4C123_RA1) || \
1903
defined(TARGET_IS_TM4C123_RA3) || \
1904
defined(TARGET_IS_TM4C123_RB1) || \
1905
defined(TARGET_IS_TM4C129_RA0) || \
1906
defined(TARGET_IS_TM4C129_RA1)
1907
#define ROM_GPIOIntTypeSet \
1908
((void (*)(uint32_t ui32Port, \
1909
uint8_t ui8Pins, \
1910
uint32_t ui32IntType))ROM_GPIOTABLE[3])
1911
#endif
1912
#if defined(TARGET_IS_TM4C123_RA1) || \
1913
defined(TARGET_IS_TM4C123_RA3) || \
1914
defined(TARGET_IS_TM4C123_RB1) || \
1915
defined(TARGET_IS_TM4C129_RA0) || \
1916
defined(TARGET_IS_TM4C129_RA1)
1917
#define ROM_GPIOIntTypeGet \
1918
((uint32_t (*)(uint32_t ui32Port, \
1919
uint8_t ui8Pin))ROM_GPIOTABLE[4])
1920
#endif
1921
#if defined(TARGET_IS_TM4C123_RA1) || \
1922
defined(TARGET_IS_TM4C123_RA3) || \
1923
defined(TARGET_IS_TM4C123_RB1)
1924
#define ROM_GPIOPadConfigSet \
1925
((void (*)(uint32_t ui32Port, \
1926
uint8_t ui8Pins, \
1927
uint32_t ui32Strength, \
1928
uint32_t ui32PadType))ROM_GPIOTABLE[5])
1929
#endif
1930
#if defined(TARGET_IS_TM4C123_RA1) || \
1931
defined(TARGET_IS_TM4C123_RA3) || \
1932
defined(TARGET_IS_TM4C123_RB1) || \
1933
defined(TARGET_IS_TM4C129_RA0) || \
1934
defined(TARGET_IS_TM4C129_RA1)
1935
#define ROM_GPIOPadConfigGet \
1936
((void (*)(uint32_t ui32Port, \
1937
uint8_t ui8Pin, \
1938
uint32_t *pui32Strength, \
1939
uint32_t *pui32PadType))ROM_GPIOTABLE[6])
1940
#endif
1941
#if defined(TARGET_IS_TM4C123_RA1) || \
1942
defined(TARGET_IS_TM4C123_RA3) || \
1943
defined(TARGET_IS_TM4C123_RB1) || \
1944
defined(TARGET_IS_TM4C129_RA0) || \
1945
defined(TARGET_IS_TM4C129_RA1)
1946
#define ROM_GPIOPinRead \
1947
((int32_t (*)(uint32_t ui32Port, \
1948
uint8_t ui8Pins))ROM_GPIOTABLE[11])
1949
#endif
1950
#if defined(TARGET_IS_TM4C123_RA1) || \
1951
defined(TARGET_IS_TM4C123_RA3) || \
1952
defined(TARGET_IS_TM4C123_RB1)
1953
#define ROM_GPIOPinTypeCAN \
1954
((void (*)(uint32_t ui32Port, \
1955
uint8_t ui8Pins))ROM_GPIOTABLE[12])
1956
#endif
1957
#if defined(TARGET_IS_TM4C123_RA1) || \
1958
defined(TARGET_IS_TM4C123_RA3) || \
1959
defined(TARGET_IS_TM4C123_RB1) || \
1960
defined(TARGET_IS_TM4C129_RA0) || \
1961
defined(TARGET_IS_TM4C129_RA1)
1962
#define ROM_GPIOPinTypeComparator \
1963
((void (*)(uint32_t ui32Port, \
1964
uint8_t ui8Pins))ROM_GPIOTABLE[13])
1965
#endif
1966
#if defined(TARGET_IS_TM4C123_RA1) || \
1967
defined(TARGET_IS_TM4C123_RA3) || \
1968
defined(TARGET_IS_TM4C123_RB1) || \
1969
defined(TARGET_IS_TM4C129_RA0) || \
1970
defined(TARGET_IS_TM4C129_RA1)
1971
#define ROM_GPIOPinTypeGPIOInput \
1972
((void (*)(uint32_t ui32Port, \
1973
uint8_t ui8Pins))ROM_GPIOTABLE[14])
1974
#endif
1975
#if defined(TARGET_IS_TM4C123_RA1) || \
1976
defined(TARGET_IS_TM4C123_RA3) || \
1977
defined(TARGET_IS_TM4C123_RB1) || \
1978
defined(TARGET_IS_TM4C129_RA0) || \
1979
defined(TARGET_IS_TM4C129_RA1)
1980
#define ROM_GPIOPinTypeGPIOOutput \
1981
((void (*)(uint32_t ui32Port, \
1982
uint8_t ui8Pins))ROM_GPIOTABLE[15])
1983
#endif
1984
#if defined(TARGET_IS_TM4C123_RA1) || \
1985
defined(TARGET_IS_TM4C123_RA3) || \
1986
defined(TARGET_IS_TM4C123_RB1) || \
1987
defined(TARGET_IS_TM4C129_RA0) || \
1988
defined(TARGET_IS_TM4C129_RA1)
1989
#define ROM_GPIOPinTypeI2C \
1990
((void (*)(uint32_t ui32Port, \
1991
uint8_t ui8Pins))ROM_GPIOTABLE[16])
1992
#endif
1993
#if defined(TARGET_IS_TM4C123_RA1) || \
1994
defined(TARGET_IS_TM4C123_RA3) || \
1995
defined(TARGET_IS_TM4C123_RB1) || \
1996
defined(TARGET_IS_TM4C129_RA0) || \
1997
defined(TARGET_IS_TM4C129_RA1)
1998
#define ROM_GPIOPinTypePWM \
1999
((void (*)(uint32_t ui32Port, \
2000
uint8_t ui8Pins))ROM_GPIOTABLE[17])
2001
#endif
2002
#if defined(TARGET_IS_TM4C123_RA1) || \
2003
defined(TARGET_IS_TM4C123_RA3) || \
2004
defined(TARGET_IS_TM4C123_RB1) || \
2005
defined(TARGET_IS_TM4C129_RA0) || \
2006
defined(TARGET_IS_TM4C129_RA1)
2007
#define ROM_GPIOPinTypeQEI \
2008
((void (*)(uint32_t ui32Port, \
2009
uint8_t ui8Pins))ROM_GPIOTABLE[18])
2010
#endif
2011
#if defined(TARGET_IS_TM4C123_RA1) || \
2012
defined(TARGET_IS_TM4C123_RA3) || \
2013
defined(TARGET_IS_TM4C123_RB1) || \
2014
defined(TARGET_IS_TM4C129_RA0) || \
2015
defined(TARGET_IS_TM4C129_RA1)
2016
#define ROM_GPIOPinTypeSSI \
2017
((void (*)(uint32_t ui32Port, \
2018
uint8_t ui8Pins))ROM_GPIOTABLE[19])
2019
#endif
2020
#if defined(TARGET_IS_TM4C123_RA1) || \
2021
defined(TARGET_IS_TM4C123_RA3) || \
2022
defined(TARGET_IS_TM4C123_RB1) || \
2023
defined(TARGET_IS_TM4C129_RA0) || \
2024
defined(TARGET_IS_TM4C129_RA1)
2025
#define ROM_GPIOPinTypeTimer \
2026
((void (*)(uint32_t ui32Port, \
2027
uint8_t ui8Pins))ROM_GPIOTABLE[20])
2028
#endif
2029
#if defined(TARGET_IS_TM4C123_RA1) || \
2030
defined(TARGET_IS_TM4C123_RA3) || \
2031
defined(TARGET_IS_TM4C123_RB1) || \
2032
defined(TARGET_IS_TM4C129_RA0) || \
2033
defined(TARGET_IS_TM4C129_RA1)
2034
#define ROM_GPIOPinTypeUART \
2035
((void (*)(uint32_t ui32Port, \
2036
uint8_t ui8Pins))ROM_GPIOTABLE[21])
2037
#endif
2038
#if defined(TARGET_IS_TM4C123_RA1) || \
2039
defined(TARGET_IS_TM4C123_RA3) || \
2040
defined(TARGET_IS_TM4C123_RB1) || \
2041
defined(TARGET_IS_TM4C129_RA0) || \
2042
defined(TARGET_IS_TM4C129_RA1)
2043
#define ROM_GPIOPinTypeGPIOOutputOD \
2044
((void (*)(uint32_t ui32Port, \
2045
uint8_t ui8Pins))ROM_GPIOTABLE[22])
2046
#endif
2047
#if defined(TARGET_IS_TM4C123_RA1) || \
2048
defined(TARGET_IS_TM4C123_RA3) || \
2049
defined(TARGET_IS_TM4C123_RB1) || \
2050
defined(TARGET_IS_TM4C129_RA0) || \
2051
defined(TARGET_IS_TM4C129_RA1)
2052
#define ROM_GPIOPinTypeADC \
2053
((void (*)(uint32_t ui32Port, \
2054
uint8_t ui8Pins))ROM_GPIOTABLE[23])
2055
#endif
2056
#if defined(TARGET_IS_TM4C123_RA1) || \
2057
defined(TARGET_IS_TM4C123_RA3) || \
2058
defined(TARGET_IS_TM4C123_RB1) || \
2059
defined(TARGET_IS_TM4C129_RA0) || \
2060
defined(TARGET_IS_TM4C129_RA1)
2061
#define ROM_GPIOPinTypeUSBDigital \
2062
((void (*)(uint32_t ui32Port, \
2063
uint8_t ui8Pins))ROM_GPIOTABLE[24])
2064
#endif
2065
#if defined(TARGET_IS_TM4C123_RA1) || \
2066
defined(TARGET_IS_TM4C123_RA3) || \
2067
defined(TARGET_IS_TM4C123_RB1) || \
2068
defined(TARGET_IS_TM4C129_RA0) || \
2069
defined(TARGET_IS_TM4C129_RA1)
2070
#define ROM_GPIOPinConfigure \
2071
((void (*)(uint32_t ui32PinConfig))ROM_GPIOTABLE[26])
2072
#endif
2073
#if defined(TARGET_IS_TM4C123_RA1) || \
2074
defined(TARGET_IS_TM4C123_RA3) || \
2075
defined(TARGET_IS_TM4C123_RB1) || \
2076
defined(TARGET_IS_TM4C129_RA0) || \
2077
defined(TARGET_IS_TM4C129_RA1)
2078
#define ROM_GPIOPinTypeUSBAnalog \
2079
((void (*)(uint32_t ui32Port, \
2080
uint8_t ui8Pins))ROM_GPIOTABLE[28])
2081
#endif
2082
#if defined(TARGET_IS_TM4C123_RA1) || \
2083
defined(TARGET_IS_TM4C123_RA3) || \
2084
defined(TARGET_IS_TM4C123_RB1) || \
2085
defined(TARGET_IS_TM4C129_RA0) || \
2086
defined(TARGET_IS_TM4C129_RA1)
2087
#define ROM_GPIODMATriggerEnable \
2088
((void (*)(uint32_t ui32Port, \
2089
uint8_t ui8Pins))ROM_GPIOTABLE[31])
2090
#endif
2091
#if defined(TARGET_IS_TM4C123_RA1) || \
2092
defined(TARGET_IS_TM4C123_RA3) || \
2093
defined(TARGET_IS_TM4C123_RB1) || \
2094
defined(TARGET_IS_TM4C129_RA0) || \
2095
defined(TARGET_IS_TM4C129_RA1)
2096
#define ROM_GPIODMATriggerDisable \
2097
((void (*)(uint32_t ui32Port, \
2098
uint8_t ui8Pins))ROM_GPIOTABLE[32])
2099
#endif
2100
#if defined(TARGET_IS_TM4C123_RA1) || \
2101
defined(TARGET_IS_TM4C123_RA3) || \
2102
defined(TARGET_IS_TM4C123_RB1) || \
2103
defined(TARGET_IS_TM4C129_RA0) || \
2104
defined(TARGET_IS_TM4C129_RA1)
2105
#define ROM_GPIOADCTriggerEnable \
2106
((void (*)(uint32_t ui32Port, \
2107
uint8_t ui8Pins))ROM_GPIOTABLE[33])
2108
#endif
2109
#if defined(TARGET_IS_TM4C123_RA1) || \
2110
defined(TARGET_IS_TM4C123_RA3) || \
2111
defined(TARGET_IS_TM4C123_RB1) || \
2112
defined(TARGET_IS_TM4C129_RA0) || \
2113
defined(TARGET_IS_TM4C129_RA1)
2114
#define ROM_GPIOADCTriggerDisable \
2115
((void (*)(uint32_t ui32Port, \
2116
uint8_t ui8Pins))ROM_GPIOTABLE[34])
2117
#endif
2118
#if defined(TARGET_IS_TM4C123_RA3) || \
2119
defined(TARGET_IS_TM4C123_RB1) || \
2120
defined(TARGET_IS_TM4C129_RA0) || \
2121
defined(TARGET_IS_TM4C129_RA1)
2122
#define ROM_GPIOPinTypeI2CSCL \
2123
((void (*)(uint32_t ui32Port, \
2124
uint8_t ui8Pins))ROM_GPIOTABLE[39])
2125
#endif
2126
#if defined(TARGET_IS_TM4C129_RA0) || \
2127
defined(TARGET_IS_TM4C129_RA1)
2128
#define ROM_GPIOPinTypeOneWire \
2129
((void (*)(uint32_t ui32Port, \
2130
uint8_t ui8Pins))ROM_GPIOTABLE[44])
2131
#endif
2132
#if defined(TARGET_IS_TM4C129_RA0) || \
2133
defined(TARGET_IS_TM4C129_RA1)
2134
#define ROM_GPIOPinTypeWakeHigh \
2135
((void (*)(uint32_t ui32Port, \
2136
uint8_t ui8Pins))ROM_GPIOTABLE[48])
2137
#endif
2138
#if defined(TARGET_IS_TM4C129_RA0) || \
2139
defined(TARGET_IS_TM4C129_RA1)
2140
#define ROM_GPIOPinTypeWakeLow \
2141
((void (*)(uint32_t ui32Port, \
2142
uint8_t ui8Pins))ROM_GPIOTABLE[49])
2143
#endif
2144
#if defined(TARGET_IS_TM4C129_RA0) || \
2145
defined(TARGET_IS_TM4C129_RA1)
2146
#define ROM_GPIOIntClear \
2147
((void (*)(uint32_t ui32Port, \
2148
uint32_t ui32IntFlags))ROM_GPIOTABLE[51])
2149
#endif
2150
#if defined(TARGET_IS_TM4C129_RA0) || \
2151
defined(TARGET_IS_TM4C129_RA1)
2152
#define ROM_GPIOIntDisable \
2153
((void (*)(uint32_t ui32Port, \
2154
uint32_t ui32IntFlags))ROM_GPIOTABLE[52])
2155
#endif
2156
#if defined(TARGET_IS_TM4C129_RA0) || \
2157
defined(TARGET_IS_TM4C129_RA1)
2158
#define ROM_GPIOIntEnable \
2159
((void (*)(uint32_t ui32Port, \
2160
uint32_t ui32IntFlags))ROM_GPIOTABLE[53])
2161
#endif
2162
#if defined(TARGET_IS_TM4C129_RA0) || \
2163
defined(TARGET_IS_TM4C129_RA1)
2164
#define ROM_GPIOIntStatus \
2165
((uint32_t (*)(uint32_t ui32Port, \
2166
bool bMasked))ROM_GPIOTABLE[54])
2167
#endif
2168
#if defined(TARGET_IS_TM4C129_RA0) || \
2169
defined(TARGET_IS_TM4C129_RA1)
2170
#define ROM_GPIOPinWakeStatus \
2171
((uint32_t (*)(uint32_t ui32Port))ROM_GPIOTABLE[55])
2172
#endif
2173
2174
//*****************************************************************************
2175
//
2176
// Macros for calling ROM functions in the Hibernate API.
2177
//
2178
//*****************************************************************************
2179
#if defined(TARGET_IS_TM4C123_RA1) || \
2180
defined(TARGET_IS_TM4C123_RA3) || \
2181
defined(TARGET_IS_TM4C123_RB1) || \
2182
defined(TARGET_IS_TM4C129_RA0) || \
2183
defined(TARGET_IS_TM4C129_RA1)
2184
#define ROM_HibernateIntClear \
2185
((void (*)(uint32_t ui32IntFlags))ROM_HIBERNATETABLE[0])
2186
#endif
2187
#if defined(TARGET_IS_TM4C123_RA1) || \
2188
defined(TARGET_IS_TM4C123_RA3) || \
2189
defined(TARGET_IS_TM4C123_RB1) || \
2190
defined(TARGET_IS_TM4C129_RA0) || \
2191
defined(TARGET_IS_TM4C129_RA1)
2192
#define ROM_HibernateEnableExpClk \
2193
((void (*)(uint32_t ui32HibClk))ROM_HIBERNATETABLE[1])
2194
#endif
2195
#if defined(TARGET_IS_TM4C123_RA1) || \
2196
defined(TARGET_IS_TM4C123_RA3) || \
2197
defined(TARGET_IS_TM4C123_RB1) || \
2198
defined(TARGET_IS_TM4C129_RA0) || \
2199
defined(TARGET_IS_TM4C129_RA1)
2200
#define ROM_HibernateDisable \
2201
((void (*)(void))ROM_HIBERNATETABLE[2])
2202
#endif
2203
#if defined(TARGET_IS_TM4C123_RA1) || \
2204
defined(TARGET_IS_TM4C123_RA3) || \
2205
defined(TARGET_IS_TM4C123_RB1) || \
2206
defined(TARGET_IS_TM4C129_RA0) || \
2207
defined(TARGET_IS_TM4C129_RA1)
2208
#define ROM_HibernateRTCEnable \
2209
((void (*)(void))ROM_HIBERNATETABLE[4])
2210
#endif
2211
#if defined(TARGET_IS_TM4C123_RA1) || \
2212
defined(TARGET_IS_TM4C123_RA3) || \
2213
defined(TARGET_IS_TM4C123_RB1) || \
2214
defined(TARGET_IS_TM4C129_RA0) || \
2215
defined(TARGET_IS_TM4C129_RA1)
2216
#define ROM_HibernateRTCDisable \
2217
((void (*)(void))ROM_HIBERNATETABLE[5])
2218
#endif
2219
#if defined(TARGET_IS_TM4C123_RA1) || \
2220
defined(TARGET_IS_TM4C123_RA3) || \
2221
defined(TARGET_IS_TM4C123_RB1) || \
2222
defined(TARGET_IS_TM4C129_RA0) || \
2223
defined(TARGET_IS_TM4C129_RA1)
2224
#define ROM_HibernateWakeSet \
2225
((void (*)(uint32_t ui32WakeFlags))ROM_HIBERNATETABLE[6])
2226
#endif
2227
#if defined(TARGET_IS_TM4C123_RA1) || \
2228
defined(TARGET_IS_TM4C123_RA3) || \
2229
defined(TARGET_IS_TM4C123_RB1) || \
2230
defined(TARGET_IS_TM4C129_RA0) || \
2231
defined(TARGET_IS_TM4C129_RA1)
2232
#define ROM_HibernateWakeGet \
2233
((uint32_t (*)(void))ROM_HIBERNATETABLE[7])
2234
#endif
2235
#if defined(TARGET_IS_TM4C123_RA1) || \
2236
defined(TARGET_IS_TM4C123_RA3) || \
2237
defined(TARGET_IS_TM4C123_RB1) || \
2238
defined(TARGET_IS_TM4C129_RA0) || \
2239
defined(TARGET_IS_TM4C129_RA1)
2240
#define ROM_HibernateLowBatSet \
2241
((void (*)(uint32_t ui32LowBatFlags))ROM_HIBERNATETABLE[8])
2242
#endif
2243
#if defined(TARGET_IS_TM4C123_RA1) || \
2244
defined(TARGET_IS_TM4C123_RA3) || \
2245
defined(TARGET_IS_TM4C123_RB1) || \
2246
defined(TARGET_IS_TM4C129_RA0) || \
2247
defined(TARGET_IS_TM4C129_RA1)
2248
#define ROM_HibernateLowBatGet \
2249
((uint32_t (*)(void))ROM_HIBERNATETABLE[9])
2250
#endif
2251
#if defined(TARGET_IS_TM4C123_RA1) || \
2252
defined(TARGET_IS_TM4C123_RA3) || \
2253
defined(TARGET_IS_TM4C123_RB1) || \
2254
defined(TARGET_IS_TM4C129_RA0) || \
2255
defined(TARGET_IS_TM4C129_RA1)
2256
#define ROM_HibernateRTCSet \
2257
((void (*)(uint32_t ui32RTCValue))ROM_HIBERNATETABLE[10])
2258
#endif
2259
#if defined(TARGET_IS_TM4C123_RA1) || \
2260
defined(TARGET_IS_TM4C123_RA3) || \
2261
defined(TARGET_IS_TM4C123_RB1) || \
2262
defined(TARGET_IS_TM4C129_RA0) || \
2263
defined(TARGET_IS_TM4C129_RA1)
2264
#define ROM_HibernateRTCGet \
2265
((uint32_t (*)(void))ROM_HIBERNATETABLE[11])
2266
#endif
2267
#if defined(TARGET_IS_TM4C123_RA1) || \
2268
defined(TARGET_IS_TM4C123_RA3) || \
2269
defined(TARGET_IS_TM4C123_RB1) || \
2270
defined(TARGET_IS_TM4C129_RA0) || \
2271
defined(TARGET_IS_TM4C129_RA1)
2272
#define ROM_HibernateRTCTrimSet \
2273
((void (*)(uint32_t ui32Trim))ROM_HIBERNATETABLE[16])
2274
#endif
2275
#if defined(TARGET_IS_TM4C123_RA1) || \
2276
defined(TARGET_IS_TM4C123_RA3) || \
2277
defined(TARGET_IS_TM4C123_RB1) || \
2278
defined(TARGET_IS_TM4C129_RA0) || \
2279
defined(TARGET_IS_TM4C129_RA1)
2280
#define ROM_HibernateRTCTrimGet \
2281
((uint32_t (*)(void))ROM_HIBERNATETABLE[17])
2282
#endif
2283
#if defined(TARGET_IS_TM4C123_RA1) || \
2284
defined(TARGET_IS_TM4C123_RA3) || \
2285
defined(TARGET_IS_TM4C123_RB1) || \
2286
defined(TARGET_IS_TM4C129_RA0) || \
2287
defined(TARGET_IS_TM4C129_RA1)
2288
#define ROM_HibernateDataSet \
2289
((void (*)(uint32_t *pui32Data, \
2290
uint32_t ui32Count))ROM_HIBERNATETABLE[18])
2291
#endif
2292
#if defined(TARGET_IS_TM4C123_RA1) || \
2293
defined(TARGET_IS_TM4C123_RA3) || \
2294
defined(TARGET_IS_TM4C123_RB1) || \
2295
defined(TARGET_IS_TM4C129_RA0) || \
2296
defined(TARGET_IS_TM4C129_RA1)
2297
#define ROM_HibernateDataGet \
2298
((void (*)(uint32_t *pui32Data, \
2299
uint32_t ui32Count))ROM_HIBERNATETABLE[19])
2300
#endif
2301
#if defined(TARGET_IS_TM4C123_RA1) || \
2302
defined(TARGET_IS_TM4C123_RA3) || \
2303
defined(TARGET_IS_TM4C123_RB1) || \
2304
defined(TARGET_IS_TM4C129_RA0) || \
2305
defined(TARGET_IS_TM4C129_RA1)
2306
#define ROM_HibernateRequest \
2307
((void (*)(void))ROM_HIBERNATETABLE[20])
2308
#endif
2309
#if defined(TARGET_IS_TM4C123_RA1) || \
2310
defined(TARGET_IS_TM4C123_RA3) || \
2311
defined(TARGET_IS_TM4C123_RB1) || \
2312
defined(TARGET_IS_TM4C129_RA0) || \
2313
defined(TARGET_IS_TM4C129_RA1)
2314
#define ROM_HibernateIntEnable \
2315
((void (*)(uint32_t ui32IntFlags))ROM_HIBERNATETABLE[21])
2316
#endif
2317
#if defined(TARGET_IS_TM4C123_RA1) || \
2318
defined(TARGET_IS_TM4C123_RA3) || \
2319
defined(TARGET_IS_TM4C123_RB1) || \
2320
defined(TARGET_IS_TM4C129_RA0) || \
2321
defined(TARGET_IS_TM4C129_RA1)
2322
#define ROM_HibernateIntDisable \
2323
((void (*)(uint32_t ui32IntFlags))ROM_HIBERNATETABLE[22])
2324
#endif
2325
#if defined(TARGET_IS_TM4C123_RA1) || \
2326
defined(TARGET_IS_TM4C123_RA3) || \
2327
defined(TARGET_IS_TM4C123_RB1) || \
2328
defined(TARGET_IS_TM4C129_RA0) || \
2329
defined(TARGET_IS_TM4C129_RA1)
2330
#define ROM_HibernateIntStatus \
2331
((uint32_t (*)(bool bMasked))ROM_HIBERNATETABLE[23])
2332
#endif
2333
#if defined(TARGET_IS_TM4C123_RA1) || \
2334
defined(TARGET_IS_TM4C123_RA3) || \
2335
defined(TARGET_IS_TM4C123_RB1) || \
2336
defined(TARGET_IS_TM4C129_RA0) || \
2337
defined(TARGET_IS_TM4C129_RA1)
2338
#define ROM_HibernateIsActive \
2339
((uint32_t (*)(void))ROM_HIBERNATETABLE[24])
2340
#endif
2341
#if defined(TARGET_IS_TM4C123_RA1) || \
2342
defined(TARGET_IS_TM4C123_RA3) || \
2343
defined(TARGET_IS_TM4C123_RB1) || \
2344
defined(TARGET_IS_TM4C129_RA0) || \
2345
defined(TARGET_IS_TM4C129_RA1)
2346
#define ROM_HibernateRTCSSGet \
2347
((uint32_t (*)(void))ROM_HIBERNATETABLE[27])
2348
#endif
2349
#if defined(TARGET_IS_TM4C123_RA1) || \
2350
defined(TARGET_IS_TM4C123_RA3) || \
2351
defined(TARGET_IS_TM4C123_RB1) || \
2352
defined(TARGET_IS_TM4C129_RA0) || \
2353
defined(TARGET_IS_TM4C129_RA1)
2354
#define ROM_HibernateClockConfig \
2355
((void (*)(uint32_t ui32Config))ROM_HIBERNATETABLE[28])
2356
#endif
2357
#if defined(TARGET_IS_TM4C123_RA1) || \
2358
defined(TARGET_IS_TM4C123_RA3) || \
2359
defined(TARGET_IS_TM4C123_RB1) || \
2360
defined(TARGET_IS_TM4C129_RA0) || \
2361
defined(TARGET_IS_TM4C129_RA1)
2362
#define ROM_HibernateBatCheckStart \
2363
((void (*)(void))ROM_HIBERNATETABLE[29])
2364
#endif
2365
#if defined(TARGET_IS_TM4C123_RA1) || \
2366
defined(TARGET_IS_TM4C123_RA3) || \
2367
defined(TARGET_IS_TM4C123_RB1) || \
2368
defined(TARGET_IS_TM4C129_RA0) || \
2369
defined(TARGET_IS_TM4C129_RA1)
2370
#define ROM_HibernateBatCheckDone \
2371
((uint32_t (*)(void))ROM_HIBERNATETABLE[30])
2372
#endif
2373
#if defined(TARGET_IS_TM4C129_RA0) || \
2374
defined(TARGET_IS_TM4C129_RA1)
2375
#define ROM_HibernateGPIORetentionEnable \
2376
((void (*)(void))ROM_HIBERNATETABLE[31])
2377
#endif
2378
#if defined(TARGET_IS_TM4C129_RA0) || \
2379
defined(TARGET_IS_TM4C129_RA1)
2380
#define ROM_HibernateGPIORetentionDisable \
2381
((void (*)(void))ROM_HIBERNATETABLE[32])
2382
#endif
2383
#if defined(TARGET_IS_TM4C129_RA0) || \
2384
defined(TARGET_IS_TM4C129_RA1)
2385
#define ROM_HibernateGPIORetentionGet \
2386
((bool (*)(void))ROM_HIBERNATETABLE[33])
2387
#endif
2388
#if defined(TARGET_IS_TM4C129_RA0) || \
2389
defined(TARGET_IS_TM4C129_RA1)
2390
#define ROM_HibernateCounterMode \
2391
((void (*)(uint32_t ui32Config))ROM_HIBERNATETABLE[34])
2392
#endif
2393
#if defined(TARGET_IS_TM4C123_RB1) || \
2394
defined(TARGET_IS_TM4C129_RA0) || \
2395
defined(TARGET_IS_TM4C129_RA1)
2396
#define ROM_HibernateCalendarSet \
2397
((void (*)(struct tm *psTime))ROM_HIBERNATETABLE[35])
2398
#endif
2399
#if defined(TARGET_IS_TM4C129_RA0) || \
2400
defined(TARGET_IS_TM4C129_RA1)
2401
#define ROM_HibernateCalendarGet \
2402
((int (*)(struct tm *psTime))ROM_HIBERNATETABLE[36])
2403
#endif
2404
#if defined(TARGET_IS_TM4C129_RA0) || \
2405
defined(TARGET_IS_TM4C129_RA1)
2406
#define ROM_HibernateCalendarMatchSet \
2407
((void (*)(uint32_t ui32Index, \
2408
struct tm *psTime))ROM_HIBERNATETABLE[37])
2409
#endif
2410
#if defined(TARGET_IS_TM4C129_RA0) || \
2411
defined(TARGET_IS_TM4C129_RA1)
2412
#define ROM_HibernateCalendarMatchGet \
2413
((void (*)(uint32_t ui32Index, \
2414
struct tm *psTime))ROM_HIBERNATETABLE[38])
2415
#endif
2416
#if defined(TARGET_IS_TM4C129_RA0) || \
2417
defined(TARGET_IS_TM4C129_RA1)
2418
#define ROM_HibernateTamperDisable \
2419
((void (*)(void))ROM_HIBERNATETABLE[39])
2420
#endif
2421
#if defined(TARGET_IS_TM4C129_RA0) || \
2422
defined(TARGET_IS_TM4C129_RA1)
2423
#define ROM_HibernateTamperEnable \
2424
((void (*)(void))ROM_HIBERNATETABLE[40])
2425
#endif
2426
#if defined(TARGET_IS_TM4C129_RA0) || \
2427
defined(TARGET_IS_TM4C129_RA1)
2428
#define ROM_HibernateTamperEventsClear \
2429
((void (*)(void))ROM_HIBERNATETABLE[41])
2430
#endif
2431
#if defined(TARGET_IS_TM4C129_RA0) || \
2432
defined(TARGET_IS_TM4C129_RA1)
2433
#define ROM_HibernateTamperEventsConfig \
2434
((void (*)(uint32_t ui32Config))ROM_HIBERNATETABLE[42])
2435
#endif
2436
#if defined(TARGET_IS_TM4C129_RA0) || \
2437
defined(TARGET_IS_TM4C129_RA1)
2438
#define ROM_HibernateTamperEventsGet \
2439
((bool (*)(uint32_t ui32Index, \
2440
uint32_t *pui32RTC, \
2441
uint32_t *pui32Event))ROM_HIBERNATETABLE[43])
2442
#endif
2443
#if defined(TARGET_IS_TM4C129_RA0) || \
2444
defined(TARGET_IS_TM4C129_RA1)
2445
#define ROM_HibernateTamperExtOscValid \
2446
((bool (*)(void))ROM_HIBERNATETABLE[44])
2447
#endif
2448
#if defined(TARGET_IS_TM4C129_RA0) || \
2449
defined(TARGET_IS_TM4C129_RA1)
2450
#define ROM_HibernateTamperExtOscRecover \
2451
((void (*)(void))ROM_HIBERNATETABLE[45])
2452
#endif
2453
#if defined(TARGET_IS_TM4C129_RA0) || \
2454
defined(TARGET_IS_TM4C129_RA1)
2455
#define ROM_HibernateTamperIODisable \
2456
((void (*)(uint32_t ui32Input))ROM_HIBERNATETABLE[46])
2457
#endif
2458
#if defined(TARGET_IS_TM4C129_RA0) || \
2459
defined(TARGET_IS_TM4C129_RA1)
2460
#define ROM_HibernateTamperIOEnable \
2461
((void (*)(uint32_t ui32Input, \
2462
uint32_t ui32Config))ROM_HIBERNATETABLE[47])
2463
#endif
2464
#if defined(TARGET_IS_TM4C129_RA0) || \
2465
defined(TARGET_IS_TM4C129_RA1)
2466
#define ROM_HibernateTamperStatusGet \
2467
((uint32_t (*)(void))ROM_HIBERNATETABLE[48])
2468
#endif
2469
#if defined(TARGET_IS_TM4C129_RA1)
2470
#define ROM_HibernateRTCMatchGet \
2471
((uint32_t (*)(uint32_t ui32Match))ROM_HIBERNATETABLE[49])
2472
#endif
2473
#if defined(TARGET_IS_TM4C129_RA1)
2474
#define ROM_HibernateRTCMatchSet \
2475
((void (*)(uint32_t ui32Match, \
2476
uint32_t ui32Value))ROM_HIBERNATETABLE[50])
2477
#endif
2478
#if defined(TARGET_IS_TM4C129_RA0) || \
2479
defined(TARGET_IS_TM4C129_RA1)
2480
#define ROM_HibernateRTCSSMatchGet \
2481
((uint32_t (*)(uint32_t ui32Match))ROM_HIBERNATETABLE[51])
2482
#endif
2483
#if defined(TARGET_IS_TM4C129_RA1)
2484
#define ROM_HibernateRTCSSMatchSet \
2485
((void (*)(uint32_t ui32Match, \
2486
uint32_t ui32Value))ROM_HIBERNATETABLE[52])
2487
#endif
2488
2489
//*****************************************************************************
2490
//
2491
// Macros for calling ROM functions in the I2C API.
2492
//
2493
//*****************************************************************************
2494
#if defined(TARGET_IS_TM4C123_RA1) || \
2495
defined(TARGET_IS_TM4C123_RA3) || \
2496
defined(TARGET_IS_TM4C123_RB1) || \
2497
defined(TARGET_IS_TM4C129_RA0) || \
2498
defined(TARGET_IS_TM4C129_RA1)
2499
#define ROM_I2CMasterDataPut \
2500
((void (*)(uint32_t ui32Base, \
2501
uint8_t ui8Data))ROM_I2CTABLE[0])
2502
#endif
2503
#if defined(TARGET_IS_TM4C123_RA1) || \
2504
defined(TARGET_IS_TM4C123_RA3) || \
2505
defined(TARGET_IS_TM4C123_RB1) || \
2506
defined(TARGET_IS_TM4C129_RA0) || \
2507
defined(TARGET_IS_TM4C129_RA1)
2508
#define ROM_I2CMasterInitExpClk \
2509
((void (*)(uint32_t ui32Base, \
2510
uint32_t ui32I2CClk, \
2511
bool bFast))ROM_I2CTABLE[1])
2512
#endif
2513
#if defined(TARGET_IS_TM4C129_RA1)
2514
#define ROM_I2CSlaveInit \
2515
((void (*)(uint32_t ui32Base, \
2516
uint8_t ui8SlaveAddr))ROM_I2CTABLE[2])
2517
#endif
2518
#if defined(TARGET_IS_TM4C123_RA1) || \
2519
defined(TARGET_IS_TM4C123_RA3) || \
2520
defined(TARGET_IS_TM4C123_RB1) || \
2521
defined(TARGET_IS_TM4C129_RA0) || \
2522
defined(TARGET_IS_TM4C129_RA1)
2523
#define ROM_I2CMasterEnable \
2524
((void (*)(uint32_t ui32Base))ROM_I2CTABLE[3])
2525
#endif
2526
#if defined(TARGET_IS_TM4C129_RA1)
2527
#define ROM_I2CSlaveEnable \
2528
((void (*)(uint32_t ui32Base))ROM_I2CTABLE[4])
2529
#endif
2530
#if defined(TARGET_IS_TM4C123_RA1) || \
2531
defined(TARGET_IS_TM4C123_RA3) || \
2532
defined(TARGET_IS_TM4C123_RB1) || \
2533
defined(TARGET_IS_TM4C129_RA0) || \
2534
defined(TARGET_IS_TM4C129_RA1)
2535
#define ROM_I2CMasterDisable \
2536
((void (*)(uint32_t ui32Base))ROM_I2CTABLE[5])
2537
#endif
2538
#if defined(TARGET_IS_TM4C129_RA1)
2539
#define ROM_I2CSlaveDisable \
2540
((void (*)(uint32_t ui32Base))ROM_I2CTABLE[6])
2541
#endif
2542
#if defined(TARGET_IS_TM4C123_RA1) || \
2543
defined(TARGET_IS_TM4C123_RA3) || \
2544
defined(TARGET_IS_TM4C123_RB1) || \
2545
defined(TARGET_IS_TM4C129_RA0) || \
2546
defined(TARGET_IS_TM4C129_RA1)
2547
#define ROM_I2CMasterIntEnable \
2548
((void (*)(uint32_t ui32Base))ROM_I2CTABLE[7])
2549
#endif
2550
#if defined(TARGET_IS_TM4C129_RA1)
2551
#define ROM_I2CSlaveIntEnable \
2552
((void (*)(uint32_t ui32Base))ROM_I2CTABLE[8])
2553
#endif
2554
#if defined(TARGET_IS_TM4C123_RA1) || \
2555
defined(TARGET_IS_TM4C123_RA3) || \
2556
defined(TARGET_IS_TM4C123_RB1) || \
2557
defined(TARGET_IS_TM4C129_RA0) || \
2558
defined(TARGET_IS_TM4C129_RA1)
2559
#define ROM_I2CMasterIntDisable \
2560
((void (*)(uint32_t ui32Base))ROM_I2CTABLE[9])
2561
#endif
2562
#if defined(TARGET_IS_TM4C129_RA1)
2563
#define ROM_I2CSlaveIntDisable \
2564
((void (*)(uint32_t ui32Base))ROM_I2CTABLE[10])
2565
#endif
2566
#if defined(TARGET_IS_TM4C123_RA1) || \
2567
defined(TARGET_IS_TM4C123_RA3) || \
2568
defined(TARGET_IS_TM4C123_RB1) || \
2569
defined(TARGET_IS_TM4C129_RA0) || \
2570
defined(TARGET_IS_TM4C129_RA1)
2571
#define ROM_I2CMasterIntStatus \
2572
((bool (*)(uint32_t ui32Base, \
2573
bool bMasked))ROM_I2CTABLE[11])
2574
#endif
2575
#if defined(TARGET_IS_TM4C129_RA1)
2576
#define ROM_I2CSlaveIntStatus \
2577
((bool (*)(uint32_t ui32Base, \
2578
bool bMasked))ROM_I2CTABLE[12])
2579
#endif
2580
#if defined(TARGET_IS_TM4C123_RA1) || \
2581
defined(TARGET_IS_TM4C123_RA3) || \
2582
defined(TARGET_IS_TM4C123_RB1) || \
2583
defined(TARGET_IS_TM4C129_RA0) || \
2584
defined(TARGET_IS_TM4C129_RA1)
2585
#define ROM_I2CMasterIntClear \
2586
((void (*)(uint32_t ui32Base))ROM_I2CTABLE[13])
2587
#endif
2588
#if defined(TARGET_IS_TM4C129_RA1)
2589
#define ROM_I2CSlaveIntClear \
2590
((void (*)(uint32_t ui32Base))ROM_I2CTABLE[14])
2591
#endif
2592
#if defined(TARGET_IS_TM4C123_RA1) || \
2593
defined(TARGET_IS_TM4C123_RA3) || \
2594
defined(TARGET_IS_TM4C123_RB1) || \
2595
defined(TARGET_IS_TM4C129_RA0) || \
2596
defined(TARGET_IS_TM4C129_RA1)
2597
#define ROM_I2CMasterSlaveAddrSet \
2598
((void (*)(uint32_t ui32Base, \
2599
uint8_t ui8SlaveAddr, \
2600
bool bReceive))ROM_I2CTABLE[15])
2601
#endif
2602
#if defined(TARGET_IS_TM4C123_RA1) || \
2603
defined(TARGET_IS_TM4C123_RA3) || \
2604
defined(TARGET_IS_TM4C123_RB1) || \
2605
defined(TARGET_IS_TM4C129_RA0) || \
2606
defined(TARGET_IS_TM4C129_RA1)
2607
#define ROM_I2CMasterBusy \
2608
((bool (*)(uint32_t ui32Base))ROM_I2CTABLE[16])
2609
#endif
2610
#if defined(TARGET_IS_TM4C123_RA1) || \
2611
defined(TARGET_IS_TM4C123_RA3) || \
2612
defined(TARGET_IS_TM4C123_RB1) || \
2613
defined(TARGET_IS_TM4C129_RA0) || \
2614
defined(TARGET_IS_TM4C129_RA1)
2615
#define ROM_I2CMasterBusBusy \
2616
((bool (*)(uint32_t ui32Base))ROM_I2CTABLE[17])
2617
#endif
2618
#if defined(TARGET_IS_TM4C123_RA1) || \
2619
defined(TARGET_IS_TM4C123_RA3) || \
2620
defined(TARGET_IS_TM4C123_RB1) || \
2621
defined(TARGET_IS_TM4C129_RA0) || \
2622
defined(TARGET_IS_TM4C129_RA1)
2623
#define ROM_I2CMasterControl \
2624
((void (*)(uint32_t ui32Base, \
2625
uint32_t ui32Cmd))ROM_I2CTABLE[18])
2626
#endif
2627
#if defined(TARGET_IS_TM4C123_RA1) || \
2628
defined(TARGET_IS_TM4C123_RA3) || \
2629
defined(TARGET_IS_TM4C123_RB1) || \
2630
defined(TARGET_IS_TM4C129_RA0) || \
2631
defined(TARGET_IS_TM4C129_RA1)
2632
#define ROM_I2CMasterErr \
2633
((uint32_t (*)(uint32_t ui32Base))ROM_I2CTABLE[19])
2634
#endif
2635
#if defined(TARGET_IS_TM4C123_RA1) || \
2636
defined(TARGET_IS_TM4C123_RA3) || \
2637
defined(TARGET_IS_TM4C123_RB1) || \
2638
defined(TARGET_IS_TM4C129_RA0) || \
2639
defined(TARGET_IS_TM4C129_RA1)
2640
#define ROM_I2CMasterDataGet \
2641
((uint32_t (*)(uint32_t ui32Base))ROM_I2CTABLE[20])
2642
#endif
2643
#if defined(TARGET_IS_TM4C129_RA1)
2644
#define ROM_I2CSlaveStatus \
2645
((uint32_t (*)(uint32_t ui32Base))ROM_I2CTABLE[21])
2646
#endif
2647
#if defined(TARGET_IS_TM4C129_RA1)
2648
#define ROM_I2CSlaveDataPut \
2649
((void (*)(uint32_t ui32Base, \
2650
uint8_t ui8Data))ROM_I2CTABLE[22])
2651
#endif
2652
#if defined(TARGET_IS_TM4C129_RA1)
2653
#define ROM_I2CSlaveDataGet \
2654
((uint32_t (*)(uint32_t ui32Base))ROM_I2CTABLE[23])
2655
#endif
2656
#if defined(TARGET_IS_TM4C123_RA1) || \
2657
defined(TARGET_IS_TM4C123_RA3) || \
2658
defined(TARGET_IS_TM4C123_RB1) || \
2659
defined(TARGET_IS_TM4C129_RA0) || \
2660
defined(TARGET_IS_TM4C129_RA1)
2661
#define ROM_UpdateI2C \
2662
((void (*)(void))ROM_I2CTABLE[24])
2663
#endif
2664
#if defined(TARGET_IS_TM4C129_RA1)
2665
#define ROM_I2CSlaveIntEnableEx \
2666
((void (*)(uint32_t ui32Base, \
2667
uint32_t ui32IntFlags))ROM_I2CTABLE[25])
2668
#endif
2669
#if defined(TARGET_IS_TM4C129_RA1)
2670
#define ROM_I2CSlaveIntDisableEx \
2671
((void (*)(uint32_t ui32Base, \
2672
uint32_t ui32IntFlags))ROM_I2CTABLE[26])
2673
#endif
2674
#if defined(TARGET_IS_TM4C129_RA1)
2675
#define ROM_I2CSlaveIntStatusEx \
2676
((uint32_t (*)(uint32_t ui32Base, \
2677
bool bMasked))ROM_I2CTABLE[27])
2678
#endif
2679
#if defined(TARGET_IS_TM4C129_RA1)
2680
#define ROM_I2CSlaveIntClearEx \
2681
((void (*)(uint32_t ui32Base, \
2682
uint32_t ui32IntFlags))ROM_I2CTABLE[28])
2683
#endif
2684
#if defined(TARGET_IS_TM4C123_RA1) || \
2685
defined(TARGET_IS_TM4C123_RA3) || \
2686
defined(TARGET_IS_TM4C123_RB1) || \
2687
defined(TARGET_IS_TM4C129_RA0) || \
2688
defined(TARGET_IS_TM4C129_RA1)
2689
#define ROM_I2CMasterIntEnableEx \
2690
((void (*)(uint32_t ui32Base, \
2691
uint32_t ui32IntFlags))ROM_I2CTABLE[29])
2692
#endif
2693
#if defined(TARGET_IS_TM4C123_RA1) || \
2694
defined(TARGET_IS_TM4C123_RA3) || \
2695
defined(TARGET_IS_TM4C123_RB1) || \
2696
defined(TARGET_IS_TM4C129_RA0) || \
2697
defined(TARGET_IS_TM4C129_RA1)
2698
#define ROM_I2CMasterIntDisableEx \
2699
((void (*)(uint32_t ui32Base, \
2700
uint32_t ui32IntFlags))ROM_I2CTABLE[30])
2701
#endif
2702
#if defined(TARGET_IS_TM4C123_RA1) || \
2703
defined(TARGET_IS_TM4C123_RA3) || \
2704
defined(TARGET_IS_TM4C123_RB1) || \
2705
defined(TARGET_IS_TM4C129_RA0) || \
2706
defined(TARGET_IS_TM4C129_RA1)
2707
#define ROM_I2CMasterIntStatusEx \
2708
((uint32_t (*)(uint32_t ui32Base, \
2709
bool bMasked))ROM_I2CTABLE[31])
2710
#endif
2711
#if defined(TARGET_IS_TM4C123_RA1) || \
2712
defined(TARGET_IS_TM4C123_RA3) || \
2713
defined(TARGET_IS_TM4C123_RB1) || \
2714
defined(TARGET_IS_TM4C129_RA0) || \
2715
defined(TARGET_IS_TM4C129_RA1)
2716
#define ROM_I2CMasterIntClearEx \
2717
((void (*)(uint32_t ui32Base, \
2718
uint32_t ui32IntFlags))ROM_I2CTABLE[32])
2719
#endif
2720
#if defined(TARGET_IS_TM4C123_RA1) || \
2721
defined(TARGET_IS_TM4C123_RA3) || \
2722
defined(TARGET_IS_TM4C123_RB1) || \
2723
defined(TARGET_IS_TM4C129_RA0) || \
2724
defined(TARGET_IS_TM4C129_RA1)
2725
#define ROM_I2CMasterTimeoutSet \
2726
((void (*)(uint32_t ui32Base, \
2727
uint32_t ui32Value))ROM_I2CTABLE[33])
2728
#endif
2729
#if defined(TARGET_IS_TM4C129_RA1)
2730
#define ROM_I2CSlaveACKOverride \
2731
((void (*)(uint32_t ui32Base, \
2732
bool bEnable))ROM_I2CTABLE[34])
2733
#endif
2734
#if defined(TARGET_IS_TM4C129_RA1)
2735
#define ROM_I2CSlaveACKValueSet \
2736
((void (*)(uint32_t ui32Base, \
2737
bool bACK))ROM_I2CTABLE[35])
2738
#endif
2739
#if defined(TARGET_IS_TM4C129_RA1)
2740
#define ROM_I2CSlaveAddressSet \
2741
((void (*)(uint32_t ui32Base, \
2742
uint8_t ui8AddrNum, \
2743
uint8_t ui8SlaveAddr))ROM_I2CTABLE[37])
2744
#endif
2745
#if defined(TARGET_IS_TM4C123_RA1) || \
2746
defined(TARGET_IS_TM4C123_RA3) || \
2747
defined(TARGET_IS_TM4C123_RB1) || \
2748
defined(TARGET_IS_TM4C129_RA0) || \
2749
defined(TARGET_IS_TM4C129_RA1)
2750
#define ROM_I2CMasterLineStateGet \
2751
((uint32_t (*)(uint32_t ui32Base))ROM_I2CTABLE[38])
2752
#endif
2753
#if defined(TARGET_IS_TM4C129_RA0) || \
2754
defined(TARGET_IS_TM4C129_RA1)
2755
#define ROM_I2CTxFIFOConfigSet \
2756
((void (*)(uint32_t ui32Base, \
2757
uint32_t ui32Config))ROM_I2CTABLE[39])
2758
#endif
2759
#if defined(TARGET_IS_TM4C129_RA0) || \
2760
defined(TARGET_IS_TM4C129_RA1)
2761
#define ROM_I2CTxFIFOFlush \
2762
((void (*)(uint32_t ui32Base))ROM_I2CTABLE[40])
2763
#endif
2764
#if defined(TARGET_IS_TM4C129_RA0) || \
2765
defined(TARGET_IS_TM4C129_RA1)
2766
#define ROM_I2CRxFIFOConfigSet \
2767
((void (*)(uint32_t ui32Base, \
2768
uint32_t ui32Config))ROM_I2CTABLE[41])
2769
#endif
2770
#if defined(TARGET_IS_TM4C129_RA0) || \
2771
defined(TARGET_IS_TM4C129_RA1)
2772
#define ROM_I2CRxFIFOFlush \
2773
((void (*)(uint32_t ui32Base))ROM_I2CTABLE[42])
2774
#endif
2775
#if defined(TARGET_IS_TM4C129_RA0) || \
2776
defined(TARGET_IS_TM4C129_RA1)
2777
#define ROM_I2CFIFOStatus \
2778
((uint32_t (*)(uint32_t ui32Base))ROM_I2CTABLE[43])
2779
#endif
2780
#if defined(TARGET_IS_TM4C129_RA0) || \
2781
defined(TARGET_IS_TM4C129_RA1)
2782
#define ROM_I2CFIFODataPut \
2783
((void (*)(uint32_t ui32Base, \
2784
uint8_t ui8Data))ROM_I2CTABLE[44])
2785
#endif
2786
#if defined(TARGET_IS_TM4C129_RA0) || \
2787
defined(TARGET_IS_TM4C129_RA1)
2788
#define ROM_I2CFIFODataPutNonBlocking \
2789
((uint32_t (*)(uint32_t ui32Base, \
2790
uint8_t ui8Data))ROM_I2CTABLE[45])
2791
#endif
2792
#if defined(TARGET_IS_TM4C129_RA0) || \
2793
defined(TARGET_IS_TM4C129_RA1)
2794
#define ROM_I2CFIFODataGet \
2795
((uint32_t (*)(uint32_t ui32Base))ROM_I2CTABLE[46])
2796
#endif
2797
#if defined(TARGET_IS_TM4C129_RA0) || \
2798
defined(TARGET_IS_TM4C129_RA1)
2799
#define ROM_I2CFIFODataGetNonBlocking \
2800
((uint32_t (*)(uint32_t ui32Base, \
2801
uint8_t *pui8Data))ROM_I2CTABLE[47])
2802
#endif
2803
#if defined(TARGET_IS_TM4C129_RA0) || \
2804
defined(TARGET_IS_TM4C129_RA1)
2805
#define ROM_I2CMasterBurstLengthSet \
2806
((void (*)(uint32_t ui32Base, \
2807
uint8_t ui8Length))ROM_I2CTABLE[48])
2808
#endif
2809
#if defined(TARGET_IS_TM4C129_RA0) || \
2810
defined(TARGET_IS_TM4C129_RA1)
2811
#define ROM_I2CMasterBurstCountGet \
2812
((uint32_t (*)(uint32_t ui32Base))ROM_I2CTABLE[49])
2813
#endif
2814
#if defined(TARGET_IS_TM4C129_RA1)
2815
#define ROM_I2CSlaveFIFODisable \
2816
((void (*)(uint32_t ui32Base))ROM_I2CTABLE[50])
2817
#endif
2818
#if defined(TARGET_IS_TM4C129_RA1)
2819
#define ROM_I2CSlaveFIFOEnable \
2820
((void (*)(uint32_t ui32Base, \
2821
uint32_t ui32Config))ROM_I2CTABLE[51])
2822
#endif
2823
#if defined(TARGET_IS_TM4C129_RA0) || \
2824
defined(TARGET_IS_TM4C129_RA1)
2825
#define ROM_I2CMasterGlitchFilterConfigSet \
2826
((void (*)(uint32_t ui32Base, \
2827
uint32_t ui32Config))ROM_I2CTABLE[54])
2828
#endif
2829
2830
//*****************************************************************************
2831
//
2832
// Macros for calling ROM functions in the Interrupt API.
2833
//
2834
//*****************************************************************************
2835
#if defined(TARGET_IS_TM4C123_RA1) || \
2836
defined(TARGET_IS_TM4C123_RA3) || \
2837
defined(TARGET_IS_TM4C123_RB1) || \
2838
defined(TARGET_IS_TM4C129_RA0) || \
2839
defined(TARGET_IS_TM4C129_RA1)
2840
#define ROM_IntEnable \
2841
((void (*)(uint32_t ui32Interrupt))ROM_INTERRUPTTABLE[0])
2842
#endif
2843
#if defined(TARGET_IS_TM4C123_RA1) || \
2844
defined(TARGET_IS_TM4C123_RA3) || \
2845
defined(TARGET_IS_TM4C123_RB1) || \
2846
defined(TARGET_IS_TM4C129_RA0) || \
2847
defined(TARGET_IS_TM4C129_RA1)
2848
#define ROM_IntMasterEnable \
2849
((bool (*)(void))ROM_INTERRUPTTABLE[1])
2850
#endif
2851
#if defined(TARGET_IS_TM4C123_RA1) || \
2852
defined(TARGET_IS_TM4C123_RA3) || \
2853
defined(TARGET_IS_TM4C123_RB1) || \
2854
defined(TARGET_IS_TM4C129_RA0) || \
2855
defined(TARGET_IS_TM4C129_RA1)
2856
#define ROM_IntMasterDisable \
2857
((bool (*)(void))ROM_INTERRUPTTABLE[2])
2858
#endif
2859
#if defined(TARGET_IS_TM4C123_RA1) || \
2860
defined(TARGET_IS_TM4C123_RA3) || \
2861
defined(TARGET_IS_TM4C123_RB1) || \
2862
defined(TARGET_IS_TM4C129_RA0) || \
2863
defined(TARGET_IS_TM4C129_RA1)
2864
#define ROM_IntDisable \
2865
((void (*)(uint32_t ui32Interrupt))ROM_INTERRUPTTABLE[3])
2866
#endif
2867
#if defined(TARGET_IS_TM4C123_RA1) || \
2868
defined(TARGET_IS_TM4C123_RA3) || \
2869
defined(TARGET_IS_TM4C123_RB1) || \
2870
defined(TARGET_IS_TM4C129_RA0) || \
2871
defined(TARGET_IS_TM4C129_RA1)
2872
#define ROM_IntPriorityGroupingSet \
2873
((void (*)(uint32_t ui32Bits))ROM_INTERRUPTTABLE[4])
2874
#endif
2875
#if defined(TARGET_IS_TM4C123_RA1) || \
2876
defined(TARGET_IS_TM4C123_RA3) || \
2877
defined(TARGET_IS_TM4C123_RB1) || \
2878
defined(TARGET_IS_TM4C129_RA0) || \
2879
defined(TARGET_IS_TM4C129_RA1)
2880
#define ROM_IntPriorityGroupingGet \
2881
((uint32_t (*)(void))ROM_INTERRUPTTABLE[5])
2882
#endif
2883
#if defined(TARGET_IS_TM4C123_RA1) || \
2884
defined(TARGET_IS_TM4C123_RA3) || \
2885
defined(TARGET_IS_TM4C123_RB1) || \
2886
defined(TARGET_IS_TM4C129_RA0) || \
2887
defined(TARGET_IS_TM4C129_RA1)
2888
#define ROM_IntPrioritySet \
2889
((void (*)(uint32_t ui32Interrupt, \
2890
uint8_t ui8Priority))ROM_INTERRUPTTABLE[6])
2891
#endif
2892
#if defined(TARGET_IS_TM4C123_RA1) || \
2893
defined(TARGET_IS_TM4C123_RA3) || \
2894
defined(TARGET_IS_TM4C123_RB1) || \
2895
defined(TARGET_IS_TM4C129_RA0) || \
2896
defined(TARGET_IS_TM4C129_RA1)
2897
#define ROM_IntPriorityGet \
2898
((int32_t (*)(uint32_t ui32Interrupt))ROM_INTERRUPTTABLE[7])
2899
#endif
2900
#if defined(TARGET_IS_TM4C123_RA1) || \
2901
defined(TARGET_IS_TM4C123_RA3) || \
2902
defined(TARGET_IS_TM4C123_RB1) || \
2903
defined(TARGET_IS_TM4C129_RA0) || \
2904
defined(TARGET_IS_TM4C129_RA1)
2905
#define ROM_IntPendSet \
2906
((void (*)(uint32_t ui32Interrupt))ROM_INTERRUPTTABLE[8])
2907
#endif
2908
#if defined(TARGET_IS_TM4C123_RA1) || \
2909
defined(TARGET_IS_TM4C123_RA3) || \
2910
defined(TARGET_IS_TM4C123_RB1) || \
2911
defined(TARGET_IS_TM4C129_RA0) || \
2912
defined(TARGET_IS_TM4C129_RA1)
2913
#define ROM_IntPendClear \
2914
((void (*)(uint32_t ui32Interrupt))ROM_INTERRUPTTABLE[9])
2915
#endif
2916
#if defined(TARGET_IS_TM4C123_RA1) || \
2917
defined(TARGET_IS_TM4C123_RA3) || \
2918
defined(TARGET_IS_TM4C123_RB1) || \
2919
defined(TARGET_IS_TM4C129_RA0) || \
2920
defined(TARGET_IS_TM4C129_RA1)
2921
#define ROM_IntPriorityMaskSet \
2922
((void (*)(uint32_t ui32PriorityMask))ROM_INTERRUPTTABLE[10])
2923
#endif
2924
#if defined(TARGET_IS_TM4C123_RA1) || \
2925
defined(TARGET_IS_TM4C123_RA3) || \
2926
defined(TARGET_IS_TM4C123_RB1) || \
2927
defined(TARGET_IS_TM4C129_RA0) || \
2928
defined(TARGET_IS_TM4C129_RA1)
2929
#define ROM_IntPriorityMaskGet \
2930
((uint32_t (*)(void))ROM_INTERRUPTTABLE[11])
2931
#endif
2932
#if defined(TARGET_IS_TM4C123_RB1) || \
2933
defined(TARGET_IS_TM4C129_RA0) || \
2934
defined(TARGET_IS_TM4C129_RA1)
2935
#define ROM_IntIsEnabled \
2936
((uint32_t (*)(uint32_t ui32Interrupt))ROM_INTERRUPTTABLE[12])
2937
#endif
2938
#if defined(TARGET_IS_TM4C129_RA1)
2939
#define ROM_IntTrigger \
2940
((void (*)(uint32_t ui32Interrupt))ROM_INTERRUPTTABLE[13])
2941
#endif
2942
2943
//*****************************************************************************
2944
//
2945
// Macros for calling ROM functions in the LCD API.
2946
//
2947
//*****************************************************************************
2948
#if defined(TARGET_IS_TM4C129_RA0) || \
2949
defined(TARGET_IS_TM4C129_RA1)
2950
#define ROM_LCDIntStatus \
2951
((uint32_t (*)(uint32_t ui32Base, \
2952
bool bMasked))ROM_LCDTABLE[0])
2953
#endif
2954
#if defined(TARGET_IS_TM4C129_RA0) || \
2955
defined(TARGET_IS_TM4C129_RA1)
2956
#define ROM_LCDClockReset \
2957
((void (*)(uint32_t ui32Base, \
2958
uint32_t ui32Clocks))ROM_LCDTABLE[1])
2959
#endif
2960
#if defined(TARGET_IS_TM4C129_RA0) || \
2961
defined(TARGET_IS_TM4C129_RA1)
2962
#define ROM_LCDDMAConfigSet \
2963
((void (*)(uint32_t ui32Base, \
2964
uint32_t ui32Config))ROM_LCDTABLE[2])
2965
#endif
2966
#if defined(TARGET_IS_TM4C129_RA0) || \
2967
defined(TARGET_IS_TM4C129_RA1)
2968
#define ROM_LCDIDDCommandWrite \
2969
((void (*)(uint32_t ui32Base, \
2970
uint32_t ui32CS, \
2971
uint16_t ui16Cmd))ROM_LCDTABLE[3])
2972
#endif
2973
#if defined(TARGET_IS_TM4C129_RA0) || \
2974
defined(TARGET_IS_TM4C129_RA1)
2975
#define ROM_LCDIDDConfigSet \
2976
((void (*)(uint32_t ui32Base, \
2977
uint32_t ui32Config))ROM_LCDTABLE[4])
2978
#endif
2979
#if defined(TARGET_IS_TM4C129_RA0) || \
2980
defined(TARGET_IS_TM4C129_RA1)
2981
#define ROM_LCDIDDDataRead \
2982
((uint16_t (*)(uint32_t ui32Base, \
2983
uint32_t ui32CS))ROM_LCDTABLE[5])
2984
#endif
2985
#if defined(TARGET_IS_TM4C129_RA0) || \
2986
defined(TARGET_IS_TM4C129_RA1)
2987
#define ROM_LCDIDDDataWrite \
2988
((void (*)(uint32_t ui32Base, \
2989
uint32_t ui32CS, \
2990
uint16_t ui16Data))ROM_LCDTABLE[6])
2991
#endif
2992
#if defined(TARGET_IS_TM4C129_RA0) || \
2993
defined(TARGET_IS_TM4C129_RA1)
2994
#define ROM_LCDIDDDMADisable \
2995
((void (*)(uint32_t ui32Base))ROM_LCDTABLE[7])
2996
#endif
2997
#if defined(TARGET_IS_TM4C129_RA0) || \
2998
defined(TARGET_IS_TM4C129_RA1)
2999
#define ROM_LCDIDDDMAWrite \
3000
((void (*)(uint32_t ui32Base, \
3001
uint32_t ui32CS, \
3002
const uint32_t *pui32Data, \
3003
uint32_t ui32Count))ROM_LCDTABLE[8])
3004
#endif
3005
#if defined(TARGET_IS_TM4C129_RA0) || \
3006
defined(TARGET_IS_TM4C129_RA1)
3007
#define ROM_LCDIDDIndexedRead \
3008
((uint16_t (*)(uint32_t ui32Base, \
3009
uint32_t ui32CS, \
3010
uint16_t ui16Addr))ROM_LCDTABLE[9])
3011
#endif
3012
#if defined(TARGET_IS_TM4C129_RA0) || \
3013
defined(TARGET_IS_TM4C129_RA1)
3014
#define ROM_LCDIDDIndexedWrite \
3015
((void (*)(uint32_t ui32Base, \
3016
uint32_t ui32CS, \
3017
uint16_t ui16Addr, \
3018
uint16_t ui16Data))ROM_LCDTABLE[10])
3019
#endif
3020
#if defined(TARGET_IS_TM4C129_RA0) || \
3021
defined(TARGET_IS_TM4C129_RA1)
3022
#define ROM_LCDIDDStatusRead \
3023
((uint16_t (*)(uint32_t ui32Base, \
3024
uint32_t ui32CS))ROM_LCDTABLE[11])
3025
#endif
3026
#if defined(TARGET_IS_TM4C129_RA0) || \
3027
defined(TARGET_IS_TM4C129_RA1)
3028
#define ROM_LCDIDDTimingSet \
3029
((void (*)(uint32_t ui32Base, \
3030
uint32_t ui32CS, \
3031
const tLCDIDDTiming *pTiming))ROM_LCDTABLE[12])
3032
#endif
3033
#if defined(TARGET_IS_TM4C129_RA0) || \
3034
defined(TARGET_IS_TM4C129_RA1)
3035
#define ROM_LCDIntClear \
3036
((void (*)(uint32_t ui32Base, \
3037
uint32_t ui32IntFlags))ROM_LCDTABLE[13])
3038
#endif
3039
#if defined(TARGET_IS_TM4C129_RA0) || \
3040
defined(TARGET_IS_TM4C129_RA1)
3041
#define ROM_LCDIntDisable \
3042
((void (*)(uint32_t ui32Base, \
3043
uint32_t ui32IntFlags))ROM_LCDTABLE[14])
3044
#endif
3045
#if defined(TARGET_IS_TM4C129_RA0) || \
3046
defined(TARGET_IS_TM4C129_RA1)
3047
#define ROM_LCDIntEnable \
3048
((void (*)(uint32_t ui32Base, \
3049
uint32_t ui32IntFlags))ROM_LCDTABLE[15])
3050
#endif
3051
#if defined(TARGET_IS_TM4C129_RA0) || \
3052
defined(TARGET_IS_TM4C129_RA1)
3053
#define ROM_LCDModeSet \
3054
((uint32_t (*)(uint32_t ui32Base, \
3055
uint8_t ui8Mode, \
3056
uint32_t ui32PixClk, \
3057
uint32_t ui32SysClk))ROM_LCDTABLE[16])
3058
#endif
3059
#if defined(TARGET_IS_TM4C129_RA0) || \
3060
defined(TARGET_IS_TM4C129_RA1)
3061
#define ROM_LCDRasterACBiasIntCountSet \
3062
((void (*)(uint32_t ui32Base, \
3063
uint8_t ui8Count))ROM_LCDTABLE[17])
3064
#endif
3065
#if defined(TARGET_IS_TM4C129_RA0) || \
3066
defined(TARGET_IS_TM4C129_RA1)
3067
#define ROM_LCDRasterConfigSet \
3068
((void (*)(uint32_t ui32Base, \
3069
uint32_t ui32Config, \
3070
uint8_t ui8PalLoadDelay))ROM_LCDTABLE[18])
3071
#endif
3072
#if defined(TARGET_IS_TM4C129_RA0) || \
3073
defined(TARGET_IS_TM4C129_RA1)
3074
#define ROM_LCDRasterDisable \
3075
((void (*)(uint32_t ui32Base))ROM_LCDTABLE[19])
3076
#endif
3077
#if defined(TARGET_IS_TM4C129_RA0) || \
3078
defined(TARGET_IS_TM4C129_RA1)
3079
#define ROM_LCDRasterEnable \
3080
((void (*)(uint32_t ui32Base))ROM_LCDTABLE[20])
3081
#endif
3082
#if defined(TARGET_IS_TM4C129_RA0) || \
3083
defined(TARGET_IS_TM4C129_RA1)
3084
#define ROM_LCDRasterFrameBufferSet \
3085
((void (*)(uint32_t ui32Base, \
3086
uint8_t ui8Buffer, \
3087
uint32_t *pui32Addr, \
3088
uint32_t ui32NumBytes))ROM_LCDTABLE[21])
3089
#endif
3090
#if defined(TARGET_IS_TM4C129_RA0) || \
3091
defined(TARGET_IS_TM4C129_RA1)
3092
#define ROM_LCDRasterPaletteSet \
3093
((void (*)(uint32_t ui32Base, \
3094
uint32_t ui32Type, \
3095
uint32_t *pui32PalAddr, \
3096
const uint32_t *pui32SrcColors, \
3097
uint32_t ui32Start, \
3098
uint32_t ui32Count))ROM_LCDTABLE[22])
3099
#endif
3100
#if defined(TARGET_IS_TM4C129_RA0) || \
3101
defined(TARGET_IS_TM4C129_RA1)
3102
#define ROM_LCDRasterSubPanelConfigSet \
3103
((void (*)(uint32_t ui32Base, \
3104
uint32_t ui32Flags, \
3105
uint32_t ui32BottomLines, \
3106
uint32_t ui32DefaultPixel))ROM_LCDTABLE[23])
3107
#endif
3108
#if defined(TARGET_IS_TM4C129_RA0) || \
3109
defined(TARGET_IS_TM4C129_RA1)
3110
#define ROM_LCDRasterSubPanelDisable \
3111
((void (*)(uint32_t ui32Base))ROM_LCDTABLE[24])
3112
#endif
3113
#if defined(TARGET_IS_TM4C129_RA0) || \
3114
defined(TARGET_IS_TM4C129_RA1)
3115
#define ROM_LCDRasterSubPanelEnable \
3116
((void (*)(uint32_t ui32Base))ROM_LCDTABLE[25])
3117
#endif
3118
#if defined(TARGET_IS_TM4C129_RA0) || \
3119
defined(TARGET_IS_TM4C129_RA1)
3120
#define ROM_LCDRasterTimingSet \
3121
((void (*)(uint32_t ui32Base, \
3122
const tLCDRasterTiming *pTiming))ROM_LCDTABLE[26])
3123
#endif
3124
#if defined(TARGET_IS_TM4C129_RA1)
3125
#define ROM_LCDRasterEnabled \
3126
((bool (*)(uint32_t ui32Base))ROM_LCDTABLE[27])
3127
#endif
3128
3129
//*****************************************************************************
3130
//
3131
// Macros for calling ROM functions in the MPU API.
3132
//
3133
//*****************************************************************************
3134
#if defined(TARGET_IS_TM4C123_RA1) || \
3135
defined(TARGET_IS_TM4C123_RA3) || \
3136
defined(TARGET_IS_TM4C123_RB1) || \
3137
defined(TARGET_IS_TM4C129_RA0) || \
3138
defined(TARGET_IS_TM4C129_RA1)
3139
#define ROM_MPUEnable \
3140
((void (*)(uint32_t ui32MPUConfig))ROM_MPUTABLE[0])
3141
#endif
3142
#if defined(TARGET_IS_TM4C123_RA1) || \
3143
defined(TARGET_IS_TM4C123_RA3) || \
3144
defined(TARGET_IS_TM4C123_RB1) || \
3145
defined(TARGET_IS_TM4C129_RA0) || \
3146
defined(TARGET_IS_TM4C129_RA1)
3147
#define ROM_MPUDisable \
3148
((void (*)(void))ROM_MPUTABLE[1])
3149
#endif
3150
#if defined(TARGET_IS_TM4C123_RA1) || \
3151
defined(TARGET_IS_TM4C123_RA3) || \
3152
defined(TARGET_IS_TM4C123_RB1) || \
3153
defined(TARGET_IS_TM4C129_RA0) || \
3154
defined(TARGET_IS_TM4C129_RA1)
3155
#define ROM_MPURegionCountGet \
3156
((uint32_t (*)(void))ROM_MPUTABLE[2])
3157
#endif
3158
#if defined(TARGET_IS_TM4C123_RA1) || \
3159
defined(TARGET_IS_TM4C123_RA3) || \
3160
defined(TARGET_IS_TM4C123_RB1) || \
3161
defined(TARGET_IS_TM4C129_RA0) || \
3162
defined(TARGET_IS_TM4C129_RA1)
3163
#define ROM_MPURegionEnable \
3164
((void (*)(uint32_t ui32Region))ROM_MPUTABLE[3])
3165
#endif
3166
#if defined(TARGET_IS_TM4C123_RA1) || \
3167
defined(TARGET_IS_TM4C123_RA3) || \
3168
defined(TARGET_IS_TM4C123_RB1) || \
3169
defined(TARGET_IS_TM4C129_RA0) || \
3170
defined(TARGET_IS_TM4C129_RA1)
3171
#define ROM_MPURegionDisable \
3172
((void (*)(uint32_t ui32Region))ROM_MPUTABLE[4])
3173
#endif
3174
#if defined(TARGET_IS_TM4C123_RA1) || \
3175
defined(TARGET_IS_TM4C123_RA3) || \
3176
defined(TARGET_IS_TM4C123_RB1) || \
3177
defined(TARGET_IS_TM4C129_RA0) || \
3178
defined(TARGET_IS_TM4C129_RA1)
3179
#define ROM_MPURegionSet \
3180
((void (*)(uint32_t ui32Region, \
3181
uint32_t ui32Addr, \
3182
uint32_t ui32Flags))ROM_MPUTABLE[5])
3183
#endif
3184
#if defined(TARGET_IS_TM4C123_RA1) || \
3185
defined(TARGET_IS_TM4C123_RA3) || \
3186
defined(TARGET_IS_TM4C123_RB1) || \
3187
defined(TARGET_IS_TM4C129_RA0) || \
3188
defined(TARGET_IS_TM4C129_RA1)
3189
#define ROM_MPURegionGet \
3190
((void (*)(uint32_t ui32Region, \
3191
uint32_t *pui32Addr, \
3192
uint32_t *pui32Flags))ROM_MPUTABLE[6])
3193
#endif
3194
3195
//*****************************************************************************
3196
//
3197
// Macros for calling ROM functions in the OneWire API.
3198
//
3199
//*****************************************************************************
3200
#if defined(TARGET_IS_TM4C129_RA0) || \
3201
defined(TARGET_IS_TM4C129_RA1)
3202
#define ROM_OneWireIntStatus \
3203
((uint32_t (*)(uint32_t ui32Base, \
3204
bool bMasked))ROM_ONEWIRETABLE[0])
3205
#endif
3206
#if defined(TARGET_IS_TM4C129_RA0) || \
3207
defined(TARGET_IS_TM4C129_RA1)
3208
#define ROM_OneWireBusReset \
3209
((void (*)(uint32_t ui32Base))ROM_ONEWIRETABLE[1])
3210
#endif
3211
#if defined(TARGET_IS_TM4C129_RA0) || \
3212
defined(TARGET_IS_TM4C129_RA1)
3213
#define ROM_OneWireBusStatus \
3214
((uint32_t (*)(uint32_t ui32Base))ROM_ONEWIRETABLE[2])
3215
#endif
3216
#if defined(TARGET_IS_TM4C129_RA0) || \
3217
defined(TARGET_IS_TM4C129_RA1)
3218
#define ROM_OneWireDataGet \
3219
((void (*)(uint32_t u3i2Base, \
3220
uint32_t *pui32Data))ROM_ONEWIRETABLE[3])
3221
#endif
3222
#if defined(TARGET_IS_TM4C129_RA0) || \
3223
defined(TARGET_IS_TM4C129_RA1)
3224
#define ROM_OneWireDataGetNonBlocking \
3225
((bool (*)(uint32_t ui32Base, \
3226
uint32_t *pui32Data))ROM_ONEWIRETABLE[4])
3227
#endif
3228
#if defined(TARGET_IS_TM4C129_RA0) || \
3229
defined(TARGET_IS_TM4C129_RA1)
3230
#define ROM_OneWireInit \
3231
((void (*)(uint32_t ui32Base, \
3232
uint32_t ui32InitFlags))ROM_ONEWIRETABLE[5])
3233
#endif
3234
#if defined(TARGET_IS_TM4C129_RA0) || \
3235
defined(TARGET_IS_TM4C129_RA1)
3236
#define ROM_OneWireIntClear \
3237
((void (*)(uint32_t ui32Base, \
3238
uint32_t ui32IntFlags))ROM_ONEWIRETABLE[6])
3239
#endif
3240
#if defined(TARGET_IS_TM4C129_RA0) || \
3241
defined(TARGET_IS_TM4C129_RA1)
3242
#define ROM_OneWireIntDisable \
3243
((void (*)(uint32_t ui32Base, \
3244
uint32_t ui32IntFlags))ROM_ONEWIRETABLE[7])
3245
#endif
3246
#if defined(TARGET_IS_TM4C129_RA0) || \
3247
defined(TARGET_IS_TM4C129_RA1)
3248
#define ROM_OneWireIntEnable \
3249
((void (*)(uint32_t ui32Base, \
3250
uint32_t ui32IntFlags))ROM_ONEWIRETABLE[8])
3251
#endif
3252
#if defined(TARGET_IS_TM4C129_RA0) || \
3253
defined(TARGET_IS_TM4C129_RA1)
3254
#define ROM_OneWireTransaction \
3255
((void (*)(uint32_t ui32Base, \
3256
uint32_t ui32OpFlags, \
3257
uint32_t ui32Data, \
3258
uint32_t ui32BitCnt))ROM_ONEWIRETABLE[9])
3259
#endif
3260
#if defined(TARGET_IS_TM4C129_RA0) || \
3261
defined(TARGET_IS_TM4C129_RA1)
3262
#define ROM_OneWireDMADisable \
3263
((void (*)(uint32_t ui32Base, \
3264
uint32_t ui32DMAFlags))ROM_ONEWIRETABLE[10])
3265
#endif
3266
#if defined(TARGET_IS_TM4C129_RA0) || \
3267
defined(TARGET_IS_TM4C129_RA1)
3268
#define ROM_OneWireDMAEnable \
3269
((void (*)(uint32_t ui32Base, \
3270
uint32_t ui32DMAFlags))ROM_ONEWIRETABLE[11])
3271
#endif
3272
3273
//*****************************************************************************
3274
//
3275
// Macros for calling ROM functions in the PWM API.
3276
//
3277
//*****************************************************************************
3278
#if defined(TARGET_IS_TM4C123_RA1) || \
3279
defined(TARGET_IS_TM4C123_RA3) || \
3280
defined(TARGET_IS_TM4C123_RB1) || \
3281
defined(TARGET_IS_TM4C129_RA0) || \
3282
defined(TARGET_IS_TM4C129_RA1)
3283
#define ROM_PWMPulseWidthSet \
3284
((void (*)(uint32_t ui32Base, \
3285
uint32_t ui32PWMOut, \
3286
uint32_t ui32Width))ROM_PWMTABLE[0])
3287
#endif
3288
#if defined(TARGET_IS_TM4C123_RA1) || \
3289
defined(TARGET_IS_TM4C123_RA3) || \
3290
defined(TARGET_IS_TM4C123_RB1) || \
3291
defined(TARGET_IS_TM4C129_RA0) || \
3292
defined(TARGET_IS_TM4C129_RA1)
3293
#define ROM_PWMGenConfigure \
3294
((void (*)(uint32_t ui32Base, \
3295
uint32_t ui32Gen, \
3296
uint32_t ui32Config))ROM_PWMTABLE[1])
3297
#endif
3298
#if defined(TARGET_IS_TM4C123_RA1) || \
3299
defined(TARGET_IS_TM4C123_RA3) || \
3300
defined(TARGET_IS_TM4C123_RB1) || \
3301
defined(TARGET_IS_TM4C129_RA0) || \
3302
defined(TARGET_IS_TM4C129_RA1)
3303
#define ROM_PWMGenPeriodSet \
3304
((void (*)(uint32_t ui32Base, \
3305
uint32_t ui32Gen, \
3306
uint32_t ui32Period))ROM_PWMTABLE[2])
3307
#endif
3308
#if defined(TARGET_IS_TM4C123_RA1) || \
3309
defined(TARGET_IS_TM4C123_RA3) || \
3310
defined(TARGET_IS_TM4C123_RB1) || \
3311
defined(TARGET_IS_TM4C129_RA0) || \
3312
defined(TARGET_IS_TM4C129_RA1)
3313
#define ROM_PWMGenPeriodGet \
3314
((uint32_t (*)(uint32_t ui32Base, \
3315
uint32_t ui32Gen))ROM_PWMTABLE[3])
3316
#endif
3317
#if defined(TARGET_IS_TM4C123_RA1) || \
3318
defined(TARGET_IS_TM4C123_RA3) || \
3319
defined(TARGET_IS_TM4C123_RB1) || \
3320
defined(TARGET_IS_TM4C129_RA0) || \
3321
defined(TARGET_IS_TM4C129_RA1)
3322
#define ROM_PWMGenEnable \
3323
((void (*)(uint32_t ui32Base, \
3324
uint32_t ui32Gen))ROM_PWMTABLE[4])
3325
#endif
3326
#if defined(TARGET_IS_TM4C123_RA1) || \
3327
defined(TARGET_IS_TM4C123_RA3) || \
3328
defined(TARGET_IS_TM4C123_RB1) || \
3329
defined(TARGET_IS_TM4C129_RA0) || \
3330
defined(TARGET_IS_TM4C129_RA1)
3331
#define ROM_PWMGenDisable \
3332
((void (*)(uint32_t ui32Base, \
3333
uint32_t ui32Gen))ROM_PWMTABLE[5])
3334
#endif
3335
#if defined(TARGET_IS_TM4C123_RA1) || \
3336
defined(TARGET_IS_TM4C123_RA3) || \
3337
defined(TARGET_IS_TM4C123_RB1) || \
3338
defined(TARGET_IS_TM4C129_RA0) || \
3339
defined(TARGET_IS_TM4C129_RA1)
3340
#define ROM_PWMPulseWidthGet \
3341
((uint32_t (*)(uint32_t ui32Base, \
3342
uint32_t ui32PWMOut))ROM_PWMTABLE[6])
3343
#endif
3344
#if defined(TARGET_IS_TM4C123_RA1) || \
3345
defined(TARGET_IS_TM4C123_RA3) || \
3346
defined(TARGET_IS_TM4C123_RB1) || \
3347
defined(TARGET_IS_TM4C129_RA0) || \
3348
defined(TARGET_IS_TM4C129_RA1)
3349
#define ROM_PWMDeadBandEnable \
3350
((void (*)(uint32_t ui32Base, \
3351
uint32_t ui32Gen, \
3352
uint16_t ui16Rise, \
3353
uint16_t ui16Fall))ROM_PWMTABLE[7])
3354
#endif
3355
#if defined(TARGET_IS_TM4C123_RA1) || \
3356
defined(TARGET_IS_TM4C123_RA3) || \
3357
defined(TARGET_IS_TM4C123_RB1) || \
3358
defined(TARGET_IS_TM4C129_RA0) || \
3359
defined(TARGET_IS_TM4C129_RA1)
3360
#define ROM_PWMDeadBandDisable \
3361
((void (*)(uint32_t ui32Base, \
3362
uint32_t ui32Gen))ROM_PWMTABLE[8])
3363
#endif
3364
#if defined(TARGET_IS_TM4C123_RA1) || \
3365
defined(TARGET_IS_TM4C123_RA3) || \
3366
defined(TARGET_IS_TM4C123_RB1) || \
3367
defined(TARGET_IS_TM4C129_RA0) || \
3368
defined(TARGET_IS_TM4C129_RA1)
3369
#define ROM_PWMSyncUpdate \
3370
((void (*)(uint32_t ui32Base, \
3371
uint32_t ui32GenBits))ROM_PWMTABLE[9])
3372
#endif
3373
#if defined(TARGET_IS_TM4C123_RA1) || \
3374
defined(TARGET_IS_TM4C123_RA3) || \
3375
defined(TARGET_IS_TM4C123_RB1) || \
3376
defined(TARGET_IS_TM4C129_RA0) || \
3377
defined(TARGET_IS_TM4C129_RA1)
3378
#define ROM_PWMSyncTimeBase \
3379
((void (*)(uint32_t ui32Base, \
3380
uint32_t ui32GenBits))ROM_PWMTABLE[10])
3381
#endif
3382
#if defined(TARGET_IS_TM4C123_RA1) || \
3383
defined(TARGET_IS_TM4C123_RA3) || \
3384
defined(TARGET_IS_TM4C123_RB1) || \
3385
defined(TARGET_IS_TM4C129_RA0) || \
3386
defined(TARGET_IS_TM4C129_RA1)
3387
#define ROM_PWMOutputState \
3388
((void (*)(uint32_t ui32Base, \
3389
uint32_t ui32PWMOutBits, \
3390
bool bEnable))ROM_PWMTABLE[11])
3391
#endif
3392
#if defined(TARGET_IS_TM4C123_RA1) || \
3393
defined(TARGET_IS_TM4C123_RA3) || \
3394
defined(TARGET_IS_TM4C123_RB1) || \
3395
defined(TARGET_IS_TM4C129_RA0) || \
3396
defined(TARGET_IS_TM4C129_RA1)
3397
#define ROM_PWMOutputInvert \
3398
((void (*)(uint32_t ui32Base, \
3399
uint32_t ui32PWMOutBits, \
3400
bool bInvert))ROM_PWMTABLE[12])
3401
#endif
3402
#if defined(TARGET_IS_TM4C123_RA1) || \
3403
defined(TARGET_IS_TM4C123_RA3) || \
3404
defined(TARGET_IS_TM4C123_RB1) || \
3405
defined(TARGET_IS_TM4C129_RA0) || \
3406
defined(TARGET_IS_TM4C129_RA1)
3407
#define ROM_PWMOutputFault \
3408
((void (*)(uint32_t ui32Base, \
3409
uint32_t ui32PWMOutBits, \
3410
bool bFaultSuppress))ROM_PWMTABLE[13])
3411
#endif
3412
#if defined(TARGET_IS_TM4C123_RA1) || \
3413
defined(TARGET_IS_TM4C123_RA3) || \
3414
defined(TARGET_IS_TM4C123_RB1) || \
3415
defined(TARGET_IS_TM4C129_RA0) || \
3416
defined(TARGET_IS_TM4C129_RA1)
3417
#define ROM_PWMGenIntTrigEnable \
3418
((void (*)(uint32_t ui32Base, \
3419
uint32_t ui32Gen, \
3420
uint32_t ui32IntTrig))ROM_PWMTABLE[14])
3421
#endif
3422
#if defined(TARGET_IS_TM4C123_RA1) || \
3423
defined(TARGET_IS_TM4C123_RA3) || \
3424
defined(TARGET_IS_TM4C123_RB1) || \
3425
defined(TARGET_IS_TM4C129_RA0) || \
3426
defined(TARGET_IS_TM4C129_RA1)
3427
#define ROM_PWMGenIntTrigDisable \
3428
((void (*)(uint32_t ui32Base, \
3429
uint32_t ui32Gen, \
3430
uint32_t ui32IntTrig))ROM_PWMTABLE[15])
3431
#endif
3432
#if defined(TARGET_IS_TM4C123_RA1) || \
3433
defined(TARGET_IS_TM4C123_RA3) || \
3434
defined(TARGET_IS_TM4C123_RB1) || \
3435
defined(TARGET_IS_TM4C129_RA0) || \
3436
defined(TARGET_IS_TM4C129_RA1)
3437
#define ROM_PWMGenIntStatus \
3438
((uint32_t (*)(uint32_t ui32Base, \
3439
uint32_t ui32Gen, \
3440
bool bMasked))ROM_PWMTABLE[16])
3441
#endif
3442
#if defined(TARGET_IS_TM4C123_RA1) || \
3443
defined(TARGET_IS_TM4C123_RA3) || \
3444
defined(TARGET_IS_TM4C123_RB1) || \
3445
defined(TARGET_IS_TM4C129_RA0) || \
3446
defined(TARGET_IS_TM4C129_RA1)
3447
#define ROM_PWMGenIntClear \
3448
((void (*)(uint32_t ui32Base, \
3449
uint32_t ui32Gen, \
3450
uint32_t ui32Ints))ROM_PWMTABLE[17])
3451
#endif
3452
#if defined(TARGET_IS_TM4C123_RA1) || \
3453
defined(TARGET_IS_TM4C123_RA3) || \
3454
defined(TARGET_IS_TM4C123_RB1) || \
3455
defined(TARGET_IS_TM4C129_RA0) || \
3456
defined(TARGET_IS_TM4C129_RA1)
3457
#define ROM_PWMIntEnable \
3458
((void (*)(uint32_t ui32Base, \
3459
uint32_t ui32GenFault))ROM_PWMTABLE[18])
3460
#endif
3461
#if defined(TARGET_IS_TM4C123_RA1) || \
3462
defined(TARGET_IS_TM4C123_RA3) || \
3463
defined(TARGET_IS_TM4C123_RB1) || \
3464
defined(TARGET_IS_TM4C129_RA0) || \
3465
defined(TARGET_IS_TM4C129_RA1)
3466
#define ROM_PWMIntDisable \
3467
((void (*)(uint32_t ui32Base, \
3468
uint32_t ui32GenFault))ROM_PWMTABLE[19])
3469
#endif
3470
#if defined(TARGET_IS_TM4C123_RA1) || \
3471
defined(TARGET_IS_TM4C123_RA3) || \
3472
defined(TARGET_IS_TM4C123_RB1) || \
3473
defined(TARGET_IS_TM4C129_RA0) || \
3474
defined(TARGET_IS_TM4C129_RA1)
3475
#define ROM_PWMFaultIntClear \
3476
((void (*)(uint32_t ui32Base))ROM_PWMTABLE[20])
3477
#endif
3478
#if defined(TARGET_IS_TM4C123_RA1) || \
3479
defined(TARGET_IS_TM4C123_RA3) || \
3480
defined(TARGET_IS_TM4C123_RB1) || \
3481
defined(TARGET_IS_TM4C129_RA0) || \
3482
defined(TARGET_IS_TM4C129_RA1)
3483
#define ROM_PWMIntStatus \
3484
((uint32_t (*)(uint32_t ui32Base, \
3485
bool bMasked))ROM_PWMTABLE[21])
3486
#endif
3487
#if defined(TARGET_IS_TM4C123_RA1) || \
3488
defined(TARGET_IS_TM4C123_RA3) || \
3489
defined(TARGET_IS_TM4C123_RB1) || \
3490
defined(TARGET_IS_TM4C129_RA0) || \
3491
defined(TARGET_IS_TM4C129_RA1)
3492
#define ROM_PWMOutputFaultLevel \
3493
((void (*)(uint32_t ui32Base, \
3494
uint32_t ui32PWMOutBits, \
3495
bool bDriveHigh))ROM_PWMTABLE[22])
3496
#endif
3497
#if defined(TARGET_IS_TM4C123_RA1) || \
3498
defined(TARGET_IS_TM4C123_RA3) || \
3499
defined(TARGET_IS_TM4C123_RB1) || \
3500
defined(TARGET_IS_TM4C129_RA0) || \
3501
defined(TARGET_IS_TM4C129_RA1)
3502
#define ROM_PWMFaultIntClearExt \
3503
((void (*)(uint32_t ui32Base, \
3504
uint32_t ui32FaultInts))ROM_PWMTABLE[23])
3505
#endif
3506
#if defined(TARGET_IS_TM4C123_RA1) || \
3507
defined(TARGET_IS_TM4C123_RA3) || \
3508
defined(TARGET_IS_TM4C123_RB1) || \
3509
defined(TARGET_IS_TM4C129_RA0) || \
3510
defined(TARGET_IS_TM4C129_RA1)
3511
#define ROM_PWMGenFaultConfigure \
3512
((void (*)(uint32_t ui32Base, \
3513
uint32_t ui32Gen, \
3514
uint32_t ui32MinFaultPeriod, \
3515
uint32_t ui32FaultSenses))ROM_PWMTABLE[24])
3516
#endif
3517
#if defined(TARGET_IS_TM4C123_RA1) || \
3518
defined(TARGET_IS_TM4C123_RA3) || \
3519
defined(TARGET_IS_TM4C123_RB1) || \
3520
defined(TARGET_IS_TM4C129_RA0) || \
3521
defined(TARGET_IS_TM4C129_RA1)
3522
#define ROM_PWMGenFaultTriggerSet \
3523
((void (*)(uint32_t ui32Base, \
3524
uint32_t ui32Gen, \
3525
uint32_t ui32Group, \
3526
uint32_t ui32FaultTriggers))ROM_PWMTABLE[25])
3527
#endif
3528
#if defined(TARGET_IS_TM4C123_RA1) || \
3529
defined(TARGET_IS_TM4C123_RA3) || \
3530
defined(TARGET_IS_TM4C123_RB1) || \
3531
defined(TARGET_IS_TM4C129_RA0) || \
3532
defined(TARGET_IS_TM4C129_RA1)
3533
#define ROM_PWMGenFaultTriggerGet \
3534
((uint32_t (*)(uint32_t ui32Base, \
3535
uint32_t ui32Gen, \
3536
uint32_t ui32Group))ROM_PWMTABLE[26])
3537
#endif
3538
#if defined(TARGET_IS_TM4C123_RA1) || \
3539
defined(TARGET_IS_TM4C123_RA3) || \
3540
defined(TARGET_IS_TM4C123_RB1) || \
3541
defined(TARGET_IS_TM4C129_RA0) || \
3542
defined(TARGET_IS_TM4C129_RA1)
3543
#define ROM_PWMGenFaultStatus \
3544
((uint32_t (*)(uint32_t ui32Base, \
3545
uint32_t ui32Gen, \
3546
uint32_t ui32Group))ROM_PWMTABLE[27])
3547
#endif
3548
#if defined(TARGET_IS_TM4C123_RA1) || \
3549
defined(TARGET_IS_TM4C123_RA3) || \
3550
defined(TARGET_IS_TM4C123_RB1) || \
3551
defined(TARGET_IS_TM4C129_RA0) || \
3552
defined(TARGET_IS_TM4C129_RA1)
3553
#define ROM_PWMGenFaultClear \
3554
((void (*)(uint32_t ui32Base, \
3555
uint32_t ui32Gen, \
3556
uint32_t ui32Group, \
3557
uint32_t ui32FaultTriggers))ROM_PWMTABLE[28])
3558
#endif
3559
#if defined(TARGET_IS_TM4C129_RA0) || \
3560
defined(TARGET_IS_TM4C129_RA1)
3561
#define ROM_PWMClockSet \
3562
((void (*)(uint32_t ui32Base, \
3563
uint32_t ui32Config))ROM_PWMTABLE[29])
3564
#endif
3565
#if defined(TARGET_IS_TM4C129_RA0) || \
3566
defined(TARGET_IS_TM4C129_RA1)
3567
#define ROM_PWMClockGet \
3568
((uint32_t (*)(uint32_t ui32Base))ROM_PWMTABLE[30])
3569
#endif
3570
#if defined(TARGET_IS_TM4C123_RB1) || \
3571
defined(TARGET_IS_TM4C129_RA0) || \
3572
defined(TARGET_IS_TM4C129_RA1)
3573
#define ROM_PWMOutputUpdateMode \
3574
((void (*)(uint32_t ui32Base, \
3575
uint32_t ui32PWMOutBits, \
3576
uint32_t ui32Mode))ROM_PWMTABLE[31])
3577
#endif
3578
3579
//*****************************************************************************
3580
//
3581
// Macros for calling ROM functions in the QEI API.
3582
//
3583
//*****************************************************************************
3584
#if defined(TARGET_IS_TM4C123_RA1) || \
3585
defined(TARGET_IS_TM4C123_RA3) || \
3586
defined(TARGET_IS_TM4C123_RB1) || \
3587
defined(TARGET_IS_TM4C129_RA0) || \
3588
defined(TARGET_IS_TM4C129_RA1)
3589
#define ROM_QEIPositionGet \
3590
((uint32_t (*)(uint32_t ui32Base))ROM_QEITABLE[0])
3591
#endif
3592
#if defined(TARGET_IS_TM4C123_RA1) || \
3593
defined(TARGET_IS_TM4C123_RA3) || \
3594
defined(TARGET_IS_TM4C123_RB1) || \
3595
defined(TARGET_IS_TM4C129_RA0) || \
3596
defined(TARGET_IS_TM4C129_RA1)
3597
#define ROM_QEIEnable \
3598
((void (*)(uint32_t ui32Base))ROM_QEITABLE[1])
3599
#endif
3600
#if defined(TARGET_IS_TM4C123_RA1) || \
3601
defined(TARGET_IS_TM4C123_RA3) || \
3602
defined(TARGET_IS_TM4C123_RB1) || \
3603
defined(TARGET_IS_TM4C129_RA0) || \
3604
defined(TARGET_IS_TM4C129_RA1)
3605
#define ROM_QEIDisable \
3606
((void (*)(uint32_t ui32Base))ROM_QEITABLE[2])
3607
#endif
3608
#if defined(TARGET_IS_TM4C123_RA1) || \
3609
defined(TARGET_IS_TM4C123_RA3) || \
3610
defined(TARGET_IS_TM4C123_RB1) || \
3611
defined(TARGET_IS_TM4C129_RA0) || \
3612
defined(TARGET_IS_TM4C129_RA1)
3613
#define ROM_QEIConfigure \
3614
((void (*)(uint32_t ui32Base, \
3615
uint32_t ui32Config, \
3616
uint32_t ui32MaxPosition))ROM_QEITABLE[3])
3617
#endif
3618
#if defined(TARGET_IS_TM4C123_RA1) || \
3619
defined(TARGET_IS_TM4C123_RA3) || \
3620
defined(TARGET_IS_TM4C123_RB1) || \
3621
defined(TARGET_IS_TM4C129_RA0) || \
3622
defined(TARGET_IS_TM4C129_RA1)
3623
#define ROM_QEIPositionSet \
3624
((void (*)(uint32_t ui32Base, \
3625
uint32_t ui32Position))ROM_QEITABLE[4])
3626
#endif
3627
#if defined(TARGET_IS_TM4C123_RA1) || \
3628
defined(TARGET_IS_TM4C123_RA3) || \
3629
defined(TARGET_IS_TM4C123_RB1) || \
3630
defined(TARGET_IS_TM4C129_RA0) || \
3631
defined(TARGET_IS_TM4C129_RA1)
3632
#define ROM_QEIDirectionGet \
3633
((int32_t (*)(uint32_t ui32Base))ROM_QEITABLE[5])
3634
#endif
3635
#if defined(TARGET_IS_TM4C123_RA1) || \
3636
defined(TARGET_IS_TM4C123_RA3) || \
3637
defined(TARGET_IS_TM4C123_RB1) || \
3638
defined(TARGET_IS_TM4C129_RA0) || \
3639
defined(TARGET_IS_TM4C129_RA1)
3640
#define ROM_QEIErrorGet \
3641
((bool (*)(uint32_t ui32Base))ROM_QEITABLE[6])
3642
#endif
3643
#if defined(TARGET_IS_TM4C123_RA1) || \
3644
defined(TARGET_IS_TM4C123_RA3) || \
3645
defined(TARGET_IS_TM4C123_RB1) || \
3646
defined(TARGET_IS_TM4C129_RA0) || \
3647
defined(TARGET_IS_TM4C129_RA1)
3648
#define ROM_QEIVelocityEnable \
3649
((void (*)(uint32_t ui32Base))ROM_QEITABLE[7])
3650
#endif
3651
#if defined(TARGET_IS_TM4C123_RA1) || \
3652
defined(TARGET_IS_TM4C123_RA3) || \
3653
defined(TARGET_IS_TM4C123_RB1) || \
3654
defined(TARGET_IS_TM4C129_RA0) || \
3655
defined(TARGET_IS_TM4C129_RA1)
3656
#define ROM_QEIVelocityDisable \
3657
((void (*)(uint32_t ui32Base))ROM_QEITABLE[8])
3658
#endif
3659
#if defined(TARGET_IS_TM4C123_RA1) || \
3660
defined(TARGET_IS_TM4C123_RA3) || \
3661
defined(TARGET_IS_TM4C123_RB1) || \
3662
defined(TARGET_IS_TM4C129_RA0) || \
3663
defined(TARGET_IS_TM4C129_RA1)
3664
#define ROM_QEIVelocityConfigure \
3665
((void (*)(uint32_t ui32Base, \
3666
uint32_t ui32PreDiv, \
3667
uint32_t ui32Period))ROM_QEITABLE[9])
3668
#endif
3669
#if defined(TARGET_IS_TM4C123_RA1) || \
3670
defined(TARGET_IS_TM4C123_RA3) || \
3671
defined(TARGET_IS_TM4C123_RB1) || \
3672
defined(TARGET_IS_TM4C129_RA0) || \
3673
defined(TARGET_IS_TM4C129_RA1)
3674
#define ROM_QEIVelocityGet \
3675
((uint32_t (*)(uint32_t ui32Base))ROM_QEITABLE[10])
3676
#endif
3677
#if defined(TARGET_IS_TM4C123_RA1) || \
3678
defined(TARGET_IS_TM4C123_RA3) || \
3679
defined(TARGET_IS_TM4C123_RB1) || \
3680
defined(TARGET_IS_TM4C129_RA0) || \
3681
defined(TARGET_IS_TM4C129_RA1)
3682
#define ROM_QEIIntEnable \
3683
((void (*)(uint32_t ui32Base, \
3684
uint32_t ui32IntFlags))ROM_QEITABLE[11])
3685
#endif
3686
#if defined(TARGET_IS_TM4C123_RA1) || \
3687
defined(TARGET_IS_TM4C123_RA3) || \
3688
defined(TARGET_IS_TM4C123_RB1) || \
3689
defined(TARGET_IS_TM4C129_RA0) || \
3690
defined(TARGET_IS_TM4C129_RA1)
3691
#define ROM_QEIIntDisable \
3692
((void (*)(uint32_t ui32Base, \
3693
uint32_t ui32IntFlags))ROM_QEITABLE[12])
3694
#endif
3695
#if defined(TARGET_IS_TM4C123_RA1) || \
3696
defined(TARGET_IS_TM4C123_RA3) || \
3697
defined(TARGET_IS_TM4C123_RB1) || \
3698
defined(TARGET_IS_TM4C129_RA0) || \
3699
defined(TARGET_IS_TM4C129_RA1)
3700
#define ROM_QEIIntStatus \
3701
((uint32_t (*)(uint32_t ui32Base, \
3702
bool bMasked))ROM_QEITABLE[13])
3703
#endif
3704
#if defined(TARGET_IS_TM4C123_RA1) || \
3705
defined(TARGET_IS_TM4C123_RA3) || \
3706
defined(TARGET_IS_TM4C123_RB1) || \
3707
defined(TARGET_IS_TM4C129_RA0) || \
3708
defined(TARGET_IS_TM4C129_RA1)
3709
#define ROM_QEIIntClear \
3710
((void (*)(uint32_t ui32Base, \
3711
uint32_t ui32IntFlags))ROM_QEITABLE[14])
3712
#endif
3713
3714
//*****************************************************************************
3715
//
3716
// Macros for calling ROM functions in the SHAMD5 API.
3717
//
3718
//*****************************************************************************
3719
#if defined(TARGET_IS_TM4C129_RA0) || \
3720
defined(TARGET_IS_TM4C129_RA1)
3721
#define ROM_SHAMD5IntStatus \
3722
((uint32_t (*)(uint32_t ui32Base, \
3723
bool bMasked))ROM_SHAMD5TABLE[0])
3724
#endif
3725
#if defined(TARGET_IS_TM4C129_RA0) || \
3726
defined(TARGET_IS_TM4C129_RA1)
3727
#define ROM_SHAMD5ConfigSet \
3728
((void (*)(uint32_t ui32Base, \
3729
uint32_t ui32Mode))ROM_SHAMD5TABLE[1])
3730
#endif
3731
#if defined(TARGET_IS_TM4C129_RA0) || \
3732
defined(TARGET_IS_TM4C129_RA1)
3733
#define ROM_SHAMD5DataProcess \
3734
((void (*)(uint32_t ui32Base, \
3735
uint32_t *pui32DataSrc, \
3736
uint32_t ui32DataLength, \
3737
uint32_t *pui32HashResult))ROM_SHAMD5TABLE[2])
3738
#endif
3739
#if defined(TARGET_IS_TM4C129_RA0) || \
3740
defined(TARGET_IS_TM4C129_RA1)
3741
#define ROM_SHAMD5DataWrite \
3742
((void (*)(uint32_t ui32Base, \
3743
uint32_t *pui32Src))ROM_SHAMD5TABLE[3])
3744
#endif
3745
#if defined(TARGET_IS_TM4C129_RA0) || \
3746
defined(TARGET_IS_TM4C129_RA1)
3747
#define ROM_SHAMD5DataWriteNonBlocking \
3748
((bool (*)(uint32_t ui32Base, \
3749
uint32_t *pui32Src))ROM_SHAMD5TABLE[4])
3750
#endif
3751
#if defined(TARGET_IS_TM4C129_RA0) || \
3752
defined(TARGET_IS_TM4C129_RA1)
3753
#define ROM_SHAMD5DMADisable \
3754
((void (*)(uint32_t ui32Base))ROM_SHAMD5TABLE[5])
3755
#endif
3756
#if defined(TARGET_IS_TM4C129_RA0) || \
3757
defined(TARGET_IS_TM4C129_RA1)
3758
#define ROM_SHAMD5DMAEnable \
3759
((void (*)(uint32_t ui32Base))ROM_SHAMD5TABLE[6])
3760
#endif
3761
#if defined(TARGET_IS_TM4C129_RA0) || \
3762
defined(TARGET_IS_TM4C129_RA1)
3763
#define ROM_SHAMD5HashLengthSet \
3764
((void (*)(uint32_t ui32Base, \
3765
uint32_t ui32Length))ROM_SHAMD5TABLE[7])
3766
#endif
3767
#if defined(TARGET_IS_TM4C129_RA0) || \
3768
defined(TARGET_IS_TM4C129_RA1)
3769
#define ROM_SHAMD5HMACKeySet \
3770
((void (*)(uint32_t ui32Base, \
3771
uint32_t *pui32Src))ROM_SHAMD5TABLE[8])
3772
#endif
3773
#if defined(TARGET_IS_TM4C129_RA0) || \
3774
defined(TARGET_IS_TM4C129_RA1)
3775
#define ROM_SHAMD5HMACPPKeyGenerate \
3776
((void (*)(uint32_t ui32Base, \
3777
uint32_t *pui32Key, \
3778
uint32_t *pui32PPKey))ROM_SHAMD5TABLE[9])
3779
#endif
3780
#if defined(TARGET_IS_TM4C129_RA0) || \
3781
defined(TARGET_IS_TM4C129_RA1)
3782
#define ROM_SHAMD5HMACPPKeySet \
3783
((void (*)(uint32_t ui32Base, \
3784
uint32_t *pui32Src))ROM_SHAMD5TABLE[10])
3785
#endif
3786
#if defined(TARGET_IS_TM4C129_RA0) || \
3787
defined(TARGET_IS_TM4C129_RA1)
3788
#define ROM_SHAMD5HMACProcess \
3789
((void (*)(uint32_t ui32Base, \
3790
uint32_t *pui32DataSrc, \
3791
uint32_t ui32DataLength, \
3792
uint32_t *pui32HashResult))ROM_SHAMD5TABLE[11])
3793
#endif
3794
#if defined(TARGET_IS_TM4C129_RA0) || \
3795
defined(TARGET_IS_TM4C129_RA1)
3796
#define ROM_SHAMD5IntClear \
3797
((void (*)(uint32_t ui32Base, \
3798
uint32_t ui32IntFlags))ROM_SHAMD5TABLE[12])
3799
#endif
3800
#if defined(TARGET_IS_TM4C129_RA0) || \
3801
defined(TARGET_IS_TM4C129_RA1)
3802
#define ROM_SHAMD5IntDisable \
3803
((void (*)(uint32_t ui32Base, \
3804
uint32_t ui32IntFlags))ROM_SHAMD5TABLE[13])
3805
#endif
3806
#if defined(TARGET_IS_TM4C129_RA0) || \
3807
defined(TARGET_IS_TM4C129_RA1)
3808
#define ROM_SHAMD5IntEnable \
3809
((void (*)(uint32_t ui32Base, \
3810
uint32_t ui32IntFlags))ROM_SHAMD5TABLE[14])
3811
#endif
3812
#if defined(TARGET_IS_TM4C129_RA0) || \
3813
defined(TARGET_IS_TM4C129_RA1)
3814
#define ROM_SHAMD5Reset \
3815
((void (*)(uint32_t ui32Base))ROM_SHAMD5TABLE[15])
3816
#endif
3817
#if defined(TARGET_IS_TM4C129_RA0) || \
3818
defined(TARGET_IS_TM4C129_RA1)
3819
#define ROM_SHAMD5ResultRead \
3820
((void (*)(uint32_t ui32Base, \
3821
uint32_t *pui32Dest))ROM_SHAMD5TABLE[16])
3822
#endif
3823
3824
//*****************************************************************************
3825
//
3826
// Macros for calling ROM functions in the SMBus API.
3827
//
3828
//*****************************************************************************
3829
#if defined(TARGET_IS_TM4C123_RA1) || \
3830
defined(TARGET_IS_TM4C123_RA3) || \
3831
defined(TARGET_IS_TM4C123_RB1) || \
3832
defined(TARGET_IS_TM4C129_RA0) || \
3833
defined(TARGET_IS_TM4C129_RA1)
3834
#define ROM_SMBusMasterIntProcess \
3835
((tSMBusStatus (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[0])
3836
#endif
3837
#if defined(TARGET_IS_TM4C123_RA1) || \
3838
defined(TARGET_IS_TM4C123_RA3) || \
3839
defined(TARGET_IS_TM4C123_RB1) || \
3840
defined(TARGET_IS_TM4C129_RA0) || \
3841
defined(TARGET_IS_TM4C129_RA1)
3842
#define ROM_SMBusARPDisable \
3843
((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[1])
3844
#endif
3845
#if defined(TARGET_IS_TM4C123_RA1) || \
3846
defined(TARGET_IS_TM4C123_RA3) || \
3847
defined(TARGET_IS_TM4C123_RB1) || \
3848
defined(TARGET_IS_TM4C129_RA0) || \
3849
defined(TARGET_IS_TM4C129_RA1)
3850
#define ROM_SMBusARPEnable \
3851
((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[2])
3852
#endif
3853
#if defined(TARGET_IS_TM4C123_RA1) || \
3854
defined(TARGET_IS_TM4C123_RA3) || \
3855
defined(TARGET_IS_TM4C123_RB1) || \
3856
defined(TARGET_IS_TM4C129_RA0) || \
3857
defined(TARGET_IS_TM4C129_RA1)
3858
#define ROM_SMBusARPUDIDPacketDecode \
3859
((void (*)(tSMBusUDID *pUDID, \
3860
uint8_t *pui8Address, \
3861
uint8_t *pui8Data))ROM_SMBUSTABLE[3])
3862
#endif
3863
#if defined(TARGET_IS_TM4C123_RA1) || \
3864
defined(TARGET_IS_TM4C123_RA3) || \
3865
defined(TARGET_IS_TM4C123_RB1) || \
3866
defined(TARGET_IS_TM4C129_RA0) || \
3867
defined(TARGET_IS_TM4C129_RA1)
3868
#define ROM_SMBusARPUDIDPacketEncode \
3869
((void (*)(tSMBusUDID *pUDID, \
3870
uint8_t ui8Address, \
3871
uint8_t *pui8Data))ROM_SMBUSTABLE[4])
3872
#endif
3873
#if defined(TARGET_IS_TM4C123_RA1) || \
3874
defined(TARGET_IS_TM4C123_RA3) || \
3875
defined(TARGET_IS_TM4C123_RB1) || \
3876
defined(TARGET_IS_TM4C129_RA0) || \
3877
defined(TARGET_IS_TM4C129_RA1)
3878
#define ROM_SMBusMasterARPAssignAddress \
3879
((tSMBusStatus (*)(tSMBus *psSMBus, \
3880
uint8_t *pui8Data))ROM_SMBUSTABLE[5])
3881
#endif
3882
#if defined(TARGET_IS_TM4C123_RA1) || \
3883
defined(TARGET_IS_TM4C123_RA3) || \
3884
defined(TARGET_IS_TM4C123_RB1) || \
3885
defined(TARGET_IS_TM4C129_RA0) || \
3886
defined(TARGET_IS_TM4C129_RA1)
3887
#define ROM_SMBusMasterARPGetUDIDDir \
3888
((tSMBusStatus (*)(tSMBus *psSMBus, \
3889
uint8_t ui8TargetAddress, \
3890
uint8_t *pui8Data))ROM_SMBUSTABLE[6])
3891
#endif
3892
#if defined(TARGET_IS_TM4C123_RA1) || \
3893
defined(TARGET_IS_TM4C123_RA3) || \
3894
defined(TARGET_IS_TM4C123_RB1) || \
3895
defined(TARGET_IS_TM4C129_RA0) || \
3896
defined(TARGET_IS_TM4C129_RA1)
3897
#define ROM_SMBusMasterARPGetUDIDGen \
3898
((tSMBusStatus (*)(tSMBus *psSMBus, \
3899
uint8_t *pui8Data))ROM_SMBUSTABLE[7])
3900
#endif
3901
#if defined(TARGET_IS_TM4C123_RA1) || \
3902
defined(TARGET_IS_TM4C123_RA3) || \
3903
defined(TARGET_IS_TM4C123_RB1) || \
3904
defined(TARGET_IS_TM4C129_RA0) || \
3905
defined(TARGET_IS_TM4C129_RA1)
3906
#define ROM_SMBusMasterARPNotifyMaster \
3907
((tSMBusStatus (*)(tSMBus *psSMBus, \
3908
uint8_t *pui8Data))ROM_SMBUSTABLE[8])
3909
#endif
3910
#if defined(TARGET_IS_TM4C123_RA1) || \
3911
defined(TARGET_IS_TM4C123_RA3) || \
3912
defined(TARGET_IS_TM4C123_RB1) || \
3913
defined(TARGET_IS_TM4C129_RA0) || \
3914
defined(TARGET_IS_TM4C129_RA1)
3915
#define ROM_SMBusMasterARPPrepareToARP \
3916
((tSMBusStatus (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[9])
3917
#endif
3918
#if defined(TARGET_IS_TM4C123_RA1) || \
3919
defined(TARGET_IS_TM4C123_RA3) || \
3920
defined(TARGET_IS_TM4C123_RB1) || \
3921
defined(TARGET_IS_TM4C129_RA0) || \
3922
defined(TARGET_IS_TM4C129_RA1)
3923
#define ROM_SMBusMasterARPResetDeviceDir \
3924
((tSMBusStatus (*)(tSMBus *psSMBus, \
3925
uint8_t ui8TargetAddress))ROM_SMBUSTABLE[10])
3926
#endif
3927
#if defined(TARGET_IS_TM4C123_RA1) || \
3928
defined(TARGET_IS_TM4C123_RA3) || \
3929
defined(TARGET_IS_TM4C123_RB1) || \
3930
defined(TARGET_IS_TM4C129_RA0) || \
3931
defined(TARGET_IS_TM4C129_RA1)
3932
#define ROM_SMBusMasterARPResetDeviceGen \
3933
((tSMBusStatus (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[11])
3934
#endif
3935
#if defined(TARGET_IS_TM4C123_RA1) || \
3936
defined(TARGET_IS_TM4C123_RA3) || \
3937
defined(TARGET_IS_TM4C123_RB1) || \
3938
defined(TARGET_IS_TM4C129_RA0) || \
3939
defined(TARGET_IS_TM4C129_RA1)
3940
#define ROM_SMBusMasterBlockProcessCall \
3941
((tSMBusStatus (*)(tSMBus *psSMBus, \
3942
uint8_t ui8TargetAddress, \
3943
uint8_t ui8Command, \
3944
uint8_t *pui8TxData, \
3945
uint8_t ui8TxSize, \
3946
uint8_t *pui8RxData))ROM_SMBUSTABLE[12])
3947
#endif
3948
#if defined(TARGET_IS_TM4C123_RA3) || \
3949
defined(TARGET_IS_TM4C123_RB1) || \
3950
defined(TARGET_IS_TM4C129_RA0) || \
3951
defined(TARGET_IS_TM4C129_RA1)
3952
#define ROM_SMBusMasterBlockRead \
3953
((tSMBusStatus (*)(tSMBus *psSMBus, \
3954
uint8_t ui8TargetAddress, \
3955
uint8_t ui8Command, \
3956
uint8_t *pui8Data))ROM_SMBUSTABLE[13])
3957
#endif
3958
#if defined(TARGET_IS_TM4C123_RA1) || \
3959
defined(TARGET_IS_TM4C123_RA3) || \
3960
defined(TARGET_IS_TM4C123_RB1) || \
3961
defined(TARGET_IS_TM4C129_RA0) || \
3962
defined(TARGET_IS_TM4C129_RA1)
3963
#define ROM_SMBusMasterBlockWrite \
3964
((tSMBusStatus (*)(tSMBus *psSMBus, \
3965
uint8_t ui8TargetAddress, \
3966
uint8_t ui8Command, \
3967
uint8_t *pui8Data, \
3968
uint8_t ui8Size))ROM_SMBUSTABLE[14])
3969
#endif
3970
#if defined(TARGET_IS_TM4C123_RA1) || \
3971
defined(TARGET_IS_TM4C123_RA3) || \
3972
defined(TARGET_IS_TM4C123_RB1) || \
3973
defined(TARGET_IS_TM4C129_RA0) || \
3974
defined(TARGET_IS_TM4C129_RA1)
3975
#define ROM_SMBusMasterByteReceive \
3976
((tSMBusStatus (*)(tSMBus *psSMBus, \
3977
uint8_t ui8TargetAddress, \
3978
uint8_t *pui8Data))ROM_SMBUSTABLE[15])
3979
#endif
3980
#if defined(TARGET_IS_TM4C123_RA1) || \
3981
defined(TARGET_IS_TM4C123_RA3) || \
3982
defined(TARGET_IS_TM4C123_RB1) || \
3983
defined(TARGET_IS_TM4C129_RA0) || \
3984
defined(TARGET_IS_TM4C129_RA1)
3985
#define ROM_SMBusMasterByteSend \
3986
((tSMBusStatus (*)(tSMBus *psSMBus, \
3987
uint8_t ui8TargetAddress, \
3988
uint8_t ui8Data))ROM_SMBUSTABLE[16])
3989
#endif
3990
#if defined(TARGET_IS_TM4C123_RA1) || \
3991
defined(TARGET_IS_TM4C123_RA3) || \
3992
defined(TARGET_IS_TM4C123_RB1) || \
3993
defined(TARGET_IS_TM4C129_RA0) || \
3994
defined(TARGET_IS_TM4C129_RA1)
3995
#define ROM_SMBusMasterByteWordRead \
3996
((tSMBusStatus (*)(tSMBus *psSMBus, \
3997
uint8_t ui8TargetAddress, \
3998
uint8_t ui8Command, \
3999
uint8_t *pui8Data, \
4000
uint8_t ui8Size))ROM_SMBUSTABLE[17])
4001
#endif
4002
#if defined(TARGET_IS_TM4C123_RA1) || \
4003
defined(TARGET_IS_TM4C123_RA3) || \
4004
defined(TARGET_IS_TM4C123_RB1) || \
4005
defined(TARGET_IS_TM4C129_RA0) || \
4006
defined(TARGET_IS_TM4C129_RA1)
4007
#define ROM_SMBusMasterByteWordWrite \
4008
((tSMBusStatus (*)(tSMBus *psSMBus, \
4009
uint8_t ui8TargetAddress, \
4010
uint8_t ui8Command, \
4011
uint8_t *pui8Data, \
4012
uint8_t ui8Size))ROM_SMBUSTABLE[18])
4013
#endif
4014
#if defined(TARGET_IS_TM4C123_RA1) || \
4015
defined(TARGET_IS_TM4C123_RA3) || \
4016
defined(TARGET_IS_TM4C123_RB1) || \
4017
defined(TARGET_IS_TM4C129_RA0) || \
4018
defined(TARGET_IS_TM4C129_RA1)
4019
#define ROM_SMBusMasterHostNotify \
4020
((tSMBusStatus (*)(tSMBus *psSMBus, \
4021
uint8_t ui8OwnSlaveAddress, \
4022
uint8_t *pui8Data))ROM_SMBUSTABLE[19])
4023
#endif
4024
#if defined(TARGET_IS_TM4C123_RA1) || \
4025
defined(TARGET_IS_TM4C123_RA3) || \
4026
defined(TARGET_IS_TM4C123_RB1) || \
4027
defined(TARGET_IS_TM4C129_RA0) || \
4028
defined(TARGET_IS_TM4C129_RA1)
4029
#define ROM_SMBusMasterI2CRead \
4030
((tSMBusStatus (*)(tSMBus *psSMBus, \
4031
uint8_t ui8TargetAddress, \
4032
uint8_t *pui8Data, \
4033
uint8_t ui8Size))ROM_SMBUSTABLE[20])
4034
#endif
4035
#if defined(TARGET_IS_TM4C123_RA1) || \
4036
defined(TARGET_IS_TM4C123_RA3) || \
4037
defined(TARGET_IS_TM4C123_RB1) || \
4038
defined(TARGET_IS_TM4C129_RA0) || \
4039
defined(TARGET_IS_TM4C129_RA1)
4040
#define ROM_SMBusMasterI2CWrite \
4041
((tSMBusStatus (*)(tSMBus *psSMBus, \
4042
uint8_t ui8TargetAddress, \
4043
uint8_t *pui8Data, \
4044
uint8_t ui8Size))ROM_SMBUSTABLE[21])
4045
#endif
4046
#if defined(TARGET_IS_TM4C123_RA1) || \
4047
defined(TARGET_IS_TM4C123_RA3) || \
4048
defined(TARGET_IS_TM4C123_RB1) || \
4049
defined(TARGET_IS_TM4C129_RA0) || \
4050
defined(TARGET_IS_TM4C129_RA1)
4051
#define ROM_SMBusMasterI2CWriteRead \
4052
((tSMBusStatus (*)(tSMBus *psSMBus, \
4053
uint8_t ui8TargetAddress, \
4054
uint8_t *pui8TxData, \
4055
uint8_t ui8TxSize, \
4056
uint8_t *pui8RxData, \
4057
uint8_t ui8RxSize))ROM_SMBUSTABLE[22])
4058
#endif
4059
#if defined(TARGET_IS_TM4C123_RA1) || \
4060
defined(TARGET_IS_TM4C123_RA3) || \
4061
defined(TARGET_IS_TM4C123_RB1) || \
4062
defined(TARGET_IS_TM4C129_RA0) || \
4063
defined(TARGET_IS_TM4C129_RA1)
4064
#define ROM_SMBusMasterInit \
4065
((void (*)(tSMBus *psSMBus, \
4066
uint32_t ui32I2CBase, \
4067
uint32_t ui32SMBusClock))ROM_SMBUSTABLE[23])
4068
#endif
4069
#if defined(TARGET_IS_TM4C123_RA1) || \
4070
defined(TARGET_IS_TM4C123_RA3) || \
4071
defined(TARGET_IS_TM4C123_RB1) || \
4072
defined(TARGET_IS_TM4C129_RA0) || \
4073
defined(TARGET_IS_TM4C129_RA1)
4074
#define ROM_SMBusMasterIntEnable \
4075
((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[24])
4076
#endif
4077
#if defined(TARGET_IS_TM4C123_RA1) || \
4078
defined(TARGET_IS_TM4C123_RA3) || \
4079
defined(TARGET_IS_TM4C123_RB1) || \
4080
defined(TARGET_IS_TM4C129_RA0) || \
4081
defined(TARGET_IS_TM4C129_RA1)
4082
#define ROM_SMBusMasterProcessCall \
4083
((tSMBusStatus (*)(tSMBus *psSMBus, \
4084
uint8_t ui8TargetAddress, \
4085
uint8_t ui8Command, \
4086
uint8_t *pui8TxData, \
4087
uint8_t *pui8RxData))ROM_SMBUSTABLE[25])
4088
#endif
4089
#if defined(TARGET_IS_TM4C123_RA1) || \
4090
defined(TARGET_IS_TM4C123_RA3) || \
4091
defined(TARGET_IS_TM4C123_RB1) || \
4092
defined(TARGET_IS_TM4C129_RA0) || \
4093
defined(TARGET_IS_TM4C129_RA1)
4094
#define ROM_SMBusMasterQuickCommand \
4095
((tSMBusStatus (*)(tSMBus *psSMBus, \
4096
uint8_t ui8TargetAddress, \
4097
bool bData))ROM_SMBUSTABLE[26])
4098
#endif
4099
#if defined(TARGET_IS_TM4C123_RA1) || \
4100
defined(TARGET_IS_TM4C123_RA3) || \
4101
defined(TARGET_IS_TM4C123_RB1) || \
4102
defined(TARGET_IS_TM4C129_RA0) || \
4103
defined(TARGET_IS_TM4C129_RA1)
4104
#define ROM_SMBusPECDisable \
4105
((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[27])
4106
#endif
4107
#if defined(TARGET_IS_TM4C123_RA1) || \
4108
defined(TARGET_IS_TM4C123_RA3) || \
4109
defined(TARGET_IS_TM4C123_RB1) || \
4110
defined(TARGET_IS_TM4C129_RA0) || \
4111
defined(TARGET_IS_TM4C129_RA1)
4112
#define ROM_SMBusPECEnable \
4113
((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[28])
4114
#endif
4115
#if defined(TARGET_IS_TM4C123_RA1) || \
4116
defined(TARGET_IS_TM4C123_RA3) || \
4117
defined(TARGET_IS_TM4C123_RB1) || \
4118
defined(TARGET_IS_TM4C129_RA0) || \
4119
defined(TARGET_IS_TM4C129_RA1)
4120
#define ROM_SMBusRxPacketSizeGet \
4121
((uint8_t (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[29])
4122
#endif
4123
#if defined(TARGET_IS_TM4C123_RA1) || \
4124
defined(TARGET_IS_TM4C123_RA3) || \
4125
defined(TARGET_IS_TM4C123_RB1) || \
4126
defined(TARGET_IS_TM4C129_RA0) || \
4127
defined(TARGET_IS_TM4C129_RA1)
4128
#define ROM_SMBusSlaveACKSend \
4129
((void (*)(tSMBus *psSMBus, \
4130
bool bACK))ROM_SMBUSTABLE[30])
4131
#endif
4132
#if defined(TARGET_IS_TM4C123_RA1) || \
4133
defined(TARGET_IS_TM4C123_RA3) || \
4134
defined(TARGET_IS_TM4C123_RB1) || \
4135
defined(TARGET_IS_TM4C129_RA0) || \
4136
defined(TARGET_IS_TM4C129_RA1)
4137
#define ROM_SMBusSlaveAddressSet \
4138
((void (*)(tSMBus *psSMBus, \
4139
uint8_t ui8AddressNum, \
4140
uint8_t ui8SlaveAddress))ROM_SMBUSTABLE[31])
4141
#endif
4142
#if defined(TARGET_IS_TM4C123_RA1) || \
4143
defined(TARGET_IS_TM4C123_RA3) || \
4144
defined(TARGET_IS_TM4C123_RB1) || \
4145
defined(TARGET_IS_TM4C129_RA0) || \
4146
defined(TARGET_IS_TM4C129_RA1)
4147
#define ROM_SMBusSlaveARPFlagARGet \
4148
((bool (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[32])
4149
#endif
4150
#if defined(TARGET_IS_TM4C123_RA1) || \
4151
defined(TARGET_IS_TM4C123_RA3) || \
4152
defined(TARGET_IS_TM4C123_RB1) || \
4153
defined(TARGET_IS_TM4C129_RA0) || \
4154
defined(TARGET_IS_TM4C129_RA1)
4155
#define ROM_SMBusSlaveARPFlagARSet \
4156
((void (*)(tSMBus *psSMBus, \
4157
bool bValue))ROM_SMBUSTABLE[33])
4158
#endif
4159
#if defined(TARGET_IS_TM4C123_RA1) || \
4160
defined(TARGET_IS_TM4C123_RA3) || \
4161
defined(TARGET_IS_TM4C123_RB1) || \
4162
defined(TARGET_IS_TM4C129_RA0) || \
4163
defined(TARGET_IS_TM4C129_RA1)
4164
#define ROM_SMBusSlaveARPFlagAVGet \
4165
((bool (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[34])
4166
#endif
4167
#if defined(TARGET_IS_TM4C123_RA1) || \
4168
defined(TARGET_IS_TM4C123_RA3) || \
4169
defined(TARGET_IS_TM4C123_RB1) || \
4170
defined(TARGET_IS_TM4C129_RA0) || \
4171
defined(TARGET_IS_TM4C129_RA1)
4172
#define ROM_SMBusSlaveARPFlagAVSet \
4173
((void (*)(tSMBus *psSMBus, \
4174
bool bValue))ROM_SMBUSTABLE[35])
4175
#endif
4176
#if defined(TARGET_IS_TM4C123_RA1) || \
4177
defined(TARGET_IS_TM4C123_RA3) || \
4178
defined(TARGET_IS_TM4C123_RB1) || \
4179
defined(TARGET_IS_TM4C129_RA0) || \
4180
defined(TARGET_IS_TM4C129_RA1)
4181
#define ROM_SMBusSlaveBlockTransferDisable \
4182
((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[36])
4183
#endif
4184
#if defined(TARGET_IS_TM4C123_RA1) || \
4185
defined(TARGET_IS_TM4C123_RA3) || \
4186
defined(TARGET_IS_TM4C123_RB1) || \
4187
defined(TARGET_IS_TM4C129_RA0) || \
4188
defined(TARGET_IS_TM4C129_RA1)
4189
#define ROM_SMBusSlaveBlockTransferEnable \
4190
((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[37])
4191
#endif
4192
#if defined(TARGET_IS_TM4C123_RA1) || \
4193
defined(TARGET_IS_TM4C123_RA3) || \
4194
defined(TARGET_IS_TM4C123_RB1) || \
4195
defined(TARGET_IS_TM4C129_RA0) || \
4196
defined(TARGET_IS_TM4C129_RA1)
4197
#define ROM_SMBusSlaveCommandGet \
4198
((uint8_t (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[38])
4199
#endif
4200
#if defined(TARGET_IS_TM4C123_RA1) || \
4201
defined(TARGET_IS_TM4C123_RA3) || \
4202
defined(TARGET_IS_TM4C123_RB1) || \
4203
defined(TARGET_IS_TM4C129_RA0) || \
4204
defined(TARGET_IS_TM4C129_RA1)
4205
#define ROM_SMBusSlaveI2CDisable \
4206
((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[39])
4207
#endif
4208
#if defined(TARGET_IS_TM4C123_RA1) || \
4209
defined(TARGET_IS_TM4C123_RA3) || \
4210
defined(TARGET_IS_TM4C123_RB1) || \
4211
defined(TARGET_IS_TM4C129_RA0) || \
4212
defined(TARGET_IS_TM4C129_RA1)
4213
#define ROM_SMBusSlaveI2CEnable \
4214
((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[40])
4215
#endif
4216
#if defined(TARGET_IS_TM4C123_RA1) || \
4217
defined(TARGET_IS_TM4C123_RA3) || \
4218
defined(TARGET_IS_TM4C123_RB1) || \
4219
defined(TARGET_IS_TM4C129_RA0) || \
4220
defined(TARGET_IS_TM4C129_RA1)
4221
#define ROM_SMBusSlaveInit \
4222
((void (*)(tSMBus *psSMBus, \
4223
uint32_t ui32I2CBase))ROM_SMBUSTABLE[41])
4224
#endif
4225
#if defined(TARGET_IS_TM4C123_RA1) || \
4226
defined(TARGET_IS_TM4C123_RA3) || \
4227
defined(TARGET_IS_TM4C123_RB1) || \
4228
defined(TARGET_IS_TM4C129_RA0) || \
4229
defined(TARGET_IS_TM4C129_RA1)
4230
#define ROM_SMBusSlaveIntAddressGet \
4231
((tSMBusStatus (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[42])
4232
#endif
4233
#if defined(TARGET_IS_TM4C123_RA1) || \
4234
defined(TARGET_IS_TM4C123_RA3) || \
4235
defined(TARGET_IS_TM4C123_RB1) || \
4236
defined(TARGET_IS_TM4C129_RA0) || \
4237
defined(TARGET_IS_TM4C129_RA1)
4238
#define ROM_SMBusSlaveIntEnable \
4239
((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[43])
4240
#endif
4241
#if defined(TARGET_IS_TM4C123_RA1) || \
4242
defined(TARGET_IS_TM4C123_RA3) || \
4243
defined(TARGET_IS_TM4C123_RB1) || \
4244
defined(TARGET_IS_TM4C129_RA0) || \
4245
defined(TARGET_IS_TM4C129_RA1)
4246
#define ROM_SMBusSlaveIntProcess \
4247
((tSMBusStatus (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[44])
4248
#endif
4249
#if defined(TARGET_IS_TM4C123_RA1) || \
4250
defined(TARGET_IS_TM4C123_RA3) || \
4251
defined(TARGET_IS_TM4C123_RB1) || \
4252
defined(TARGET_IS_TM4C129_RA0) || \
4253
defined(TARGET_IS_TM4C129_RA1)
4254
#define ROM_SMBusSlaveManualACKDisable \
4255
((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[45])
4256
#endif
4257
#if defined(TARGET_IS_TM4C123_RA1) || \
4258
defined(TARGET_IS_TM4C123_RA3) || \
4259
defined(TARGET_IS_TM4C123_RB1) || \
4260
defined(TARGET_IS_TM4C129_RA0) || \
4261
defined(TARGET_IS_TM4C129_RA1)
4262
#define ROM_SMBusSlaveManualACKEnable \
4263
((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[46])
4264
#endif
4265
#if defined(TARGET_IS_TM4C123_RA1) || \
4266
defined(TARGET_IS_TM4C123_RA3) || \
4267
defined(TARGET_IS_TM4C123_RB1) || \
4268
defined(TARGET_IS_TM4C129_RA0) || \
4269
defined(TARGET_IS_TM4C129_RA1)
4270
#define ROM_SMBusSlaveManualACKStatusGet \
4271
((bool (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[47])
4272
#endif
4273
#if defined(TARGET_IS_TM4C123_RA1) || \
4274
defined(TARGET_IS_TM4C123_RA3) || \
4275
defined(TARGET_IS_TM4C123_RB1) || \
4276
defined(TARGET_IS_TM4C129_RA0) || \
4277
defined(TARGET_IS_TM4C129_RA1)
4278
#define ROM_SMBusSlaveProcessCallDisable \
4279
((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[48])
4280
#endif
4281
#if defined(TARGET_IS_TM4C123_RA1) || \
4282
defined(TARGET_IS_TM4C123_RA3) || \
4283
defined(TARGET_IS_TM4C123_RB1) || \
4284
defined(TARGET_IS_TM4C129_RA0) || \
4285
defined(TARGET_IS_TM4C129_RA1)
4286
#define ROM_SMBusSlaveProcessCallEnable \
4287
((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[49])
4288
#endif
4289
#if defined(TARGET_IS_TM4C123_RA1) || \
4290
defined(TARGET_IS_TM4C123_RA3) || \
4291
defined(TARGET_IS_TM4C123_RB1) || \
4292
defined(TARGET_IS_TM4C129_RA0) || \
4293
defined(TARGET_IS_TM4C129_RA1)
4294
#define ROM_SMBusSlaveRxBufferSet \
4295
((void (*)(tSMBus *psSMBus, \
4296
uint8_t *pui8Data, \
4297
uint8_t ui8Size))ROM_SMBUSTABLE[50])
4298
#endif
4299
#if defined(TARGET_IS_TM4C123_RA1) || \
4300
defined(TARGET_IS_TM4C123_RA3) || \
4301
defined(TARGET_IS_TM4C123_RB1) || \
4302
defined(TARGET_IS_TM4C129_RA0) || \
4303
defined(TARGET_IS_TM4C129_RA1)
4304
#define ROM_SMBusSlaveTransferInit \
4305
((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[51])
4306
#endif
4307
#if defined(TARGET_IS_TM4C123_RA1) || \
4308
defined(TARGET_IS_TM4C123_RA3) || \
4309
defined(TARGET_IS_TM4C123_RB1) || \
4310
defined(TARGET_IS_TM4C129_RA0) || \
4311
defined(TARGET_IS_TM4C129_RA1)
4312
#define ROM_SMBusSlaveTxBufferSet \
4313
((void (*)(tSMBus *psSMBus, \
4314
uint8_t *pui8Data, \
4315
uint8_t ui8Size))ROM_SMBUSTABLE[52])
4316
#endif
4317
#if defined(TARGET_IS_TM4C123_RA1) || \
4318
defined(TARGET_IS_TM4C123_RA3) || \
4319
defined(TARGET_IS_TM4C123_RB1) || \
4320
defined(TARGET_IS_TM4C129_RA0) || \
4321
defined(TARGET_IS_TM4C129_RA1)
4322
#define ROM_SMBusSlaveUDIDSet \
4323
((void (*)(tSMBus *psSMBus, \
4324
tSMBusUDID *pUDID))ROM_SMBUSTABLE[53])
4325
#endif
4326
#if defined(TARGET_IS_TM4C123_RA1) || \
4327
defined(TARGET_IS_TM4C123_RA3) || \
4328
defined(TARGET_IS_TM4C123_RB1) || \
4329
defined(TARGET_IS_TM4C129_RA0) || \
4330
defined(TARGET_IS_TM4C129_RA1)
4331
#define ROM_SMBusStatusGet \
4332
((tSMBusStatus (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[54])
4333
#endif
4334
#if defined(TARGET_IS_TM4C123_RA3) || \
4335
defined(TARGET_IS_TM4C123_RB1) || \
4336
defined(TARGET_IS_TM4C129_RA0) || \
4337
defined(TARGET_IS_TM4C129_RA1)
4338
#define ROM_SMBusSlaveDataSend \
4339
((tSMBusStatus (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[55])
4340
#endif
4341
#if defined(TARGET_IS_TM4C129_RA0) || \
4342
defined(TARGET_IS_TM4C129_RA1)
4343
#define ROM_SMBusFIFOEnable \
4344
((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[56])
4345
#endif
4346
#if defined(TARGET_IS_TM4C129_RA0) || \
4347
defined(TARGET_IS_TM4C129_RA1)
4348
#define ROM_SMBusFIFODisable \
4349
((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[57])
4350
#endif
4351
#if defined(TARGET_IS_TM4C129_RA0) || \
4352
defined(TARGET_IS_TM4C129_RA1)
4353
#define ROM_SMBusDMAEnable \
4354
((void (*)(tSMBus *psSMBus, \
4355
uint8_t ui8TxChannel, \
4356
uint8_t ui8RxChannel))ROM_SMBUSTABLE[58])
4357
#endif
4358
#if defined(TARGET_IS_TM4C129_RA0) || \
4359
defined(TARGET_IS_TM4C129_RA1)
4360
#define ROM_SMBusDMADisable \
4361
((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[59])
4362
#endif
4363
4364
//*****************************************************************************
4365
//
4366
// Macros for calling ROM functions in the SPIFlash API.
4367
//
4368
//*****************************************************************************
4369
#if defined(TARGET_IS_TM4C129_RA0) || \
4370
defined(TARGET_IS_TM4C129_RA1)
4371
#define ROM_SPIFlashIntHandler \
4372
((uint32_t (*)(tSPIFlashState *pState))ROM_SPIFLASHTABLE[0])
4373
#endif
4374
#if defined(TARGET_IS_TM4C129_RA0) || \
4375
defined(TARGET_IS_TM4C129_RA1)
4376
#define ROM_SPIFlashInit \
4377
((void (*)(uint32_t ui32Base, \
4378
uint32_t ui32Clock, \
4379
uint32_t ui32BitRate))ROM_SPIFLASHTABLE[1])
4380
#endif
4381
#if defined(TARGET_IS_TM4C129_RA0) || \
4382
defined(TARGET_IS_TM4C129_RA1)
4383
#define ROM_SPIFlashWriteStatus \
4384
((void (*)(uint32_t ui32Base, \
4385
uint8_t ui8Status))ROM_SPIFLASHTABLE[2])
4386
#endif
4387
#if defined(TARGET_IS_TM4C129_RA0) || \
4388
defined(TARGET_IS_TM4C129_RA1)
4389
#define ROM_SPIFlashPageProgram \
4390
((void (*)(uint32_t ui32Base, \
4391
uint32_t ui32Addr, \
4392
const uint8_t *pui8Data, \
4393
uint32_t ui32Count))ROM_SPIFLASHTABLE[3])
4394
#endif
4395
#if defined(TARGET_IS_TM4C129_RA0) || \
4396
defined(TARGET_IS_TM4C129_RA1)
4397
#define ROM_SPIFlashPageProgramNonBlocking \
4398
((void (*)(tSPIFlashState *pState, \
4399
uint32_t ui32Base, \
4400
uint32_t ui32Addr, \
4401
const uint8_t *pui8Data, \
4402
uint32_t ui32Count, \
4403
bool bUseDMA, \
4404
uint32_t ui32TxChannel))ROM_SPIFLASHTABLE[4])
4405
#endif
4406
#if defined(TARGET_IS_TM4C129_RA0) || \
4407
defined(TARGET_IS_TM4C129_RA1)
4408
#define ROM_SPIFlashRead \
4409
((void (*)(uint32_t ui32Base, \
4410
uint32_t ui32Addr, \
4411
uint8_t *pui8Data, \
4412
uint32_t ui32Count))ROM_SPIFLASHTABLE[5])
4413
#endif
4414
#if defined(TARGET_IS_TM4C129_RA0) || \
4415
defined(TARGET_IS_TM4C129_RA1)
4416
#define ROM_SPIFlashReadNonBlocking \
4417
((void (*)(tSPIFlashState *pState, \
4418
uint32_t ui32Base, \
4419
uint32_t ui32Addr, \
4420
uint8_t *pui8Data, \
4421
uint32_t ui32Count, \
4422
bool bUseDMA, \
4423
uint32_t ui32TxChannel, \
4424
uint32_t ui32RxChannel))ROM_SPIFLASHTABLE[6])
4425
#endif
4426
#if defined(TARGET_IS_TM4C129_RA0) || \
4427
defined(TARGET_IS_TM4C129_RA1)
4428
#define ROM_SPIFlashWriteDisable \
4429
((void (*)(uint32_t ui32Base))ROM_SPIFLASHTABLE[7])
4430
#endif
4431
#if defined(TARGET_IS_TM4C129_RA0) || \
4432
defined(TARGET_IS_TM4C129_RA1)
4433
#define ROM_SPIFlashReadStatus \
4434
((uint8_t (*)(uint32_t ui32Base))ROM_SPIFLASHTABLE[8])
4435
#endif
4436
#if defined(TARGET_IS_TM4C129_RA0) || \
4437
defined(TARGET_IS_TM4C129_RA1)
4438
#define ROM_SPIFlashWriteEnable \
4439
((void (*)(uint32_t ui32Base))ROM_SPIFLASHTABLE[9])
4440
#endif
4441
#if defined(TARGET_IS_TM4C129_RA0) || \
4442
defined(TARGET_IS_TM4C129_RA1)
4443
#define ROM_SPIFlashFastRead \
4444
((void (*)(uint32_t ui32Base, \
4445
uint32_t ui32Addr, \
4446
uint8_t *pui8Data, \
4447
uint32_t ui32Count))ROM_SPIFLASHTABLE[10])
4448
#endif
4449
#if defined(TARGET_IS_TM4C129_RA0) || \
4450
defined(TARGET_IS_TM4C129_RA1)
4451
#define ROM_SPIFlashFastReadNonBlocking \
4452
((void (*)(tSPIFlashState *pState, \
4453
uint32_t ui32Base, \
4454
uint32_t ui32Addr, \
4455
uint8_t *pui8Data, \
4456
uint32_t ui32Count, \
4457
bool bUseDMA, \
4458
uint32_t ui32TxChannel, \
4459
uint32_t ui32RxChannel))ROM_SPIFLASHTABLE[11])
4460
#endif
4461
#if defined(TARGET_IS_TM4C129_RA0) || \
4462
defined(TARGET_IS_TM4C129_RA1)
4463
#define ROM_SPIFlashSectorErase \
4464
((void (*)(uint32_t ui32Base, \
4465
uint32_t ui32Addr))ROM_SPIFLASHTABLE[12])
4466
#endif
4467
#if defined(TARGET_IS_TM4C129_RA0) || \
4468
defined(TARGET_IS_TM4C129_RA1)
4469
#define ROM_SPIFlashDualRead \
4470
((void (*)(uint32_t ui32Base, \
4471
uint32_t ui32Addr, \
4472
uint8_t *pui8Data, \
4473
uint32_t ui32Count))ROM_SPIFLASHTABLE[13])
4474
#endif
4475
#if defined(TARGET_IS_TM4C129_RA0) || \
4476
defined(TARGET_IS_TM4C129_RA1)
4477
#define ROM_SPIFlashDualReadNonBlocking \
4478
((void (*)(tSPIFlashState *pState, \
4479
uint32_t ui32Base, \
4480
uint32_t ui32Addr, \
4481
uint8_t *pui8Data, \
4482
uint32_t ui32Count, \
4483
bool bUseDMA, \
4484
uint32_t ui32TxChannel, \
4485
uint32_t ui32RxChannel))ROM_SPIFLASHTABLE[14])
4486
#endif
4487
#if defined(TARGET_IS_TM4C129_RA0) || \
4488
defined(TARGET_IS_TM4C129_RA1)
4489
#define ROM_SPIFlashBlockErase32 \
4490
((void (*)(uint32_t ui32Base, \
4491
uint32_t ui32Addr))ROM_SPIFLASHTABLE[15])
4492
#endif
4493
#if defined(TARGET_IS_TM4C129_RA0) || \
4494
defined(TARGET_IS_TM4C129_RA1)
4495
#define ROM_SPIFlashQuadRead \
4496
((void (*)(uint32_t ui32Base, \
4497
uint32_t ui32Addr, \
4498
uint8_t *pui8Data, \
4499
uint32_t ui32Count))ROM_SPIFLASHTABLE[16])
4500
#endif
4501
#if defined(TARGET_IS_TM4C129_RA0) || \
4502
defined(TARGET_IS_TM4C129_RA1)
4503
#define ROM_SPIFlashQuadReadNonBlocking \
4504
((void (*)(tSPIFlashState *pState, \
4505
uint32_t ui32Base, \
4506
uint32_t ui32Addr, \
4507
uint8_t *pui8Data, \
4508
uint32_t ui32Count, \
4509
bool bUseDMA, \
4510
uint32_t ui32TxChannel, \
4511
uint32_t ui32RxChannel))ROM_SPIFLASHTABLE[17])
4512
#endif
4513
#if defined(TARGET_IS_TM4C129_RA0) || \
4514
defined(TARGET_IS_TM4C129_RA1)
4515
#define ROM_SPIFlashReadID \
4516
((void (*)(uint32_t ui32Base, \
4517
uint8_t *pui8ManufacturerID, \
4518
uint16_t *pui16DeviceID))ROM_SPIFLASHTABLE[18])
4519
#endif
4520
#if defined(TARGET_IS_TM4C129_RA0) || \
4521
defined(TARGET_IS_TM4C129_RA1)
4522
#define ROM_SPIFlashChipErase \
4523
((void (*)(uint32_t ui32Base))ROM_SPIFLASHTABLE[19])
4524
#endif
4525
#if defined(TARGET_IS_TM4C129_RA0) || \
4526
defined(TARGET_IS_TM4C129_RA1)
4527
#define ROM_SPIFlashBlockErase64 \
4528
((void (*)(uint32_t ui32Base, \
4529
uint32_t ui32Addr))ROM_SPIFLASHTABLE[20])
4530
#endif
4531
4532
//*****************************************************************************
4533
//
4534
// Macros for calling ROM functions in the SSI API.
4535
//
4536
//*****************************************************************************
4537
#if defined(TARGET_IS_TM4C123_RA1) || \
4538
defined(TARGET_IS_TM4C123_RA3) || \
4539
defined(TARGET_IS_TM4C123_RB1) || \
4540
defined(TARGET_IS_TM4C129_RA0) || \
4541
defined(TARGET_IS_TM4C129_RA1)
4542
#define ROM_SSIDataPut \
4543
((void (*)(uint32_t ui32Base, \
4544
uint32_t ui32Data))ROM_SSITABLE[0])
4545
#endif
4546
#if defined(TARGET_IS_TM4C123_RA1) || \
4547
defined(TARGET_IS_TM4C123_RA3) || \
4548
defined(TARGET_IS_TM4C123_RB1) || \
4549
defined(TARGET_IS_TM4C129_RA0) || \
4550
defined(TARGET_IS_TM4C129_RA1)
4551
#define ROM_SSIConfigSetExpClk \
4552
((void (*)(uint32_t ui32Base, \
4553
uint32_t ui32SSIClk, \
4554
uint32_t ui32Protocol, \
4555
uint32_t ui32Mode, \
4556
uint32_t ui32BitRate, \
4557
uint32_t ui32DataWidth))ROM_SSITABLE[1])
4558
#endif
4559
#if defined(TARGET_IS_TM4C123_RA1) || \
4560
defined(TARGET_IS_TM4C123_RA3) || \
4561
defined(TARGET_IS_TM4C123_RB1) || \
4562
defined(TARGET_IS_TM4C129_RA0) || \
4563
defined(TARGET_IS_TM4C129_RA1)
4564
#define ROM_SSIEnable \
4565
((void (*)(uint32_t ui32Base))ROM_SSITABLE[2])
4566
#endif
4567
#if defined(TARGET_IS_TM4C123_RA1) || \
4568
defined(TARGET_IS_TM4C123_RA3) || \
4569
defined(TARGET_IS_TM4C123_RB1) || \
4570
defined(TARGET_IS_TM4C129_RA0) || \
4571
defined(TARGET_IS_TM4C129_RA1)
4572
#define ROM_SSIDisable \
4573
((void (*)(uint32_t ui32Base))ROM_SSITABLE[3])
4574
#endif
4575
#if defined(TARGET_IS_TM4C123_RA1) || \
4576
defined(TARGET_IS_TM4C123_RA3) || \
4577
defined(TARGET_IS_TM4C123_RB1) || \
4578
defined(TARGET_IS_TM4C129_RA0) || \
4579
defined(TARGET_IS_TM4C129_RA1)
4580
#define ROM_SSIIntEnable \
4581
((void (*)(uint32_t ui32Base, \
4582
uint32_t ui32IntFlags))ROM_SSITABLE[4])
4583
#endif
4584
#if defined(TARGET_IS_TM4C123_RA1) || \
4585
defined(TARGET_IS_TM4C123_RA3) || \
4586
defined(TARGET_IS_TM4C123_RB1) || \
4587
defined(TARGET_IS_TM4C129_RA0) || \
4588
defined(TARGET_IS_TM4C129_RA1)
4589
#define ROM_SSIIntDisable \
4590
((void (*)(uint32_t ui32Base, \
4591
uint32_t ui32IntFlags))ROM_SSITABLE[5])
4592
#endif
4593
#if defined(TARGET_IS_TM4C123_RA1) || \
4594
defined(TARGET_IS_TM4C123_RA3) || \
4595
defined(TARGET_IS_TM4C123_RB1) || \
4596
defined(TARGET_IS_TM4C129_RA0) || \
4597
defined(TARGET_IS_TM4C129_RA1)
4598
#define ROM_SSIIntStatus \
4599
((uint32_t (*)(uint32_t ui32Base, \
4600
bool bMasked))ROM_SSITABLE[6])
4601
#endif
4602
#if defined(TARGET_IS_TM4C123_RA1) || \
4603
defined(TARGET_IS_TM4C123_RA3) || \
4604
defined(TARGET_IS_TM4C123_RB1) || \
4605
defined(TARGET_IS_TM4C129_RA0) || \
4606
defined(TARGET_IS_TM4C129_RA1)
4607
#define ROM_SSIIntClear \
4608
((void (*)(uint32_t ui32Base, \
4609
uint32_t ui32IntFlags))ROM_SSITABLE[7])
4610
#endif
4611
#if defined(TARGET_IS_TM4C123_RA1) || \
4612
defined(TARGET_IS_TM4C123_RA3) || \
4613
defined(TARGET_IS_TM4C123_RB1) || \
4614
defined(TARGET_IS_TM4C129_RA0) || \
4615
defined(TARGET_IS_TM4C129_RA1)
4616
#define ROM_SSIDataPutNonBlocking \
4617
((int32_t (*)(uint32_t ui32Base, \
4618
uint32_t ui32Data))ROM_SSITABLE[8])
4619
#endif
4620
#if defined(TARGET_IS_TM4C123_RA1) || \
4621
defined(TARGET_IS_TM4C123_RA3) || \
4622
defined(TARGET_IS_TM4C123_RB1) || \
4623
defined(TARGET_IS_TM4C129_RA0) || \
4624
defined(TARGET_IS_TM4C129_RA1)
4625
#define ROM_SSIDataGet \
4626
((void (*)(uint32_t ui32Base, \
4627
uint32_t *pui32Data))ROM_SSITABLE[9])
4628
#endif
4629
#if defined(TARGET_IS_TM4C123_RA1) || \
4630
defined(TARGET_IS_TM4C123_RA3) || \
4631
defined(TARGET_IS_TM4C123_RB1) || \
4632
defined(TARGET_IS_TM4C129_RA0) || \
4633
defined(TARGET_IS_TM4C129_RA1)
4634
#define ROM_SSIDataGetNonBlocking \
4635
((int32_t (*)(uint32_t ui32Base, \
4636
uint32_t *pui32Data))ROM_SSITABLE[10])
4637
#endif
4638
#if defined(TARGET_IS_TM4C123_RA1) || \
4639
defined(TARGET_IS_TM4C123_RA3) || \
4640
defined(TARGET_IS_TM4C123_RB1) || \
4641
defined(TARGET_IS_TM4C129_RA0) || \
4642
defined(TARGET_IS_TM4C129_RA1)
4643
#define ROM_UpdateSSI \
4644
((void (*)(void))ROM_SSITABLE[11])
4645
#endif
4646
#if defined(TARGET_IS_TM4C123_RA1) || \
4647
defined(TARGET_IS_TM4C123_RA3) || \
4648
defined(TARGET_IS_TM4C123_RB1) || \
4649
defined(TARGET_IS_TM4C129_RA0) || \
4650
defined(TARGET_IS_TM4C129_RA1)
4651
#define ROM_SSIDMAEnable \
4652
((void (*)(uint32_t ui32Base, \
4653
uint32_t ui32DMAFlags))ROM_SSITABLE[12])
4654
#endif
4655
#if defined(TARGET_IS_TM4C123_RA1) || \
4656
defined(TARGET_IS_TM4C123_RA3) || \
4657
defined(TARGET_IS_TM4C123_RB1) || \
4658
defined(TARGET_IS_TM4C129_RA0) || \
4659
defined(TARGET_IS_TM4C129_RA1)
4660
#define ROM_SSIDMADisable \
4661
((void (*)(uint32_t ui32Base, \
4662
uint32_t ui32DMAFlags))ROM_SSITABLE[13])
4663
#endif
4664
#if defined(TARGET_IS_TM4C123_RA1) || \
4665
defined(TARGET_IS_TM4C123_RA3) || \
4666
defined(TARGET_IS_TM4C123_RB1) || \
4667
defined(TARGET_IS_TM4C129_RA0) || \
4668
defined(TARGET_IS_TM4C129_RA1)
4669
#define ROM_SSIBusy \
4670
((bool (*)(uint32_t ui32Base))ROM_SSITABLE[14])
4671
#endif
4672
#if defined(TARGET_IS_TM4C123_RA1) || \
4673
defined(TARGET_IS_TM4C123_RA3) || \
4674
defined(TARGET_IS_TM4C123_RB1) || \
4675
defined(TARGET_IS_TM4C129_RA0) || \
4676
defined(TARGET_IS_TM4C129_RA1)
4677
#define ROM_SSIClockSourceGet \
4678
((uint32_t (*)(uint32_t ui32Base))ROM_SSITABLE[15])
4679
#endif
4680
#if defined(TARGET_IS_TM4C123_RA1) || \
4681
defined(TARGET_IS_TM4C123_RA3) || \
4682
defined(TARGET_IS_TM4C123_RB1) || \
4683
defined(TARGET_IS_TM4C129_RA0) || \
4684
defined(TARGET_IS_TM4C129_RA1)
4685
#define ROM_SSIClockSourceSet \
4686
((void (*)(uint32_t ui32Base, \
4687
uint32_t ui32Source))ROM_SSITABLE[16])
4688
#endif
4689
#if defined(TARGET_IS_TM4C129_RA0) || \
4690
defined(TARGET_IS_TM4C129_RA1)
4691
#define ROM_SSIAdvModeSet \
4692
((void (*)(uint32_t ui32Base, \
4693
uint32_t ui32Mode))ROM_SSITABLE[17])
4694
#endif
4695
#if defined(TARGET_IS_TM4C129_RA0) || \
4696
defined(TARGET_IS_TM4C129_RA1)
4697
#define ROM_SSIAdvDataPutFrameEnd \
4698
((void (*)(uint32_t ui32Base, \
4699
uint32_t ui32Data))ROM_SSITABLE[18])
4700
#endif
4701
#if defined(TARGET_IS_TM4C129_RA0) || \
4702
defined(TARGET_IS_TM4C129_RA1)
4703
#define ROM_SSIAdvDataPutFrameEndNonBlocking \
4704
((int32_t (*)(uint32_t ui32Base, \
4705
uint32_t ui32Data))ROM_SSITABLE[19])
4706
#endif
4707
#if defined(TARGET_IS_TM4C129_RA0) || \
4708
defined(TARGET_IS_TM4C129_RA1)
4709
#define ROM_SSIAdvFrameHoldEnable \
4710
((void (*)(uint32_t ui32Base))ROM_SSITABLE[20])
4711
#endif
4712
#if defined(TARGET_IS_TM4C129_RA0) || \
4713
defined(TARGET_IS_TM4C129_RA1)
4714
#define ROM_SSIAdvFrameHoldDisable \
4715
((void (*)(uint32_t ui32Base))ROM_SSITABLE[21])
4716
#endif
4717
4718
//*****************************************************************************
4719
//
4720
// Macros for calling ROM functions in the SysCtl API.
4721
//
4722
//*****************************************************************************
4723
#if defined(TARGET_IS_TM4C123_RA1) || \
4724
defined(TARGET_IS_TM4C123_RA3) || \
4725
defined(TARGET_IS_TM4C123_RB1) || \
4726
defined(TARGET_IS_TM4C129_RA0) || \
4727
defined(TARGET_IS_TM4C129_RA1)
4728
#define ROM_SysCtlSleep \
4729
((void (*)(void))ROM_SYSCTLTABLE[0])
4730
#endif
4731
#if defined(TARGET_IS_TM4C123_RA1) || \
4732
defined(TARGET_IS_TM4C123_RA3) || \
4733
defined(TARGET_IS_TM4C123_RB1) || \
4734
defined(TARGET_IS_TM4C129_RA0) || \
4735
defined(TARGET_IS_TM4C129_RA1)
4736
#define ROM_SysCtlSRAMSizeGet \
4737
((uint32_t (*)(void))ROM_SYSCTLTABLE[1])
4738
#endif
4739
#if defined(TARGET_IS_TM4C123_RA1) || \
4740
defined(TARGET_IS_TM4C123_RA3) || \
4741
defined(TARGET_IS_TM4C123_RB1) || \
4742
defined(TARGET_IS_TM4C129_RA0) || \
4743
defined(TARGET_IS_TM4C129_RA1)
4744
#define ROM_SysCtlFlashSizeGet \
4745
((uint32_t (*)(void))ROM_SYSCTLTABLE[2])
4746
#endif
4747
#if defined(TARGET_IS_TM4C123_RA1) || \
4748
defined(TARGET_IS_TM4C123_RA3) || \
4749
defined(TARGET_IS_TM4C123_RB1) || \
4750
defined(TARGET_IS_TM4C129_RA0) || \
4751
defined(TARGET_IS_TM4C129_RA1)
4752
#define ROM_SysCtlPeripheralPresent \
4753
((bool (*)(uint32_t ui32Peripheral))ROM_SYSCTLTABLE[4])
4754
#endif
4755
#if defined(TARGET_IS_TM4C123_RA1) || \
4756
defined(TARGET_IS_TM4C123_RA3) || \
4757
defined(TARGET_IS_TM4C123_RB1) || \
4758
defined(TARGET_IS_TM4C129_RA0) || \
4759
defined(TARGET_IS_TM4C129_RA1)
4760
#define ROM_SysCtlPeripheralReset \
4761
((void (*)(uint32_t ui32Peripheral))ROM_SYSCTLTABLE[5])
4762
#endif
4763
#if defined(TARGET_IS_TM4C123_RA1) || \
4764
defined(TARGET_IS_TM4C123_RA3) || \
4765
defined(TARGET_IS_TM4C123_RB1) || \
4766
defined(TARGET_IS_TM4C129_RA0) || \
4767
defined(TARGET_IS_TM4C129_RA1)
4768
#define ROM_SysCtlPeripheralEnable \
4769
((void (*)(uint32_t ui32Peripheral))ROM_SYSCTLTABLE[6])
4770
#endif
4771
#if defined(TARGET_IS_TM4C123_RA1) || \
4772
defined(TARGET_IS_TM4C123_RA3) || \
4773
defined(TARGET_IS_TM4C123_RB1) || \
4774
defined(TARGET_IS_TM4C129_RA0) || \
4775
defined(TARGET_IS_TM4C129_RA1)
4776
#define ROM_SysCtlPeripheralDisable \
4777
((void (*)(uint32_t ui32Peripheral))ROM_SYSCTLTABLE[7])
4778
#endif
4779
#if defined(TARGET_IS_TM4C123_RA1) || \
4780
defined(TARGET_IS_TM4C123_RA3) || \
4781
defined(TARGET_IS_TM4C123_RB1) || \
4782
defined(TARGET_IS_TM4C129_RA0) || \
4783
defined(TARGET_IS_TM4C129_RA1)
4784
#define ROM_SysCtlPeripheralSleepEnable \
4785
((void (*)(uint32_t ui32Peripheral))ROM_SYSCTLTABLE[8])
4786
#endif
4787
#if defined(TARGET_IS_TM4C123_RA1) || \
4788
defined(TARGET_IS_TM4C123_RA3) || \
4789
defined(TARGET_IS_TM4C123_RB1) || \
4790
defined(TARGET_IS_TM4C129_RA0) || \
4791
defined(TARGET_IS_TM4C129_RA1)
4792
#define ROM_SysCtlPeripheralSleepDisable \
4793
((void (*)(uint32_t ui32Peripheral))ROM_SYSCTLTABLE[9])
4794
#endif
4795
#if defined(TARGET_IS_TM4C123_RA1) || \
4796
defined(TARGET_IS_TM4C123_RA3) || \
4797
defined(TARGET_IS_TM4C123_RB1) || \
4798
defined(TARGET_IS_TM4C129_RA0) || \
4799
defined(TARGET_IS_TM4C129_RA1)
4800
#define ROM_SysCtlPeripheralDeepSleepEnable \
4801
((void (*)(uint32_t ui32Peripheral))ROM_SYSCTLTABLE[10])
4802
#endif
4803
#if defined(TARGET_IS_TM4C123_RA1) || \
4804
defined(TARGET_IS_TM4C123_RA3) || \
4805
defined(TARGET_IS_TM4C123_RB1) || \
4806
defined(TARGET_IS_TM4C129_RA0) || \
4807
defined(TARGET_IS_TM4C129_RA1)
4808
#define ROM_SysCtlPeripheralDeepSleepDisable \
4809
((void (*)(uint32_t ui32Peripheral))ROM_SYSCTLTABLE[11])
4810
#endif
4811
#if defined(TARGET_IS_TM4C123_RA1) || \
4812
defined(TARGET_IS_TM4C123_RA3) || \
4813
defined(TARGET_IS_TM4C123_RB1) || \
4814
defined(TARGET_IS_TM4C129_RA0) || \
4815
defined(TARGET_IS_TM4C129_RA1)
4816
#define ROM_SysCtlPeripheralClockGating \
4817
((void (*)(bool bEnable))ROM_SYSCTLTABLE[12])
4818
#endif
4819
#if defined(TARGET_IS_TM4C123_RA1) || \
4820
defined(TARGET_IS_TM4C123_RA3) || \
4821
defined(TARGET_IS_TM4C123_RB1) || \
4822
defined(TARGET_IS_TM4C129_RA0) || \
4823
defined(TARGET_IS_TM4C129_RA1)
4824
#define ROM_SysCtlIntEnable \
4825
((void (*)(uint32_t ui32Ints))ROM_SYSCTLTABLE[13])
4826
#endif
4827
#if defined(TARGET_IS_TM4C123_RA1) || \
4828
defined(TARGET_IS_TM4C123_RA3) || \
4829
defined(TARGET_IS_TM4C123_RB1) || \
4830
defined(TARGET_IS_TM4C129_RA0) || \
4831
defined(TARGET_IS_TM4C129_RA1)
4832
#define ROM_SysCtlIntDisable \
4833
((void (*)(uint32_t ui32Ints))ROM_SYSCTLTABLE[14])
4834
#endif
4835
#if defined(TARGET_IS_TM4C123_RA1) || \
4836
defined(TARGET_IS_TM4C123_RA3) || \
4837
defined(TARGET_IS_TM4C123_RB1) || \
4838
defined(TARGET_IS_TM4C129_RA0) || \
4839
defined(TARGET_IS_TM4C129_RA1)
4840
#define ROM_SysCtlIntClear \
4841
((void (*)(uint32_t ui32Ints))ROM_SYSCTLTABLE[15])
4842
#endif
4843
#if defined(TARGET_IS_TM4C123_RA1) || \
4844
defined(TARGET_IS_TM4C123_RA3) || \
4845
defined(TARGET_IS_TM4C123_RB1) || \
4846
defined(TARGET_IS_TM4C129_RA0) || \
4847
defined(TARGET_IS_TM4C129_RA1)
4848
#define ROM_SysCtlIntStatus \
4849
((uint32_t (*)(bool bMasked))ROM_SYSCTLTABLE[16])
4850
#endif
4851
#if defined(TARGET_IS_TM4C123_RA1) || \
4852
defined(TARGET_IS_TM4C123_RA3) || \
4853
defined(TARGET_IS_TM4C123_RB1) || \
4854
defined(TARGET_IS_TM4C129_RA0) || \
4855
defined(TARGET_IS_TM4C129_RA1)
4856
#define ROM_SysCtlReset \
4857
((void (*)(void))ROM_SYSCTLTABLE[19])
4858
#endif
4859
#if defined(TARGET_IS_TM4C123_RA1) || \
4860
defined(TARGET_IS_TM4C123_RA3) || \
4861
defined(TARGET_IS_TM4C123_RB1) || \
4862
defined(TARGET_IS_TM4C129_RA0) || \
4863
defined(TARGET_IS_TM4C129_RA1)
4864
#define ROM_SysCtlDeepSleep \
4865
((void (*)(void))ROM_SYSCTLTABLE[20])
4866
#endif
4867
#if defined(TARGET_IS_TM4C123_RA1) || \
4868
defined(TARGET_IS_TM4C123_RA3) || \
4869
defined(TARGET_IS_TM4C123_RB1) || \
4870
defined(TARGET_IS_TM4C129_RA0) || \
4871
defined(TARGET_IS_TM4C129_RA1)
4872
#define ROM_SysCtlResetCauseGet \
4873
((uint32_t (*)(void))ROM_SYSCTLTABLE[21])
4874
#endif
4875
#if defined(TARGET_IS_TM4C123_RA1) || \
4876
defined(TARGET_IS_TM4C123_RA3) || \
4877
defined(TARGET_IS_TM4C123_RB1) || \
4878
defined(TARGET_IS_TM4C129_RA0) || \
4879
defined(TARGET_IS_TM4C129_RA1)
4880
#define ROM_SysCtlResetCauseClear \
4881
((void (*)(uint32_t ui32Causes))ROM_SYSCTLTABLE[22])
4882
#endif
4883
#if defined(TARGET_IS_TM4C123_RA1) || \
4884
defined(TARGET_IS_TM4C123_RA3) || \
4885
defined(TARGET_IS_TM4C123_RB1)
4886
#define ROM_SysCtlClockSet \
4887
((void (*)(uint32_t ui32Config))ROM_SYSCTLTABLE[23])
4888
#endif
4889
#if defined(TARGET_IS_TM4C123_RA1) || \
4890
defined(TARGET_IS_TM4C123_RA3) || \
4891
defined(TARGET_IS_TM4C123_RB1)
4892
#define ROM_SysCtlClockGet \
4893
((uint32_t (*)(void))ROM_SYSCTLTABLE[24])
4894
#endif
4895
#if defined(TARGET_IS_TM4C123_RA1) || \
4896
defined(TARGET_IS_TM4C123_RA3) || \
4897
defined(TARGET_IS_TM4C123_RB1)
4898
#define ROM_SysCtlPWMClockSet \
4899
((void (*)(uint32_t ui32Config))ROM_SYSCTLTABLE[25])
4900
#endif
4901
#if defined(TARGET_IS_TM4C123_RA1) || \
4902
defined(TARGET_IS_TM4C123_RA3) || \
4903
defined(TARGET_IS_TM4C123_RB1)
4904
#define ROM_SysCtlPWMClockGet \
4905
((uint32_t (*)(void))ROM_SYSCTLTABLE[26])
4906
#endif
4907
#if defined(TARGET_IS_TM4C123_RA1) || \
4908
defined(TARGET_IS_TM4C123_RA3) || \
4909
defined(TARGET_IS_TM4C123_RB1)
4910
#define ROM_SysCtlUSBPLLEnable \
4911
((void (*)(void))ROM_SYSCTLTABLE[31])
4912
#endif
4913
#if defined(TARGET_IS_TM4C123_RA1) || \
4914
defined(TARGET_IS_TM4C123_RA3) || \
4915
defined(TARGET_IS_TM4C123_RB1)
4916
#define ROM_SysCtlUSBPLLDisable \
4917
((void (*)(void))ROM_SYSCTLTABLE[32])
4918
#endif
4919
#if defined(TARGET_IS_TM4C123_RA1) || \
4920
defined(TARGET_IS_TM4C123_RA3) || \
4921
defined(TARGET_IS_TM4C123_RB1) || \
4922
defined(TARGET_IS_TM4C129_RA0) || \
4923
defined(TARGET_IS_TM4C129_RA1)
4924
#define ROM_SysCtlDelay \
4925
((void (*)(uint32_t ui32Count))ROM_SYSCTLTABLE[34])
4926
#endif
4927
#if defined(TARGET_IS_TM4C123_RA1) || \
4928
defined(TARGET_IS_TM4C123_RA3) || \
4929
defined(TARGET_IS_TM4C123_RB1) || \
4930
defined(TARGET_IS_TM4C129_RA0) || \
4931
defined(TARGET_IS_TM4C129_RA1)
4932
#define ROM_SysCtlPeripheralReady \
4933
((bool (*)(uint32_t ui32Peripheral))ROM_SYSCTLTABLE[35])
4934
#endif
4935
#if defined(TARGET_IS_TM4C123_RA1) || \
4936
defined(TARGET_IS_TM4C123_RA3) || \
4937
defined(TARGET_IS_TM4C123_RB1) || \
4938
defined(TARGET_IS_TM4C129_RA0) || \
4939
defined(TARGET_IS_TM4C129_RA1)
4940
#define ROM_SysCtlPeripheralPowerOn \
4941
((void (*)(uint32_t ui32Peripheral))ROM_SYSCTLTABLE[36])
4942
#endif
4943
#if defined(TARGET_IS_TM4C123_RA1) || \
4944
defined(TARGET_IS_TM4C123_RA3) || \
4945
defined(TARGET_IS_TM4C123_RB1) || \
4946
defined(TARGET_IS_TM4C129_RA0) || \
4947
defined(TARGET_IS_TM4C129_RA1)
4948
#define ROM_SysCtlPeripheralPowerOff \
4949
((void (*)(uint32_t ui32Peripheral))ROM_SYSCTLTABLE[37])
4950
#endif
4951
#if defined(TARGET_IS_TM4C123_RA1) || \
4952
defined(TARGET_IS_TM4C123_RA3) || \
4953
defined(TARGET_IS_TM4C123_RB1) || \
4954
defined(TARGET_IS_TM4C129_RA0) || \
4955
defined(TARGET_IS_TM4C129_RA1)
4956
#define ROM_SysCtlMOSCConfigSet \
4957
((void (*)(uint32_t ui32Config))ROM_SYSCTLTABLE[44])
4958
#endif
4959
#if defined(TARGET_IS_TM4C123_RA1) || \
4960
defined(TARGET_IS_TM4C123_RA3) || \
4961
defined(TARGET_IS_TM4C123_RB1) || \
4962
defined(TARGET_IS_TM4C129_RA0) || \
4963
defined(TARGET_IS_TM4C129_RA1)
4964
#define ROM_SysCtlPIOSCCalibrate \
4965
((uint32_t (*)(uint32_t ui32Type))ROM_SYSCTLTABLE[45])
4966
#endif
4967
#if defined(TARGET_IS_TM4C123_RA1) || \
4968
defined(TARGET_IS_TM4C123_RA3) || \
4969
defined(TARGET_IS_TM4C123_RB1)
4970
#define ROM_SysCtlDeepSleepClockSet \
4971
((void (*)(uint32_t ui32Config))ROM_SYSCTLTABLE[46])
4972
#endif
4973
#if defined(TARGET_IS_TM4C129_RA0) || \
4974
defined(TARGET_IS_TM4C129_RA1)
4975
#define ROM_SysCtlDeepSleepClockConfigSet \
4976
((void (*)(uint32_t ui32Div, \
4977
uint32_t ui32Config))ROM_SYSCTLTABLE[47])
4978
#endif
4979
#if defined(TARGET_IS_TM4C129_RA1)
4980
#define ROM_SysCtlClockFreqSet \
4981
((uint32_t (*)(uint32_t ui32Config, \
4982
uint32_t ui32SysClock))ROM_SYSCTLTABLE[48])
4983
#endif
4984
#if defined(TARGET_IS_TM4C129_RA0) || \
4985
defined(TARGET_IS_TM4C129_RA1)
4986
#define ROM_SysCtlResetBehaviorSet \
4987
((void (*)(uint32_t ui32Behavior))ROM_SYSCTLTABLE[51])
4988
#endif
4989
#if defined(TARGET_IS_TM4C129_RA0) || \
4990
defined(TARGET_IS_TM4C129_RA1)
4991
#define ROM_SysCtlResetBehaviorGet \
4992
((uint32_t (*)(void))ROM_SYSCTLTABLE[52])
4993
#endif
4994
#if defined(TARGET_IS_TM4C129_RA0) || \
4995
defined(TARGET_IS_TM4C129_RA1)
4996
#define ROM_SysCtlFlashSectorSizeGet \
4997
((uint32_t (*)(void))ROM_SYSCTLTABLE[54])
4998
#endif
4999
#if defined(TARGET_IS_TM4C123_RB1) || \
5000
defined(TARGET_IS_TM4C129_RA0) || \
5001
defined(TARGET_IS_TM4C129_RA1)
5002
#define ROM_SysCtlVoltageEventConfig \
5003
((void (*)(uint32_t ui32Config))ROM_SYSCTLTABLE[55])
5004
#endif
5005
#if defined(TARGET_IS_TM4C129_RA0) || \
5006
defined(TARGET_IS_TM4C129_RA1)
5007
#define ROM_SysCtlVoltageEventStatus \
5008
((uint32_t (*)(void))ROM_SYSCTLTABLE[56])
5009
#endif
5010
#if defined(TARGET_IS_TM4C129_RA0) || \
5011
defined(TARGET_IS_TM4C129_RA1)
5012
#define ROM_SysCtlVoltageEventClear \
5013
((void (*)(uint32_t ui32Status))ROM_SYSCTLTABLE[57])
5014
#endif
5015
#if defined(TARGET_IS_TM4C129_RA0) || \
5016
defined(TARGET_IS_TM4C129_RA1)
5017
#define ROM_SysCtlNMIStatus \
5018
((uint32_t (*)(void))ROM_SYSCTLTABLE[58])
5019
#endif
5020
#if defined(TARGET_IS_TM4C129_RA0) || \
5021
defined(TARGET_IS_TM4C129_RA1)
5022
#define ROM_SysCtlNMIClear \
5023
((void (*)(uint32_t ui32Status))ROM_SYSCTLTABLE[59])
5024
#endif
5025
#if defined(TARGET_IS_TM4C129_RA0) || \
5026
defined(TARGET_IS_TM4C129_RA1)
5027
#define ROM_SysCtlClockOutConfig \
5028
((void (*)(uint32_t ui32Config, \
5029
uint32_t ui32Div))ROM_SYSCTLTABLE[60])
5030
#endif
5031
#if defined(TARGET_IS_TM4C129_RA0) || \
5032
defined(TARGET_IS_TM4C129_RA1)
5033
#define ROM_SysCtlAltClkConfig \
5034
((void (*)(uint32_t ui32Config))ROM_SYSCTLTABLE[61])
5035
#endif
5036
5037
//*****************************************************************************
5038
//
5039
// Macros for calling ROM functions in the SysExc API.
5040
//
5041
//*****************************************************************************
5042
#if defined(TARGET_IS_TM4C123_RA1) || \
5043
defined(TARGET_IS_TM4C123_RA3) || \
5044
defined(TARGET_IS_TM4C123_RB1) || \
5045
defined(TARGET_IS_TM4C129_RA0) || \
5046
defined(TARGET_IS_TM4C129_RA1)
5047
#define ROM_SysExcIntStatus \
5048
((uint32_t (*)(bool bMasked))ROM_SYSEXCTABLE[0])
5049
#endif
5050
#if defined(TARGET_IS_TM4C123_RA1) || \
5051
defined(TARGET_IS_TM4C123_RA3) || \
5052
defined(TARGET_IS_TM4C123_RB1) || \
5053
defined(TARGET_IS_TM4C129_RA0) || \
5054
defined(TARGET_IS_TM4C129_RA1)
5055
#define ROM_SysExcIntClear \
5056
((void (*)(uint32_t ui32IntFlags))ROM_SYSEXCTABLE[1])
5057
#endif
5058
#if defined(TARGET_IS_TM4C123_RA1) || \
5059
defined(TARGET_IS_TM4C123_RA3) || \
5060
defined(TARGET_IS_TM4C123_RB1) || \
5061
defined(TARGET_IS_TM4C129_RA0) || \
5062
defined(TARGET_IS_TM4C129_RA1)
5063
#define ROM_SysExcIntDisable \
5064
((void (*)(uint32_t ui32IntFlags))ROM_SYSEXCTABLE[2])
5065
#endif
5066
#if defined(TARGET_IS_TM4C123_RA1) || \
5067
defined(TARGET_IS_TM4C123_RA3) || \
5068
defined(TARGET_IS_TM4C123_RB1) || \
5069
defined(TARGET_IS_TM4C129_RA0) || \
5070
defined(TARGET_IS_TM4C129_RA1)
5071
#define ROM_SysExcIntEnable \
5072
((void (*)(uint32_t ui32IntFlags))ROM_SYSEXCTABLE[3])
5073
#endif
5074
5075
//*****************************************************************************
5076
//
5077
// Macros for calling ROM functions in the SysTick API.
5078
//
5079
//*****************************************************************************
5080
#if defined(TARGET_IS_TM4C123_RA1) || \
5081
defined(TARGET_IS_TM4C123_RA3) || \
5082
defined(TARGET_IS_TM4C123_RB1) || \
5083
defined(TARGET_IS_TM4C129_RA0) || \
5084
defined(TARGET_IS_TM4C129_RA1)
5085
#define ROM_SysTickValueGet \
5086
((uint32_t (*)(void))ROM_SYSTICKTABLE[0])
5087
#endif
5088
#if defined(TARGET_IS_TM4C123_RA1) || \
5089
defined(TARGET_IS_TM4C123_RA3) || \
5090
defined(TARGET_IS_TM4C123_RB1) || \
5091
defined(TARGET_IS_TM4C129_RA0) || \
5092
defined(TARGET_IS_TM4C129_RA1)
5093
#define ROM_SysTickEnable \
5094
((void (*)(void))ROM_SYSTICKTABLE[1])
5095
#endif
5096
#if defined(TARGET_IS_TM4C123_RA1) || \
5097
defined(TARGET_IS_TM4C123_RA3) || \
5098
defined(TARGET_IS_TM4C123_RB1) || \
5099
defined(TARGET_IS_TM4C129_RA0) || \
5100
defined(TARGET_IS_TM4C129_RA1)
5101
#define ROM_SysTickDisable \
5102
((void (*)(void))ROM_SYSTICKTABLE[2])
5103
#endif
5104
#if defined(TARGET_IS_TM4C123_RA1) || \
5105
defined(TARGET_IS_TM4C123_RA3) || \
5106
defined(TARGET_IS_TM4C123_RB1) || \
5107
defined(TARGET_IS_TM4C129_RA0) || \
5108
defined(TARGET_IS_TM4C129_RA1)
5109
#define ROM_SysTickIntEnable \
5110
((void (*)(void))ROM_SYSTICKTABLE[3])
5111
#endif
5112
#if defined(TARGET_IS_TM4C123_RA1) || \
5113
defined(TARGET_IS_TM4C123_RA3) || \
5114
defined(TARGET_IS_TM4C123_RB1) || \
5115
defined(TARGET_IS_TM4C129_RA0) || \
5116
defined(TARGET_IS_TM4C129_RA1)
5117
#define ROM_SysTickIntDisable \
5118
((void (*)(void))ROM_SYSTICKTABLE[4])
5119
#endif
5120
#if defined(TARGET_IS_TM4C123_RA1) || \
5121
defined(TARGET_IS_TM4C123_RA3) || \
5122
defined(TARGET_IS_TM4C123_RB1) || \
5123
defined(TARGET_IS_TM4C129_RA0) || \
5124
defined(TARGET_IS_TM4C129_RA1)
5125
#define ROM_SysTickPeriodSet \
5126
((void (*)(uint32_t ui32Period))ROM_SYSTICKTABLE[5])
5127
#endif
5128
#if defined(TARGET_IS_TM4C123_RA1) || \
5129
defined(TARGET_IS_TM4C123_RA3) || \
5130
defined(TARGET_IS_TM4C123_RB1) || \
5131
defined(TARGET_IS_TM4C129_RA0) || \
5132
defined(TARGET_IS_TM4C129_RA1)
5133
#define ROM_SysTickPeriodGet \
5134
((uint32_t (*)(void))ROM_SYSTICKTABLE[6])
5135
#endif
5136
5137
//*****************************************************************************
5138
//
5139
// Macros for calling ROM functions in the Timer API.
5140
//
5141
//*****************************************************************************
5142
#if defined(TARGET_IS_TM4C123_RA1) || \
5143
defined(TARGET_IS_TM4C123_RA3) || \
5144
defined(TARGET_IS_TM4C123_RB1) || \
5145
defined(TARGET_IS_TM4C129_RA0) || \
5146
defined(TARGET_IS_TM4C129_RA1)
5147
#define ROM_TimerIntClear \
5148
((void (*)(uint32_t ui32Base, \
5149
uint32_t ui32IntFlags))ROM_TIMERTABLE[0])
5150
#endif
5151
#if defined(TARGET_IS_TM4C123_RA1) || \
5152
defined(TARGET_IS_TM4C123_RA3) || \
5153
defined(TARGET_IS_TM4C123_RB1) || \
5154
defined(TARGET_IS_TM4C129_RA0) || \
5155
defined(TARGET_IS_TM4C129_RA1)
5156
#define ROM_TimerEnable \
5157
((void (*)(uint32_t ui32Base, \
5158
uint32_t ui32Timer))ROM_TIMERTABLE[1])
5159
#endif
5160
#if defined(TARGET_IS_TM4C123_RA1) || \
5161
defined(TARGET_IS_TM4C123_RA3) || \
5162
defined(TARGET_IS_TM4C123_RB1) || \
5163
defined(TARGET_IS_TM4C129_RA0) || \
5164
defined(TARGET_IS_TM4C129_RA1)
5165
#define ROM_TimerDisable \
5166
((void (*)(uint32_t ui32Base, \
5167
uint32_t ui32Timer))ROM_TIMERTABLE[2])
5168
#endif
5169
#if defined(TARGET_IS_TM4C123_RA1) || \
5170
defined(TARGET_IS_TM4C123_RA3) || \
5171
defined(TARGET_IS_TM4C123_RB1) || \
5172
defined(TARGET_IS_TM4C129_RA0) || \
5173
defined(TARGET_IS_TM4C129_RA1)
5174
#define ROM_TimerConfigure \
5175
((void (*)(uint32_t ui32Base, \
5176
uint32_t ui32Config))ROM_TIMERTABLE[3])
5177
#endif
5178
#if defined(TARGET_IS_TM4C123_RA1) || \
5179
defined(TARGET_IS_TM4C123_RA3) || \
5180
defined(TARGET_IS_TM4C123_RB1) || \
5181
defined(TARGET_IS_TM4C129_RA0) || \
5182
defined(TARGET_IS_TM4C129_RA1)
5183
#define ROM_TimerControlLevel \
5184
((void (*)(uint32_t ui32Base, \
5185
uint32_t ui32Timer, \
5186
bool bInvert))ROM_TIMERTABLE[4])
5187
#endif
5188
#if defined(TARGET_IS_TM4C123_RA1) || \
5189
defined(TARGET_IS_TM4C123_RA3) || \
5190
defined(TARGET_IS_TM4C123_RB1) || \
5191
defined(TARGET_IS_TM4C129_RA1)
5192
#define ROM_TimerControlTrigger \
5193
((void (*)(uint32_t ui32Base, \
5194
uint32_t ui32Timer, \
5195
bool bEnable))ROM_TIMERTABLE[5])
5196
#endif
5197
#if defined(TARGET_IS_TM4C123_RA1) || \
5198
defined(TARGET_IS_TM4C123_RA3) || \
5199
defined(TARGET_IS_TM4C123_RB1) || \
5200
defined(TARGET_IS_TM4C129_RA0) || \
5201
defined(TARGET_IS_TM4C129_RA1)
5202
#define ROM_TimerControlEvent \
5203
((void (*)(uint32_t ui32Base, \
5204
uint32_t ui32Timer, \
5205
uint32_t ui32Event))ROM_TIMERTABLE[6])
5206
#endif
5207
#if defined(TARGET_IS_TM4C123_RA1) || \
5208
defined(TARGET_IS_TM4C123_RA3) || \
5209
defined(TARGET_IS_TM4C123_RB1) || \
5210
defined(TARGET_IS_TM4C129_RA0) || \
5211
defined(TARGET_IS_TM4C129_RA1)
5212
#define ROM_TimerControlStall \
5213
((void (*)(uint32_t ui32Base, \
5214
uint32_t ui32Timer, \
5215
bool bStall))ROM_TIMERTABLE[7])
5216
#endif
5217
#if defined(TARGET_IS_TM4C123_RA1) || \
5218
defined(TARGET_IS_TM4C123_RA3) || \
5219
defined(TARGET_IS_TM4C123_RB1) || \
5220
defined(TARGET_IS_TM4C129_RA0) || \
5221
defined(TARGET_IS_TM4C129_RA1)
5222
#define ROM_TimerRTCEnable \
5223
((void (*)(uint32_t ui32Base))ROM_TIMERTABLE[8])
5224
#endif
5225
#if defined(TARGET_IS_TM4C123_RA1) || \
5226
defined(TARGET_IS_TM4C123_RA3) || \
5227
defined(TARGET_IS_TM4C123_RB1) || \
5228
defined(TARGET_IS_TM4C129_RA0) || \
5229
defined(TARGET_IS_TM4C129_RA1)
5230
#define ROM_TimerRTCDisable \
5231
((void (*)(uint32_t ui32Base))ROM_TIMERTABLE[9])
5232
#endif
5233
#if defined(TARGET_IS_TM4C123_RA1) || \
5234
defined(TARGET_IS_TM4C123_RA3) || \
5235
defined(TARGET_IS_TM4C123_RB1) || \
5236
defined(TARGET_IS_TM4C129_RA0) || \
5237
defined(TARGET_IS_TM4C129_RA1)
5238
#define ROM_TimerPrescaleSet \
5239
((void (*)(uint32_t ui32Base, \
5240
uint32_t ui32Timer, \
5241
uint32_t ui32Value))ROM_TIMERTABLE[10])
5242
#endif
5243
#if defined(TARGET_IS_TM4C123_RA1) || \
5244
defined(TARGET_IS_TM4C123_RA3) || \
5245
defined(TARGET_IS_TM4C123_RB1) || \
5246
defined(TARGET_IS_TM4C129_RA0) || \
5247
defined(TARGET_IS_TM4C129_RA1)
5248
#define ROM_TimerPrescaleGet \
5249
((uint32_t (*)(uint32_t ui32Base, \
5250
uint32_t ui32Timer))ROM_TIMERTABLE[11])
5251
#endif
5252
#if defined(TARGET_IS_TM4C123_RA1) || \
5253
defined(TARGET_IS_TM4C123_RA3) || \
5254
defined(TARGET_IS_TM4C123_RB1) || \
5255
defined(TARGET_IS_TM4C129_RA0) || \
5256
defined(TARGET_IS_TM4C129_RA1)
5257
#define ROM_TimerPrescaleMatchSet \
5258
((void (*)(uint32_t ui32Base, \
5259
uint32_t ui32Timer, \
5260
uint32_t ui32Value))ROM_TIMERTABLE[12])
5261
#endif
5262
#if defined(TARGET_IS_TM4C123_RA1) || \
5263
defined(TARGET_IS_TM4C123_RA3) || \
5264
defined(TARGET_IS_TM4C123_RB1) || \
5265
defined(TARGET_IS_TM4C129_RA0) || \
5266
defined(TARGET_IS_TM4C129_RA1)
5267
#define ROM_TimerPrescaleMatchGet \
5268
((uint32_t (*)(uint32_t ui32Base, \
5269
uint32_t ui32Timer))ROM_TIMERTABLE[13])
5270
#endif
5271
#if defined(TARGET_IS_TM4C123_RA1) || \
5272
defined(TARGET_IS_TM4C123_RA3) || \
5273
defined(TARGET_IS_TM4C123_RB1) || \
5274
defined(TARGET_IS_TM4C129_RA0) || \
5275
defined(TARGET_IS_TM4C129_RA1)
5276
#define ROM_TimerLoadSet \
5277
((void (*)(uint32_t ui32Base, \
5278
uint32_t ui32Timer, \
5279
uint32_t ui32Value))ROM_TIMERTABLE[14])
5280
#endif
5281
#if defined(TARGET_IS_TM4C123_RA1) || \
5282
defined(TARGET_IS_TM4C123_RA3) || \
5283
defined(TARGET_IS_TM4C123_RB1) || \
5284
defined(TARGET_IS_TM4C129_RA0) || \
5285
defined(TARGET_IS_TM4C129_RA1)
5286
#define ROM_TimerLoadGet \
5287
((uint32_t (*)(uint32_t ui32Base, \
5288
uint32_t ui32Timer))ROM_TIMERTABLE[15])
5289
#endif
5290
#if defined(TARGET_IS_TM4C123_RA1) || \
5291
defined(TARGET_IS_TM4C123_RA3) || \
5292
defined(TARGET_IS_TM4C123_RB1) || \
5293
defined(TARGET_IS_TM4C129_RA0) || \
5294
defined(TARGET_IS_TM4C129_RA1)
5295
#define ROM_TimerValueGet \
5296
((uint32_t (*)(uint32_t ui32Base, \
5297
uint32_t ui32Timer))ROM_TIMERTABLE[16])
5298
#endif
5299
#if defined(TARGET_IS_TM4C123_RA1) || \
5300
defined(TARGET_IS_TM4C123_RA3) || \
5301
defined(TARGET_IS_TM4C123_RB1) || \
5302
defined(TARGET_IS_TM4C129_RA0) || \
5303
defined(TARGET_IS_TM4C129_RA1)
5304
#define ROM_TimerMatchSet \
5305
((void (*)(uint32_t ui32Base, \
5306
uint32_t ui32Timer, \
5307
uint32_t ui32Value))ROM_TIMERTABLE[17])
5308
#endif
5309
#if defined(TARGET_IS_TM4C123_RA1) || \
5310
defined(TARGET_IS_TM4C123_RA3) || \
5311
defined(TARGET_IS_TM4C123_RB1) || \
5312
defined(TARGET_IS_TM4C129_RA0) || \
5313
defined(TARGET_IS_TM4C129_RA1)
5314
#define ROM_TimerMatchGet \
5315
((uint32_t (*)(uint32_t ui32Base, \
5316
uint32_t ui32Timer))ROM_TIMERTABLE[18])
5317
#endif
5318
#if defined(TARGET_IS_TM4C123_RA1) || \
5319
defined(TARGET_IS_TM4C123_RA3) || \
5320
defined(TARGET_IS_TM4C123_RB1) || \
5321
defined(TARGET_IS_TM4C129_RA0) || \
5322
defined(TARGET_IS_TM4C129_RA1)
5323
#define ROM_TimerIntEnable \
5324
((void (*)(uint32_t ui32Base, \
5325
uint32_t ui32IntFlags))ROM_TIMERTABLE[19])
5326
#endif
5327
#if defined(TARGET_IS_TM4C123_RA1) || \
5328
defined(TARGET_IS_TM4C123_RA3) || \
5329
defined(TARGET_IS_TM4C123_RB1) || \
5330
defined(TARGET_IS_TM4C129_RA0) || \
5331
defined(TARGET_IS_TM4C129_RA1)
5332
#define ROM_TimerIntDisable \
5333
((void (*)(uint32_t ui32Base, \
5334
uint32_t ui32IntFlags))ROM_TIMERTABLE[20])
5335
#endif
5336
#if defined(TARGET_IS_TM4C123_RA1) || \
5337
defined(TARGET_IS_TM4C123_RA3) || \
5338
defined(TARGET_IS_TM4C123_RB1) || \
5339
defined(TARGET_IS_TM4C129_RA0) || \
5340
defined(TARGET_IS_TM4C129_RA1)
5341
#define ROM_TimerIntStatus \
5342
((uint32_t (*)(uint32_t ui32Base, \
5343
bool bMasked))ROM_TIMERTABLE[21])
5344
#endif
5345
#if defined(TARGET_IS_TM4C123_RA1) || \
5346
defined(TARGET_IS_TM4C123_RA3) || \
5347
defined(TARGET_IS_TM4C123_RB1) || \
5348
defined(TARGET_IS_TM4C129_RA0) || \
5349
defined(TARGET_IS_TM4C129_RA1)
5350
#define ROM_TimerControlWaitOnTrigger \
5351
((void (*)(uint32_t ui32Base, \
5352
uint32_t ui32Timer, \
5353
bool bWait))ROM_TIMERTABLE[22])
5354
#endif
5355
#if defined(TARGET_IS_TM4C123_RA1) || \
5356
defined(TARGET_IS_TM4C123_RA3) || \
5357
defined(TARGET_IS_TM4C123_RB1)
5358
#define ROM_TimerLoadSet64 \
5359
((void (*)(uint32_t ui32Base, \
5360
uint64_t ui64Value))ROM_TIMERTABLE[23])
5361
#endif
5362
#if defined(TARGET_IS_TM4C123_RA1) || \
5363
defined(TARGET_IS_TM4C123_RA3) || \
5364
defined(TARGET_IS_TM4C123_RB1)
5365
#define ROM_TimerLoadGet64 \
5366
((uint64_t (*)(uint32_t ui32Base))ROM_TIMERTABLE[24])
5367
#endif
5368
#if defined(TARGET_IS_TM4C123_RA1) || \
5369
defined(TARGET_IS_TM4C123_RA3) || \
5370
defined(TARGET_IS_TM4C123_RB1)
5371
#define ROM_TimerValueGet64 \
5372
((uint64_t (*)(uint32_t ui32Base))ROM_TIMERTABLE[25])
5373
#endif
5374
#if defined(TARGET_IS_TM4C123_RA1) || \
5375
defined(TARGET_IS_TM4C123_RA3) || \
5376
defined(TARGET_IS_TM4C123_RB1)
5377
#define ROM_TimerMatchSet64 \
5378
((void (*)(uint32_t ui32Base, \
5379
uint64_t ui64Value))ROM_TIMERTABLE[26])
5380
#endif
5381
#if defined(TARGET_IS_TM4C123_RA1) || \
5382
defined(TARGET_IS_TM4C123_RA3) || \
5383
defined(TARGET_IS_TM4C123_RB1)
5384
#define ROM_TimerMatchGet64 \
5385
((uint64_t (*)(uint32_t ui32Base))ROM_TIMERTABLE[27])
5386
#endif
5387
#if defined(TARGET_IS_TM4C129_RA0) || \
5388
defined(TARGET_IS_TM4C129_RA1)
5389
#define ROM_TimerClockSourceGet \
5390
((uint32_t (*)(uint32_t ui32Base))ROM_TIMERTABLE[28])
5391
#endif
5392
#if defined(TARGET_IS_TM4C129_RA0) || \
5393
defined(TARGET_IS_TM4C129_RA1)
5394
#define ROM_TimerClockSourceSet \
5395
((void (*)(uint32_t ui32Base, \
5396
uint32_t ui32Source))ROM_TIMERTABLE[29])
5397
#endif
5398
#if defined(TARGET_IS_TM4C129_RA0) || \
5399
defined(TARGET_IS_TM4C129_RA1)
5400
#define ROM_TimerADCEventGet \
5401
((uint32_t (*)(uint32_t ui32Base))ROM_TIMERTABLE[30])
5402
#endif
5403
#if defined(TARGET_IS_TM4C129_RA0) || \
5404
defined(TARGET_IS_TM4C129_RA1)
5405
#define ROM_TimerADCEventSet \
5406
((void (*)(uint32_t ui32Base, \
5407
uint32_t ui32ADCEvent))ROM_TIMERTABLE[31])
5408
#endif
5409
#if defined(TARGET_IS_TM4C129_RA0) || \
5410
defined(TARGET_IS_TM4C129_RA1)
5411
#define ROM_TimerDMAEventGet \
5412
((uint32_t (*)(uint32_t ui32Base))ROM_TIMERTABLE[32])
5413
#endif
5414
#if defined(TARGET_IS_TM4C129_RA0) || \
5415
defined(TARGET_IS_TM4C129_RA1)
5416
#define ROM_TimerDMAEventSet \
5417
((void (*)(uint32_t ui32Base, \
5418
uint32_t ui32DMAEvent))ROM_TIMERTABLE[33])
5419
#endif
5420
#if defined(TARGET_IS_TM4C129_RA0) || \
5421
defined(TARGET_IS_TM4C129_RA1)
5422
#define ROM_TimerSynchronize \
5423
((void (*)(uint32_t ui32Base, \
5424
uint32_t ui32Timers))ROM_TIMERTABLE[34])
5425
#endif
5426
5427
//*****************************************************************************
5428
//
5429
// Macros for calling ROM functions in the UART API.
5430
//
5431
//*****************************************************************************
5432
#if defined(TARGET_IS_TM4C123_RA1) || \
5433
defined(TARGET_IS_TM4C123_RA3) || \
5434
defined(TARGET_IS_TM4C123_RB1) || \
5435
defined(TARGET_IS_TM4C129_RA0) || \
5436
defined(TARGET_IS_TM4C129_RA1)
5437
#define ROM_UARTCharPut \
5438
((void (*)(uint32_t ui32Base, \
5439
unsigned char ucData))ROM_UARTTABLE[0])
5440
#endif
5441
#if defined(TARGET_IS_TM4C123_RA1) || \
5442
defined(TARGET_IS_TM4C123_RA3) || \
5443
defined(TARGET_IS_TM4C123_RB1) || \
5444
defined(TARGET_IS_TM4C129_RA0) || \
5445
defined(TARGET_IS_TM4C129_RA1)
5446
#define ROM_UARTParityModeSet \
5447
((void (*)(uint32_t ui32Base, \
5448
uint32_t ui32Parity))ROM_UARTTABLE[1])
5449
#endif
5450
#if defined(TARGET_IS_TM4C123_RA1) || \
5451
defined(TARGET_IS_TM4C123_RA3) || \
5452
defined(TARGET_IS_TM4C123_RB1) || \
5453
defined(TARGET_IS_TM4C129_RA0) || \
5454
defined(TARGET_IS_TM4C129_RA1)
5455
#define ROM_UARTParityModeGet \
5456
((uint32_t (*)(uint32_t ui32Base))ROM_UARTTABLE[2])
5457
#endif
5458
#if defined(TARGET_IS_TM4C123_RA1) || \
5459
defined(TARGET_IS_TM4C123_RA3) || \
5460
defined(TARGET_IS_TM4C123_RB1) || \
5461
defined(TARGET_IS_TM4C129_RA0) || \
5462
defined(TARGET_IS_TM4C129_RA1)
5463
#define ROM_UARTFIFOLevelSet \
5464
((void (*)(uint32_t ui32Base, \
5465
uint32_t ui32TxLevel, \
5466
uint32_t ui32RxLevel))ROM_UARTTABLE[3])
5467
#endif
5468
#if defined(TARGET_IS_TM4C123_RA1) || \
5469
defined(TARGET_IS_TM4C123_RA3) || \
5470
defined(TARGET_IS_TM4C123_RB1) || \
5471
defined(TARGET_IS_TM4C129_RA0) || \
5472
defined(TARGET_IS_TM4C129_RA1)
5473
#define ROM_UARTFIFOLevelGet \
5474
((void (*)(uint32_t ui32Base, \
5475
uint32_t *pui32TxLevel, \
5476
uint32_t *pui32RxLevel))ROM_UARTTABLE[4])
5477
#endif
5478
#if defined(TARGET_IS_TM4C123_RA1) || \
5479
defined(TARGET_IS_TM4C123_RA3) || \
5480
defined(TARGET_IS_TM4C123_RB1) || \
5481
defined(TARGET_IS_TM4C129_RA0) || \
5482
defined(TARGET_IS_TM4C129_RA1)
5483
#define ROM_UARTConfigSetExpClk \
5484
((void (*)(uint32_t ui32Base, \
5485
uint32_t ui32UARTClk, \
5486
uint32_t ui32Baud, \
5487
uint32_t ui32Config))ROM_UARTTABLE[5])
5488
#endif
5489
#if defined(TARGET_IS_TM4C123_RA1) || \
5490
defined(TARGET_IS_TM4C123_RA3) || \
5491
defined(TARGET_IS_TM4C123_RB1) || \
5492
defined(TARGET_IS_TM4C129_RA0) || \
5493
defined(TARGET_IS_TM4C129_RA1)
5494
#define ROM_UARTConfigGetExpClk \
5495
((void (*)(uint32_t ui32Base, \
5496
uint32_t ui32UARTClk, \
5497
uint32_t *pui32Baud, \
5498
uint32_t *pui32Config))ROM_UARTTABLE[6])
5499
#endif
5500
#if defined(TARGET_IS_TM4C123_RA1) || \
5501
defined(TARGET_IS_TM4C123_RA3) || \
5502
defined(TARGET_IS_TM4C123_RB1) || \
5503
defined(TARGET_IS_TM4C129_RA0) || \
5504
defined(TARGET_IS_TM4C129_RA1)
5505
#define ROM_UARTEnable \
5506
((void (*)(uint32_t ui32Base))ROM_UARTTABLE[7])
5507
#endif
5508
#if defined(TARGET_IS_TM4C123_RA1) || \
5509
defined(TARGET_IS_TM4C123_RA3) || \
5510
defined(TARGET_IS_TM4C123_RB1) || \
5511
defined(TARGET_IS_TM4C129_RA0) || \
5512
defined(TARGET_IS_TM4C129_RA1)
5513
#define ROM_UARTDisable \
5514
((void (*)(uint32_t ui32Base))ROM_UARTTABLE[8])
5515
#endif
5516
#if defined(TARGET_IS_TM4C123_RA1) || \
5517
defined(TARGET_IS_TM4C123_RA3) || \
5518
defined(TARGET_IS_TM4C123_RB1) || \
5519
defined(TARGET_IS_TM4C129_RA0) || \
5520
defined(TARGET_IS_TM4C129_RA1)
5521
#define ROM_UARTEnableSIR \
5522
((void (*)(uint32_t ui32Base, \
5523
bool bLowPower))ROM_UARTTABLE[9])
5524
#endif
5525
#if defined(TARGET_IS_TM4C123_RA1) || \
5526
defined(TARGET_IS_TM4C123_RA3) || \
5527
defined(TARGET_IS_TM4C123_RB1) || \
5528
defined(TARGET_IS_TM4C129_RA0) || \
5529
defined(TARGET_IS_TM4C129_RA1)
5530
#define ROM_UARTDisableSIR \
5531
((void (*)(uint32_t ui32Base))ROM_UARTTABLE[10])
5532
#endif
5533
#if defined(TARGET_IS_TM4C123_RA1) || \
5534
defined(TARGET_IS_TM4C123_RA3) || \
5535
defined(TARGET_IS_TM4C123_RB1) || \
5536
defined(TARGET_IS_TM4C129_RA0) || \
5537
defined(TARGET_IS_TM4C129_RA1)
5538
#define ROM_UARTCharsAvail \
5539
((bool (*)(uint32_t ui32Base))ROM_UARTTABLE[11])
5540
#endif
5541
#if defined(TARGET_IS_TM4C123_RA1) || \
5542
defined(TARGET_IS_TM4C123_RA3) || \
5543
defined(TARGET_IS_TM4C123_RB1) || \
5544
defined(TARGET_IS_TM4C129_RA0) || \
5545
defined(TARGET_IS_TM4C129_RA1)
5546
#define ROM_UARTSpaceAvail \
5547
((bool (*)(uint32_t ui32Base))ROM_UARTTABLE[12])
5548
#endif
5549
#if defined(TARGET_IS_TM4C123_RA1) || \
5550
defined(TARGET_IS_TM4C123_RA3) || \
5551
defined(TARGET_IS_TM4C123_RB1) || \
5552
defined(TARGET_IS_TM4C129_RA0) || \
5553
defined(TARGET_IS_TM4C129_RA1)
5554
#define ROM_UARTCharGetNonBlocking \
5555
((int32_t (*)(uint32_t ui32Base))ROM_UARTTABLE[13])
5556
#endif
5557
#if defined(TARGET_IS_TM4C123_RA1) || \
5558
defined(TARGET_IS_TM4C123_RA3) || \
5559
defined(TARGET_IS_TM4C123_RB1) || \
5560
defined(TARGET_IS_TM4C129_RA0) || \
5561
defined(TARGET_IS_TM4C129_RA1)
5562
#define ROM_UARTCharGet \
5563
((int32_t (*)(uint32_t ui32Base))ROM_UARTTABLE[14])
5564
#endif
5565
#if defined(TARGET_IS_TM4C123_RA1) || \
5566
defined(TARGET_IS_TM4C123_RA3) || \
5567
defined(TARGET_IS_TM4C123_RB1) || \
5568
defined(TARGET_IS_TM4C129_RA0) || \
5569
defined(TARGET_IS_TM4C129_RA1)
5570
#define ROM_UARTCharPutNonBlocking \
5571
((bool (*)(uint32_t ui32Base, \
5572
unsigned char ucData))ROM_UARTTABLE[15])
5573
#endif
5574
#if defined(TARGET_IS_TM4C123_RA1) || \
5575
defined(TARGET_IS_TM4C123_RA3) || \
5576
defined(TARGET_IS_TM4C123_RB1) || \
5577
defined(TARGET_IS_TM4C129_RA0) || \
5578
defined(TARGET_IS_TM4C129_RA1)
5579
#define ROM_UARTBreakCtl \
5580
((void (*)(uint32_t ui32Base, \
5581
bool bBreakState))ROM_UARTTABLE[16])
5582
#endif
5583
#if defined(TARGET_IS_TM4C123_RA1) || \
5584
defined(TARGET_IS_TM4C123_RA3) || \
5585
defined(TARGET_IS_TM4C123_RB1) || \
5586
defined(TARGET_IS_TM4C129_RA0) || \
5587
defined(TARGET_IS_TM4C129_RA1)
5588
#define ROM_UARTIntEnable \
5589
((void (*)(uint32_t ui32Base, \
5590
uint32_t ui32IntFlags))ROM_UARTTABLE[17])
5591
#endif
5592
#if defined(TARGET_IS_TM4C123_RA1) || \
5593
defined(TARGET_IS_TM4C123_RA3) || \
5594
defined(TARGET_IS_TM4C123_RB1) || \
5595
defined(TARGET_IS_TM4C129_RA0) || \
5596
defined(TARGET_IS_TM4C129_RA1)
5597
#define ROM_UARTIntDisable \
5598
((void (*)(uint32_t ui32Base, \
5599
uint32_t ui32IntFlags))ROM_UARTTABLE[18])
5600
#endif
5601
#if defined(TARGET_IS_TM4C123_RA1) || \
5602
defined(TARGET_IS_TM4C123_RA3) || \
5603
defined(TARGET_IS_TM4C123_RB1) || \
5604
defined(TARGET_IS_TM4C129_RA0) || \
5605
defined(TARGET_IS_TM4C129_RA1)
5606
#define ROM_UARTIntStatus \
5607
((uint32_t (*)(uint32_t ui32Base, \
5608
bool bMasked))ROM_UARTTABLE[19])
5609
#endif
5610
#if defined(TARGET_IS_TM4C123_RA1) || \
5611
defined(TARGET_IS_TM4C123_RA3) || \
5612
defined(TARGET_IS_TM4C123_RB1) || \
5613
defined(TARGET_IS_TM4C129_RA0) || \
5614
defined(TARGET_IS_TM4C129_RA1)
5615
#define ROM_UARTIntClear \
5616
((void (*)(uint32_t ui32Base, \
5617
uint32_t ui32IntFlags))ROM_UARTTABLE[20])
5618
#endif
5619
#if defined(TARGET_IS_TM4C123_RA1) || \
5620
defined(TARGET_IS_TM4C123_RA3) || \
5621
defined(TARGET_IS_TM4C123_RB1) || \
5622
defined(TARGET_IS_TM4C129_RA0) || \
5623
defined(TARGET_IS_TM4C129_RA1)
5624
#define ROM_UpdateUART \
5625
((void (*)(void))ROM_UARTTABLE[21])
5626
#endif
5627
#if defined(TARGET_IS_TM4C123_RA1) || \
5628
defined(TARGET_IS_TM4C123_RA3) || \
5629
defined(TARGET_IS_TM4C123_RB1) || \
5630
defined(TARGET_IS_TM4C129_RA0) || \
5631
defined(TARGET_IS_TM4C129_RA1)
5632
#define ROM_UARTDMAEnable \
5633
((void (*)(uint32_t ui32Base, \
5634
uint32_t ui32DMAFlags))ROM_UARTTABLE[22])
5635
#endif
5636
#if defined(TARGET_IS_TM4C123_RA1) || \
5637
defined(TARGET_IS_TM4C123_RA3) || \
5638
defined(TARGET_IS_TM4C123_RB1) || \
5639
defined(TARGET_IS_TM4C129_RA0) || \
5640
defined(TARGET_IS_TM4C129_RA1)
5641
#define ROM_UARTDMADisable \
5642
((void (*)(uint32_t ui32Base, \
5643
uint32_t ui32DMAFlags))ROM_UARTTABLE[23])
5644
#endif
5645
#if defined(TARGET_IS_TM4C123_RA1) || \
5646
defined(TARGET_IS_TM4C123_RA3) || \
5647
defined(TARGET_IS_TM4C123_RB1) || \
5648
defined(TARGET_IS_TM4C129_RA0) || \
5649
defined(TARGET_IS_TM4C129_RA1)
5650
#define ROM_UARTFIFOEnable \
5651
((void (*)(uint32_t ui32Base))ROM_UARTTABLE[24])
5652
#endif
5653
#if defined(TARGET_IS_TM4C123_RA1) || \
5654
defined(TARGET_IS_TM4C123_RA3) || \
5655
defined(TARGET_IS_TM4C123_RB1) || \
5656
defined(TARGET_IS_TM4C129_RA0) || \
5657
defined(TARGET_IS_TM4C129_RA1)
5658
#define ROM_UARTFIFODisable \
5659
((void (*)(uint32_t ui32Base))ROM_UARTTABLE[25])
5660
#endif
5661
#if defined(TARGET_IS_TM4C123_RA1) || \
5662
defined(TARGET_IS_TM4C123_RA3) || \
5663
defined(TARGET_IS_TM4C123_RB1) || \
5664
defined(TARGET_IS_TM4C129_RA0) || \
5665
defined(TARGET_IS_TM4C129_RA1)
5666
#define ROM_UARTBusy \
5667
((bool (*)(uint32_t ui32Base))ROM_UARTTABLE[26])
5668
#endif
5669
#if defined(TARGET_IS_TM4C123_RA1) || \
5670
defined(TARGET_IS_TM4C123_RA3) || \
5671
defined(TARGET_IS_TM4C123_RB1) || \
5672
defined(TARGET_IS_TM4C129_RA0) || \
5673
defined(TARGET_IS_TM4C129_RA1)
5674
#define ROM_UARTTxIntModeSet \
5675
((void (*)(uint32_t ui32Base, \
5676
uint32_t ui32Mode))ROM_UARTTABLE[27])
5677
#endif
5678
#if defined(TARGET_IS_TM4C123_RA1) || \
5679
defined(TARGET_IS_TM4C123_RA3) || \
5680
defined(TARGET_IS_TM4C123_RB1) || \
5681
defined(TARGET_IS_TM4C129_RA0) || \
5682
defined(TARGET_IS_TM4C129_RA1)
5683
#define ROM_UARTTxIntModeGet \
5684
((uint32_t (*)(uint32_t ui32Base))ROM_UARTTABLE[28])
5685
#endif
5686
#if defined(TARGET_IS_TM4C123_RA1) || \
5687
defined(TARGET_IS_TM4C123_RA3) || \
5688
defined(TARGET_IS_TM4C123_RB1) || \
5689
defined(TARGET_IS_TM4C129_RA0) || \
5690
defined(TARGET_IS_TM4C129_RA1)
5691
#define ROM_UARTRxErrorGet \
5692
((uint32_t (*)(uint32_t ui32Base))ROM_UARTTABLE[29])
5693
#endif
5694
#if defined(TARGET_IS_TM4C123_RA1) || \
5695
defined(TARGET_IS_TM4C123_RA3) || \
5696
defined(TARGET_IS_TM4C123_RB1) || \
5697
defined(TARGET_IS_TM4C129_RA0) || \
5698
defined(TARGET_IS_TM4C129_RA1)
5699
#define ROM_UARTRxErrorClear \
5700
((void (*)(uint32_t ui32Base))ROM_UARTTABLE[30])
5701
#endif
5702
#if defined(TARGET_IS_TM4C123_RA1) || \
5703
defined(TARGET_IS_TM4C123_RA3) || \
5704
defined(TARGET_IS_TM4C123_RB1) || \
5705
defined(TARGET_IS_TM4C129_RA0) || \
5706
defined(TARGET_IS_TM4C129_RA1)
5707
#define ROM_UARTClockSourceSet \
5708
((void (*)(uint32_t ui32Base, \
5709
uint32_t ui32Source))ROM_UARTTABLE[31])
5710
#endif
5711
#if defined(TARGET_IS_TM4C123_RA1) || \
5712
defined(TARGET_IS_TM4C123_RA3) || \
5713
defined(TARGET_IS_TM4C123_RB1) || \
5714
defined(TARGET_IS_TM4C129_RA0) || \
5715
defined(TARGET_IS_TM4C129_RA1)
5716
#define ROM_UARTClockSourceGet \
5717
((uint32_t (*)(uint32_t ui32Base))ROM_UARTTABLE[32])
5718
#endif
5719
#if defined(TARGET_IS_TM4C123_RA1) || \
5720
defined(TARGET_IS_TM4C123_RA3) || \
5721
defined(TARGET_IS_TM4C123_RB1) || \
5722
defined(TARGET_IS_TM4C129_RA0) || \
5723
defined(TARGET_IS_TM4C129_RA1)
5724
#define ROM_UART9BitEnable \
5725
((void (*)(uint32_t ui32Base))ROM_UARTTABLE[33])
5726
#endif
5727
#if defined(TARGET_IS_TM4C123_RA1) || \
5728
defined(TARGET_IS_TM4C123_RA3) || \
5729
defined(TARGET_IS_TM4C123_RB1) || \
5730
defined(TARGET_IS_TM4C129_RA0) || \
5731
defined(TARGET_IS_TM4C129_RA1)
5732
#define ROM_UART9BitDisable \
5733
((void (*)(uint32_t ui32Base))ROM_UARTTABLE[34])
5734
#endif
5735
#if defined(TARGET_IS_TM4C123_RA1) || \
5736
defined(TARGET_IS_TM4C123_RA3) || \
5737
defined(TARGET_IS_TM4C123_RB1) || \
5738
defined(TARGET_IS_TM4C129_RA0) || \
5739
defined(TARGET_IS_TM4C129_RA1)
5740
#define ROM_UART9BitAddrSet \
5741
((void (*)(uint32_t ui32Base, \
5742
uint8_t ui8Addr, \
5743
uint8_t ui8Mask))ROM_UARTTABLE[35])
5744
#endif
5745
#if defined(TARGET_IS_TM4C123_RA1) || \
5746
defined(TARGET_IS_TM4C123_RA3) || \
5747
defined(TARGET_IS_TM4C123_RB1) || \
5748
defined(TARGET_IS_TM4C129_RA0) || \
5749
defined(TARGET_IS_TM4C129_RA1)
5750
#define ROM_UART9BitAddrSend \
5751
((void (*)(uint32_t ui32Base, \
5752
uint8_t ui8Addr))ROM_UARTTABLE[36])
5753
#endif
5754
#if defined(TARGET_IS_TM4C129_RA0) || \
5755
defined(TARGET_IS_TM4C129_RA1)
5756
#define ROM_UARTSmartCardDisable \
5757
((void (*)(uint32_t ui32Base))ROM_UARTTABLE[37])
5758
#endif
5759
#if defined(TARGET_IS_TM4C129_RA0) || \
5760
defined(TARGET_IS_TM4C129_RA1)
5761
#define ROM_UARTSmartCardEnable \
5762
((void (*)(uint32_t ui32Base))ROM_UARTTABLE[38])
5763
#endif
5764
#if defined(TARGET_IS_TM4C123_RB1) || \
5765
defined(TARGET_IS_TM4C129_RA0) || \
5766
defined(TARGET_IS_TM4C129_RA1)
5767
#define ROM_UARTModemControlClear \
5768
((void (*)(uint32_t ui32Base, \
5769
uint32_t ui32Control))ROM_UARTTABLE[39])
5770
#endif
5771
#if defined(TARGET_IS_TM4C129_RA0) || \
5772
defined(TARGET_IS_TM4C129_RA1)
5773
#define ROM_UARTModemControlGet \
5774
((uint32_t (*)(uint32_t ui32Base))ROM_UARTTABLE[40])
5775
#endif
5776
#if defined(TARGET_IS_TM4C129_RA0) || \
5777
defined(TARGET_IS_TM4C129_RA1)
5778
#define ROM_UARTModemControlSet \
5779
((void (*)(uint32_t ui32Base, \
5780
uint32_t ui32Control))ROM_UARTTABLE[41])
5781
#endif
5782
#if defined(TARGET_IS_TM4C129_RA0) || \
5783
defined(TARGET_IS_TM4C129_RA1)
5784
#define ROM_UARTModemStatusGet \
5785
((uint32_t (*)(uint32_t ui32Base))ROM_UARTTABLE[42])
5786
#endif
5787
#if defined(TARGET_IS_TM4C129_RA0) || \
5788
defined(TARGET_IS_TM4C129_RA1)
5789
#define ROM_UARTFlowControlGet \
5790
((uint32_t (*)(uint32_t ui32Base))ROM_UARTTABLE[43])
5791
#endif
5792
#if defined(TARGET_IS_TM4C129_RA0) || \
5793
defined(TARGET_IS_TM4C129_RA1)
5794
#define ROM_UARTFlowControlSet \
5795
((void (*)(uint32_t ui32Base, \
5796
uint32_t ui32Mode))ROM_UARTTABLE[44])
5797
#endif
5798
5799
//*****************************************************************************
5800
//
5801
// Macros for calling ROM functions in the uDMA API.
5802
//
5803
//*****************************************************************************
5804
#if defined(TARGET_IS_TM4C123_RA1) || \
5805
defined(TARGET_IS_TM4C123_RA3) || \
5806
defined(TARGET_IS_TM4C123_RB1) || \
5807
defined(TARGET_IS_TM4C129_RA0) || \
5808
defined(TARGET_IS_TM4C129_RA1)
5809
#define ROM_uDMAChannelTransferSet \
5810
((void (*)(uint32_t ui32ChannelStructIndex, \
5811
uint32_t ui32Mode, \
5812
void *pvSrcAddr, \
5813
void *pvDstAddr, \
5814
uint32_t ui32TransferSize))ROM_UDMATABLE[0])
5815
#endif
5816
#if defined(TARGET_IS_TM4C123_RA1) || \
5817
defined(TARGET_IS_TM4C123_RA3) || \
5818
defined(TARGET_IS_TM4C123_RB1) || \
5819
defined(TARGET_IS_TM4C129_RA0) || \
5820
defined(TARGET_IS_TM4C129_RA1)
5821
#define ROM_uDMAEnable \
5822
((void (*)(void))ROM_UDMATABLE[1])
5823
#endif
5824
#if defined(TARGET_IS_TM4C123_RA1) || \
5825
defined(TARGET_IS_TM4C123_RA3) || \
5826
defined(TARGET_IS_TM4C123_RB1) || \
5827
defined(TARGET_IS_TM4C129_RA0) || \
5828
defined(TARGET_IS_TM4C129_RA1)
5829
#define ROM_uDMADisable \
5830
((void (*)(void))ROM_UDMATABLE[2])
5831
#endif
5832
#if defined(TARGET_IS_TM4C123_RA1) || \
5833
defined(TARGET_IS_TM4C123_RA3) || \
5834
defined(TARGET_IS_TM4C123_RB1) || \
5835
defined(TARGET_IS_TM4C129_RA0) || \
5836
defined(TARGET_IS_TM4C129_RA1)
5837
#define ROM_uDMAErrorStatusGet \
5838
((uint32_t (*)(void))ROM_UDMATABLE[3])
5839
#endif
5840
#if defined(TARGET_IS_TM4C123_RA1) || \
5841
defined(TARGET_IS_TM4C123_RA3) || \
5842
defined(TARGET_IS_TM4C123_RB1) || \
5843
defined(TARGET_IS_TM4C129_RA0) || \
5844
defined(TARGET_IS_TM4C129_RA1)
5845
#define ROM_uDMAErrorStatusClear \
5846
((void (*)(void))ROM_UDMATABLE[4])
5847
#endif
5848
#if defined(TARGET_IS_TM4C123_RA1) || \
5849
defined(TARGET_IS_TM4C123_RA3) || \
5850
defined(TARGET_IS_TM4C123_RB1) || \
5851
defined(TARGET_IS_TM4C129_RA0) || \
5852
defined(TARGET_IS_TM4C129_RA1)
5853
#define ROM_uDMAChannelEnable \
5854
((void (*)(uint32_t ui32ChannelNum))ROM_UDMATABLE[5])
5855
#endif
5856
#if defined(TARGET_IS_TM4C123_RA1) || \
5857
defined(TARGET_IS_TM4C123_RA3) || \
5858
defined(TARGET_IS_TM4C123_RB1) || \
5859
defined(TARGET_IS_TM4C129_RA0) || \
5860
defined(TARGET_IS_TM4C129_RA1)
5861
#define ROM_uDMAChannelDisable \
5862
((void (*)(uint32_t ui32ChannelNum))ROM_UDMATABLE[6])
5863
#endif
5864
#if defined(TARGET_IS_TM4C123_RA1) || \
5865
defined(TARGET_IS_TM4C123_RA3) || \
5866
defined(TARGET_IS_TM4C123_RB1) || \
5867
defined(TARGET_IS_TM4C129_RA0) || \
5868
defined(TARGET_IS_TM4C129_RA1)
5869
#define ROM_uDMAChannelIsEnabled \
5870
((bool (*)(uint32_t ui32ChannelNum))ROM_UDMATABLE[7])
5871
#endif
5872
#if defined(TARGET_IS_TM4C123_RA1) || \
5873
defined(TARGET_IS_TM4C123_RA3) || \
5874
defined(TARGET_IS_TM4C123_RB1) || \
5875
defined(TARGET_IS_TM4C129_RA0) || \
5876
defined(TARGET_IS_TM4C129_RA1)
5877
#define ROM_uDMAControlBaseSet \
5878
((void (*)(void *pControlTable))ROM_UDMATABLE[8])
5879
#endif
5880
#if defined(TARGET_IS_TM4C123_RA1) || \
5881
defined(TARGET_IS_TM4C123_RA3) || \
5882
defined(TARGET_IS_TM4C123_RB1) || \
5883
defined(TARGET_IS_TM4C129_RA0) || \
5884
defined(TARGET_IS_TM4C129_RA1)
5885
#define ROM_uDMAControlBaseGet \
5886
((void * (*)(void))ROM_UDMATABLE[9])
5887
#endif
5888
#if defined(TARGET_IS_TM4C123_RA1) || \
5889
defined(TARGET_IS_TM4C123_RA3) || \
5890
defined(TARGET_IS_TM4C123_RB1) || \
5891
defined(TARGET_IS_TM4C129_RA0) || \
5892
defined(TARGET_IS_TM4C129_RA1)
5893
#define ROM_uDMAChannelRequest \
5894
((void (*)(uint32_t ui32ChannelNum))ROM_UDMATABLE[10])
5895
#endif
5896
#if defined(TARGET_IS_TM4C123_RA1) || \
5897
defined(TARGET_IS_TM4C123_RA3) || \
5898
defined(TARGET_IS_TM4C123_RB1) || \
5899
defined(TARGET_IS_TM4C129_RA0) || \
5900
defined(TARGET_IS_TM4C129_RA1)
5901
#define ROM_uDMAChannelAttributeEnable \
5902
((void (*)(uint32_t ui32ChannelNum, \
5903
uint32_t ui32Attr))ROM_UDMATABLE[11])
5904
#endif
5905
#if defined(TARGET_IS_TM4C123_RA1) || \
5906
defined(TARGET_IS_TM4C123_RA3) || \
5907
defined(TARGET_IS_TM4C123_RB1) || \
5908
defined(TARGET_IS_TM4C129_RA0) || \
5909
defined(TARGET_IS_TM4C129_RA1)
5910
#define ROM_uDMAChannelAttributeDisable \
5911
((void (*)(uint32_t ui32ChannelNum, \
5912
uint32_t ui32Attr))ROM_UDMATABLE[12])
5913
#endif
5914
#if defined(TARGET_IS_TM4C123_RA1) || \
5915
defined(TARGET_IS_TM4C123_RA3) || \
5916
defined(TARGET_IS_TM4C123_RB1) || \
5917
defined(TARGET_IS_TM4C129_RA0) || \
5918
defined(TARGET_IS_TM4C129_RA1)
5919
#define ROM_uDMAChannelAttributeGet \
5920
((uint32_t (*)(uint32_t ui32ChannelNum))ROM_UDMATABLE[13])
5921
#endif
5922
#if defined(TARGET_IS_TM4C123_RA1) || \
5923
defined(TARGET_IS_TM4C123_RA3) || \
5924
defined(TARGET_IS_TM4C123_RB1) || \
5925
defined(TARGET_IS_TM4C129_RA0) || \
5926
defined(TARGET_IS_TM4C129_RA1)
5927
#define ROM_uDMAChannelControlSet \
5928
((void (*)(uint32_t ui32ChannelStructIndex, \
5929
uint32_t ui32Control))ROM_UDMATABLE[14])
5930
#endif
5931
#if defined(TARGET_IS_TM4C123_RA1) || \
5932
defined(TARGET_IS_TM4C123_RA3) || \
5933
defined(TARGET_IS_TM4C123_RB1) || \
5934
defined(TARGET_IS_TM4C129_RA0) || \
5935
defined(TARGET_IS_TM4C129_RA1)
5936
#define ROM_uDMAChannelSizeGet \
5937
((uint32_t (*)(uint32_t ui32ChannelStructIndex))ROM_UDMATABLE[15])
5938
#endif
5939
#if defined(TARGET_IS_TM4C123_RA1) || \
5940
defined(TARGET_IS_TM4C123_RA3) || \
5941
defined(TARGET_IS_TM4C123_RB1) || \
5942
defined(TARGET_IS_TM4C129_RA0) || \
5943
defined(TARGET_IS_TM4C129_RA1)
5944
#define ROM_uDMAChannelModeGet \
5945
((uint32_t (*)(uint32_t ui32ChannelStructIndex))ROM_UDMATABLE[16])
5946
#endif
5947
#if defined(TARGET_IS_TM4C123_RA1) || \
5948
defined(TARGET_IS_TM4C123_RA3) || \
5949
defined(TARGET_IS_TM4C123_RB1) || \
5950
defined(TARGET_IS_TM4C129_RA0) || \
5951
defined(TARGET_IS_TM4C129_RA1)
5952
#define ROM_uDMAChannelSelectSecondary \
5953
((void (*)(uint32_t ui32SecPeriphs))ROM_UDMATABLE[17])
5954
#endif
5955
#if defined(TARGET_IS_TM4C123_RA1) || \
5956
defined(TARGET_IS_TM4C123_RA3) || \
5957
defined(TARGET_IS_TM4C123_RB1) || \
5958
defined(TARGET_IS_TM4C129_RA0) || \
5959
defined(TARGET_IS_TM4C129_RA1)
5960
#define ROM_uDMAChannelSelectDefault \
5961
((void (*)(uint32_t ui32DefPeriphs))ROM_UDMATABLE[18])
5962
#endif
5963
#if defined(TARGET_IS_TM4C123_RA1) || \
5964
defined(TARGET_IS_TM4C123_RA3) || \
5965
defined(TARGET_IS_TM4C123_RB1) || \
5966
defined(TARGET_IS_TM4C129_RA0) || \
5967
defined(TARGET_IS_TM4C129_RA1)
5968
#define ROM_uDMAIntStatus \
5969
((uint32_t (*)(void))ROM_UDMATABLE[19])
5970
#endif
5971
#if defined(TARGET_IS_TM4C123_RA1) || \
5972
defined(TARGET_IS_TM4C123_RA3) || \
5973
defined(TARGET_IS_TM4C123_RB1) || \
5974
defined(TARGET_IS_TM4C129_RA0) || \
5975
defined(TARGET_IS_TM4C129_RA1)
5976
#define ROM_uDMAIntClear \
5977
((void (*)(uint32_t ui32ChanMask))ROM_UDMATABLE[20])
5978
#endif
5979
#if defined(TARGET_IS_TM4C123_RA1) || \
5980
defined(TARGET_IS_TM4C123_RA3) || \
5981
defined(TARGET_IS_TM4C123_RB1) || \
5982
defined(TARGET_IS_TM4C129_RA0) || \
5983
defined(TARGET_IS_TM4C129_RA1)
5984
#define ROM_uDMAControlAlternateBaseGet \
5985
((void * (*)(void))ROM_UDMATABLE[21])
5986
#endif
5987
#if defined(TARGET_IS_TM4C123_RA1) || \
5988
defined(TARGET_IS_TM4C123_RA3) || \
5989
defined(TARGET_IS_TM4C123_RB1) || \
5990
defined(TARGET_IS_TM4C129_RA0) || \
5991
defined(TARGET_IS_TM4C129_RA1)
5992
#define ROM_uDMAChannelScatterGatherSet \
5993
((void (*)(uint32_t ui32ChannelNum, \
5994
uint32_t ui32TaskCount, \
5995
void *pvTaskList, \
5996
uint32_t ui32IsPeriphSG))ROM_UDMATABLE[22])
5997
#endif
5998
#if defined(TARGET_IS_TM4C123_RA1) || \
5999
defined(TARGET_IS_TM4C123_RA3) || \
6000
defined(TARGET_IS_TM4C123_RB1) || \
6001
defined(TARGET_IS_TM4C129_RA0) || \
6002
defined(TARGET_IS_TM4C129_RA1)
6003
#define ROM_uDMAChannelAssign \
6004
((void (*)(uint32_t ui32Mapping))ROM_UDMATABLE[23])
6005
#endif
6006
6007
//*****************************************************************************
6008
//
6009
// Macros for calling ROM functions in the USB API.
6010
//
6011
//*****************************************************************************
6012
#if defined(TARGET_IS_TM4C123_RA1) || \
6013
defined(TARGET_IS_TM4C123_RA3) || \
6014
defined(TARGET_IS_TM4C123_RB1) || \
6015
defined(TARGET_IS_TM4C129_RA0) || \
6016
defined(TARGET_IS_TM4C129_RA1)
6017
#define ROM_USBDevAddrGet \
6018
((uint32_t (*)(uint32_t ui32Base))ROM_USBTABLE[1])
6019
#endif
6020
#if defined(TARGET_IS_TM4C123_RA1) || \
6021
defined(TARGET_IS_TM4C123_RA3) || \
6022
defined(TARGET_IS_TM4C123_RB1) || \
6023
defined(TARGET_IS_TM4C129_RA0) || \
6024
defined(TARGET_IS_TM4C129_RA1)
6025
#define ROM_USBDevAddrSet \
6026
((void (*)(uint32_t ui32Base, \
6027
uint32_t ui32Address))ROM_USBTABLE[2])
6028
#endif
6029
#if defined(TARGET_IS_TM4C123_RA1) || \
6030
defined(TARGET_IS_TM4C123_RA3) || \
6031
defined(TARGET_IS_TM4C123_RB1) || \
6032
defined(TARGET_IS_TM4C129_RA0) || \
6033
defined(TARGET_IS_TM4C129_RA1)
6034
#define ROM_USBDevConnect \
6035
((void (*)(uint32_t ui32Base))ROM_USBTABLE[3])
6036
#endif
6037
#if defined(TARGET_IS_TM4C123_RA1) || \
6038
defined(TARGET_IS_TM4C123_RA3) || \
6039
defined(TARGET_IS_TM4C123_RB1) || \
6040
defined(TARGET_IS_TM4C129_RA0) || \
6041
defined(TARGET_IS_TM4C129_RA1)
6042
#define ROM_USBDevDisconnect \
6043
((void (*)(uint32_t ui32Base))ROM_USBTABLE[4])
6044
#endif
6045
#if defined(TARGET_IS_TM4C123_RA1) || \
6046
defined(TARGET_IS_TM4C123_RA3) || \
6047
defined(TARGET_IS_TM4C123_RB1) || \
6048
defined(TARGET_IS_TM4C129_RA0) || \
6049
defined(TARGET_IS_TM4C129_RA1)
6050
#define ROM_USBDevEndpointConfigSet \
6051
((void (*)(uint32_t ui32Base, \
6052
uint32_t ui32Endpoint, \
6053
uint32_t ui32MaxPacketSize, \
6054
uint32_t ui32Flags))ROM_USBTABLE[5])
6055
#endif
6056
#if defined(TARGET_IS_TM4C123_RA1) || \
6057
defined(TARGET_IS_TM4C123_RA3) || \
6058
defined(TARGET_IS_TM4C123_RB1) || \
6059
defined(TARGET_IS_TM4C129_RA0) || \
6060
defined(TARGET_IS_TM4C129_RA1)
6061
#define ROM_USBDevEndpointDataAck \
6062
((void (*)(uint32_t ui32Base, \
6063
uint32_t ui32Endpoint, \
6064
bool bIsLastPacket))ROM_USBTABLE[6])
6065
#endif
6066
#if defined(TARGET_IS_TM4C123_RA1) || \
6067
defined(TARGET_IS_TM4C123_RA3) || \
6068
defined(TARGET_IS_TM4C123_RB1) || \
6069
defined(TARGET_IS_TM4C129_RA0) || \
6070
defined(TARGET_IS_TM4C129_RA1)
6071
#define ROM_USBDevEndpointStall \
6072
((void (*)(uint32_t ui32Base, \
6073
uint32_t ui32Endpoint, \
6074
uint32_t ui32Flags))ROM_USBTABLE[7])
6075
#endif
6076
#if defined(TARGET_IS_TM4C123_RA1) || \
6077
defined(TARGET_IS_TM4C123_RA3) || \
6078
defined(TARGET_IS_TM4C123_RB1) || \
6079
defined(TARGET_IS_TM4C129_RA0) || \
6080
defined(TARGET_IS_TM4C129_RA1)
6081
#define ROM_USBDevEndpointStallClear \
6082
((void (*)(uint32_t ui32Base, \
6083
uint32_t ui32Endpoint, \
6084
uint32_t ui32Flags))ROM_USBTABLE[8])
6085
#endif
6086
#if defined(TARGET_IS_TM4C123_RA1) || \
6087
defined(TARGET_IS_TM4C123_RA3) || \
6088
defined(TARGET_IS_TM4C123_RB1) || \
6089
defined(TARGET_IS_TM4C129_RA0) || \
6090
defined(TARGET_IS_TM4C129_RA1)
6091
#define ROM_USBDevEndpointStatusClear \
6092
((void (*)(uint32_t ui32Base, \
6093
uint32_t ui32Endpoint, \
6094
uint32_t ui32Flags))ROM_USBTABLE[9])
6095
#endif
6096
#if defined(TARGET_IS_TM4C123_RA1) || \
6097
defined(TARGET_IS_TM4C123_RA3) || \
6098
defined(TARGET_IS_TM4C123_RB1) || \
6099
defined(TARGET_IS_TM4C129_RA0) || \
6100
defined(TARGET_IS_TM4C129_RA1)
6101
#define ROM_USBEndpointDataGet \
6102
((int32_t (*)(uint32_t ui32Base, \
6103
uint32_t ui32Endpoint, \
6104
uint8_t *pui8Data, \
6105
uint32_t *pui32Size))ROM_USBTABLE[10])
6106
#endif
6107
#if defined(TARGET_IS_TM4C123_RA1) || \
6108
defined(TARGET_IS_TM4C123_RA3) || \
6109
defined(TARGET_IS_TM4C123_RB1) || \
6110
defined(TARGET_IS_TM4C129_RA0) || \
6111
defined(TARGET_IS_TM4C129_RA1)
6112
#define ROM_USBEndpointDataPut \
6113
((int32_t (*)(uint32_t ui32Base, \
6114
uint32_t ui32Endpoint, \
6115
uint8_t *pui8Data, \
6116
uint32_t ui32Size))ROM_USBTABLE[11])
6117
#endif
6118
#if defined(TARGET_IS_TM4C123_RA1) || \
6119
defined(TARGET_IS_TM4C123_RA3) || \
6120
defined(TARGET_IS_TM4C123_RB1) || \
6121
defined(TARGET_IS_TM4C129_RA0) || \
6122
defined(TARGET_IS_TM4C129_RA1)
6123
#define ROM_USBEndpointDataSend \
6124
((int32_t (*)(uint32_t ui32Base, \
6125
uint32_t ui32Endpoint, \
6126
uint32_t ui32TransType))ROM_USBTABLE[12])
6127
#endif
6128
#if defined(TARGET_IS_TM4C123_RA1) || \
6129
defined(TARGET_IS_TM4C123_RA3) || \
6130
defined(TARGET_IS_TM4C123_RB1) || \
6131
defined(TARGET_IS_TM4C129_RA0) || \
6132
defined(TARGET_IS_TM4C129_RA1)
6133
#define ROM_USBEndpointDataToggleClear \
6134
((void (*)(uint32_t ui32Base, \
6135
uint32_t ui32Endpoint, \
6136
uint32_t ui32Flags))ROM_USBTABLE[13])
6137
#endif
6138
#if defined(TARGET_IS_TM4C123_RA1) || \
6139
defined(TARGET_IS_TM4C123_RA3) || \
6140
defined(TARGET_IS_TM4C123_RB1) || \
6141
defined(TARGET_IS_TM4C129_RA0) || \
6142
defined(TARGET_IS_TM4C129_RA1)
6143
#define ROM_USBEndpointStatus \
6144
((uint32_t (*)(uint32_t ui32Base, \
6145
uint32_t ui32Endpoint))ROM_USBTABLE[14])
6146
#endif
6147
#if defined(TARGET_IS_TM4C123_RA1) || \
6148
defined(TARGET_IS_TM4C123_RA3) || \
6149
defined(TARGET_IS_TM4C123_RB1) || \
6150
defined(TARGET_IS_TM4C129_RA0) || \
6151
defined(TARGET_IS_TM4C129_RA1)
6152
#define ROM_USBFIFOAddrGet \
6153
((uint32_t (*)(uint32_t ui32Base, \
6154
uint32_t ui32Endpoint))ROM_USBTABLE[15])
6155
#endif
6156
#if defined(TARGET_IS_TM4C123_RA1) || \
6157
defined(TARGET_IS_TM4C123_RA3) || \
6158
defined(TARGET_IS_TM4C123_RB1) || \
6159
defined(TARGET_IS_TM4C129_RA0) || \
6160
defined(TARGET_IS_TM4C129_RA1)
6161
#define ROM_USBFIFOConfigGet \
6162
((void (*)(uint32_t ui32Base, \
6163
uint32_t ui32Endpoint, \
6164
uint32_t *pui32FIFOAddress, \
6165
uint32_t *pui32FIFOSize, \
6166
uint32_t ui32Flags))ROM_USBTABLE[16])
6167
#endif
6168
#if defined(TARGET_IS_TM4C123_RA1) || \
6169
defined(TARGET_IS_TM4C123_RA3) || \
6170
defined(TARGET_IS_TM4C123_RB1) || \
6171
defined(TARGET_IS_TM4C129_RA0) || \
6172
defined(TARGET_IS_TM4C129_RA1)
6173
#define ROM_USBFIFOConfigSet \
6174
((void (*)(uint32_t ui32Base, \
6175
uint32_t ui32Endpoint, \
6176
uint32_t ui32FIFOAddress, \
6177
uint32_t ui32FIFOSize, \
6178
uint32_t ui32Flags))ROM_USBTABLE[17])
6179
#endif
6180
#if defined(TARGET_IS_TM4C123_RA1) || \
6181
defined(TARGET_IS_TM4C123_RA3) || \
6182
defined(TARGET_IS_TM4C123_RB1) || \
6183
defined(TARGET_IS_TM4C129_RA0) || \
6184
defined(TARGET_IS_TM4C129_RA1)
6185
#define ROM_USBFIFOFlush \
6186
((void (*)(uint32_t ui32Base, \
6187
uint32_t ui32Endpoint, \
6188
uint32_t ui32Flags))ROM_USBTABLE[18])
6189
#endif
6190
#if defined(TARGET_IS_TM4C123_RA1) || \
6191
defined(TARGET_IS_TM4C123_RA3) || \
6192
defined(TARGET_IS_TM4C123_RB1) || \
6193
defined(TARGET_IS_TM4C129_RA0) || \
6194
defined(TARGET_IS_TM4C129_RA1)
6195
#define ROM_USBFrameNumberGet \
6196
((uint32_t (*)(uint32_t ui32Base))ROM_USBTABLE[19])
6197
#endif
6198
#if defined(TARGET_IS_TM4C123_RA1) || \
6199
defined(TARGET_IS_TM4C123_RA3) || \
6200
defined(TARGET_IS_TM4C123_RB1) || \
6201
defined(TARGET_IS_TM4C129_RA0) || \
6202
defined(TARGET_IS_TM4C129_RA1)
6203
#define ROM_USBHostAddrGet \
6204
((uint32_t (*)(uint32_t ui32Base, \
6205
uint32_t ui32Endpoint, \
6206
uint32_t ui32Flags))ROM_USBTABLE[20])
6207
#endif
6208
#if defined(TARGET_IS_TM4C123_RA1) || \
6209
defined(TARGET_IS_TM4C123_RA3) || \
6210
defined(TARGET_IS_TM4C123_RB1) || \
6211
defined(TARGET_IS_TM4C129_RA0) || \
6212
defined(TARGET_IS_TM4C129_RA1)
6213
#define ROM_USBHostAddrSet \
6214
((void (*)(uint32_t ui32Base, \
6215
uint32_t ui32Endpoint, \
6216
uint32_t ui32Addr, \
6217
uint32_t ui32Flags))ROM_USBTABLE[21])
6218
#endif
6219
#if defined(TARGET_IS_TM4C123_RA3) || \
6220
defined(TARGET_IS_TM4C123_RB1) || \
6221
defined(TARGET_IS_TM4C129_RA0) || \
6222
defined(TARGET_IS_TM4C129_RA1)
6223
#define ROM_USBHostEndpointConfig \
6224
((void (*)(uint32_t ui32Base, \
6225
uint32_t ui32Endpoint, \
6226
uint32_t ui32MaxPacketSize, \
6227
uint32_t ui32NAKPollInterval, \
6228
uint32_t ui32TargetEndpoint, \
6229
uint32_t ui32Flags))ROM_USBTABLE[22])
6230
#endif
6231
#if defined(TARGET_IS_TM4C123_RA1) || \
6232
defined(TARGET_IS_TM4C123_RA3) || \
6233
defined(TARGET_IS_TM4C123_RB1) || \
6234
defined(TARGET_IS_TM4C129_RA0) || \
6235
defined(TARGET_IS_TM4C129_RA1)
6236
#define ROM_USBHostEndpointDataAck \
6237
((void (*)(uint32_t ui32Base, \
6238
uint32_t ui32Endpoint))ROM_USBTABLE[23])
6239
#endif
6240
#if defined(TARGET_IS_TM4C123_RA1) || \
6241
defined(TARGET_IS_TM4C123_RA3) || \
6242
defined(TARGET_IS_TM4C123_RB1) || \
6243
defined(TARGET_IS_TM4C129_RA0) || \
6244
defined(TARGET_IS_TM4C129_RA1)
6245
#define ROM_USBHostEndpointDataToggle \
6246
((void (*)(uint32_t ui32Base, \
6247
uint32_t ui32Endpoint, \
6248
bool bDataToggle, \
6249
uint32_t ui32Flags))ROM_USBTABLE[24])
6250
#endif
6251
#if defined(TARGET_IS_TM4C123_RA1) || \
6252
defined(TARGET_IS_TM4C123_RA3) || \
6253
defined(TARGET_IS_TM4C123_RB1) || \
6254
defined(TARGET_IS_TM4C129_RA0) || \
6255
defined(TARGET_IS_TM4C129_RA1)
6256
#define ROM_USBHostEndpointStatusClear \
6257
((void (*)(uint32_t ui32Base, \
6258
uint32_t ui32Endpoint, \
6259
uint32_t ui32Flags))ROM_USBTABLE[25])
6260
#endif
6261
#if defined(TARGET_IS_TM4C123_RA1) || \
6262
defined(TARGET_IS_TM4C123_RA3) || \
6263
defined(TARGET_IS_TM4C123_RB1) || \
6264
defined(TARGET_IS_TM4C129_RA0) || \
6265
defined(TARGET_IS_TM4C129_RA1)
6266
#define ROM_USBHostHubAddrGet \
6267
((uint32_t (*)(uint32_t ui32Base, \
6268
uint32_t ui32Endpoint, \
6269
uint32_t ui32Flags))ROM_USBTABLE[26])
6270
#endif
6271
#if defined(TARGET_IS_TM4C123_RA1) || \
6272
defined(TARGET_IS_TM4C123_RA3) || \
6273
defined(TARGET_IS_TM4C123_RB1) || \
6274
defined(TARGET_IS_TM4C129_RA0) || \
6275
defined(TARGET_IS_TM4C129_RA1)
6276
#define ROM_USBHostHubAddrSet \
6277
((void (*)(uint32_t ui32Base, \
6278
uint32_t ui32Endpoint, \
6279
uint32_t ui32Addr, \
6280
uint32_t ui32Flags))ROM_USBTABLE[27])
6281
#endif
6282
#if defined(TARGET_IS_TM4C123_RA1) || \
6283
defined(TARGET_IS_TM4C123_RA3) || \
6284
defined(TARGET_IS_TM4C123_RB1) || \
6285
defined(TARGET_IS_TM4C129_RA0) || \
6286
defined(TARGET_IS_TM4C129_RA1)
6287
#define ROM_USBHostPwrDisable \
6288
((void (*)(uint32_t ui32Base))ROM_USBTABLE[28])
6289
#endif
6290
#if defined(TARGET_IS_TM4C123_RA1) || \
6291
defined(TARGET_IS_TM4C123_RA3) || \
6292
defined(TARGET_IS_TM4C123_RB1) || \
6293
defined(TARGET_IS_TM4C129_RA0) || \
6294
defined(TARGET_IS_TM4C129_RA1)
6295
#define ROM_USBHostPwrEnable \
6296
((void (*)(uint32_t ui32Base))ROM_USBTABLE[29])
6297
#endif
6298
#if defined(TARGET_IS_TM4C123_RA1) || \
6299
defined(TARGET_IS_TM4C123_RA3) || \
6300
defined(TARGET_IS_TM4C123_RB1) || \
6301
defined(TARGET_IS_TM4C129_RA0) || \
6302
defined(TARGET_IS_TM4C129_RA1)
6303
#define ROM_USBHostPwrConfig \
6304
((void (*)(uint32_t ui32Base, \
6305
uint32_t ui32Flags))ROM_USBTABLE[30])
6306
#endif
6307
#if defined(TARGET_IS_TM4C123_RA1) || \
6308
defined(TARGET_IS_TM4C123_RA3) || \
6309
defined(TARGET_IS_TM4C123_RB1) || \
6310
defined(TARGET_IS_TM4C129_RA0) || \
6311
defined(TARGET_IS_TM4C129_RA1)
6312
#define ROM_USBHostPwrFaultDisable \
6313
((void (*)(uint32_t ui32Base))ROM_USBTABLE[31])
6314
#endif
6315
#if defined(TARGET_IS_TM4C123_RA1) || \
6316
defined(TARGET_IS_TM4C123_RA3) || \
6317
defined(TARGET_IS_TM4C123_RB1) || \
6318
defined(TARGET_IS_TM4C129_RA0) || \
6319
defined(TARGET_IS_TM4C129_RA1)
6320
#define ROM_USBHostPwrFaultEnable \
6321
((void (*)(uint32_t ui32Base))ROM_USBTABLE[32])
6322
#endif
6323
#if defined(TARGET_IS_TM4C123_RA1) || \
6324
defined(TARGET_IS_TM4C123_RA3) || \
6325
defined(TARGET_IS_TM4C123_RB1) || \
6326
defined(TARGET_IS_TM4C129_RA0) || \
6327
defined(TARGET_IS_TM4C129_RA1)
6328
#define ROM_USBHostRequestIN \
6329
((void (*)(uint32_t ui32Base, \
6330
uint32_t ui32Endpoint))ROM_USBTABLE[33])
6331
#endif
6332
#if defined(TARGET_IS_TM4C123_RA1) || \
6333
defined(TARGET_IS_TM4C123_RA3) || \
6334
defined(TARGET_IS_TM4C123_RB1) || \
6335
defined(TARGET_IS_TM4C129_RA0) || \
6336
defined(TARGET_IS_TM4C129_RA1)
6337
#define ROM_USBHostRequestStatus \
6338
((void (*)(uint32_t ui32Base))ROM_USBTABLE[34])
6339
#endif
6340
#if defined(TARGET_IS_TM4C123_RA1) || \
6341
defined(TARGET_IS_TM4C123_RA3) || \
6342
defined(TARGET_IS_TM4C123_RB1) || \
6343
defined(TARGET_IS_TM4C129_RA0) || \
6344
defined(TARGET_IS_TM4C129_RA1)
6345
#define ROM_USBHostReset \
6346
((void (*)(uint32_t ui32Base, \
6347
bool bStart))ROM_USBTABLE[35])
6348
#endif
6349
#if defined(TARGET_IS_TM4C123_RA1) || \
6350
defined(TARGET_IS_TM4C123_RA3) || \
6351
defined(TARGET_IS_TM4C123_RB1) || \
6352
defined(TARGET_IS_TM4C129_RA0) || \
6353
defined(TARGET_IS_TM4C129_RA1)
6354
#define ROM_USBHostResume \
6355
((void (*)(uint32_t ui32Base, \
6356
bool bStart))ROM_USBTABLE[36])
6357
#endif
6358
#if defined(TARGET_IS_TM4C123_RA1) || \
6359
defined(TARGET_IS_TM4C123_RA3) || \
6360
defined(TARGET_IS_TM4C123_RB1) || \
6361
defined(TARGET_IS_TM4C129_RA0) || \
6362
defined(TARGET_IS_TM4C129_RA1)
6363
#define ROM_USBHostSpeedGet \
6364
((uint32_t (*)(uint32_t ui32Base))ROM_USBTABLE[37])
6365
#endif
6366
#if defined(TARGET_IS_TM4C123_RA1) || \
6367
defined(TARGET_IS_TM4C123_RA3) || \
6368
defined(TARGET_IS_TM4C123_RB1) || \
6369
defined(TARGET_IS_TM4C129_RA0) || \
6370
defined(TARGET_IS_TM4C129_RA1)
6371
#define ROM_USBHostSuspend \
6372
((void (*)(uint32_t ui32Base))ROM_USBTABLE[38])
6373
#endif
6374
#if defined(TARGET_IS_TM4C123_RA1) || \
6375
defined(TARGET_IS_TM4C123_RA3) || \
6376
defined(TARGET_IS_TM4C123_RB1) || \
6377
defined(TARGET_IS_TM4C129_RA0) || \
6378
defined(TARGET_IS_TM4C129_RA1)
6379
#define ROM_USBDevEndpointConfigGet \
6380
((void (*)(uint32_t ui32Base, \
6381
uint32_t ui32Endpoint, \
6382
uint32_t *pui32MaxPacketSize, \
6383
uint32_t *pui32Flags))ROM_USBTABLE[41])
6384
#endif
6385
#if defined(TARGET_IS_TM4C123_RA1) || \
6386
defined(TARGET_IS_TM4C123_RA3) || \
6387
defined(TARGET_IS_TM4C123_RB1) || \
6388
defined(TARGET_IS_TM4C129_RA0) || \
6389
defined(TARGET_IS_TM4C129_RA1)
6390
#define ROM_USBEndpointDMAEnable \
6391
((void (*)(uint32_t ui32Base, \
6392
uint32_t ui32Endpoint, \
6393
uint32_t ui32Flags))ROM_USBTABLE[42])
6394
#endif
6395
#if defined(TARGET_IS_TM4C123_RA1) || \
6396
defined(TARGET_IS_TM4C123_RA3) || \
6397
defined(TARGET_IS_TM4C123_RB1) || \
6398
defined(TARGET_IS_TM4C129_RA0) || \
6399
defined(TARGET_IS_TM4C129_RA1)
6400
#define ROM_USBEndpointDMADisable \
6401
((void (*)(uint32_t ui32Base, \
6402
uint32_t ui32Endpoint, \
6403
uint32_t ui32Flags))ROM_USBTABLE[43])
6404
#endif
6405
#if defined(TARGET_IS_TM4C123_RA1) || \
6406
defined(TARGET_IS_TM4C123_RA3) || \
6407
defined(TARGET_IS_TM4C123_RB1) || \
6408
defined(TARGET_IS_TM4C129_RA0) || \
6409
defined(TARGET_IS_TM4C129_RA1)
6410
#define ROM_USBEndpointDataAvail \
6411
((uint32_t (*)(uint32_t ui32Base, \
6412
uint32_t ui32Endpoint))ROM_USBTABLE[44])
6413
#endif
6414
#if defined(TARGET_IS_TM4C129_RA1)
6415
#define ROM_USBOTGHostRequest \
6416
((void (*)(uint32_t ui32Base, \
6417
bool bHNP))ROM_USBTABLE[45])
6418
#endif
6419
#if defined(TARGET_IS_TM4C123_RA1) || \
6420
defined(TARGET_IS_TM4C123_RA3) || \
6421
defined(TARGET_IS_TM4C123_RB1) || \
6422
defined(TARGET_IS_TM4C129_RA0) || \
6423
defined(TARGET_IS_TM4C129_RA1)
6424
#define ROM_USBModeGet \
6425
((uint32_t (*)(uint32_t ui32Base))ROM_USBTABLE[46])
6426
#endif
6427
#if defined(TARGET_IS_TM4C123_RA1) || \
6428
defined(TARGET_IS_TM4C123_RA3) || \
6429
defined(TARGET_IS_TM4C123_RB1) || \
6430
defined(TARGET_IS_TM4C129_RA0) || \
6431
defined(TARGET_IS_TM4C129_RA1)
6432
#define ROM_USBEndpointDMAChannel \
6433
((void (*)(uint32_t ui32Base, \
6434
uint32_t ui32Endpoint, \
6435
uint32_t ui32Channel))ROM_USBTABLE[47])
6436
#endif
6437
#if defined(TARGET_IS_TM4C123_RA1) || \
6438
defined(TARGET_IS_TM4C123_RA3) || \
6439
defined(TARGET_IS_TM4C123_RB1) || \
6440
defined(TARGET_IS_TM4C129_RA0) || \
6441
defined(TARGET_IS_TM4C129_RA1)
6442
#define ROM_USBIntDisableControl \
6443
((void (*)(uint32_t ui32Base, \
6444
uint32_t ui32IntFlags))ROM_USBTABLE[48])
6445
#endif
6446
#if defined(TARGET_IS_TM4C123_RA1) || \
6447
defined(TARGET_IS_TM4C123_RA3) || \
6448
defined(TARGET_IS_TM4C123_RB1) || \
6449
defined(TARGET_IS_TM4C129_RA0) || \
6450
defined(TARGET_IS_TM4C129_RA1)
6451
#define ROM_USBIntEnableControl \
6452
((void (*)(uint32_t ui32Base, \
6453
uint32_t ui32IntFlags))ROM_USBTABLE[49])
6454
#endif
6455
#if defined(TARGET_IS_TM4C123_RA1) || \
6456
defined(TARGET_IS_TM4C123_RA3) || \
6457
defined(TARGET_IS_TM4C123_RB1) || \
6458
defined(TARGET_IS_TM4C129_RA0) || \
6459
defined(TARGET_IS_TM4C129_RA1)
6460
#define ROM_USBIntStatusControl \
6461
((uint32_t (*)(uint32_t ui32Base))ROM_USBTABLE[50])
6462
#endif
6463
#if defined(TARGET_IS_TM4C123_RA1) || \
6464
defined(TARGET_IS_TM4C123_RA3) || \
6465
defined(TARGET_IS_TM4C123_RB1) || \
6466
defined(TARGET_IS_TM4C129_RA0) || \
6467
defined(TARGET_IS_TM4C129_RA1)
6468
#define ROM_USBIntDisableEndpoint \
6469
((void (*)(uint32_t ui32Base, \
6470
uint32_t ui32IntFlags))ROM_USBTABLE[51])
6471
#endif
6472
#if defined(TARGET_IS_TM4C123_RA1) || \
6473
defined(TARGET_IS_TM4C123_RA3) || \
6474
defined(TARGET_IS_TM4C123_RB1) || \
6475
defined(TARGET_IS_TM4C129_RA0) || \
6476
defined(TARGET_IS_TM4C129_RA1)
6477
#define ROM_USBIntEnableEndpoint \
6478
((void (*)(uint32_t ui32Base, \
6479
uint32_t ui32IntFlags))ROM_USBTABLE[52])
6480
#endif
6481
#if defined(TARGET_IS_TM4C123_RA1) || \
6482
defined(TARGET_IS_TM4C123_RA3) || \
6483
defined(TARGET_IS_TM4C123_RB1) || \
6484
defined(TARGET_IS_TM4C129_RA0) || \
6485
defined(TARGET_IS_TM4C129_RA1)
6486
#define ROM_USBIntStatusEndpoint \
6487
((uint32_t (*)(uint32_t ui32Base))ROM_USBTABLE[53])
6488
#endif
6489
#if defined(TARGET_IS_TM4C123_RA1) || \
6490
defined(TARGET_IS_TM4C123_RA3) || \
6491
defined(TARGET_IS_TM4C123_RB1) || \
6492
defined(TARGET_IS_TM4C129_RA0) || \
6493
defined(TARGET_IS_TM4C129_RA1)
6494
#define ROM_USBHostMode \
6495
((void (*)(uint32_t ui32Base))ROM_USBTABLE[54])
6496
#endif
6497
#if defined(TARGET_IS_TM4C123_RA1) || \
6498
defined(TARGET_IS_TM4C123_RA3) || \
6499
defined(TARGET_IS_TM4C123_RB1) || \
6500
defined(TARGET_IS_TM4C129_RA0) || \
6501
defined(TARGET_IS_TM4C129_RA1)
6502
#define ROM_USBDevMode \
6503
((void (*)(uint32_t ui32Base))ROM_USBTABLE[55])
6504
#endif
6505
#if defined(TARGET_IS_TM4C123_RA1) || \
6506
defined(TARGET_IS_TM4C123_RA3) || \
6507
defined(TARGET_IS_TM4C123_RB1) || \
6508
defined(TARGET_IS_TM4C129_RA0) || \
6509
defined(TARGET_IS_TM4C129_RA1)
6510
#define ROM_USBPHYPowerOff \
6511
((void (*)(uint32_t ui32Base))ROM_USBTABLE[56])
6512
#endif
6513
#if defined(TARGET_IS_TM4C123_RA1) || \
6514
defined(TARGET_IS_TM4C123_RA3) || \
6515
defined(TARGET_IS_TM4C123_RB1) || \
6516
defined(TARGET_IS_TM4C129_RA0) || \
6517
defined(TARGET_IS_TM4C129_RA1)
6518
#define ROM_USBPHYPowerOn \
6519
((void (*)(uint32_t ui32Base))ROM_USBTABLE[57])
6520
#endif
6521
#if defined(TARGET_IS_TM4C123_RA3) || \
6522
defined(TARGET_IS_TM4C123_RB1) || \
6523
defined(TARGET_IS_TM4C129_RA0) || \
6524
defined(TARGET_IS_TM4C129_RA1)
6525
#define ROM_UpdateUSB \
6526
((void (*)(uint8_t *pui8DescriptorInfo))ROM_USBTABLE[58])
6527
#endif
6528
#if defined(TARGET_IS_TM4C123_RA1) || \
6529
defined(TARGET_IS_TM4C123_RA3) || \
6530
defined(TARGET_IS_TM4C123_RB1) || \
6531
defined(TARGET_IS_TM4C129_RA0) || \
6532
defined(TARGET_IS_TM4C129_RA1)
6533
#define ROM_USBOTGMode \
6534
((void (*)(uint32_t ui32Base))ROM_USBTABLE[59])
6535
#endif
6536
#if defined(TARGET_IS_TM4C123_RB1) || \
6537
defined(TARGET_IS_TM4C129_RA0) || \
6538
defined(TARGET_IS_TM4C129_RA1)
6539
#define ROM_USBHostRequestINClear \
6540
((void (*)(uint32_t ui32Base, \
6541
uint32_t ui32Endpoint))ROM_USBTABLE[60])
6542
#endif
6543
#if defined(TARGET_IS_TM4C123_RB1) || \
6544
defined(TARGET_IS_TM4C129_RA0) || \
6545
defined(TARGET_IS_TM4C129_RA1)
6546
#define ROM_USBNumEndpointsGet \
6547
((uint32_t (*)(uint32_t ui32Base))ROM_USBTABLE[61])
6548
#endif
6549
#if defined(TARGET_IS_TM4C129_RA0) || \
6550
defined(TARGET_IS_TM4C129_RA1)
6551
#define ROM_USBClockDisable \
6552
((void (*)(uint32_t ui32Base))ROM_USBTABLE[62])
6553
#endif
6554
#if defined(TARGET_IS_TM4C129_RA0) || \
6555
defined(TARGET_IS_TM4C129_RA1)
6556
#define ROM_USBClockEnable \
6557
((void (*)(uint32_t ui32Base, \
6558
uint32_t ui32Div, \
6559
uint32_t ui32Flags))ROM_USBTABLE[63])
6560
#endif
6561
#if defined(TARGET_IS_TM4C129_RA0) || \
6562
defined(TARGET_IS_TM4C129_RA1)
6563
#define ROM_USBControllerVersion \
6564
((uint32_t (*)(uint32_t ui32Base))ROM_USBTABLE[64])
6565
#endif
6566
#if defined(TARGET_IS_TM4C129_RA0) || \
6567
defined(TARGET_IS_TM4C129_RA1)
6568
#define ROM_USBDevLPMConfig \
6569
((void (*)(uint32_t ui32Base, \
6570
uint32_t ui32Config))ROM_USBTABLE[65])
6571
#endif
6572
#if defined(TARGET_IS_TM4C129_RA0) || \
6573
defined(TARGET_IS_TM4C129_RA1)
6574
#define ROM_USBDevLPMDisable \
6575
((void (*)(uint32_t ui32Base))ROM_USBTABLE[66])
6576
#endif
6577
#if defined(TARGET_IS_TM4C123_RB1) || \
6578
defined(TARGET_IS_TM4C129_RA0) || \
6579
defined(TARGET_IS_TM4C129_RA1)
6580
#define ROM_USBDevLPMEnable \
6581
((void (*)(uint32_t ui32Base))ROM_USBTABLE[67])
6582
#endif
6583
#if defined(TARGET_IS_TM4C129_RA0) || \
6584
defined(TARGET_IS_TM4C129_RA1)
6585
#define ROM_USBDevLPMRemoteWake \
6586
((void (*)(uint32_t ui32Base))ROM_USBTABLE[68])
6587
#endif
6588
#if defined(TARGET_IS_TM4C129_RA0) || \
6589
defined(TARGET_IS_TM4C129_RA1)
6590
#define ROM_USBDevSpeedGet \
6591
((uint32_t (*)(uint32_t ui32Base))ROM_USBTABLE[69])
6592
#endif
6593
#if defined(TARGET_IS_TM4C129_RA0) || \
6594
defined(TARGET_IS_TM4C129_RA1)
6595
#define ROM_USBDMAChannelAddressGet \
6596
((void * (*)(uint32_t ui32Base, \
6597
uint32_t ui32Channel))ROM_USBTABLE[70])
6598
#endif
6599
#if defined(TARGET_IS_TM4C129_RA0) || \
6600
defined(TARGET_IS_TM4C129_RA1)
6601
#define ROM_USBDMAChannelAddressSet \
6602
((void (*)(uint32_t ui32Base, \
6603
uint32_t ui32Channel, \
6604
void *pvAddress))ROM_USBTABLE[71])
6605
#endif
6606
#if defined(TARGET_IS_TM4C129_RA0) || \
6607
defined(TARGET_IS_TM4C129_RA1)
6608
#define ROM_USBDMAChannelConfigSet \
6609
((void (*)(uint32_t ui32Base, \
6610
uint32_t ui32Channel, \
6611
uint32_t ui32Endpoint, \
6612
uint32_t ui32Config))ROM_USBTABLE[72])
6613
#endif
6614
#if defined(TARGET_IS_TM4C129_RA0) || \
6615
defined(TARGET_IS_TM4C129_RA1)
6616
#define ROM_USBDMAChannelDisable \
6617
((void (*)(uint32_t ui32Base, \
6618
uint32_t ui32Channel))ROM_USBTABLE[73])
6619
#endif
6620
#if defined(TARGET_IS_TM4C129_RA0) || \
6621
defined(TARGET_IS_TM4C129_RA1)
6622
#define ROM_USBDMAChannelEnable \
6623
((void (*)(uint32_t ui32Base, \
6624
uint32_t ui32Channel))ROM_USBTABLE[74])
6625
#endif
6626
#if defined(TARGET_IS_TM4C129_RA0) || \
6627
defined(TARGET_IS_TM4C129_RA1)
6628
#define ROM_USBDMAChannelIntDisable \
6629
((void (*)(uint32_t ui32Base, \
6630
uint32_t ui32Channel))ROM_USBTABLE[75])
6631
#endif
6632
#if defined(TARGET_IS_TM4C129_RA0) || \
6633
defined(TARGET_IS_TM4C129_RA1)
6634
#define ROM_USBDMAChannelIntEnable \
6635
((void (*)(uint32_t ui32Base, \
6636
uint32_t ui32Channel))ROM_USBTABLE[76])
6637
#endif
6638
#if defined(TARGET_IS_TM4C129_RA0) || \
6639
defined(TARGET_IS_TM4C129_RA1)
6640
#define ROM_USBDMAChannelCountGet \
6641
((uint32_t (*)(uint32_t ui32Base, \
6642
uint32_t ui32Channel))ROM_USBTABLE[77])
6643
#endif
6644
#if defined(TARGET_IS_TM4C129_RA0) || \
6645
defined(TARGET_IS_TM4C129_RA1)
6646
#define ROM_USBDMAChannelCountSet \
6647
((void (*)(uint32_t ui32Base, \
6648
uint32_t ui32Count, \
6649
uint32_t ui32Channel))ROM_USBTABLE[78])
6650
#endif
6651
#if defined(TARGET_IS_TM4C129_RA0) || \
6652
defined(TARGET_IS_TM4C129_RA1)
6653
#define ROM_USBDMAChannelIntStatus \
6654
((uint32_t (*)(uint32_t ui32Base))ROM_USBTABLE[79])
6655
#endif
6656
#if defined(TARGET_IS_TM4C129_RA0) || \
6657
defined(TARGET_IS_TM4C129_RA1)
6658
#define ROM_USBDMAChannelStatus \
6659
((uint32_t (*)(uint32_t ui32Base, \
6660
uint32_t ui32Channel))ROM_USBTABLE[80])
6661
#endif
6662
#if defined(TARGET_IS_TM4C129_RA0) || \
6663
defined(TARGET_IS_TM4C129_RA1)
6664
#define ROM_USBDMAChannelStatusClear \
6665
((void (*)(uint32_t ui32Base, \
6666
uint32_t ui32Channel, \
6667
uint32_t ui32Status))ROM_USBTABLE[81])
6668
#endif
6669
#if defined(TARGET_IS_TM4C129_RA0) || \
6670
defined(TARGET_IS_TM4C129_RA1)
6671
#define ROM_USBHighSpeed \
6672
((void (*)(uint32_t ui32Base, \
6673
bool bEnable))ROM_USBTABLE[82])
6674
#endif
6675
#if defined(TARGET_IS_TM4C129_RA0) || \
6676
defined(TARGET_IS_TM4C129_RA1)
6677
#define ROM_USBHostEndpointPing \
6678
((void (*)(uint32_t ui32Base, \
6679
uint32_t ui32Endpoint, \
6680
bool bEnable))ROM_USBTABLE[83])
6681
#endif
6682
#if defined(TARGET_IS_TM4C129_RA0) || \
6683
defined(TARGET_IS_TM4C129_RA1)
6684
#define ROM_USBHostEndpointSpeed \
6685
((void (*)(uint32_t ui32Base, \
6686
uint32_t ui32Endpoint, \
6687
uint32_t ui32Flags))ROM_USBTABLE[84])
6688
#endif
6689
#if defined(TARGET_IS_TM4C129_RA0) || \
6690
defined(TARGET_IS_TM4C129_RA1)
6691
#define ROM_USBHostLPMConfig \
6692
((void (*)(uint32_t ui32Base, \
6693
uint32_t ui32ResumeTime, \
6694
uint32_t ui32Config))ROM_USBTABLE[85])
6695
#endif
6696
#if defined(TARGET_IS_TM4C129_RA0) || \
6697
defined(TARGET_IS_TM4C129_RA1)
6698
#define ROM_USBHostLPMResume \
6699
((void (*)(uint32_t ui32Base))ROM_USBTABLE[86])
6700
#endif
6701
#if defined(TARGET_IS_TM4C129_RA0) || \
6702
defined(TARGET_IS_TM4C129_RA1)
6703
#define ROM_USBHostLPMSend \
6704
((void (*)(uint32_t ui32Base, \
6705
uint32_t ui32Address, \
6706
uint32_t uiEndpoint))ROM_USBTABLE[87])
6707
#endif
6708
#if defined(TARGET_IS_TM4C129_RA0) || \
6709
defined(TARGET_IS_TM4C129_RA1)
6710
#define ROM_USBLPMIntDisable \
6711
((void (*)(uint32_t ui32Base, \
6712
uint32_t ui32Ints))ROM_USBTABLE[88])
6713
#endif
6714
#if defined(TARGET_IS_TM4C129_RA0) || \
6715
defined(TARGET_IS_TM4C129_RA1)
6716
#define ROM_USBLPMIntEnable \
6717
((void (*)(uint32_t ui32Base, \
6718
uint32_t ui32Ints))ROM_USBTABLE[89])
6719
#endif
6720
#if defined(TARGET_IS_TM4C129_RA0) || \
6721
defined(TARGET_IS_TM4C129_RA1)
6722
#define ROM_USBLPMIntStatus \
6723
((uint32_t (*)(uint32_t ui32Base))ROM_USBTABLE[90])
6724
#endif
6725
#if defined(TARGET_IS_TM4C129_RA0) || \
6726
defined(TARGET_IS_TM4C129_RA1)
6727
#define ROM_USBLPMLinkStateGet \
6728
((uint32_t (*)(uint32_t ui32Base))ROM_USBTABLE[91])
6729
#endif
6730
#if defined(TARGET_IS_TM4C129_RA0) || \
6731
defined(TARGET_IS_TM4C129_RA1)
6732
#define ROM_USBEndpointPacketCountSet \
6733
((void (*)(uint32_t ui32Base, \
6734
uint32_t ui32Endpoint, \
6735
uint32_t ui32Count))ROM_USBTABLE[92])
6736
#endif
6737
#if defined(TARGET_IS_TM4C129_RA0) || \
6738
defined(TARGET_IS_TM4C129_RA1)
6739
#define ROM_USBULPIConfig \
6740
((void (*)(uint32_t ui32Base, \
6741
uint32_t ui32Config))ROM_USBTABLE[93])
6742
#endif
6743
#if defined(TARGET_IS_TM4C129_RA0) || \
6744
defined(TARGET_IS_TM4C129_RA1)
6745
#define ROM_USBULPIDisable \
6746
((void (*)(uint32_t ui32Base))ROM_USBTABLE[94])
6747
#endif
6748
#if defined(TARGET_IS_TM4C129_RA0) || \
6749
defined(TARGET_IS_TM4C129_RA1)
6750
#define ROM_USBULPIEnable \
6751
((void (*)(uint32_t ui32Base))ROM_USBTABLE[95])
6752
#endif
6753
#if defined(TARGET_IS_TM4C129_RA0) || \
6754
defined(TARGET_IS_TM4C129_RA1)
6755
#define ROM_USBULPIRegRead \
6756
((uint8_t (*)(uint32_t ui32Base, \
6757
uint8_t ui8Reg))ROM_USBTABLE[96])
6758
#endif
6759
#if defined(TARGET_IS_TM4C129_RA0) || \
6760
defined(TARGET_IS_TM4C129_RA1)
6761
#define ROM_USBULPIRegWrite \
6762
((void (*)(uint32_t ui32Base, \
6763
uint8_t ui8Reg, \
6764
uint8_t ui8Data))ROM_USBTABLE[97])
6765
#endif
6766
#if defined(TARGET_IS_TM4C129_RA0) || \
6767
defined(TARGET_IS_TM4C129_RA1)
6768
#define ROM_USBOTGSessionRequest \
6769
((void (*)(uint32_t ui32Base, \
6770
bool bStart))ROM_USBTABLE[98])
6771
#endif
6772
#if defined(TARGET_IS_TM4C129_RA1)
6773
#define ROM_USBDMANumChannels \
6774
((uint32_t (*)(uint32_t ui32Base))ROM_USBTABLE[99])
6775
#endif
6776
#if defined(TARGET_IS_TM4C129_RA1)
6777
#define ROM_USBEndpointDMAConfigSet \
6778
((void (*)(uint32_t ui32Base, \
6779
uint32_t ui32Endpoint, \
6780
uint32_t ui32Config))ROM_USBTABLE[100])
6781
#endif
6782
#if defined(TARGET_IS_TM4C129_RA1)
6783
#define ROM_USBLPMRemoteWakeEnabled \
6784
((bool (*)(uint32_t ui32Base))ROM_USBTABLE[102])
6785
#endif
6786
#if defined(TARGET_IS_TM4C129_RA0) || \
6787
defined(TARGET_IS_TM4C129_RA1)
6788
#define ROM_USBModeConfig \
6789
((void (*)(uint32_t ui32Base, \
6790
uint32_t ui32Mode))ROM_USBTABLE[103])
6791
#endif
6792
6793
//*****************************************************************************
6794
//
6795
// Macros for calling ROM functions in the Watchdog API.
6796
//
6797
//*****************************************************************************
6798
#if defined(TARGET_IS_TM4C123_RA1) || \
6799
defined(TARGET_IS_TM4C123_RA3) || \
6800
defined(TARGET_IS_TM4C123_RB1) || \
6801
defined(TARGET_IS_TM4C129_RA0) || \
6802
defined(TARGET_IS_TM4C129_RA1)
6803
#define ROM_WatchdogIntClear \
6804
((void (*)(uint32_t ui32Base))ROM_WATCHDOGTABLE[0])
6805
#endif
6806
#if defined(TARGET_IS_TM4C123_RA1) || \
6807
defined(TARGET_IS_TM4C123_RA3) || \
6808
defined(TARGET_IS_TM4C123_RB1) || \
6809
defined(TARGET_IS_TM4C129_RA0) || \
6810
defined(TARGET_IS_TM4C129_RA1)
6811
#define ROM_WatchdogRunning \
6812
((bool (*)(uint32_t ui32Base))ROM_WATCHDOGTABLE[1])
6813
#endif
6814
#if defined(TARGET_IS_TM4C123_RA1) || \
6815
defined(TARGET_IS_TM4C123_RA3) || \
6816
defined(TARGET_IS_TM4C123_RB1) || \
6817
defined(TARGET_IS_TM4C129_RA0) || \
6818
defined(TARGET_IS_TM4C129_RA1)
6819
#define ROM_WatchdogEnable \
6820
((void (*)(uint32_t ui32Base))ROM_WATCHDOGTABLE[2])
6821
#endif
6822
#if defined(TARGET_IS_TM4C123_RA1) || \
6823
defined(TARGET_IS_TM4C123_RA3) || \
6824
defined(TARGET_IS_TM4C123_RB1) || \
6825
defined(TARGET_IS_TM4C129_RA0) || \
6826
defined(TARGET_IS_TM4C129_RA1)
6827
#define ROM_WatchdogResetEnable \
6828
((void (*)(uint32_t ui32Base))ROM_WATCHDOGTABLE[3])
6829
#endif
6830
#if defined(TARGET_IS_TM4C123_RA1) || \
6831
defined(TARGET_IS_TM4C123_RA3) || \
6832
defined(TARGET_IS_TM4C123_RB1) || \
6833
defined(TARGET_IS_TM4C129_RA0) || \
6834
defined(TARGET_IS_TM4C129_RA1)
6835
#define ROM_WatchdogResetDisable \
6836
((void (*)(uint32_t ui32Base))ROM_WATCHDOGTABLE[4])
6837
#endif
6838
#if defined(TARGET_IS_TM4C123_RA1) || \
6839
defined(TARGET_IS_TM4C123_RA3) || \
6840
defined(TARGET_IS_TM4C123_RB1) || \
6841
defined(TARGET_IS_TM4C129_RA0) || \
6842
defined(TARGET_IS_TM4C129_RA1)
6843
#define ROM_WatchdogLock \
6844
((void (*)(uint32_t ui32Base))ROM_WATCHDOGTABLE[5])
6845
#endif
6846
#if defined(TARGET_IS_TM4C123_RA1) || \
6847
defined(TARGET_IS_TM4C123_RA3) || \
6848
defined(TARGET_IS_TM4C123_RB1) || \
6849
defined(TARGET_IS_TM4C129_RA0) || \
6850
defined(TARGET_IS_TM4C129_RA1)
6851
#define ROM_WatchdogUnlock \
6852
((void (*)(uint32_t ui32Base))ROM_WATCHDOGTABLE[6])
6853
#endif
6854
#if defined(TARGET_IS_TM4C123_RA1) || \
6855
defined(TARGET_IS_TM4C123_RA3) || \
6856
defined(TARGET_IS_TM4C123_RB1) || \
6857
defined(TARGET_IS_TM4C129_RA0) || \
6858
defined(TARGET_IS_TM4C129_RA1)
6859
#define ROM_WatchdogLockState \
6860
((bool (*)(uint32_t ui32Base))ROM_WATCHDOGTABLE[7])
6861
#endif
6862
#if defined(TARGET_IS_TM4C123_RA1) || \
6863
defined(TARGET_IS_TM4C123_RA3) || \
6864
defined(TARGET_IS_TM4C123_RB1) || \
6865
defined(TARGET_IS_TM4C129_RA0) || \
6866
defined(TARGET_IS_TM4C129_RA1)
6867
#define ROM_WatchdogReloadSet \
6868
((void (*)(uint32_t ui32Base, \
6869
uint32_t ui32LoadVal))ROM_WATCHDOGTABLE[8])
6870
#endif
6871
#if defined(TARGET_IS_TM4C123_RA1) || \
6872
defined(TARGET_IS_TM4C123_RA3) || \
6873
defined(TARGET_IS_TM4C123_RB1) || \
6874
defined(TARGET_IS_TM4C129_RA0) || \
6875
defined(TARGET_IS_TM4C129_RA1)
6876
#define ROM_WatchdogReloadGet \
6877
((uint32_t (*)(uint32_t ui32Base))ROM_WATCHDOGTABLE[9])
6878
#endif
6879
#if defined(TARGET_IS_TM4C123_RA1) || \
6880
defined(TARGET_IS_TM4C123_RA3) || \
6881
defined(TARGET_IS_TM4C123_RB1) || \
6882
defined(TARGET_IS_TM4C129_RA0) || \
6883
defined(TARGET_IS_TM4C129_RA1)
6884
#define ROM_WatchdogValueGet \
6885
((uint32_t (*)(uint32_t ui32Base))ROM_WATCHDOGTABLE[10])
6886
#endif
6887
#if defined(TARGET_IS_TM4C123_RA1) || \
6888
defined(TARGET_IS_TM4C123_RA3) || \
6889
defined(TARGET_IS_TM4C123_RB1) || \
6890
defined(TARGET_IS_TM4C129_RA0) || \
6891
defined(TARGET_IS_TM4C129_RA1)
6892
#define ROM_WatchdogIntEnable \
6893
((void (*)(uint32_t ui32Base))ROM_WATCHDOGTABLE[11])
6894
#endif
6895
#if defined(TARGET_IS_TM4C123_RA1) || \
6896
defined(TARGET_IS_TM4C123_RA3) || \
6897
defined(TARGET_IS_TM4C123_RB1) || \
6898
defined(TARGET_IS_TM4C129_RA0) || \
6899
defined(TARGET_IS_TM4C129_RA1)
6900
#define ROM_WatchdogIntStatus \
6901
((uint32_t (*)(uint32_t ui32Base, \
6902
bool bMasked))ROM_WATCHDOGTABLE[12])
6903
#endif
6904
#if defined(TARGET_IS_TM4C123_RA1) || \
6905
defined(TARGET_IS_TM4C123_RA3) || \
6906
defined(TARGET_IS_TM4C123_RB1) || \
6907
defined(TARGET_IS_TM4C129_RA0) || \
6908
defined(TARGET_IS_TM4C129_RA1)
6909
#define ROM_WatchdogStallEnable \
6910
((void (*)(uint32_t ui32Base))ROM_WATCHDOGTABLE[13])
6911
#endif
6912
#if defined(TARGET_IS_TM4C123_RA1) || \
6913
defined(TARGET_IS_TM4C123_RA3) || \
6914
defined(TARGET_IS_TM4C123_RB1) || \
6915
defined(TARGET_IS_TM4C129_RA0) || \
6916
defined(TARGET_IS_TM4C129_RA1)
6917
#define ROM_WatchdogStallDisable \
6918
((void (*)(uint32_t ui32Base))ROM_WATCHDOGTABLE[14])
6919
#endif
6920
#if defined(TARGET_IS_TM4C123_RA1) || \
6921
defined(TARGET_IS_TM4C123_RA3) || \
6922
defined(TARGET_IS_TM4C123_RB1) || \
6923
defined(TARGET_IS_TM4C129_RA0) || \
6924
defined(TARGET_IS_TM4C129_RA1)
6925
#define ROM_WatchdogIntTypeSet \
6926
((void (*)(uint32_t ui32Base, \
6927
uint32_t ui32Type))ROM_WATCHDOGTABLE[15])
6928
#endif
6929
6930
//*****************************************************************************
6931
//
6932
// Macros for calling ROM functions in the Software API.
6933
//
6934
//*****************************************************************************
6935
#if defined(TARGET_IS_TM4C123_RA1) || \
6936
defined(TARGET_IS_TM4C123_RA3) || \
6937
defined(TARGET_IS_TM4C123_RB1) || \
6938
defined(TARGET_IS_TM4C129_RA0) || \
6939
defined(TARGET_IS_TM4C129_RA1)
6940
#define ROM_Crc16Array \
6941
((uint16_t (*)(uint32_t ui32WordLen, \
6942
const uint32_t *pui32Data))ROM_SOFTWARETABLE[1])
6943
#endif
6944
#if defined(TARGET_IS_TM4C123_RA1) || \
6945
defined(TARGET_IS_TM4C123_RA3) || \
6946
defined(TARGET_IS_TM4C123_RB1) || \
6947
defined(TARGET_IS_TM4C129_RA0) || \
6948
defined(TARGET_IS_TM4C129_RA1)
6949
#define ROM_Crc16Array3 \
6950
((void (*)(uint32_t ui32WordLen, \
6951
const uint32_t *pui32Data, \
6952
uint16_t *pui16Crc3))ROM_SOFTWARETABLE[2])
6953
#endif
6954
#if defined(TARGET_IS_TM4C123_RA1) || \
6955
defined(TARGET_IS_TM4C123_RA3) || \
6956
defined(TARGET_IS_TM4C123_RB1) || \
6957
defined(TARGET_IS_TM4C129_RA0) || \
6958
defined(TARGET_IS_TM4C129_RA1)
6959
#define ROM_Crc16 \
6960
((uint16_t (*)(uint16_t ui16Crc, \
6961
const uint8_t *pui8Data, \
6962
uint32_t ui32Count))ROM_SOFTWARETABLE[3])
6963
#endif
6964
#if defined(TARGET_IS_TM4C123_RA1) || \
6965
defined(TARGET_IS_TM4C123_RA3) || \
6966
defined(TARGET_IS_TM4C123_RB1) || \
6967
defined(TARGET_IS_TM4C129_RA0) || \
6968
defined(TARGET_IS_TM4C129_RA1)
6969
#define ROM_Crc8CCITT \
6970
((uint8_t (*)(uint8_t ui8Crc, \
6971
const uint8_t *pui8Data, \
6972
uint32_t ui32Count))ROM_SOFTWARETABLE[4])
6973
#endif
6974
#if defined(TARGET_IS_TM4C129_RA0) || \
6975
defined(TARGET_IS_TM4C129_RA1)
6976
#define ROM_Crc32 \
6977
((uint32_t (*)(uint32_t ui32Crc, \
6978
const uint8_t *pui8Data, \
6979
uint32_t ui32Count))ROM_SOFTWARETABLE[5])
6980
#endif
6981
#if defined(TARGET_IS_TM4C123_RA1) || \
6982
defined(TARGET_IS_TM4C123_RA3) || \
6983
defined(TARGET_IS_TM4C123_RB1) || \
6984
defined(TARGET_IS_TM4C129_RA0) || \
6985
defined(TARGET_IS_TM4C129_RA1)
6986
#define ROM_pvAESTable \
6987
((void *)&(ROM_SOFTWARETABLE[7]))
6988
#endif
6989
6990
#endif // __DRIVERLIB_ROM_H__
driverlib
rom.h
Generated on Fri Mar 13 2015 21:18:37 for EE445M RTOS by
1.8.9.1
1.8.9.1 
