40 #ifndef __DRIVERLIB_SSI_H__
41 #define __DRIVERLIB_SSI_H__
60 #define SSI_TXEOT 0x00000040 // Transmit FIFO is empty
61 #define SSI_DMATX 0x00000020 // DMA Transmit complete
62 #define SSI_DMARX 0x00000010 // DMA Receive complete
63 #define SSI_TXFF 0x00000008 // TX FIFO half full or less
64 #define SSI_RXFF 0x00000004 // RX FIFO half full or more
65 #define SSI_RXTO 0x00000002 // RX timeout
66 #define SSI_RXOR 0x00000001 // RX overrun
73 #define SSI_FRF_MOTO_MODE_0 0x00000000 // Moto fmt, polarity 0, phase 0
74 #define SSI_FRF_MOTO_MODE_1 0x00000002 // Moto fmt, polarity 0, phase 1
75 #define SSI_FRF_MOTO_MODE_2 0x00000001 // Moto fmt, polarity 1, phase 0
76 #define SSI_FRF_MOTO_MODE_3 0x00000003 // Moto fmt, polarity 1, phase 1
77 #define SSI_FRF_TI 0x00000010 // TI frame format
78 #define SSI_FRF_NMW 0x00000020 // National MicroWire frame format
80 #define SSI_MODE_MASTER 0x00000000 // SSI master
81 #define SSI_MODE_SLAVE 0x00000001 // SSI slave
82 #define SSI_MODE_SLAVE_OD 0x00000002 // SSI slave with output disabled
89 #define SSI_DMA_TX 0x00000002 // Enable DMA for transmit
90 #define SSI_DMA_RX 0x00000001 // Enable DMA for receive
98 #define SSI_CLOCK_SYSTEM 0x00000000
99 #define SSI_CLOCK_PIOSC 0x00000005
106 #define SSI_ADV_MODE_LEGACY 0x00000000
107 #define SSI_ADV_MODE_READ_WRITE 0x000001c0
108 #define SSI_ADV_MODE_WRITE 0x000000c0
109 #define SSI_ADV_MODE_BI_READ 0x00000140
110 #define SSI_ADV_MODE_BI_WRITE 0x00000040
111 #define SSI_ADV_MODE_QUAD_READ 0x00000180
112 #define SSI_ADV_MODE_QUAD_WRITE 0x00000080
120 uint32_t ui32Protocol, uint32_t ui32Mode,
121 uint32_t ui32BitRate,
122 uint32_t ui32DataWidth);
123 extern void SSIDataGet(uint32_t ui32Base, uint32_t *pui32Data);
125 uint32_t *pui32Data);
126 extern void SSIDataPut(uint32_t ui32Base, uint32_t ui32Data);
129 extern void SSIEnable(uint32_t ui32Base);
130 extern void SSIIntClear(uint32_t ui32Base, uint32_t ui32IntFlags);
131 extern void SSIIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags);
132 extern void SSIIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags);
133 extern void SSIIntRegister(uint32_t ui32Base,
void (*pfnHandler)(
void));
134 extern uint32_t
SSIIntStatus(uint32_t ui32Base,
bool bMasked);
136 extern void SSIDMAEnable(uint32_t ui32Base, uint32_t ui32DMAFlags);
137 extern void SSIDMADisable(uint32_t ui32Base, uint32_t ui32DMAFlags);
138 extern bool SSIBusy(uint32_t ui32Base);
141 extern void SSIAdvModeSet(uint32_t ui32Base, uint32_t ui32Mode);
157 #endif // __DRIVERLIB_SSI_H__
uint32_t SSIIntStatus(uint32_t ui32Base, bool bMasked)
void SSIIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags)
void SSIIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags)
void SSIDataGet(uint32_t ui32Base, uint32_t *pui32Data)
void SSIClockSourceSet(uint32_t ui32Base, uint32_t ui32Source)
int32_t SSIDataPutNonBlocking(uint32_t ui32Base, uint32_t ui32Data)
void SSIDisable(uint32_t ui32Base)
uint32_t SSIClockSourceGet(uint32_t ui32Base)
void SSIAdvFrameHoldEnable(uint32_t ui32Base)
void SSIEnable(uint32_t ui32Base)
int32_t SSIDataGetNonBlocking(uint32_t ui32Base, uint32_t *pui32Data)
void SSIDataPut(uint32_t ui32Base, uint32_t ui32Data)
void SSIAdvFrameHoldDisable(uint32_t ui32Base)
void SSIIntRegister(uint32_t ui32Base, void(*pfnHandler)(void))
void SSIAdvDataPutFrameEnd(uint32_t ui32Base, uint32_t ui32Data)
bool SSIBusy(uint32_t ui32Base)
void SSIIntUnregister(uint32_t ui32Base)
void SSIDMADisable(uint32_t ui32Base, uint32_t ui32DMAFlags)
void SSIConfigSetExpClk(uint32_t ui32Base, uint32_t ui32SSIClk, uint32_t ui32Protocol, uint32_t ui32Mode, uint32_t ui32BitRate, uint32_t ui32DataWidth)
int32_t SSIAdvDataPutFrameEndNonBlocking(uint32_t ui32Base, uint32_t ui32Data)
void SSIIntClear(uint32_t ui32Base, uint32_t ui32IntFlags)
void SSIAdvModeSet(uint32_t ui32Base, uint32_t ui32Mode)
void SSIDMAEnable(uint32_t ui32Base, uint32_t ui32DMAFlags)