40 #ifndef __DRIVERLIB_CRC_H__
41 #define __DRIVERLIB_CRC_H__
60 #define CRC_CFG_INIT_SEED 0x00000000 // Initialize with seed
61 #define CRC_CFG_INIT_0 0x00004000 // Initialize to all '0s'
62 #define CRC_CFG_INIT_1 0x00006000 // Initialize to all '1s'
63 #define CRC_CFG_SIZE_8BIT 0x00001000 // Input Data Size
64 #define CRC_CFG_SIZE_32BIT 0x00000000 // Input Data Size
65 #define CRC_CFG_RESINV 0x00000200 // Result Inverse Enable
66 #define CRC_CFG_OBR 0x00000100 // Output Reverse Enable
67 #define CRC_CFG_IBR 0x00000080 // Bit reverse enable
68 #define CRC_CFG_ENDIAN_SBHW 0x00000000 // Swap byte in half-word
69 #define CRC_CFG_ENDIAN_SHW 0x00000010 // Swap half-word
70 #define CRC_CFG_TYPE_P8005 0x00000000 // Polynomial 0x8005
71 #define CRC_CFG_TYPE_P1021 0x00000001 // Polynomial 0x1021
72 #define CRC_CFG_TYPE_P4C11DB7 0x00000002 // Polynomial 0x4C11DB7
73 #define CRC_CFG_TYPE_P1EDC6F41 0x00000003 // Polynomial 0x1EDC6F41
74 #define CRC_CFG_TYPE_TCPCHKSUM 0x00000008 // TCP checksum
82 extern void ECClockGatingReqest(uint32_t ui32Base, uint32_t ui32ECIP,
85 extern void CRCConfigSet(uint32_t ui32Base, uint32_t ui32CRCConfig);
86 extern uint32_t
CRCDataProcess(uint32_t ui32Base, uint32_t *pui32DataIn,
87 uint32_t ui32DataLength,
bool bPPResult);
88 extern void CRCDataWrite(uint32_t ui32Base, uint32_t ui32Data);
89 extern uint32_t
CRCResultRead(uint32_t ui32Base,
bool bPPResult);
90 extern void CRCSeedSet(uint32_t ui32Base, uint32_t ui32Seed);
101 #endif // __DRIVERLIB_CRC_H__
void CRCConfigSet(uint32_t ui32Base, uint32_t ui32CRCConfig)
uint32_t CRCDataProcess(uint32_t ui32Base, uint32_t *pui32DataIn, uint32_t ui32DataLength, bool bPPResult)
uint32_t CRCResultRead(uint32_t ui32Base, bool bPPResult)
void CRCDataWrite(uint32_t ui32Base, uint32_t ui32Data)
void CRCSeedSet(uint32_t ui32Base, uint32_t ui32Seed)