EE445M RTOS
Taken at the University of Texas Spring 2015
epi.h
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1 //*****************************************************************************
2 //
3 // epi.h - Prototypes and macros for the EPI module.
4 //
5 // Copyright (c) 2008-2014 Texas Instruments Incorporated. All rights reserved.
6 // Software License Agreement
7 //
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34 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 //
36 // This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
37 //
38 //*****************************************************************************
39 
40 #ifndef __DRIVERLIB_EPI_H__
41 #define __DRIVERLIB_EPI_H__
42 
43 //*****************************************************************************
44 //
45 // If building with a C++ compiler, make all of the definitions in this header
46 // have a C binding.
47 //
48 //*****************************************************************************
49 #ifdef __cplusplus
50 extern "C"
51 {
52 #endif
53 
54 //*****************************************************************************
55 //
56 // Values that can be passed to EPIModeSet()
57 //
58 //*****************************************************************************
59 #define EPI_MODE_GENERAL 0x00000010
60 #define EPI_MODE_SDRAM 0x00000011
61 #define EPI_MODE_HB8 0x00000012
62 #define EPI_MODE_HB16 0x00000013
63 #define EPI_MODE_DISABLE 0x00000000
64 
65 //*****************************************************************************
66 //
67 // Values that can be passed to EPIConfigSDRAMSet()
68 //
69 //*****************************************************************************
70 #define EPI_SDRAM_CORE_FREQ_0_15 \
71  0x00000000
72 #define EPI_SDRAM_CORE_FREQ_15_30 \
73  0x40000000
74 #define EPI_SDRAM_CORE_FREQ_30_50 \
75  0x80000000
76 #define EPI_SDRAM_CORE_FREQ_50_100 \
77  0xC0000000
78 #define EPI_SDRAM_LOW_POWER 0x00000200
79 #define EPI_SDRAM_FULL_POWER 0x00000000
80 #define EPI_SDRAM_SIZE_64MBIT 0x00000000
81 #define EPI_SDRAM_SIZE_128MBIT 0x00000001
82 #define EPI_SDRAM_SIZE_256MBIT 0x00000002
83 #define EPI_SDRAM_SIZE_512MBIT 0x00000003
84 
85 //*****************************************************************************
86 //
87 // Values that can be passed to EPIConfigGPModeSet()
88 //
89 //*****************************************************************************
90 #define EPI_GPMODE_CLKPIN 0x80000000
91 #define EPI_GPMODE_CLKGATE 0x40000000
92 #define EPI_GPMODE_FRAME50 0x04000000
93 #define EPI_GPMODE_WRITE2CYCLE 0x00080000
94 #define EPI_GPMODE_ASIZE_NONE 0x00000000
95 #define EPI_GPMODE_ASIZE_4 0x00000010
96 #define EPI_GPMODE_ASIZE_12 0x00000020
97 #define EPI_GPMODE_ASIZE_20 0x00000030
98 #define EPI_GPMODE_DSIZE_8 0x00000000
99 #define EPI_GPMODE_DSIZE_16 0x00000001
100 #define EPI_GPMODE_DSIZE_24 0x00000002
101 #define EPI_GPMODE_DSIZE_32 0x00000003
102 
103 //*****************************************************************************
104 //
105 // Values that can be passed to EPIConfigHB8ModeSet()
106 //
107 //*****************************************************************************
108 #define EPI_HB8_USE_TXEMPTY 0x00800000
109 #define EPI_HB8_USE_RXFULL 0x00400000
110 #define EPI_HB8_WRHIGH 0x00200000
111 #define EPI_HB8_RDHIGH 0x00100000
112 #define EPI_HB8_ALE_HIGH 0x00080000
113 #define EPI_HB8_ALE_LOW 0x00000000
114 #define EPI_HB8_WRWAIT_0 0x00000000
115 #define EPI_HB8_WRWAIT_1 0x00000040
116 #define EPI_HB8_WRWAIT_2 0x00000080
117 #define EPI_HB8_WRWAIT_3 0x000000C0
118 #define EPI_HB8_RDWAIT_0 0x00000000
119 #define EPI_HB8_RDWAIT_1 0x00000010
120 #define EPI_HB8_RDWAIT_2 0x00000020
121 #define EPI_HB8_RDWAIT_3 0x00000030
122 #define EPI_HB8_MODE_ADMUX 0x00000000
123 #define EPI_HB8_MODE_ADDEMUX 0x00000001
124 #define EPI_HB8_MODE_SRAM 0x00000002
125 #define EPI_HB8_MODE_FIFO 0x00000003
126 #define EPI_HB8_WORD_ACCESS 0x00000100
127 #define EPI_HB8_CSCFG_ALE 0x00000000
128 #define EPI_HB8_CSCFG_CS 0x00000200
129 #define EPI_HB8_CSCFG_DUAL_CS 0x00000400
130 #define EPI_HB8_CSCFG_ALE_DUAL_CS \
131  0x00000600
132 #define EPI_HB8_CSCFG_ALE_SINGLE_CS \
133  0x00001000
134 #define EPI_HB8_CSCFG_QUAD_CS 0x00001200
135 #define EPI_HB8_CSCFG_ALE_QUAD_CS \
136  0x00001400
137 #define EPI_HB8_CSBAUD 0x00000800
138 #define EPI_HB8_CLOCK_GATE 0x80000000
139 #define EPI_HB8_CLOCK_GATE_IDLE \
140  0x40000000
141 #define EPI_HB8_CLOCK_INVERT 0x20000000
142 #define EPI_HB8_IN_READY_EN 0x10000000
143 #define EPI_HB8_IN_READY_EN_INVERT \
144  0x18000000
145 #define EPI_HB8_CSCFG_MASK 0x00001600
146 
147 //*****************************************************************************
148 //
149 // Values that can be passed to EPIConfigHB16ModeSet()
150 //
151 //*****************************************************************************
152 #define EPI_HB16_USE_TXEMPTY 0x00800000
153 #define EPI_HB16_USE_RXFULL 0x00400000
154 #define EPI_HB16_WRHIGH 0x00200000
155 #define EPI_HB16_RDHIGH 0x00100000
156 #define EPI_HB16_WRWAIT_0 0x00000000
157 #define EPI_HB16_WRWAIT_1 0x00000040
158 #define EPI_HB16_WRWAIT_2 0x00000080
159 #define EPI_HB16_WRWAIT_3 0x000000C0
160 #define EPI_HB16_RDWAIT_0 0x00000000
161 #define EPI_HB16_RDWAIT_1 0x00000010
162 #define EPI_HB16_RDWAIT_2 0x00000020
163 #define EPI_HB16_RDWAIT_3 0x00000030
164 #define EPI_HB16_MODE_ADMUX 0x00000000
165 #define EPI_HB16_MODE_ADDEMUX 0x00000001
166 #define EPI_HB16_MODE_SRAM 0x00000002
167 #define EPI_HB16_MODE_FIFO 0x00000003
168 #define EPI_HB16_BSEL 0x00000004
169 #define EPI_HB16_WORD_ACCESS 0x00000100
170 #define EPI_HB16_CSCFG_ALE 0x00000000
171 #define EPI_HB16_CSCFG_CS 0x00000200
172 #define EPI_HB16_CSCFG_DUAL_CS 0x00000400
173 #define EPI_HB16_CSCFG_ALE_DUAL_CS \
174  0x00000600
175 #define EPI_HB16_CSCFG_ALE_SINGLE_CS \
176  0x00001000
177 #define EPI_HB16_CSCFG_QUAD_CS 0x00001200
178 #define EPI_HB16_CSCFG_ALE_QUAD_CS \
179  0x00001400
180 #define EPI_HB16_CLOCK_GATE 0x80000000
181 #define EPI_HB16_CLOCK_GATE_IDLE \
182  0x40000000
183 #define EPI_HB16_CLOCK_INVERT 0x20000000
184 #define EPI_HB16_IN_READY_EN 0x10000000
185 #define EPI_HB16_IN_READY_EN_INVERTED \
186  0x18000000
187 #define EPI_HB16_ALE_HIGH 0x00080000
188 #define EPI_HB16_ALE_LOW 0x00000000
189 #define EPI_HB16_BURST_TRAFFIC 0x00010000
190 #define EPI_HB16_CSBAUD 0x00000800
191 #define EPI_HB16_CSCFG_MASK 0x00001600
192 
193 //*****************************************************************************
194 //
195 // Values that can be passed to EPIConfigHB8TimingSet().
196 //
197 //*****************************************************************************
198 #define EPI_HB8_IN_READY_DELAY_1 \
199  0x01000000
200 #define EPI_HB8_IN_READY_DELAY_2 \
201  0x02000000
202 #define EPI_HB8_IN_READY_DELAY_3 \
203  0x03000000
204 #define EPI_HB8_CAP_WIDTH_1 0x00001000
205 #define EPI_HB8_CAP_WIDTH_2 0x00002000
206 #define EPI_HB8_WRWAIT_MINUS_DISABLE \
207  0x00000000
208 #define EPI_HB8_WRWAIT_MINUS_ENABLE \
209  0x00000010
210 #define EPI_HB8_RDWAIT_MINUS_DISABLE \
211  0x00000000
212 #define EPI_HB8_RDWAIT_MINUS_ENABLE \
213  0x00000001
214 
215 //*****************************************************************************
216 //
217 // Values that can be passed to EPIConfigHB16TimingSet().
218 //
219 //*****************************************************************************
220 #define EPI_HB16_IN_READY_DELAY_1 \
221  0x01000000
222 #define EPI_HB16_IN_READY_DELAY_2 \
223  0x02000000
224 #define EPI_HB16_IN_READY_DELAY_3 \
225  0x03000000
226 #define EPI_HB16_PSRAM_NO_LIMIT 0x00000000
227 #define EPI_HB16_PSRAM_128 0x00010000
228 #define EPI_HB16_PSRAM_256 0x00020000
229 #define EPI_HB16_PSRAM_512 0x00030000
230 #define EPI_HB16_PSRAM_1024 0x00040000
231 #define EPI_HB16_PSRAM_2048 0x00050000
232 #define EPI_HB16_PSRAM_4096 0x00060000
233 #define EPI_HB16_PSRAM_8192 0x00070000
234 #define EPI_HB16_CAP_WIDTH_1 0x00001000
235 #define EPI_HB16_CAP_WIDTH_2 0x00002000
236 #define EPI_HB16_WRWAIT_MINUS_DISABLE \
237  0x00000000
238 #define EPI_HB16_WRWAIT_MINUS_ENABLE \
239  0x00000008
240 #define EPI_HB16_RDWAIT_MINUS_DISABLE \
241  0x00000000
242 #define EPI_HB16_RDWAIT_MINUS_ENABLE \
243  0x00000001
244 
245 //*****************************************************************************
246 //
247 // Values that can be passed to EPIAddressMapSet().
248 //
249 //*****************************************************************************
250 #define EPI_ADDR_PER_SIZE_256B 0x00000000
251 #define EPI_ADDR_PER_SIZE_64KB 0x00000040
252 #define EPI_ADDR_PER_SIZE_16MB 0x00000080
253 #define EPI_ADDR_PER_SIZE_256MB 0x000000C0
254 #define EPI_ADDR_PER_BASE_NONE 0x00000000
255 #define EPI_ADDR_PER_BASE_A 0x00000010
256 #define EPI_ADDR_PER_BASE_C 0x00000020
257 #define EPI_ADDR_RAM_SIZE_256B 0x00000000
258 #define EPI_ADDR_RAM_SIZE_64KB 0x00000004
259 #define EPI_ADDR_RAM_SIZE_16MB 0x00000008
260 #define EPI_ADDR_RAM_SIZE_256MB 0x0000000C
261 #define EPI_ADDR_RAM_BASE_NONE 0x00000000
262 #define EPI_ADDR_RAM_BASE_6 0x00000001
263 #define EPI_ADDR_RAM_BASE_8 0x00000002
264 #define EPI_ADDR_QUAD_MODE 0x00000033
265 #define EPI_ADDR_CODE_SIZE_256B 0x00000000
266 #define EPI_ADDR_CODE_SIZE_64KB 0x00000400
267 #define EPI_ADDR_CODE_SIZE_16MB 0x00000800
268 #define EPI_ADDR_CODE_SIZE_256MB \
269  0x00000C00
270 #define EPI_ADDR_CODE_BASE_NONE 0x00000000
271 #define EPI_ADDR_CODE_BASE_1 0x00000100
272 
273 //*****************************************************************************
274 //
275 // Values that can be passed to EPINonBlockingReadConfigure()
276 //
277 //*****************************************************************************
278 #define EPI_NBCONFIG_SIZE_8 1
279 #define EPI_NBCONFIG_SIZE_16 2
280 #define EPI_NBCONFIG_SIZE_32 3
281 
282 //*****************************************************************************
283 //
284 // Values that can be passed to EPIFIFOConfig()
285 //
286 //*****************************************************************************
287 #define EPI_FIFO_CONFIG_WTFULLERR \
288  0x00020000
289 #define EPI_FIFO_CONFIG_RSTALLERR \
290  0x00010000
291 #define EPI_FIFO_CONFIG_TX_EMPTY \
292  0x00000000
293 #define EPI_FIFO_CONFIG_TX_1_4 0x00000020
294 #define EPI_FIFO_CONFIG_TX_1_2 0x00000030
295 #define EPI_FIFO_CONFIG_TX_3_4 0x00000040
296 #define EPI_FIFO_CONFIG_RX_1_8 0x00000001
297 #define EPI_FIFO_CONFIG_RX_1_4 0x00000002
298 #define EPI_FIFO_CONFIG_RX_1_2 0x00000003
299 #define EPI_FIFO_CONFIG_RX_3_4 0x00000004
300 #define EPI_FIFO_CONFIG_RX_7_8 0x00000005
301 #define EPI_FIFO_CONFIG_RX_FULL 0x00000006
302 
303 //*****************************************************************************
304 //
305 // Values that can be passed to EPIIntEnable(), EPIIntDisable(), or returned
306 // as flags from EPIIntStatus()
307 //
308 //*****************************************************************************
309 #define EPI_INT_DMA_TX_DONE 0x00000010
310 #define EPI_INT_DMA_RX_DONE 0x00000008
311 #define EPI_INT_TXREQ 0x00000004
312 #define EPI_INT_RXREQ 0x00000002
313 #define EPI_INT_ERR 0x00000001
314 
315 //*****************************************************************************
316 //
317 // Values that can be passed to EPIIntErrorClear(), or returned as flags from
318 // EPIIntErrorStatus()
319 //
320 //*****************************************************************************
321 #define EPI_INT_ERR_DMAWRIC 0x00000010
322 #define EPI_INT_ERR_DMARDIC 0x00000008
323 #define EPI_INT_ERR_WTFULL 0x00000004
324 #define EPI_INT_ERR_RSTALL 0x00000002
325 #define EPI_INT_ERR_TIMEOUT 0x00000001
326 
327 #ifdef rvmdk
328 //*****************************************************************************
329 //
330 // Keil case.
331 //
332 //*****************************************************************************
333 inline void
334 EPIWorkaroundWordWrite(uint32_t *pui32Addr, uint32_t ui32Value)
335 {
336  uint32_t ui32Scratch;
337 
338  __asm
339  {
340  //
341  // Add a NOP to ensure we don’t have a flash read immediately before
342  // the EPI read.
343  //
344  NOP
345 
346  //
347  // Perform the write we're actually interested in.
348  //
349  STR ui32Value, [pui32Addr]
350 
351  //
352  // Read from SRAM to ensure that we don't have an EPI write followed by
353  // a flash read.
354  //
355  LDR ui32Scratch, [__current_sp()]
356  }
357 }
358 
359 inline uint32_t
360 EPIWorkaroundWordRead(uint32_t *pui32Addr)
361 {
362  uint32_t ui32Value, ui32Scratch;
363 
364  __asm
365  {
366  //
367  // Add a NOP to ensure we don’t have a flash read immediately before
368  // the EPI read.
369  //
370  NOP
371 
372  //
373  // Perform the read we're actually interested in.
374  //
375  LDR ui32Value, [pui32Addr]
376 
377  //
378  // Read from SRAM to ensure that we don't have an EPI read followed by
379  // a flash read.
380  //
381  LDR ui32Scratch, [__current_sp()]
382  }
383 
384  return(ui32Value);
385 }
386 
387 inline void
388 EPIWorkaroundHWordWrite(uint16_t *pui16Addr, uint16_t ui16Value)
389 {
390  uint32_t ui32Scratch;
391 
392  __asm
393  {
394  //
395  // Add a NOP to ensure we don’t have a flash read immediately before
396  // the EPI read.
397  //
398  NOP
399 
400  //
401  // Perform the write we're actually interested in.
402  //
403  STRH ui16Value, [pui16Addr]
404 
405  //
406  // Read from SRAM to ensure that we don't have an EPI write followed by
407  // a flash read.
408  //
409  LDR ui32Scratch, [__current_sp()]
410  }
411 }
412 
413 inline uint16_t
414 EPIWorkaroundHWordRead(uint16_t *pui16Addr)
415 {
416  uint32_t ui32Scratch;
417  uint16_t ui16Value;
418 
419  __asm
420  {
421  //
422  // Add a NOP to ensure we don’t have a flash read immediately before
423  // the EPI read.
424  //
425  NOP
426 
427  //
428  // Perform the read we're actually interested in.
429  //
430  LDRH ui16Value, [pui16Addr]
431 
432  //
433  // Read from SRAM to ensure that we don't have an EPI read followed by
434  // a flash read.
435  //
436  LDR ui32Scratch, [__current_sp()]
437  }
438 
439  return(ui16Value);
440 }
441 
442 inline void
443 EPIWorkaroundByteWrite(uint8_t *pui8Addr, uint8_t ui8Value)
444 {
445  uint32_t ui32Scratch;
446 
447  __asm
448  {
449  //
450  // Add a NOP to ensure we don’t have a flash read immediately before
451  // the EPI read.
452  //
453  NOP
454 
455  //
456  // Perform the write we're actually interested in.
457  //
458  STRB ui8Value, [pui8Addr]
459 
460  //
461  // Read from SRAM to ensure that we don't have an EPI write followed by
462  // a flash read.
463  //
464  LDR ui32Scratch, [__current_sp()]
465  }
466 }
467 
468 inline uint8_t
469 EPIWorkaroundByteRead(uint8_t *pui8Addr)
470 {
471  uint32_t ui32Scratch;
472  uint8_t ui8Value;
473 
474  __asm
475  {
476  //
477  // Add a NOP to ensure we don’t have a flash read immediately before
478  // the EPI read.
479  //
480  NOP
481 
482  //
483  // Perform the read we're actually interested in.
484  //
485  LDRB ui8Value, [pui8Addr]
486 
487  //
488  // Read from SRAM to ensure that we don't have an EPI read followed by
489  // a flash read.
490  //
491  LDR ui32Scratch, [__current_sp()]
492  }
493 
494  return(ui8Value);
495 }
496 #endif
497 
498 #ifdef ccs
499 //*****************************************************************************
500 //
501 // Code Composer Studio versions of these functions can be found in separate
502 // source file epi_workaround_ccs.s.
503 //
504 //*****************************************************************************
505 extern void EPIWorkaroundWordWrite(uint32_t *pui32Addr, uint32_t ui32Value);
506 extern uint32_t EPIWorkaroundWordRead(uint32_t *pui32Addr);
507 extern void EPIWorkaroundHWordWrite(uint16_t *pui16Addr, uint16_t ui16Value);
508 extern uint16_t EPIWorkaroundHWordRead(uint16_t *pui16Addr);
509 extern void EPIWorkaroundByteWrite(uint8_t *pui8Addr, uint8_t ui8Value);
510 extern uint8_t EPIWorkaroundByteRead(uint8_t *pui8Addr);
511 
512 #endif
513 
514 #if (defined gcc) || (defined ewarm) || (defined sourcerygxx) || \
515  (defined codered)
516 //*****************************************************************************
517 //
518 // GCC-based toolchain and IAR case.
519 //
520 //*****************************************************************************
521 inline void
522 EPIWorkaroundWordWrite(uint32_t *pui32Addr, uint32_t ui32Value)
523 {
524  volatile register uint32_t ui32Scratch;
525 
526  __asm volatile (
527  //
528  // Add a NOP to ensure we don’t have a flash read immediately before
529  // the EPI read.
530  //
531  " NOP\n"
532  " STR %[value],[%[addr]]\n"
533  " LDR %[scratch],[sp]\n"
534  : [scratch] "=r" (ui32Scratch)
535  : [addr] "r" (pui32Addr), [value] "r" (ui32Value)
536  );
537 
538  //
539  // Keep the compiler from generating a warning.
540  //
541  ui32Scratch = ui32Scratch;
542 }
543 
544 inline uint32_t
545 EPIWorkaroundWordRead(uint32_t *pui32Addr)
546 {
547  volatile register uint32_t ui32Data, ui32Scratch;
548 
549  //
550  // ui32Scratch is not used other than to add a padding read following the
551  // "real" read.
552  //
553 
554  __asm volatile(
555  //
556  // Add a NOP to ensure we don’t have a flash read immediately before
557  // the EPI read.
558  //
559  " NOP\n"
560  " LDR %[ret],[%[addr]]\n"
561  " LDR %[scratch],[sp]\n"
562  : [ret] "=r" (ui32Data),
563  [scratch] "=r" (ui32Scratch)
564  : [addr] "r" (pui32Addr)
565  );
566 
567 
568  //
569  // Keep the compiler from generating a warning.
570  //
571  ui32Scratch = ui32Scratch;
572 
573  return(ui32Data);
574 }
575 
576 inline void
577 EPIWorkaroundHWordWrite(uint16_t *pui16Addr, uint16_t ui16Value)
578 {
579  volatile register uint32_t ui32Scratch;
580 
581  __asm volatile (
582  //
583  // Add a NOP to ensure we don’t have a flash read immediately before
584  // the EPI read.
585  //
586  " NOP\n"
587  " STRH %[value],[%[addr]]\n"
588  " LDR %[scratch],[sp]\n"
589  : [scratch] "=r" (ui32Scratch)
590  : [addr] "r" (pui16Addr), [value] "r" (ui16Value)
591  );
592 
593 
594  //
595  // Keep the compiler from generating a warning.
596  //
597  ui32Scratch = ui32Scratch;
598 }
599 
600 inline uint16_t
601 EPIWorkaroundHWordRead(uint16_t *pui16Addr)
602 {
603  register uint16_t ui16Data;
604  register uint32_t ui32Scratch;
605 
606  //
607  // ui32Scratch is not used other than to add a padding read following the
608  // "real" read.
609  //
610 
611  __asm volatile(
612  //
613  // Add a NOP to ensure we don’t have a flash read immediately before
614  // the EPI read.
615  //
616  " NOP\n"
617  " LDRH %[ret],[%[addr]]\n"
618  " LDR %[scratch],[sp]\n"
619  : [ret] "=r" (ui16Data),
620  [scratch] "=r" (ui32Scratch)
621  : [addr] "r" (pui16Addr)
622  );
623 
624  //
625  // Keep the compiler from generating a warning.
626  //
627  ui32Scratch = ui32Scratch;
628 
629  return(ui16Data);
630 }
631 
632 inline void
633 EPIWorkaroundByteWrite(uint8_t *pui8Addr, uint8_t ui8Value)
634 {
635  volatile register uint32_t ui32Scratch;
636 
637  __asm volatile (
638  //
639  // Add a NOP to ensure we don’t have a flash read immediately before
640  // the EPI read.
641  //
642  " NOP\n"
643  " STRB %[value],[%[addr]]\n"
644  " LDR %[scratch],[sp]\n"
645  : [scratch] "=r" (ui32Scratch)
646  : [addr] "r" (pui8Addr), [value] "r" (ui8Value)
647  );
648 
649  //
650  // Keep the compiler from generating a warning.
651  //
652  ui32Scratch = ui32Scratch;
653 }
654 
655 inline uint8_t
656 EPIWorkaroundByteRead(uint8_t *pui8Addr)
657 {
658  register uint8_t ui8Data;
659  register uint32_t ui32Scratch;
660 
661  //
662  // ui32Scratch is not used other than to add a padding read following the
663  // "real" read.
664  //
665 
666  __asm volatile(
667  //
668  // Add a NOP to ensure we don’t have a flash read immediately before
669  // the EPI read.
670  //
671  " NOP\n"
672  " LDRB %[ret],[%[addr]]\n"
673  " LDR %[scratch],[sp]\n"
674  : [ret] "=r" (ui8Data),
675  [scratch] "=r" (ui32Scratch)
676  : [addr] "r" (pui8Addr)
677  );
678 
679  //
680  // Keep the compiler from generating a warning.
681  //
682  ui32Scratch = ui32Scratch;
683 
684  return(ui8Data);
685 }
686 #endif
687 
688 //*****************************************************************************
689 //
690 // API Function prototypes
691 //
692 //*****************************************************************************
693 extern void EPIModeSet(uint32_t ui32Base, uint32_t ui32Mode);
694 extern void EPIDividerSet(uint32_t ui32Base, uint32_t ui32Divider);
695 extern void EPIDividerCSSet(uint32_t ui32Base, uint32_t ui32CS,
696  uint32_t ui32Divider);
697 extern void EPIDMATxCount(uint32_t ui32Base, uint32_t ui32Count);
698 extern void EPIConfigGPModeSet(uint32_t ui32Base, uint32_t ui32Config,
699  uint32_t ui32FrameCount, uint32_t ui32MaxWait);
700 extern void EPIConfigHB8Set(uint32_t ui32Base, uint32_t ui32Config,
701  uint32_t ui32MaxWait);
702 extern void EPIConfigHB16Set(uint32_t ui32Base, uint32_t ui32Config,
703  uint32_t ui32MaxWait);
704 extern void EPIConfigHB8CSSet(uint32_t ui32Base, uint32_t ui32CS,
705  uint32_t ui32Config);
706 extern void EPIConfigHB16CSSet(uint32_t ui32Base, uint32_t ui32CS,
707  uint32_t ui32Config);
708 extern void EPIConfigHB8TimingSet(uint32_t ui32Base, uint32_t ui32CS,
709  uint32_t ui32Config);
710 extern void EPIConfigHB16TimingSet(uint32_t ui32Base, uint32_t ui32CS,
711  uint32_t ui32Config);
712 extern void EPIPSRAMConfigRegSet(uint32_t ui32Base, uint32_t ui32CS,
713  uint32_t ui32CR);
714 extern void EPIPSRAMConfigRegRead(uint32_t ui32Base, uint32_t ui32CS);
715 extern bool EPIPSRAMConfigRegGetNonBlocking(uint32_t ui32Base,
716  uint32_t ui32CS,
717  uint32_t *pui32CR);
718 extern uint32_t EPIPSRAMConfigRegGet(uint32_t ui32Base, uint32_t ui32CS);
719 extern void EPIConfigSDRAMSet(uint32_t ui32Base, uint32_t ui32Config,
720  uint32_t ui32Refresh);
721 extern void EPIAddressMapSet(uint32_t ui32Base, uint32_t ui32Map);
722 extern void EPINonBlockingReadConfigure(uint32_t ui32Base,
723  uint32_t ui32Channel,
724  uint32_t ui32DataSize,
725  uint32_t ui32Address);
726 extern void EPINonBlockingReadStart(uint32_t ui32Base,
727  uint32_t ui32Channel,
728  uint32_t ui32Count);
729 extern void EPINonBlockingReadStop(uint32_t ui32Base,
730  uint32_t ui32Channel);
731 extern uint32_t EPINonBlockingReadCount(uint32_t ui32Base,
732  uint32_t ui32Channel);
733 extern uint32_t EPINonBlockingReadAvail(uint32_t ui32Base);
734 extern uint32_t EPINonBlockingReadGet32(uint32_t ui32Base,
735  uint32_t ui32Count,
736  uint32_t *pui32Buf);
737 extern uint32_t EPINonBlockingReadGet16(uint32_t ui32Base,
738  uint32_t ui32Count,
739  uint16_t *pui16Buf);
740 extern uint32_t EPINonBlockingReadGet8(uint32_t ui32Base,
741  uint32_t ui32Count,
742  uint8_t *pui8Buf);
743 extern void EPIFIFOConfig(uint32_t ui32Base, uint32_t ui32Config);
744 extern uint32_t EPIWriteFIFOCountGet(uint32_t ui32Base);
745 extern void EPIIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags);
746 extern void EPIIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags);
747 extern uint32_t EPIIntStatus(uint32_t ui32Base, bool bMasked);
748 extern uint32_t EPIIntErrorStatus(uint32_t ui32Base);
749 extern void EPIIntErrorClear(uint32_t ui32Base, uint32_t ui32ErrFlags);
750 extern void EPIIntRegister(uint32_t ui32Base, void (*pfnHandler)(void));
751 extern void EPIIntUnregister(uint32_t ui32Base);
752 
753 //*****************************************************************************
754 //
755 // Mark the end of the C bindings section for C++ compilers.
756 //
757 //*****************************************************************************
758 #ifdef __cplusplus
759 }
760 #endif
761 
762 #endif // __DRIVERLIB_EPI_H__
EPINonBlockingReadGet8
uint32_t EPINonBlockingReadGet8(uint32_t ui32Base, uint32_t ui32Count, uint8_t *pui8Buf)
Definition: epi.c:1762
EPINonBlockingReadStart
void EPINonBlockingReadStart(uint32_t ui32Base, uint32_t ui32Channel, uint32_t ui32Count)
Definition: epi.c:1512
EPIDMATxCount
void EPIDMATxCount(uint32_t ui32Base, uint32_t ui32Count)
Definition: epi.c:391
EPIConfigHB8Set
void EPIConfigHB8Set(uint32_t ui32Base, uint32_t ui32Config, uint32_t ui32MaxWait)
Definition: epi.c:569
EPIWorkaroundByteWrite
void EPIWorkaroundByteWrite(uint8_t *pui8Addr, uint8_t ui8Value)
EPIModeSet
void EPIModeSet(uint32_t ui32Base, uint32_t ui32Mode)
Definition: epi.c:252
EPIConfigHB8TimingSet
void EPIConfigHB8TimingSet(uint32_t ui32Base, uint32_t ui32CS, uint32_t ui32Config)
Definition: epi.c:958
EPINonBlockingReadConfigure
void EPINonBlockingReadConfigure(uint32_t ui32Base, uint32_t ui32Channel, uint32_t ui32DataSize, uint32_t ui32Address)
Definition: epi.c:1460
EPIConfigHB16TimingSet
void EPIConfigHB16TimingSet(uint32_t ui32Base, uint32_t ui32CS, uint32_t ui32Config)
Definition: epi.c:1033
EPINonBlockingReadGet16
uint32_t EPINonBlockingReadGet16(uint32_t ui32Base, uint32_t ui32Count, uint16_t *pui16Buf)
Definition: epi.c:1707
EPIWorkaroundWordWrite
void EPIWorkaroundWordWrite(uint32_t *pui32Addr, uint32_t ui32Value)
EPINonBlockingReadCount
uint32_t EPINonBlockingReadCount(uint32_t ui32Base, uint32_t ui32Channel)
Definition: epi.c:1584
EPIConfigHB16Set
void EPIConfigHB16Set(uint32_t ui32Base, uint32_t ui32Config, uint32_t ui32MaxWait)
Definition: epi.c:712
EPIPSRAMConfigRegSet
void EPIPSRAMConfigRegSet(uint32_t ui32Base, uint32_t ui32CS, uint32_t ui32CR)
Definition: epi.c:1072
EPIWorkaroundWordRead
uint32_t EPIWorkaroundWordRead(uint32_t *pui32Addr)
EPIWorkaroundHWordWrite
void EPIWorkaroundHWordWrite(uint16_t *pui16Addr, uint16_t ui16Value)
EPIPSRAMConfigRegGet
uint32_t EPIPSRAMConfigRegGet(uint32_t ui32Base, uint32_t ui32CS)
Definition: epi.c:1258
EPIIntErrorClear
void EPIIntErrorClear(uint32_t ui32Base, uint32_t ui32ErrFlags)
Definition: epi.c:2042
EPINonBlockingReadAvail
uint32_t EPINonBlockingReadAvail(uint32_t ui32Base)
Definition: epi.c:1620
EPINonBlockingReadStop
void EPINonBlockingReadStop(uint32_t ui32Base, uint32_t ui32Channel)
Definition: epi.c:1549
EPIConfigGPModeSet
void EPIConfigGPModeSet(uint32_t ui32Base, uint32_t ui32Config, uint32_t ui32FrameCount, uint32_t ui32MaxWait)
Definition: epi.c:1335
EPIFIFOConfig
void EPIFIFOConfig(uint32_t ui32Base, uint32_t ui32Config)
Definition: epi.c:1830
EPIIntErrorStatus
uint32_t EPIIntErrorStatus(uint32_t ui32Base)
Definition: epi.c:2005
EPIDividerCSSet
void EPIDividerCSSet(uint32_t ui32Base, uint32_t ui32CS, uint32_t ui32Divider)
Definition: epi.c:339
EPIPSRAMConfigRegGetNonBlocking
bool EPIPSRAMConfigRegGetNonBlocking(uint32_t ui32Base, uint32_t ui32CS, uint32_t *pui32CR)
Definition: epi.c:1188
EPIIntEnable
void EPIIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags)
Definition: epi.c:1892
EPIConfigSDRAMSet
void EPIConfigSDRAMSet(uint32_t ui32Base, uint32_t ui32Config, uint32_t ui32Refresh)
Definition: epi.c:444
EPIConfigHB8CSSet
void EPIConfigHB8CSSet(uint32_t ui32Base, uint32_t ui32CS, uint32_t ui32Config)
Definition: epi.c:790
EPINonBlockingReadGet32
uint32_t EPINonBlockingReadGet32(uint32_t ui32Base, uint32_t ui32Count, uint32_t *pui32Buf)
Definition: epi.c:1652
EPIWorkaroundHWordRead
uint16_t EPIWorkaroundHWordRead(uint16_t *pui16Addr)
EPIAddressMapSet
void EPIAddressMapSet(uint32_t ui32Base, uint32_t ui32Map)
Definition: epi.c:1415
EPIIntUnregister
void EPIIntUnregister(uint32_t ui32Base)
Definition: epi.c:2155
EPIIntDisable
void EPIIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags)
Definition: epi.c:1927
EPIWorkaroundByteRead
uint8_t EPIWorkaroundByteRead(uint8_t *pui8Addr)
EPIDividerSet
void EPIDividerSet(uint32_t ui32Base, uint32_t ui32Divider)
Definition: epi.c:298
EPIWriteFIFOCountGet
uint32_t EPIWriteFIFOCountGet(uint32_t ui32Base)
Definition: epi.c:1858
EPIIntRegister
void EPIIntRegister(uint32_t ui32Base, void(*pfnHandler)(void))
Definition: epi.c:2111
EPIIntStatus
uint32_t EPIIntStatus(uint32_t ui32Base, bool bMasked)
Definition: epi.c:1963
EPIConfigHB16CSSet
void EPIConfigHB16CSSet(uint32_t ui32Base, uint32_t ui32CS, uint32_t ui32Config)
Definition: epi.c:877
EPIPSRAMConfigRegRead
void EPIPSRAMConfigRegRead(uint32_t ui32Base, uint32_t ui32CS)
Definition: epi.c:1131