EE445M RTOS
Taken at the University of Texas Spring 2015
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Go to the source code of this file.
Macros | |
#define | INT_GPIOA 16 |
#define | INT_GPIOB 17 |
#define | INT_GPIOC 18 |
#define | INT_GPIOD 19 |
#define | INT_GPIOE 20 |
#define | INT_UART0 21 |
#define | INT_UART1 22 |
#define | INT_SSI0 23 |
#define | INT_I2C0 24 |
#define | INT_PWM0_FAULT 25 |
#define | INT_PWM0_0 26 |
#define | INT_PWM0_1 27 |
#define | INT_PWM0_2 28 |
#define | INT_QEI0 29 |
#define | INT_ADC0SS0 30 |
#define | INT_ADC0SS1 31 |
#define | INT_ADC0SS2 32 |
#define | INT_ADC0SS3 33 |
#define | INT_WATCHDOG 34 |
#define | INT_TIMER0A 35 |
#define | INT_TIMER0B 36 |
#define | INT_TIMER1A 37 |
#define | INT_TIMER1B 38 |
#define | INT_TIMER2A 39 |
#define | INT_TIMER2B 40 |
#define | INT_COMP0 41 |
#define | INT_COMP1 42 |
#define | INT_SYSCTL 44 |
#define | INT_FLASH 45 |
#define | INT_GPIOF 46 |
#define | INT_GPIOG 47 |
#define | INT_UART2 49 |
#define | INT_SSI1 50 |
#define | INT_TIMER3A 51 |
#define | INT_TIMER3B 52 |
#define | INT_I2C1 53 |
#define | INT_QEI1 54 |
#define | INT_CAN0 55 |
#define | INT_CAN1 56 |
#define | INT_USB0 60 |
#define | INT_PWM0_3 61 |
#define | INT_UDMA 62 |
#define | INT_UDMAERR 63 |
#define | INT_ADC1SS0 64 |
#define | INT_ADC1SS1 65 |
#define | INT_ADC1SS2 66 |
#define | INT_ADC1SS3 67 |
#define | INT_SSI2 73 |
#define | INT_SSI3 74 |
#define | INT_UART3 75 |
#define | INT_UART4 76 |
#define | INT_UART5 77 |
#define | INT_UART6 78 |
#define | INT_UART7 79 |
#define | INT_I2C2 84 |
#define | INT_I2C3 85 |
#define | INT_TIMER4A 86 |
#define | INT_TIMER4B 87 |
#define | INT_TIMER5A 108 |
#define | INT_TIMER5B 109 |
#define | INT_WTIMER0A 110 |
#define | INT_WTIMER0B 111 |
#define | INT_WTIMER1A 112 |
#define | INT_WTIMER1B 113 |
#define | INT_WTIMER2A 114 |
#define | INT_WTIMER2B 115 |
#define | INT_WTIMER3A 116 |
#define | INT_WTIMER3B 117 |
#define | INT_WTIMER4A 118 |
#define | INT_WTIMER4B 119 |
#define | INT_WTIMER5A 120 |
#define | INT_WTIMER5B 121 |
#define | INT_SYSEXC 122 |
#define | INT_I2C4 125 |
#define | INT_I2C5 126 |
#define | INT_PWM1_0 150 |
#define | INT_PWM1_1 151 |
#define | INT_PWM1_2 152 |
#define | INT_PWM1_3 153 |
#define | INT_PWM1_FAULT 154 |
#define | WATCHDOG0_LOAD_R (*((volatile uint32_t *)0x40000000)) |
#define | WATCHDOG0_VALUE_R (*((volatile uint32_t *)0x40000004)) |
#define | WATCHDOG0_CTL_R (*((volatile uint32_t *)0x40000008)) |
#define | WATCHDOG0_ICR_R (*((volatile uint32_t *)0x4000000C)) |
#define | WATCHDOG0_RIS_R (*((volatile uint32_t *)0x40000010)) |
#define | WATCHDOG0_MIS_R (*((volatile uint32_t *)0x40000014)) |
#define | WATCHDOG0_TEST_R (*((volatile uint32_t *)0x40000418)) |
#define | WATCHDOG0_LOCK_R (*((volatile uint32_t *)0x40000C00)) |
#define | WATCHDOG1_LOAD_R (*((volatile uint32_t *)0x40001000)) |
#define | WATCHDOG1_VALUE_R (*((volatile uint32_t *)0x40001004)) |
#define | WATCHDOG1_CTL_R (*((volatile uint32_t *)0x40001008)) |
#define | WATCHDOG1_ICR_R (*((volatile uint32_t *)0x4000100C)) |
#define | WATCHDOG1_RIS_R (*((volatile uint32_t *)0x40001010)) |
#define | WATCHDOG1_MIS_R (*((volatile uint32_t *)0x40001014)) |
#define | WATCHDOG1_TEST_R (*((volatile uint32_t *)0x40001418)) |
#define | WATCHDOG1_LOCK_R (*((volatile uint32_t *)0x40001C00)) |
#define | GPIO_PORTA_DATA_BITS_R ((volatile uint32_t *)0x40004000) |
#define | GPIO_PORTA_DATA_R (*((volatile uint32_t *)0x400043FC)) |
#define | GPIO_PORTA_DIR_R (*((volatile uint32_t *)0x40004400)) |
#define | GPIO_PORTA_IS_R (*((volatile uint32_t *)0x40004404)) |
#define | GPIO_PORTA_IBE_R (*((volatile uint32_t *)0x40004408)) |
#define | GPIO_PORTA_IEV_R (*((volatile uint32_t *)0x4000440C)) |
#define | GPIO_PORTA_IM_R (*((volatile uint32_t *)0x40004410)) |
#define | GPIO_PORTA_RIS_R (*((volatile uint32_t *)0x40004414)) |
#define | GPIO_PORTA_MIS_R (*((volatile uint32_t *)0x40004418)) |
#define | GPIO_PORTA_ICR_R (*((volatile uint32_t *)0x4000441C)) |
#define | GPIO_PORTA_AFSEL_R (*((volatile uint32_t *)0x40004420)) |
#define | GPIO_PORTA_DR2R_R (*((volatile uint32_t *)0x40004500)) |
#define | GPIO_PORTA_DR4R_R (*((volatile uint32_t *)0x40004504)) |
#define | GPIO_PORTA_DR8R_R (*((volatile uint32_t *)0x40004508)) |
#define | GPIO_PORTA_ODR_R (*((volatile uint32_t *)0x4000450C)) |
#define | GPIO_PORTA_PUR_R (*((volatile uint32_t *)0x40004510)) |
#define | GPIO_PORTA_PDR_R (*((volatile uint32_t *)0x40004514)) |
#define | GPIO_PORTA_SLR_R (*((volatile uint32_t *)0x40004518)) |
#define | GPIO_PORTA_DEN_R (*((volatile uint32_t *)0x4000451C)) |
#define | GPIO_PORTA_LOCK_R (*((volatile uint32_t *)0x40004520)) |
#define | GPIO_PORTA_CR_R (*((volatile uint32_t *)0x40004524)) |
#define | GPIO_PORTA_AMSEL_R (*((volatile uint32_t *)0x40004528)) |
#define | GPIO_PORTA_PCTL_R (*((volatile uint32_t *)0x4000452C)) |
#define | GPIO_PORTA_ADCCTL_R (*((volatile uint32_t *)0x40004530)) |
#define | GPIO_PORTA_DMACTL_R (*((volatile uint32_t *)0x40004534)) |
#define | GPIO_PORTB_DATA_BITS_R ((volatile uint32_t *)0x40005000) |
#define | GPIO_PORTB_DATA_R (*((volatile uint32_t *)0x400053FC)) |
#define | GPIO_PORTB_DIR_R (*((volatile uint32_t *)0x40005400)) |
#define | GPIO_PORTB_IS_R (*((volatile uint32_t *)0x40005404)) |
#define | GPIO_PORTB_IBE_R (*((volatile uint32_t *)0x40005408)) |
#define | GPIO_PORTB_IEV_R (*((volatile uint32_t *)0x4000540C)) |
#define | GPIO_PORTB_IM_R (*((volatile uint32_t *)0x40005410)) |
#define | GPIO_PORTB_RIS_R (*((volatile uint32_t *)0x40005414)) |
#define | GPIO_PORTB_MIS_R (*((volatile uint32_t *)0x40005418)) |
#define | GPIO_PORTB_ICR_R (*((volatile uint32_t *)0x4000541C)) |
#define | GPIO_PORTB_AFSEL_R (*((volatile uint32_t *)0x40005420)) |
#define | GPIO_PORTB_DR2R_R (*((volatile uint32_t *)0x40005500)) |
#define | GPIO_PORTB_DR4R_R (*((volatile uint32_t *)0x40005504)) |
#define | GPIO_PORTB_DR8R_R (*((volatile uint32_t *)0x40005508)) |
#define | GPIO_PORTB_ODR_R (*((volatile uint32_t *)0x4000550C)) |
#define | GPIO_PORTB_PUR_R (*((volatile uint32_t *)0x40005510)) |
#define | GPIO_PORTB_PDR_R (*((volatile uint32_t *)0x40005514)) |
#define | GPIO_PORTB_SLR_R (*((volatile uint32_t *)0x40005518)) |
#define | GPIO_PORTB_DEN_R (*((volatile uint32_t *)0x4000551C)) |
#define | GPIO_PORTB_LOCK_R (*((volatile uint32_t *)0x40005520)) |
#define | GPIO_PORTB_CR_R (*((volatile uint32_t *)0x40005524)) |
#define | GPIO_PORTB_AMSEL_R (*((volatile uint32_t *)0x40005528)) |
#define | GPIO_PORTB_PCTL_R (*((volatile uint32_t *)0x4000552C)) |
#define | GPIO_PORTB_ADCCTL_R (*((volatile uint32_t *)0x40005530)) |
#define | GPIO_PORTB_DMACTL_R (*((volatile uint32_t *)0x40005534)) |
#define | GPIO_PORTC_DATA_BITS_R ((volatile uint32_t *)0x40006000) |
#define | GPIO_PORTC_DATA_R (*((volatile uint32_t *)0x400063FC)) |
#define | GPIO_PORTC_DIR_R (*((volatile uint32_t *)0x40006400)) |
#define | GPIO_PORTC_IS_R (*((volatile uint32_t *)0x40006404)) |
#define | GPIO_PORTC_IBE_R (*((volatile uint32_t *)0x40006408)) |
#define | GPIO_PORTC_IEV_R (*((volatile uint32_t *)0x4000640C)) |
#define | GPIO_PORTC_IM_R (*((volatile uint32_t *)0x40006410)) |
#define | GPIO_PORTC_RIS_R (*((volatile uint32_t *)0x40006414)) |
#define | GPIO_PORTC_MIS_R (*((volatile uint32_t *)0x40006418)) |
#define | GPIO_PORTC_ICR_R (*((volatile uint32_t *)0x4000641C)) |
#define | GPIO_PORTC_AFSEL_R (*((volatile uint32_t *)0x40006420)) |
#define | GPIO_PORTC_DR2R_R (*((volatile uint32_t *)0x40006500)) |
#define | GPIO_PORTC_DR4R_R (*((volatile uint32_t *)0x40006504)) |
#define | GPIO_PORTC_DR8R_R (*((volatile uint32_t *)0x40006508)) |
#define | GPIO_PORTC_ODR_R (*((volatile uint32_t *)0x4000650C)) |
#define | GPIO_PORTC_PUR_R (*((volatile uint32_t *)0x40006510)) |
#define | GPIO_PORTC_PDR_R (*((volatile uint32_t *)0x40006514)) |
#define | GPIO_PORTC_SLR_R (*((volatile uint32_t *)0x40006518)) |
#define | GPIO_PORTC_DEN_R (*((volatile uint32_t *)0x4000651C)) |
#define | GPIO_PORTC_LOCK_R (*((volatile uint32_t *)0x40006520)) |
#define | GPIO_PORTC_CR_R (*((volatile uint32_t *)0x40006524)) |
#define | GPIO_PORTC_AMSEL_R (*((volatile uint32_t *)0x40006528)) |
#define | GPIO_PORTC_PCTL_R (*((volatile uint32_t *)0x4000652C)) |
#define | GPIO_PORTC_ADCCTL_R (*((volatile uint32_t *)0x40006530)) |
#define | GPIO_PORTC_DMACTL_R (*((volatile uint32_t *)0x40006534)) |
#define | GPIO_PORTD_DATA_BITS_R ((volatile uint32_t *)0x40007000) |
#define | GPIO_PORTD_DATA_R (*((volatile uint32_t *)0x400073FC)) |
#define | GPIO_PORTD_DIR_R (*((volatile uint32_t *)0x40007400)) |
#define | GPIO_PORTD_IS_R (*((volatile uint32_t *)0x40007404)) |
#define | GPIO_PORTD_IBE_R (*((volatile uint32_t *)0x40007408)) |
#define | GPIO_PORTD_IEV_R (*((volatile uint32_t *)0x4000740C)) |
#define | GPIO_PORTD_IM_R (*((volatile uint32_t *)0x40007410)) |
#define | GPIO_PORTD_RIS_R (*((volatile uint32_t *)0x40007414)) |
#define | GPIO_PORTD_MIS_R (*((volatile uint32_t *)0x40007418)) |
#define | GPIO_PORTD_ICR_R (*((volatile uint32_t *)0x4000741C)) |
#define | GPIO_PORTD_AFSEL_R (*((volatile uint32_t *)0x40007420)) |
#define | GPIO_PORTD_DR2R_R (*((volatile uint32_t *)0x40007500)) |
#define | GPIO_PORTD_DR4R_R (*((volatile uint32_t *)0x40007504)) |
#define | GPIO_PORTD_DR8R_R (*((volatile uint32_t *)0x40007508)) |
#define | GPIO_PORTD_ODR_R (*((volatile uint32_t *)0x4000750C)) |
#define | GPIO_PORTD_PUR_R (*((volatile uint32_t *)0x40007510)) |
#define | GPIO_PORTD_PDR_R (*((volatile uint32_t *)0x40007514)) |
#define | GPIO_PORTD_SLR_R (*((volatile uint32_t *)0x40007518)) |
#define | GPIO_PORTD_DEN_R (*((volatile uint32_t *)0x4000751C)) |
#define | GPIO_PORTD_LOCK_R (*((volatile uint32_t *)0x40007520)) |
#define | GPIO_PORTD_CR_R (*((volatile uint32_t *)0x40007524)) |
#define | GPIO_PORTD_AMSEL_R (*((volatile uint32_t *)0x40007528)) |
#define | GPIO_PORTD_PCTL_R (*((volatile uint32_t *)0x4000752C)) |
#define | GPIO_PORTD_ADCCTL_R (*((volatile uint32_t *)0x40007530)) |
#define | GPIO_PORTD_DMACTL_R (*((volatile uint32_t *)0x40007534)) |
#define | SSI0_CR0_R (*((volatile uint32_t *)0x40008000)) |
#define | SSI0_CR1_R (*((volatile uint32_t *)0x40008004)) |
#define | SSI0_DR_R (*((volatile uint32_t *)0x40008008)) |
#define | SSI0_SR_R (*((volatile uint32_t *)0x4000800C)) |
#define | SSI0_CPSR_R (*((volatile uint32_t *)0x40008010)) |
#define | SSI0_IM_R (*((volatile uint32_t *)0x40008014)) |
#define | SSI0_RIS_R (*((volatile uint32_t *)0x40008018)) |
#define | SSI0_MIS_R (*((volatile uint32_t *)0x4000801C)) |
#define | SSI0_ICR_R (*((volatile uint32_t *)0x40008020)) |
#define | SSI0_DMACTL_R (*((volatile uint32_t *)0x40008024)) |
#define | SSI0_CC_R (*((volatile uint32_t *)0x40008FC8)) |
#define | SSI1_CR0_R (*((volatile uint32_t *)0x40009000)) |
#define | SSI1_CR1_R (*((volatile uint32_t *)0x40009004)) |
#define | SSI1_DR_R (*((volatile uint32_t *)0x40009008)) |
#define | SSI1_SR_R (*((volatile uint32_t *)0x4000900C)) |
#define | SSI1_CPSR_R (*((volatile uint32_t *)0x40009010)) |
#define | SSI1_IM_R (*((volatile uint32_t *)0x40009014)) |
#define | SSI1_RIS_R (*((volatile uint32_t *)0x40009018)) |
#define | SSI1_MIS_R (*((volatile uint32_t *)0x4000901C)) |
#define | SSI1_ICR_R (*((volatile uint32_t *)0x40009020)) |
#define | SSI1_DMACTL_R (*((volatile uint32_t *)0x40009024)) |
#define | SSI1_CC_R (*((volatile uint32_t *)0x40009FC8)) |
#define | SSI2_CR0_R (*((volatile uint32_t *)0x4000A000)) |
#define | SSI2_CR1_R (*((volatile uint32_t *)0x4000A004)) |
#define | SSI2_DR_R (*((volatile uint32_t *)0x4000A008)) |
#define | SSI2_SR_R (*((volatile uint32_t *)0x4000A00C)) |
#define | SSI2_CPSR_R (*((volatile uint32_t *)0x4000A010)) |
#define | SSI2_IM_R (*((volatile uint32_t *)0x4000A014)) |
#define | SSI2_RIS_R (*((volatile uint32_t *)0x4000A018)) |
#define | SSI2_MIS_R (*((volatile uint32_t *)0x4000A01C)) |
#define | SSI2_ICR_R (*((volatile uint32_t *)0x4000A020)) |
#define | SSI2_DMACTL_R (*((volatile uint32_t *)0x4000A024)) |
#define | SSI2_CC_R (*((volatile uint32_t *)0x4000AFC8)) |
#define | SSI3_CR0_R (*((volatile uint32_t *)0x4000B000)) |
#define | SSI3_CR1_R (*((volatile uint32_t *)0x4000B004)) |
#define | SSI3_DR_R (*((volatile uint32_t *)0x4000B008)) |
#define | SSI3_SR_R (*((volatile uint32_t *)0x4000B00C)) |
#define | SSI3_CPSR_R (*((volatile uint32_t *)0x4000B010)) |
#define | SSI3_IM_R (*((volatile uint32_t *)0x4000B014)) |
#define | SSI3_RIS_R (*((volatile uint32_t *)0x4000B018)) |
#define | SSI3_MIS_R (*((volatile uint32_t *)0x4000B01C)) |
#define | SSI3_ICR_R (*((volatile uint32_t *)0x4000B020)) |
#define | SSI3_DMACTL_R (*((volatile uint32_t *)0x4000B024)) |
#define | SSI3_CC_R (*((volatile uint32_t *)0x4000BFC8)) |
#define | UART0_DR_R (*((volatile uint32_t *)0x4000C000)) |
#define | UART0_RSR_R (*((volatile uint32_t *)0x4000C004)) |
#define | UART0_ECR_R (*((volatile uint32_t *)0x4000C004)) |
#define | UART0_FR_R (*((volatile uint32_t *)0x4000C018)) |
#define | UART0_ILPR_R (*((volatile uint32_t *)0x4000C020)) |
#define | UART0_IBRD_R (*((volatile uint32_t *)0x4000C024)) |
#define | UART0_FBRD_R (*((volatile uint32_t *)0x4000C028)) |
#define | UART0_LCRH_R (*((volatile uint32_t *)0x4000C02C)) |
#define | UART0_CTL_R (*((volatile uint32_t *)0x4000C030)) |
#define | UART0_IFLS_R (*((volatile uint32_t *)0x4000C034)) |
#define | UART0_IM_R (*((volatile uint32_t *)0x4000C038)) |
#define | UART0_RIS_R (*((volatile uint32_t *)0x4000C03C)) |
#define | UART0_MIS_R (*((volatile uint32_t *)0x4000C040)) |
#define | UART0_ICR_R (*((volatile uint32_t *)0x4000C044)) |
#define | UART0_DMACTL_R (*((volatile uint32_t *)0x4000C048)) |
#define | UART0_9BITADDR_R (*((volatile uint32_t *)0x4000C0A4)) |
#define | UART0_9BITAMASK_R (*((volatile uint32_t *)0x4000C0A8)) |
#define | UART0_PP_R (*((volatile uint32_t *)0x4000CFC0)) |
#define | UART0_CC_R (*((volatile uint32_t *)0x4000CFC8)) |
#define | UART1_DR_R (*((volatile uint32_t *)0x4000D000)) |
#define | UART1_RSR_R (*((volatile uint32_t *)0x4000D004)) |
#define | UART1_ECR_R (*((volatile uint32_t *)0x4000D004)) |
#define | UART1_FR_R (*((volatile uint32_t *)0x4000D018)) |
#define | UART1_ILPR_R (*((volatile uint32_t *)0x4000D020)) |
#define | UART1_IBRD_R (*((volatile uint32_t *)0x4000D024)) |
#define | UART1_FBRD_R (*((volatile uint32_t *)0x4000D028)) |
#define | UART1_LCRH_R (*((volatile uint32_t *)0x4000D02C)) |
#define | UART1_CTL_R (*((volatile uint32_t *)0x4000D030)) |
#define | UART1_IFLS_R (*((volatile uint32_t *)0x4000D034)) |
#define | UART1_IM_R (*((volatile uint32_t *)0x4000D038)) |
#define | UART1_RIS_R (*((volatile uint32_t *)0x4000D03C)) |
#define | UART1_MIS_R (*((volatile uint32_t *)0x4000D040)) |
#define | UART1_ICR_R (*((volatile uint32_t *)0x4000D044)) |
#define | UART1_DMACTL_R (*((volatile uint32_t *)0x4000D048)) |
#define | UART1_9BITADDR_R (*((volatile uint32_t *)0x4000D0A4)) |
#define | UART1_9BITAMASK_R (*((volatile uint32_t *)0x4000D0A8)) |
#define | UART1_PP_R (*((volatile uint32_t *)0x4000DFC0)) |
#define | UART1_CC_R (*((volatile uint32_t *)0x4000DFC8)) |
#define | UART2_DR_R (*((volatile uint32_t *)0x4000E000)) |
#define | UART2_RSR_R (*((volatile uint32_t *)0x4000E004)) |
#define | UART2_ECR_R (*((volatile uint32_t *)0x4000E004)) |
#define | UART2_FR_R (*((volatile uint32_t *)0x4000E018)) |
#define | UART2_ILPR_R (*((volatile uint32_t *)0x4000E020)) |
#define | UART2_IBRD_R (*((volatile uint32_t *)0x4000E024)) |
#define | UART2_FBRD_R (*((volatile uint32_t *)0x4000E028)) |
#define | UART2_LCRH_R (*((volatile uint32_t *)0x4000E02C)) |
#define | UART2_CTL_R (*((volatile uint32_t *)0x4000E030)) |
#define | UART2_IFLS_R (*((volatile uint32_t *)0x4000E034)) |
#define | UART2_IM_R (*((volatile uint32_t *)0x4000E038)) |
#define | UART2_RIS_R (*((volatile uint32_t *)0x4000E03C)) |
#define | UART2_MIS_R (*((volatile uint32_t *)0x4000E040)) |
#define | UART2_ICR_R (*((volatile uint32_t *)0x4000E044)) |
#define | UART2_DMACTL_R (*((volatile uint32_t *)0x4000E048)) |
#define | UART2_9BITADDR_R (*((volatile uint32_t *)0x4000E0A4)) |
#define | UART2_9BITAMASK_R (*((volatile uint32_t *)0x4000E0A8)) |
#define | UART2_PP_R (*((volatile uint32_t *)0x4000EFC0)) |
#define | UART2_CC_R (*((volatile uint32_t *)0x4000EFC8)) |
#define | UART3_DR_R (*((volatile uint32_t *)0x4000F000)) |
#define | UART3_RSR_R (*((volatile uint32_t *)0x4000F004)) |
#define | UART3_ECR_R (*((volatile uint32_t *)0x4000F004)) |
#define | UART3_FR_R (*((volatile uint32_t *)0x4000F018)) |
#define | UART3_ILPR_R (*((volatile uint32_t *)0x4000F020)) |
#define | UART3_IBRD_R (*((volatile uint32_t *)0x4000F024)) |
#define | UART3_FBRD_R (*((volatile uint32_t *)0x4000F028)) |
#define | UART3_LCRH_R (*((volatile uint32_t *)0x4000F02C)) |
#define | UART3_CTL_R (*((volatile uint32_t *)0x4000F030)) |
#define | UART3_IFLS_R (*((volatile uint32_t *)0x4000F034)) |
#define | UART3_IM_R (*((volatile uint32_t *)0x4000F038)) |
#define | UART3_RIS_R (*((volatile uint32_t *)0x4000F03C)) |
#define | UART3_MIS_R (*((volatile uint32_t *)0x4000F040)) |
#define | UART3_ICR_R (*((volatile uint32_t *)0x4000F044)) |
#define | UART3_DMACTL_R (*((volatile uint32_t *)0x4000F048)) |
#define | UART3_9BITADDR_R (*((volatile uint32_t *)0x4000F0A4)) |
#define | UART3_9BITAMASK_R (*((volatile uint32_t *)0x4000F0A8)) |
#define | UART3_PP_R (*((volatile uint32_t *)0x4000FFC0)) |
#define | UART3_CC_R (*((volatile uint32_t *)0x4000FFC8)) |
#define | UART4_DR_R (*((volatile uint32_t *)0x40010000)) |
#define | UART4_RSR_R (*((volatile uint32_t *)0x40010004)) |
#define | UART4_ECR_R (*((volatile uint32_t *)0x40010004)) |
#define | UART4_FR_R (*((volatile uint32_t *)0x40010018)) |
#define | UART4_ILPR_R (*((volatile uint32_t *)0x40010020)) |
#define | UART4_IBRD_R (*((volatile uint32_t *)0x40010024)) |
#define | UART4_FBRD_R (*((volatile uint32_t *)0x40010028)) |
#define | UART4_LCRH_R (*((volatile uint32_t *)0x4001002C)) |
#define | UART4_CTL_R (*((volatile uint32_t *)0x40010030)) |
#define | UART4_IFLS_R (*((volatile uint32_t *)0x40010034)) |
#define | UART4_IM_R (*((volatile uint32_t *)0x40010038)) |
#define | UART4_RIS_R (*((volatile uint32_t *)0x4001003C)) |
#define | UART4_MIS_R (*((volatile uint32_t *)0x40010040)) |
#define | UART4_ICR_R (*((volatile uint32_t *)0x40010044)) |
#define | UART4_DMACTL_R (*((volatile uint32_t *)0x40010048)) |
#define | UART4_9BITADDR_R (*((volatile uint32_t *)0x400100A4)) |
#define | UART4_9BITAMASK_R (*((volatile uint32_t *)0x400100A8)) |
#define | UART4_PP_R (*((volatile uint32_t *)0x40010FC0)) |
#define | UART4_CC_R (*((volatile uint32_t *)0x40010FC8)) |
#define | UART5_DR_R (*((volatile uint32_t *)0x40011000)) |
#define | UART5_RSR_R (*((volatile uint32_t *)0x40011004)) |
#define | UART5_ECR_R (*((volatile uint32_t *)0x40011004)) |
#define | UART5_FR_R (*((volatile uint32_t *)0x40011018)) |
#define | UART5_ILPR_R (*((volatile uint32_t *)0x40011020)) |
#define | UART5_IBRD_R (*((volatile uint32_t *)0x40011024)) |
#define | UART5_FBRD_R (*((volatile uint32_t *)0x40011028)) |
#define | UART5_LCRH_R (*((volatile uint32_t *)0x4001102C)) |
#define | UART5_CTL_R (*((volatile uint32_t *)0x40011030)) |
#define | UART5_IFLS_R (*((volatile uint32_t *)0x40011034)) |
#define | UART5_IM_R (*((volatile uint32_t *)0x40011038)) |
#define | UART5_RIS_R (*((volatile uint32_t *)0x4001103C)) |
#define | UART5_MIS_R (*((volatile uint32_t *)0x40011040)) |
#define | UART5_ICR_R (*((volatile uint32_t *)0x40011044)) |
#define | UART5_DMACTL_R (*((volatile uint32_t *)0x40011048)) |
#define | UART5_9BITADDR_R (*((volatile uint32_t *)0x400110A4)) |
#define | UART5_9BITAMASK_R (*((volatile uint32_t *)0x400110A8)) |
#define | UART5_PP_R (*((volatile uint32_t *)0x40011FC0)) |
#define | UART5_CC_R (*((volatile uint32_t *)0x40011FC8)) |
#define | UART6_DR_R (*((volatile uint32_t *)0x40012000)) |
#define | UART6_RSR_R (*((volatile uint32_t *)0x40012004)) |
#define | UART6_ECR_R (*((volatile uint32_t *)0x40012004)) |
#define | UART6_FR_R (*((volatile uint32_t *)0x40012018)) |
#define | UART6_ILPR_R (*((volatile uint32_t *)0x40012020)) |
#define | UART6_IBRD_R (*((volatile uint32_t *)0x40012024)) |
#define | UART6_FBRD_R (*((volatile uint32_t *)0x40012028)) |
#define | UART6_LCRH_R (*((volatile uint32_t *)0x4001202C)) |
#define | UART6_CTL_R (*((volatile uint32_t *)0x40012030)) |
#define | UART6_IFLS_R (*((volatile uint32_t *)0x40012034)) |
#define | UART6_IM_R (*((volatile uint32_t *)0x40012038)) |
#define | UART6_RIS_R (*((volatile uint32_t *)0x4001203C)) |
#define | UART6_MIS_R (*((volatile uint32_t *)0x40012040)) |
#define | UART6_ICR_R (*((volatile uint32_t *)0x40012044)) |
#define | UART6_DMACTL_R (*((volatile uint32_t *)0x40012048)) |
#define | UART6_9BITADDR_R (*((volatile uint32_t *)0x400120A4)) |
#define | UART6_9BITAMASK_R (*((volatile uint32_t *)0x400120A8)) |
#define | UART6_PP_R (*((volatile uint32_t *)0x40012FC0)) |
#define | UART6_CC_R (*((volatile uint32_t *)0x40012FC8)) |
#define | UART7_DR_R (*((volatile uint32_t *)0x40013000)) |
#define | UART7_RSR_R (*((volatile uint32_t *)0x40013004)) |
#define | UART7_ECR_R (*((volatile uint32_t *)0x40013004)) |
#define | UART7_FR_R (*((volatile uint32_t *)0x40013018)) |
#define | UART7_ILPR_R (*((volatile uint32_t *)0x40013020)) |
#define | UART7_IBRD_R (*((volatile uint32_t *)0x40013024)) |
#define | UART7_FBRD_R (*((volatile uint32_t *)0x40013028)) |
#define | UART7_LCRH_R (*((volatile uint32_t *)0x4001302C)) |
#define | UART7_CTL_R (*((volatile uint32_t *)0x40013030)) |
#define | UART7_IFLS_R (*((volatile uint32_t *)0x40013034)) |
#define | UART7_IM_R (*((volatile uint32_t *)0x40013038)) |
#define | UART7_RIS_R (*((volatile uint32_t *)0x4001303C)) |
#define | UART7_MIS_R (*((volatile uint32_t *)0x40013040)) |
#define | UART7_ICR_R (*((volatile uint32_t *)0x40013044)) |
#define | UART7_DMACTL_R (*((volatile uint32_t *)0x40013048)) |
#define | UART7_9BITADDR_R (*((volatile uint32_t *)0x400130A4)) |
#define | UART7_9BITAMASK_R (*((volatile uint32_t *)0x400130A8)) |
#define | UART7_PP_R (*((volatile uint32_t *)0x40013FC0)) |
#define | UART7_CC_R (*((volatile uint32_t *)0x40013FC8)) |
#define | I2C0_MSA_R (*((volatile uint32_t *)0x40020000)) |
#define | I2C0_MCS_R (*((volatile uint32_t *)0x40020004)) |
#define | I2C0_MDR_R (*((volatile uint32_t *)0x40020008)) |
#define | I2C0_MTPR_R (*((volatile uint32_t *)0x4002000C)) |
#define | I2C0_MIMR_R (*((volatile uint32_t *)0x40020010)) |
#define | I2C0_MRIS_R (*((volatile uint32_t *)0x40020014)) |
#define | I2C0_MMIS_R (*((volatile uint32_t *)0x40020018)) |
#define | I2C0_MICR_R (*((volatile uint32_t *)0x4002001C)) |
#define | I2C0_MCR_R (*((volatile uint32_t *)0x40020020)) |
#define | I2C0_MCLKOCNT_R (*((volatile uint32_t *)0x40020024)) |
#define | I2C0_MBMON_R (*((volatile uint32_t *)0x4002002C)) |
#define | I2C0_MCR2_R (*((volatile uint32_t *)0x40020038)) |
#define | I2C0_SOAR_R (*((volatile uint32_t *)0x40020800)) |
#define | I2C0_SCSR_R (*((volatile uint32_t *)0x40020804)) |
#define | I2C0_SDR_R (*((volatile uint32_t *)0x40020808)) |
#define | I2C0_SIMR_R (*((volatile uint32_t *)0x4002080C)) |
#define | I2C0_SRIS_R (*((volatile uint32_t *)0x40020810)) |
#define | I2C0_SMIS_R (*((volatile uint32_t *)0x40020814)) |
#define | I2C0_SICR_R (*((volatile uint32_t *)0x40020818)) |
#define | I2C0_SOAR2_R (*((volatile uint32_t *)0x4002081C)) |
#define | I2C0_SACKCTL_R (*((volatile uint32_t *)0x40020820)) |
#define | I2C0_PP_R (*((volatile uint32_t *)0x40020FC0)) |
#define | I2C0_PC_R (*((volatile uint32_t *)0x40020FC4)) |
#define | I2C1_MSA_R (*((volatile uint32_t *)0x40021000)) |
#define | I2C1_MCS_R (*((volatile uint32_t *)0x40021004)) |
#define | I2C1_MDR_R (*((volatile uint32_t *)0x40021008)) |
#define | I2C1_MTPR_R (*((volatile uint32_t *)0x4002100C)) |
#define | I2C1_MIMR_R (*((volatile uint32_t *)0x40021010)) |
#define | I2C1_MRIS_R (*((volatile uint32_t *)0x40021014)) |
#define | I2C1_MMIS_R (*((volatile uint32_t *)0x40021018)) |
#define | I2C1_MICR_R (*((volatile uint32_t *)0x4002101C)) |
#define | I2C1_MCR_R (*((volatile uint32_t *)0x40021020)) |
#define | I2C1_MCLKOCNT_R (*((volatile uint32_t *)0x40021024)) |
#define | I2C1_MBMON_R (*((volatile uint32_t *)0x4002102C)) |
#define | I2C1_MCR2_R (*((volatile uint32_t *)0x40021038)) |
#define | I2C1_SOAR_R (*((volatile uint32_t *)0x40021800)) |
#define | I2C1_SCSR_R (*((volatile uint32_t *)0x40021804)) |
#define | I2C1_SDR_R (*((volatile uint32_t *)0x40021808)) |
#define | I2C1_SIMR_R (*((volatile uint32_t *)0x4002180C)) |
#define | I2C1_SRIS_R (*((volatile uint32_t *)0x40021810)) |
#define | I2C1_SMIS_R (*((volatile uint32_t *)0x40021814)) |
#define | I2C1_SICR_R (*((volatile uint32_t *)0x40021818)) |
#define | I2C1_SOAR2_R (*((volatile uint32_t *)0x4002181C)) |
#define | I2C1_SACKCTL_R (*((volatile uint32_t *)0x40021820)) |
#define | I2C1_PP_R (*((volatile uint32_t *)0x40021FC0)) |
#define | I2C1_PC_R (*((volatile uint32_t *)0x40021FC4)) |
#define | I2C2_MSA_R (*((volatile uint32_t *)0x40022000)) |
#define | I2C2_MCS_R (*((volatile uint32_t *)0x40022004)) |
#define | I2C2_MDR_R (*((volatile uint32_t *)0x40022008)) |
#define | I2C2_MTPR_R (*((volatile uint32_t *)0x4002200C)) |
#define | I2C2_MIMR_R (*((volatile uint32_t *)0x40022010)) |
#define | I2C2_MRIS_R (*((volatile uint32_t *)0x40022014)) |
#define | I2C2_MMIS_R (*((volatile uint32_t *)0x40022018)) |
#define | I2C2_MICR_R (*((volatile uint32_t *)0x4002201C)) |
#define | I2C2_MCR_R (*((volatile uint32_t *)0x40022020)) |
#define | I2C2_MCLKOCNT_R (*((volatile uint32_t *)0x40022024)) |
#define | I2C2_MBMON_R (*((volatile uint32_t *)0x4002202C)) |
#define | I2C2_MCR2_R (*((volatile uint32_t *)0x40022038)) |
#define | I2C2_SOAR_R (*((volatile uint32_t *)0x40022800)) |
#define | I2C2_SCSR_R (*((volatile uint32_t *)0x40022804)) |
#define | I2C2_SDR_R (*((volatile uint32_t *)0x40022808)) |
#define | I2C2_SIMR_R (*((volatile uint32_t *)0x4002280C)) |
#define | I2C2_SRIS_R (*((volatile uint32_t *)0x40022810)) |
#define | I2C2_SMIS_R (*((volatile uint32_t *)0x40022814)) |
#define | I2C2_SICR_R (*((volatile uint32_t *)0x40022818)) |
#define | I2C2_SOAR2_R (*((volatile uint32_t *)0x4002281C)) |
#define | I2C2_SACKCTL_R (*((volatile uint32_t *)0x40022820)) |
#define | I2C2_PP_R (*((volatile uint32_t *)0x40022FC0)) |
#define | I2C2_PC_R (*((volatile uint32_t *)0x40022FC4)) |
#define | I2C3_MSA_R (*((volatile uint32_t *)0x40023000)) |
#define | I2C3_MCS_R (*((volatile uint32_t *)0x40023004)) |
#define | I2C3_MDR_R (*((volatile uint32_t *)0x40023008)) |
#define | I2C3_MTPR_R (*((volatile uint32_t *)0x4002300C)) |
#define | I2C3_MIMR_R (*((volatile uint32_t *)0x40023010)) |
#define | I2C3_MRIS_R (*((volatile uint32_t *)0x40023014)) |
#define | I2C3_MMIS_R (*((volatile uint32_t *)0x40023018)) |
#define | I2C3_MICR_R (*((volatile uint32_t *)0x4002301C)) |
#define | I2C3_MCR_R (*((volatile uint32_t *)0x40023020)) |
#define | I2C3_MCLKOCNT_R (*((volatile uint32_t *)0x40023024)) |
#define | I2C3_MBMON_R (*((volatile uint32_t *)0x4002302C)) |
#define | I2C3_MCR2_R (*((volatile uint32_t *)0x40023038)) |
#define | I2C3_SOAR_R (*((volatile uint32_t *)0x40023800)) |
#define | I2C3_SCSR_R (*((volatile uint32_t *)0x40023804)) |
#define | I2C3_SDR_R (*((volatile uint32_t *)0x40023808)) |
#define | I2C3_SIMR_R (*((volatile uint32_t *)0x4002380C)) |
#define | I2C3_SRIS_R (*((volatile uint32_t *)0x40023810)) |
#define | I2C3_SMIS_R (*((volatile uint32_t *)0x40023814)) |
#define | I2C3_SICR_R (*((volatile uint32_t *)0x40023818)) |
#define | I2C3_SOAR2_R (*((volatile uint32_t *)0x4002381C)) |
#define | I2C3_SACKCTL_R (*((volatile uint32_t *)0x40023820)) |
#define | I2C3_PP_R (*((volatile uint32_t *)0x40023FC0)) |
#define | I2C3_PC_R (*((volatile uint32_t *)0x40023FC4)) |
#define | GPIO_PORTE_DATA_BITS_R ((volatile uint32_t *)0x40024000) |
#define | GPIO_PORTE_DATA_R (*((volatile uint32_t *)0x400243FC)) |
#define | GPIO_PORTE_DIR_R (*((volatile uint32_t *)0x40024400)) |
#define | GPIO_PORTE_IS_R (*((volatile uint32_t *)0x40024404)) |
#define | GPIO_PORTE_IBE_R (*((volatile uint32_t *)0x40024408)) |
#define | GPIO_PORTE_IEV_R (*((volatile uint32_t *)0x4002440C)) |
#define | GPIO_PORTE_IM_R (*((volatile uint32_t *)0x40024410)) |
#define | GPIO_PORTE_RIS_R (*((volatile uint32_t *)0x40024414)) |
#define | GPIO_PORTE_MIS_R (*((volatile uint32_t *)0x40024418)) |
#define | GPIO_PORTE_ICR_R (*((volatile uint32_t *)0x4002441C)) |
#define | GPIO_PORTE_AFSEL_R (*((volatile uint32_t *)0x40024420)) |
#define | GPIO_PORTE_DR2R_R (*((volatile uint32_t *)0x40024500)) |
#define | GPIO_PORTE_DR4R_R (*((volatile uint32_t *)0x40024504)) |
#define | GPIO_PORTE_DR8R_R (*((volatile uint32_t *)0x40024508)) |
#define | GPIO_PORTE_ODR_R (*((volatile uint32_t *)0x4002450C)) |
#define | GPIO_PORTE_PUR_R (*((volatile uint32_t *)0x40024510)) |
#define | GPIO_PORTE_PDR_R (*((volatile uint32_t *)0x40024514)) |
#define | GPIO_PORTE_SLR_R (*((volatile uint32_t *)0x40024518)) |
#define | GPIO_PORTE_DEN_R (*((volatile uint32_t *)0x4002451C)) |
#define | GPIO_PORTE_LOCK_R (*((volatile uint32_t *)0x40024520)) |
#define | GPIO_PORTE_CR_R (*((volatile uint32_t *)0x40024524)) |
#define | GPIO_PORTE_AMSEL_R (*((volatile uint32_t *)0x40024528)) |
#define | GPIO_PORTE_PCTL_R (*((volatile uint32_t *)0x4002452C)) |
#define | GPIO_PORTE_ADCCTL_R (*((volatile uint32_t *)0x40024530)) |
#define | GPIO_PORTE_DMACTL_R (*((volatile uint32_t *)0x40024534)) |
#define | GPIO_PORTF_DATA_BITS_R ((volatile uint32_t *)0x40025000) |
#define | GPIO_PORTF_DATA_R (*((volatile uint32_t *)0x400253FC)) |
#define | GPIO_PORTF_DIR_R (*((volatile uint32_t *)0x40025400)) |
#define | GPIO_PORTF_IS_R (*((volatile uint32_t *)0x40025404)) |
#define | GPIO_PORTF_IBE_R (*((volatile uint32_t *)0x40025408)) |
#define | GPIO_PORTF_IEV_R (*((volatile uint32_t *)0x4002540C)) |
#define | GPIO_PORTF_IM_R (*((volatile uint32_t *)0x40025410)) |
#define | GPIO_PORTF_RIS_R (*((volatile uint32_t *)0x40025414)) |
#define | GPIO_PORTF_MIS_R (*((volatile uint32_t *)0x40025418)) |
#define | GPIO_PORTF_ICR_R (*((volatile uint32_t *)0x4002541C)) |
#define | GPIO_PORTF_AFSEL_R (*((volatile uint32_t *)0x40025420)) |
#define | GPIO_PORTF_DR2R_R (*((volatile uint32_t *)0x40025500)) |
#define | GPIO_PORTF_DR4R_R (*((volatile uint32_t *)0x40025504)) |
#define | GPIO_PORTF_DR8R_R (*((volatile uint32_t *)0x40025508)) |
#define | GPIO_PORTF_ODR_R (*((volatile uint32_t *)0x4002550C)) |
#define | GPIO_PORTF_PUR_R (*((volatile uint32_t *)0x40025510)) |
#define | GPIO_PORTF_PDR_R (*((volatile uint32_t *)0x40025514)) |
#define | GPIO_PORTF_SLR_R (*((volatile uint32_t *)0x40025518)) |
#define | GPIO_PORTF_DEN_R (*((volatile uint32_t *)0x4002551C)) |
#define | GPIO_PORTF_LOCK_R (*((volatile uint32_t *)0x40025520)) |
#define | GPIO_PORTF_CR_R (*((volatile uint32_t *)0x40025524)) |
#define | GPIO_PORTF_AMSEL_R (*((volatile uint32_t *)0x40025528)) |
#define | GPIO_PORTF_PCTL_R (*((volatile uint32_t *)0x4002552C)) |
#define | GPIO_PORTF_ADCCTL_R (*((volatile uint32_t *)0x40025530)) |
#define | GPIO_PORTF_DMACTL_R (*((volatile uint32_t *)0x40025534)) |
#define | GPIO_PORTG_DATA_BITS_R ((volatile uint32_t *)0x40026000) |
#define | GPIO_PORTG_DATA_R (*((volatile uint32_t *)0x400263FC)) |
#define | GPIO_PORTG_DIR_R (*((volatile uint32_t *)0x40026400)) |
#define | GPIO_PORTG_IS_R (*((volatile uint32_t *)0x40026404)) |
#define | GPIO_PORTG_IBE_R (*((volatile uint32_t *)0x40026408)) |
#define | GPIO_PORTG_IEV_R (*((volatile uint32_t *)0x4002640C)) |
#define | GPIO_PORTG_IM_R (*((volatile uint32_t *)0x40026410)) |
#define | GPIO_PORTG_RIS_R (*((volatile uint32_t *)0x40026414)) |
#define | GPIO_PORTG_MIS_R (*((volatile uint32_t *)0x40026418)) |
#define | GPIO_PORTG_ICR_R (*((volatile uint32_t *)0x4002641C)) |
#define | GPIO_PORTG_AFSEL_R (*((volatile uint32_t *)0x40026420)) |
#define | GPIO_PORTG_DR2R_R (*((volatile uint32_t *)0x40026500)) |
#define | GPIO_PORTG_DR4R_R (*((volatile uint32_t *)0x40026504)) |
#define | GPIO_PORTG_DR8R_R (*((volatile uint32_t *)0x40026508)) |
#define | GPIO_PORTG_ODR_R (*((volatile uint32_t *)0x4002650C)) |
#define | GPIO_PORTG_PUR_R (*((volatile uint32_t *)0x40026510)) |
#define | GPIO_PORTG_PDR_R (*((volatile uint32_t *)0x40026514)) |
#define | GPIO_PORTG_SLR_R (*((volatile uint32_t *)0x40026518)) |
#define | GPIO_PORTG_DEN_R (*((volatile uint32_t *)0x4002651C)) |
#define | GPIO_PORTG_LOCK_R (*((volatile uint32_t *)0x40026520)) |
#define | GPIO_PORTG_CR_R (*((volatile uint32_t *)0x40026524)) |
#define | GPIO_PORTG_AMSEL_R (*((volatile uint32_t *)0x40026528)) |
#define | GPIO_PORTG_PCTL_R (*((volatile uint32_t *)0x4002652C)) |
#define | GPIO_PORTG_ADCCTL_R (*((volatile uint32_t *)0x40026530)) |
#define | GPIO_PORTG_DMACTL_R (*((volatile uint32_t *)0x40026534)) |
#define | PWM0_CTL_R (*((volatile uint32_t *)0x40028000)) |
#define | PWM0_SYNC_R (*((volatile uint32_t *)0x40028004)) |
#define | PWM0_ENABLE_R (*((volatile uint32_t *)0x40028008)) |
#define | PWM0_INVERT_R (*((volatile uint32_t *)0x4002800C)) |
#define | PWM0_FAULT_R (*((volatile uint32_t *)0x40028010)) |
#define | PWM0_INTEN_R (*((volatile uint32_t *)0x40028014)) |
#define | PWM0_RIS_R (*((volatile uint32_t *)0x40028018)) |
#define | PWM0_ISC_R (*((volatile uint32_t *)0x4002801C)) |
#define | PWM0_STATUS_R (*((volatile uint32_t *)0x40028020)) |
#define | PWM0_FAULTVAL_R (*((volatile uint32_t *)0x40028024)) |
#define | PWM0_ENUPD_R (*((volatile uint32_t *)0x40028028)) |
#define | PWM0_0_CTL_R (*((volatile uint32_t *)0x40028040)) |
#define | PWM0_0_INTEN_R (*((volatile uint32_t *)0x40028044)) |
#define | PWM0_0_RIS_R (*((volatile uint32_t *)0x40028048)) |
#define | PWM0_0_ISC_R (*((volatile uint32_t *)0x4002804C)) |
#define | PWM0_0_LOAD_R (*((volatile uint32_t *)0x40028050)) |
#define | PWM0_0_COUNT_R (*((volatile uint32_t *)0x40028054)) |
#define | PWM0_0_CMPA_R (*((volatile uint32_t *)0x40028058)) |
#define | PWM0_0_CMPB_R (*((volatile uint32_t *)0x4002805C)) |
#define | PWM0_0_GENA_R (*((volatile uint32_t *)0x40028060)) |
#define | PWM0_0_GENB_R (*((volatile uint32_t *)0x40028064)) |
#define | PWM0_0_DBCTL_R (*((volatile uint32_t *)0x40028068)) |
#define | PWM0_0_DBRISE_R (*((volatile uint32_t *)0x4002806C)) |
#define | PWM0_0_DBFALL_R (*((volatile uint32_t *)0x40028070)) |
#define | PWM0_0_FLTSRC0_R (*((volatile uint32_t *)0x40028074)) |
#define | PWM0_0_FLTSRC1_R (*((volatile uint32_t *)0x40028078)) |
#define | PWM0_0_MINFLTPER_R (*((volatile uint32_t *)0x4002807C)) |
#define | PWM0_1_CTL_R (*((volatile uint32_t *)0x40028080)) |
#define | PWM0_1_INTEN_R (*((volatile uint32_t *)0x40028084)) |
#define | PWM0_1_RIS_R (*((volatile uint32_t *)0x40028088)) |
#define | PWM0_1_ISC_R (*((volatile uint32_t *)0x4002808C)) |
#define | PWM0_1_LOAD_R (*((volatile uint32_t *)0x40028090)) |
#define | PWM0_1_COUNT_R (*((volatile uint32_t *)0x40028094)) |
#define | PWM0_1_CMPA_R (*((volatile uint32_t *)0x40028098)) |
#define | PWM0_1_CMPB_R (*((volatile uint32_t *)0x4002809C)) |
#define | PWM0_1_GENA_R (*((volatile uint32_t *)0x400280A0)) |
#define | PWM0_1_GENB_R (*((volatile uint32_t *)0x400280A4)) |
#define | PWM0_1_DBCTL_R (*((volatile uint32_t *)0x400280A8)) |
#define | PWM0_1_DBRISE_R (*((volatile uint32_t *)0x400280AC)) |
#define | PWM0_1_DBFALL_R (*((volatile uint32_t *)0x400280B0)) |
#define | PWM0_1_FLTSRC0_R (*((volatile uint32_t *)0x400280B4)) |
#define | PWM0_1_FLTSRC1_R (*((volatile uint32_t *)0x400280B8)) |
#define | PWM0_1_MINFLTPER_R (*((volatile uint32_t *)0x400280BC)) |
#define | PWM0_2_CTL_R (*((volatile uint32_t *)0x400280C0)) |
#define | PWM0_2_INTEN_R (*((volatile uint32_t *)0x400280C4)) |
#define | PWM0_2_RIS_R (*((volatile uint32_t *)0x400280C8)) |
#define | PWM0_2_ISC_R (*((volatile uint32_t *)0x400280CC)) |
#define | PWM0_2_LOAD_R (*((volatile uint32_t *)0x400280D0)) |
#define | PWM0_2_COUNT_R (*((volatile uint32_t *)0x400280D4)) |
#define | PWM0_2_CMPA_R (*((volatile uint32_t *)0x400280D8)) |
#define | PWM0_2_CMPB_R (*((volatile uint32_t *)0x400280DC)) |
#define | PWM0_2_GENA_R (*((volatile uint32_t *)0x400280E0)) |
#define | PWM0_2_GENB_R (*((volatile uint32_t *)0x400280E4)) |
#define | PWM0_2_DBCTL_R (*((volatile uint32_t *)0x400280E8)) |
#define | PWM0_2_DBRISE_R (*((volatile uint32_t *)0x400280EC)) |
#define | PWM0_2_DBFALL_R (*((volatile uint32_t *)0x400280F0)) |
#define | PWM0_2_FLTSRC0_R (*((volatile uint32_t *)0x400280F4)) |
#define | PWM0_2_FLTSRC1_R (*((volatile uint32_t *)0x400280F8)) |
#define | PWM0_2_MINFLTPER_R (*((volatile uint32_t *)0x400280FC)) |
#define | PWM0_3_CTL_R (*((volatile uint32_t *)0x40028100)) |
#define | PWM0_3_INTEN_R (*((volatile uint32_t *)0x40028104)) |
#define | PWM0_3_RIS_R (*((volatile uint32_t *)0x40028108)) |
#define | PWM0_3_ISC_R (*((volatile uint32_t *)0x4002810C)) |
#define | PWM0_3_LOAD_R (*((volatile uint32_t *)0x40028110)) |
#define | PWM0_3_COUNT_R (*((volatile uint32_t *)0x40028114)) |
#define | PWM0_3_CMPA_R (*((volatile uint32_t *)0x40028118)) |
#define | PWM0_3_CMPB_R (*((volatile uint32_t *)0x4002811C)) |
#define | PWM0_3_GENA_R (*((volatile uint32_t *)0x40028120)) |
#define | PWM0_3_GENB_R (*((volatile uint32_t *)0x40028124)) |
#define | PWM0_3_DBCTL_R (*((volatile uint32_t *)0x40028128)) |
#define | PWM0_3_DBRISE_R (*((volatile uint32_t *)0x4002812C)) |
#define | PWM0_3_DBFALL_R (*((volatile uint32_t *)0x40028130)) |
#define | PWM0_3_FLTSRC0_R (*((volatile uint32_t *)0x40028134)) |
#define | PWM0_3_FLTSRC1_R (*((volatile uint32_t *)0x40028138)) |
#define | PWM0_3_MINFLTPER_R (*((volatile uint32_t *)0x4002813C)) |
#define | PWM0_0_FLTSEN_R (*((volatile uint32_t *)0x40028800)) |
#define | PWM0_0_FLTSTAT0_R (*((volatile uint32_t *)0x40028804)) |
#define | PWM0_0_FLTSTAT1_R (*((volatile uint32_t *)0x40028808)) |
#define | PWM0_1_FLTSEN_R (*((volatile uint32_t *)0x40028880)) |
#define | PWM0_1_FLTSTAT0_R (*((volatile uint32_t *)0x40028884)) |
#define | PWM0_1_FLTSTAT1_R (*((volatile uint32_t *)0x40028888)) |
#define | PWM0_2_FLTSEN_R (*((volatile uint32_t *)0x40028900)) |
#define | PWM0_2_FLTSTAT0_R (*((volatile uint32_t *)0x40028904)) |
#define | PWM0_2_FLTSTAT1_R (*((volatile uint32_t *)0x40028908)) |
#define | PWM0_3_FLTSEN_R (*((volatile uint32_t *)0x40028980)) |
#define | PWM0_3_FLTSTAT0_R (*((volatile uint32_t *)0x40028984)) |
#define | PWM0_3_FLTSTAT1_R (*((volatile uint32_t *)0x40028988)) |
#define | PWM0_PP_R (*((volatile uint32_t *)0x40028FC0)) |
#define | PWM1_CTL_R (*((volatile uint32_t *)0x40029000)) |
#define | PWM1_SYNC_R (*((volatile uint32_t *)0x40029004)) |
#define | PWM1_ENABLE_R (*((volatile uint32_t *)0x40029008)) |
#define | PWM1_INVERT_R (*((volatile uint32_t *)0x4002900C)) |
#define | PWM1_FAULT_R (*((volatile uint32_t *)0x40029010)) |
#define | PWM1_INTEN_R (*((volatile uint32_t *)0x40029014)) |
#define | PWM1_RIS_R (*((volatile uint32_t *)0x40029018)) |
#define | PWM1_ISC_R (*((volatile uint32_t *)0x4002901C)) |
#define | PWM1_STATUS_R (*((volatile uint32_t *)0x40029020)) |
#define | PWM1_FAULTVAL_R (*((volatile uint32_t *)0x40029024)) |
#define | PWM1_ENUPD_R (*((volatile uint32_t *)0x40029028)) |
#define | PWM1_0_CTL_R (*((volatile uint32_t *)0x40029040)) |
#define | PWM1_0_INTEN_R (*((volatile uint32_t *)0x40029044)) |
#define | PWM1_0_RIS_R (*((volatile uint32_t *)0x40029048)) |
#define | PWM1_0_ISC_R (*((volatile uint32_t *)0x4002904C)) |
#define | PWM1_0_LOAD_R (*((volatile uint32_t *)0x40029050)) |
#define | PWM1_0_COUNT_R (*((volatile uint32_t *)0x40029054)) |
#define | PWM1_0_CMPA_R (*((volatile uint32_t *)0x40029058)) |
#define | PWM1_0_CMPB_R (*((volatile uint32_t *)0x4002905C)) |
#define | PWM1_0_GENA_R (*((volatile uint32_t *)0x40029060)) |
#define | PWM1_0_GENB_R (*((volatile uint32_t *)0x40029064)) |
#define | PWM1_0_DBCTL_R (*((volatile uint32_t *)0x40029068)) |
#define | PWM1_0_DBRISE_R (*((volatile uint32_t *)0x4002906C)) |
#define | PWM1_0_DBFALL_R (*((volatile uint32_t *)0x40029070)) |
#define | PWM1_0_FLTSRC0_R (*((volatile uint32_t *)0x40029074)) |
#define | PWM1_0_FLTSRC1_R (*((volatile uint32_t *)0x40029078)) |
#define | PWM1_0_MINFLTPER_R (*((volatile uint32_t *)0x4002907C)) |
#define | PWM1_1_CTL_R (*((volatile uint32_t *)0x40029080)) |
#define | PWM1_1_INTEN_R (*((volatile uint32_t *)0x40029084)) |
#define | PWM1_1_RIS_R (*((volatile uint32_t *)0x40029088)) |
#define | PWM1_1_ISC_R (*((volatile uint32_t *)0x4002908C)) |
#define | PWM1_1_LOAD_R (*((volatile uint32_t *)0x40029090)) |
#define | PWM1_1_COUNT_R (*((volatile uint32_t *)0x40029094)) |
#define | PWM1_1_CMPA_R (*((volatile uint32_t *)0x40029098)) |
#define | PWM1_1_CMPB_R (*((volatile uint32_t *)0x4002909C)) |
#define | PWM1_1_GENA_R (*((volatile uint32_t *)0x400290A0)) |
#define | PWM1_1_GENB_R (*((volatile uint32_t *)0x400290A4)) |
#define | PWM1_1_DBCTL_R (*((volatile uint32_t *)0x400290A8)) |
#define | PWM1_1_DBRISE_R (*((volatile uint32_t *)0x400290AC)) |
#define | PWM1_1_DBFALL_R (*((volatile uint32_t *)0x400290B0)) |
#define | PWM1_1_FLTSRC0_R (*((volatile uint32_t *)0x400290B4)) |
#define | PWM1_1_FLTSRC1_R (*((volatile uint32_t *)0x400290B8)) |
#define | PWM1_1_MINFLTPER_R (*((volatile uint32_t *)0x400290BC)) |
#define | PWM1_2_CTL_R (*((volatile uint32_t *)0x400290C0)) |
#define | PWM1_2_INTEN_R (*((volatile uint32_t *)0x400290C4)) |
#define | PWM1_2_RIS_R (*((volatile uint32_t *)0x400290C8)) |
#define | PWM1_2_ISC_R (*((volatile uint32_t *)0x400290CC)) |
#define | PWM1_2_LOAD_R (*((volatile uint32_t *)0x400290D0)) |
#define | PWM1_2_COUNT_R (*((volatile uint32_t *)0x400290D4)) |
#define | PWM1_2_CMPA_R (*((volatile uint32_t *)0x400290D8)) |
#define | PWM1_2_CMPB_R (*((volatile uint32_t *)0x400290DC)) |
#define | PWM1_2_GENA_R (*((volatile uint32_t *)0x400290E0)) |
#define | PWM1_2_GENB_R (*((volatile uint32_t *)0x400290E4)) |
#define | PWM1_2_DBCTL_R (*((volatile uint32_t *)0x400290E8)) |
#define | PWM1_2_DBRISE_R (*((volatile uint32_t *)0x400290EC)) |
#define | PWM1_2_DBFALL_R (*((volatile uint32_t *)0x400290F0)) |
#define | PWM1_2_FLTSRC0_R (*((volatile uint32_t *)0x400290F4)) |
#define | PWM1_2_FLTSRC1_R (*((volatile uint32_t *)0x400290F8)) |
#define | PWM1_2_MINFLTPER_R (*((volatile uint32_t *)0x400290FC)) |
#define | PWM1_3_CTL_R (*((volatile uint32_t *)0x40029100)) |
#define | PWM1_3_INTEN_R (*((volatile uint32_t *)0x40029104)) |
#define | PWM1_3_RIS_R (*((volatile uint32_t *)0x40029108)) |
#define | PWM1_3_ISC_R (*((volatile uint32_t *)0x4002910C)) |
#define | PWM1_3_LOAD_R (*((volatile uint32_t *)0x40029110)) |
#define | PWM1_3_COUNT_R (*((volatile uint32_t *)0x40029114)) |
#define | PWM1_3_CMPA_R (*((volatile uint32_t *)0x40029118)) |
#define | PWM1_3_CMPB_R (*((volatile uint32_t *)0x4002911C)) |
#define | PWM1_3_GENA_R (*((volatile uint32_t *)0x40029120)) |
#define | PWM1_3_GENB_R (*((volatile uint32_t *)0x40029124)) |
#define | PWM1_3_DBCTL_R (*((volatile uint32_t *)0x40029128)) |
#define | PWM1_3_DBRISE_R (*((volatile uint32_t *)0x4002912C)) |
#define | PWM1_3_DBFALL_R (*((volatile uint32_t *)0x40029130)) |
#define | PWM1_3_FLTSRC0_R (*((volatile uint32_t *)0x40029134)) |
#define | PWM1_3_FLTSRC1_R (*((volatile uint32_t *)0x40029138)) |
#define | PWM1_3_MINFLTPER_R (*((volatile uint32_t *)0x4002913C)) |
#define | PWM1_0_FLTSEN_R (*((volatile uint32_t *)0x40029800)) |
#define | PWM1_0_FLTSTAT0_R (*((volatile uint32_t *)0x40029804)) |
#define | PWM1_0_FLTSTAT1_R (*((volatile uint32_t *)0x40029808)) |
#define | PWM1_1_FLTSEN_R (*((volatile uint32_t *)0x40029880)) |
#define | PWM1_1_FLTSTAT0_R (*((volatile uint32_t *)0x40029884)) |
#define | PWM1_1_FLTSTAT1_R (*((volatile uint32_t *)0x40029888)) |
#define | PWM1_2_FLTSEN_R (*((volatile uint32_t *)0x40029900)) |
#define | PWM1_2_FLTSTAT0_R (*((volatile uint32_t *)0x40029904)) |
#define | PWM1_2_FLTSTAT1_R (*((volatile uint32_t *)0x40029908)) |
#define | PWM1_3_FLTSEN_R (*((volatile uint32_t *)0x40029980)) |
#define | PWM1_3_FLTSTAT0_R (*((volatile uint32_t *)0x40029984)) |
#define | PWM1_3_FLTSTAT1_R (*((volatile uint32_t *)0x40029988)) |
#define | PWM1_PP_R (*((volatile uint32_t *)0x40029FC0)) |
#define | QEI0_CTL_R (*((volatile uint32_t *)0x4002C000)) |
#define | QEI0_STAT_R (*((volatile uint32_t *)0x4002C004)) |
#define | QEI0_POS_R (*((volatile uint32_t *)0x4002C008)) |
#define | QEI0_MAXPOS_R (*((volatile uint32_t *)0x4002C00C)) |
#define | QEI0_LOAD_R (*((volatile uint32_t *)0x4002C010)) |
#define | QEI0_TIME_R (*((volatile uint32_t *)0x4002C014)) |
#define | QEI0_COUNT_R (*((volatile uint32_t *)0x4002C018)) |
#define | QEI0_SPEED_R (*((volatile uint32_t *)0x4002C01C)) |
#define | QEI0_INTEN_R (*((volatile uint32_t *)0x4002C020)) |
#define | QEI0_RIS_R (*((volatile uint32_t *)0x4002C024)) |
#define | QEI0_ISC_R (*((volatile uint32_t *)0x4002C028)) |
#define | QEI1_CTL_R (*((volatile uint32_t *)0x4002D000)) |
#define | QEI1_STAT_R (*((volatile uint32_t *)0x4002D004)) |
#define | QEI1_POS_R (*((volatile uint32_t *)0x4002D008)) |
#define | QEI1_MAXPOS_R (*((volatile uint32_t *)0x4002D00C)) |
#define | QEI1_LOAD_R (*((volatile uint32_t *)0x4002D010)) |
#define | QEI1_TIME_R (*((volatile uint32_t *)0x4002D014)) |
#define | QEI1_COUNT_R (*((volatile uint32_t *)0x4002D018)) |
#define | QEI1_SPEED_R (*((volatile uint32_t *)0x4002D01C)) |
#define | QEI1_INTEN_R (*((volatile uint32_t *)0x4002D020)) |
#define | QEI1_RIS_R (*((volatile uint32_t *)0x4002D024)) |
#define | QEI1_ISC_R (*((volatile uint32_t *)0x4002D028)) |
#define | TIMER0_CFG_R (*((volatile uint32_t *)0x40030000)) |
#define | TIMER0_TAMR_R (*((volatile uint32_t *)0x40030004)) |
#define | TIMER0_TBMR_R (*((volatile uint32_t *)0x40030008)) |
#define | TIMER0_CTL_R (*((volatile uint32_t *)0x4003000C)) |
#define | TIMER0_SYNC_R (*((volatile uint32_t *)0x40030010)) |
#define | TIMER0_IMR_R (*((volatile uint32_t *)0x40030018)) |
#define | TIMER0_RIS_R (*((volatile uint32_t *)0x4003001C)) |
#define | TIMER0_MIS_R (*((volatile uint32_t *)0x40030020)) |
#define | TIMER0_ICR_R (*((volatile uint32_t *)0x40030024)) |
#define | TIMER0_TAILR_R (*((volatile uint32_t *)0x40030028)) |
#define | TIMER0_TBILR_R (*((volatile uint32_t *)0x4003002C)) |
#define | TIMER0_TAMATCHR_R (*((volatile uint32_t *)0x40030030)) |
#define | TIMER0_TBMATCHR_R (*((volatile uint32_t *)0x40030034)) |
#define | TIMER0_TAPR_R (*((volatile uint32_t *)0x40030038)) |
#define | TIMER0_TBPR_R (*((volatile uint32_t *)0x4003003C)) |
#define | TIMER0_TAPMR_R (*((volatile uint32_t *)0x40030040)) |
#define | TIMER0_TBPMR_R (*((volatile uint32_t *)0x40030044)) |
#define | TIMER0_TAR_R (*((volatile uint32_t *)0x40030048)) |
#define | TIMER0_TBR_R (*((volatile uint32_t *)0x4003004C)) |
#define | TIMER0_TAV_R (*((volatile uint32_t *)0x40030050)) |
#define | TIMER0_TBV_R (*((volatile uint32_t *)0x40030054)) |
#define | TIMER0_RTCPD_R (*((volatile uint32_t *)0x40030058)) |
#define | TIMER0_TAPS_R (*((volatile uint32_t *)0x4003005C)) |
#define | TIMER0_TBPS_R (*((volatile uint32_t *)0x40030060)) |
#define | TIMER0_TAPV_R (*((volatile uint32_t *)0x40030064)) |
#define | TIMER0_TBPV_R (*((volatile uint32_t *)0x40030068)) |
#define | TIMER0_PP_R (*((volatile uint32_t *)0x40030FC0)) |
#define | TIMER1_CFG_R (*((volatile uint32_t *)0x40031000)) |
#define | TIMER1_TAMR_R (*((volatile uint32_t *)0x40031004)) |
#define | TIMER1_TBMR_R (*((volatile uint32_t *)0x40031008)) |
#define | TIMER1_CTL_R (*((volatile uint32_t *)0x4003100C)) |
#define | TIMER1_SYNC_R (*((volatile uint32_t *)0x40031010)) |
#define | TIMER1_IMR_R (*((volatile uint32_t *)0x40031018)) |
#define | TIMER1_RIS_R (*((volatile uint32_t *)0x4003101C)) |
#define | TIMER1_MIS_R (*((volatile uint32_t *)0x40031020)) |
#define | TIMER1_ICR_R (*((volatile uint32_t *)0x40031024)) |
#define | TIMER1_TAILR_R (*((volatile uint32_t *)0x40031028)) |
#define | TIMER1_TBILR_R (*((volatile uint32_t *)0x4003102C)) |
#define | TIMER1_TAMATCHR_R (*((volatile uint32_t *)0x40031030)) |
#define | TIMER1_TBMATCHR_R (*((volatile uint32_t *)0x40031034)) |
#define | TIMER1_TAPR_R (*((volatile uint32_t *)0x40031038)) |
#define | TIMER1_TBPR_R (*((volatile uint32_t *)0x4003103C)) |
#define | TIMER1_TAPMR_R (*((volatile uint32_t *)0x40031040)) |
#define | TIMER1_TBPMR_R (*((volatile uint32_t *)0x40031044)) |
#define | TIMER1_TAR_R (*((volatile uint32_t *)0x40031048)) |
#define | TIMER1_TBR_R (*((volatile uint32_t *)0x4003104C)) |
#define | TIMER1_TAV_R (*((volatile uint32_t *)0x40031050)) |
#define | TIMER1_TBV_R (*((volatile uint32_t *)0x40031054)) |
#define | TIMER1_RTCPD_R (*((volatile uint32_t *)0x40031058)) |
#define | TIMER1_TAPS_R (*((volatile uint32_t *)0x4003105C)) |
#define | TIMER1_TBPS_R (*((volatile uint32_t *)0x40031060)) |
#define | TIMER1_TAPV_R (*((volatile uint32_t *)0x40031064)) |
#define | TIMER1_TBPV_R (*((volatile uint32_t *)0x40031068)) |
#define | TIMER1_PP_R (*((volatile uint32_t *)0x40031FC0)) |
#define | TIMER2_CFG_R (*((volatile uint32_t *)0x40032000)) |
#define | TIMER2_TAMR_R (*((volatile uint32_t *)0x40032004)) |
#define | TIMER2_TBMR_R (*((volatile uint32_t *)0x40032008)) |
#define | TIMER2_CTL_R (*((volatile uint32_t *)0x4003200C)) |
#define | TIMER2_SYNC_R (*((volatile uint32_t *)0x40032010)) |
#define | TIMER2_IMR_R (*((volatile uint32_t *)0x40032018)) |
#define | TIMER2_RIS_R (*((volatile uint32_t *)0x4003201C)) |
#define | TIMER2_MIS_R (*((volatile uint32_t *)0x40032020)) |
#define | TIMER2_ICR_R (*((volatile uint32_t *)0x40032024)) |
#define | TIMER2_TAILR_R (*((volatile uint32_t *)0x40032028)) |
#define | TIMER2_TBILR_R (*((volatile uint32_t *)0x4003202C)) |
#define | TIMER2_TAMATCHR_R (*((volatile uint32_t *)0x40032030)) |
#define | TIMER2_TBMATCHR_R (*((volatile uint32_t *)0x40032034)) |
#define | TIMER2_TAPR_R (*((volatile uint32_t *)0x40032038)) |
#define | TIMER2_TBPR_R (*((volatile uint32_t *)0x4003203C)) |
#define | TIMER2_TAPMR_R (*((volatile uint32_t *)0x40032040)) |
#define | TIMER2_TBPMR_R (*((volatile uint32_t *)0x40032044)) |
#define | TIMER2_TAR_R (*((volatile uint32_t *)0x40032048)) |
#define | TIMER2_TBR_R (*((volatile uint32_t *)0x4003204C)) |
#define | TIMER2_TAV_R (*((volatile uint32_t *)0x40032050)) |
#define | TIMER2_TBV_R (*((volatile uint32_t *)0x40032054)) |
#define | TIMER2_RTCPD_R (*((volatile uint32_t *)0x40032058)) |
#define | TIMER2_TAPS_R (*((volatile uint32_t *)0x4003205C)) |
#define | TIMER2_TBPS_R (*((volatile uint32_t *)0x40032060)) |
#define | TIMER2_TAPV_R (*((volatile uint32_t *)0x40032064)) |
#define | TIMER2_TBPV_R (*((volatile uint32_t *)0x40032068)) |
#define | TIMER2_PP_R (*((volatile uint32_t *)0x40032FC0)) |
#define | TIMER3_CFG_R (*((volatile uint32_t *)0x40033000)) |
#define | TIMER3_TAMR_R (*((volatile uint32_t *)0x40033004)) |
#define | TIMER3_TBMR_R (*((volatile uint32_t *)0x40033008)) |
#define | TIMER3_CTL_R (*((volatile uint32_t *)0x4003300C)) |
#define | TIMER3_SYNC_R (*((volatile uint32_t *)0x40033010)) |
#define | TIMER3_IMR_R (*((volatile uint32_t *)0x40033018)) |
#define | TIMER3_RIS_R (*((volatile uint32_t *)0x4003301C)) |
#define | TIMER3_MIS_R (*((volatile uint32_t *)0x40033020)) |
#define | TIMER3_ICR_R (*((volatile uint32_t *)0x40033024)) |
#define | TIMER3_TAILR_R (*((volatile uint32_t *)0x40033028)) |
#define | TIMER3_TBILR_R (*((volatile uint32_t *)0x4003302C)) |
#define | TIMER3_TAMATCHR_R (*((volatile uint32_t *)0x40033030)) |
#define | TIMER3_TBMATCHR_R (*((volatile uint32_t *)0x40033034)) |
#define | TIMER3_TAPR_R (*((volatile uint32_t *)0x40033038)) |
#define | TIMER3_TBPR_R (*((volatile uint32_t *)0x4003303C)) |
#define | TIMER3_TAPMR_R (*((volatile uint32_t *)0x40033040)) |
#define | TIMER3_TBPMR_R (*((volatile uint32_t *)0x40033044)) |
#define | TIMER3_TAR_R (*((volatile uint32_t *)0x40033048)) |
#define | TIMER3_TBR_R (*((volatile uint32_t *)0x4003304C)) |
#define | TIMER3_TAV_R (*((volatile uint32_t *)0x40033050)) |
#define | TIMER3_TBV_R (*((volatile uint32_t *)0x40033054)) |
#define | TIMER3_RTCPD_R (*((volatile uint32_t *)0x40033058)) |
#define | TIMER3_TAPS_R (*((volatile uint32_t *)0x4003305C)) |
#define | TIMER3_TBPS_R (*((volatile uint32_t *)0x40033060)) |
#define | TIMER3_TAPV_R (*((volatile uint32_t *)0x40033064)) |
#define | TIMER3_TBPV_R (*((volatile uint32_t *)0x40033068)) |
#define | TIMER3_PP_R (*((volatile uint32_t *)0x40033FC0)) |
#define | TIMER4_CFG_R (*((volatile uint32_t *)0x40034000)) |
#define | TIMER4_TAMR_R (*((volatile uint32_t *)0x40034004)) |
#define | TIMER4_TBMR_R (*((volatile uint32_t *)0x40034008)) |
#define | TIMER4_CTL_R (*((volatile uint32_t *)0x4003400C)) |
#define | TIMER4_SYNC_R (*((volatile uint32_t *)0x40034010)) |
#define | TIMER4_IMR_R (*((volatile uint32_t *)0x40034018)) |
#define | TIMER4_RIS_R (*((volatile uint32_t *)0x4003401C)) |
#define | TIMER4_MIS_R (*((volatile uint32_t *)0x40034020)) |
#define | TIMER4_ICR_R (*((volatile uint32_t *)0x40034024)) |
#define | TIMER4_TAILR_R (*((volatile uint32_t *)0x40034028)) |
#define | TIMER4_TBILR_R (*((volatile uint32_t *)0x4003402C)) |
#define | TIMER4_TAMATCHR_R (*((volatile uint32_t *)0x40034030)) |
#define | TIMER4_TBMATCHR_R (*((volatile uint32_t *)0x40034034)) |
#define | TIMER4_TAPR_R (*((volatile uint32_t *)0x40034038)) |
#define | TIMER4_TBPR_R (*((volatile uint32_t *)0x4003403C)) |
#define | TIMER4_TAPMR_R (*((volatile uint32_t *)0x40034040)) |
#define | TIMER4_TBPMR_R (*((volatile uint32_t *)0x40034044)) |
#define | TIMER4_TAR_R (*((volatile uint32_t *)0x40034048)) |
#define | TIMER4_TBR_R (*((volatile uint32_t *)0x4003404C)) |
#define | TIMER4_TAV_R (*((volatile uint32_t *)0x40034050)) |
#define | TIMER4_TBV_R (*((volatile uint32_t *)0x40034054)) |
#define | TIMER4_RTCPD_R (*((volatile uint32_t *)0x40034058)) |
#define | TIMER4_TAPS_R (*((volatile uint32_t *)0x4003405C)) |
#define | TIMER4_TBPS_R (*((volatile uint32_t *)0x40034060)) |
#define | TIMER4_TAPV_R (*((volatile uint32_t *)0x40034064)) |
#define | TIMER4_TBPV_R (*((volatile uint32_t *)0x40034068)) |
#define | TIMER4_PP_R (*((volatile uint32_t *)0x40034FC0)) |
#define | TIMER5_CFG_R (*((volatile uint32_t *)0x40035000)) |
#define | TIMER5_TAMR_R (*((volatile uint32_t *)0x40035004)) |
#define | TIMER5_TBMR_R (*((volatile uint32_t *)0x40035008)) |
#define | TIMER5_CTL_R (*((volatile uint32_t *)0x4003500C)) |
#define | TIMER5_SYNC_R (*((volatile uint32_t *)0x40035010)) |
#define | TIMER5_IMR_R (*((volatile uint32_t *)0x40035018)) |
#define | TIMER5_RIS_R (*((volatile uint32_t *)0x4003501C)) |
#define | TIMER5_MIS_R (*((volatile uint32_t *)0x40035020)) |
#define | TIMER5_ICR_R (*((volatile uint32_t *)0x40035024)) |
#define | TIMER5_TAILR_R (*((volatile uint32_t *)0x40035028)) |
#define | TIMER5_TBILR_R (*((volatile uint32_t *)0x4003502C)) |
#define | TIMER5_TAMATCHR_R (*((volatile uint32_t *)0x40035030)) |
#define | TIMER5_TBMATCHR_R (*((volatile uint32_t *)0x40035034)) |
#define | TIMER5_TAPR_R (*((volatile uint32_t *)0x40035038)) |
#define | TIMER5_TBPR_R (*((volatile uint32_t *)0x4003503C)) |
#define | TIMER5_TAPMR_R (*((volatile uint32_t *)0x40035040)) |
#define | TIMER5_TBPMR_R (*((volatile uint32_t *)0x40035044)) |
#define | TIMER5_TAR_R (*((volatile uint32_t *)0x40035048)) |
#define | TIMER5_TBR_R (*((volatile uint32_t *)0x4003504C)) |
#define | TIMER5_TAV_R (*((volatile uint32_t *)0x40035050)) |
#define | TIMER5_TBV_R (*((volatile uint32_t *)0x40035054)) |
#define | TIMER5_RTCPD_R (*((volatile uint32_t *)0x40035058)) |
#define | TIMER5_TAPS_R (*((volatile uint32_t *)0x4003505C)) |
#define | TIMER5_TBPS_R (*((volatile uint32_t *)0x40035060)) |
#define | TIMER5_TAPV_R (*((volatile uint32_t *)0x40035064)) |
#define | TIMER5_TBPV_R (*((volatile uint32_t *)0x40035068)) |
#define | TIMER5_PP_R (*((volatile uint32_t *)0x40035FC0)) |
#define | WTIMER0_CFG_R (*((volatile uint32_t *)0x40036000)) |
#define | WTIMER0_TAMR_R (*((volatile uint32_t *)0x40036004)) |
#define | WTIMER0_TBMR_R (*((volatile uint32_t *)0x40036008)) |
#define | WTIMER0_CTL_R (*((volatile uint32_t *)0x4003600C)) |
#define | WTIMER0_SYNC_R (*((volatile uint32_t *)0x40036010)) |
#define | WTIMER0_IMR_R (*((volatile uint32_t *)0x40036018)) |
#define | WTIMER0_RIS_R (*((volatile uint32_t *)0x4003601C)) |
#define | WTIMER0_MIS_R (*((volatile uint32_t *)0x40036020)) |
#define | WTIMER0_ICR_R (*((volatile uint32_t *)0x40036024)) |
#define | WTIMER0_TAILR_R (*((volatile uint32_t *)0x40036028)) |
#define | WTIMER0_TBILR_R (*((volatile uint32_t *)0x4003602C)) |
#define | WTIMER0_TAMATCHR_R (*((volatile uint32_t *)0x40036030)) |
#define | WTIMER0_TBMATCHR_R (*((volatile uint32_t *)0x40036034)) |
#define | WTIMER0_TAPR_R (*((volatile uint32_t *)0x40036038)) |
#define | WTIMER0_TBPR_R (*((volatile uint32_t *)0x4003603C)) |
#define | WTIMER0_TAPMR_R (*((volatile uint32_t *)0x40036040)) |
#define | WTIMER0_TBPMR_R (*((volatile uint32_t *)0x40036044)) |
#define | WTIMER0_TAR_R (*((volatile uint32_t *)0x40036048)) |
#define | WTIMER0_TBR_R (*((volatile uint32_t *)0x4003604C)) |
#define | WTIMER0_TAV_R (*((volatile uint32_t *)0x40036050)) |
#define | WTIMER0_TBV_R (*((volatile uint32_t *)0x40036054)) |
#define | WTIMER0_RTCPD_R (*((volatile uint32_t *)0x40036058)) |
#define | WTIMER0_TAPS_R (*((volatile uint32_t *)0x4003605C)) |
#define | WTIMER0_TBPS_R (*((volatile uint32_t *)0x40036060)) |
#define | WTIMER0_TAPV_R (*((volatile uint32_t *)0x40036064)) |
#define | WTIMER0_TBPV_R (*((volatile uint32_t *)0x40036068)) |
#define | WTIMER0_PP_R (*((volatile uint32_t *)0x40036FC0)) |
#define | WTIMER1_CFG_R (*((volatile uint32_t *)0x40037000)) |
#define | WTIMER1_TAMR_R (*((volatile uint32_t *)0x40037004)) |
#define | WTIMER1_TBMR_R (*((volatile uint32_t *)0x40037008)) |
#define | WTIMER1_CTL_R (*((volatile uint32_t *)0x4003700C)) |
#define | WTIMER1_SYNC_R (*((volatile uint32_t *)0x40037010)) |
#define | WTIMER1_IMR_R (*((volatile uint32_t *)0x40037018)) |
#define | WTIMER1_RIS_R (*((volatile uint32_t *)0x4003701C)) |
#define | WTIMER1_MIS_R (*((volatile uint32_t *)0x40037020)) |
#define | WTIMER1_ICR_R (*((volatile uint32_t *)0x40037024)) |
#define | WTIMER1_TAILR_R (*((volatile uint32_t *)0x40037028)) |
#define | WTIMER1_TBILR_R (*((volatile uint32_t *)0x4003702C)) |
#define | WTIMER1_TAMATCHR_R (*((volatile uint32_t *)0x40037030)) |
#define | WTIMER1_TBMATCHR_R (*((volatile uint32_t *)0x40037034)) |
#define | WTIMER1_TAPR_R (*((volatile uint32_t *)0x40037038)) |
#define | WTIMER1_TBPR_R (*((volatile uint32_t *)0x4003703C)) |
#define | WTIMER1_TAPMR_R (*((volatile uint32_t *)0x40037040)) |
#define | WTIMER1_TBPMR_R (*((volatile uint32_t *)0x40037044)) |
#define | WTIMER1_TAR_R (*((volatile uint32_t *)0x40037048)) |
#define | WTIMER1_TBR_R (*((volatile uint32_t *)0x4003704C)) |
#define | WTIMER1_TAV_R (*((volatile uint32_t *)0x40037050)) |
#define | WTIMER1_TBV_R (*((volatile uint32_t *)0x40037054)) |
#define | WTIMER1_RTCPD_R (*((volatile uint32_t *)0x40037058)) |
#define | WTIMER1_TAPS_R (*((volatile uint32_t *)0x4003705C)) |
#define | WTIMER1_TBPS_R (*((volatile uint32_t *)0x40037060)) |
#define | WTIMER1_TAPV_R (*((volatile uint32_t *)0x40037064)) |
#define | WTIMER1_TBPV_R (*((volatile uint32_t *)0x40037068)) |
#define | WTIMER1_PP_R (*((volatile uint32_t *)0x40037FC0)) |
#define | ADC0_ACTSS_R (*((volatile uint32_t *)0x40038000)) |
#define | ADC0_RIS_R (*((volatile uint32_t *)0x40038004)) |
#define | ADC0_IM_R (*((volatile uint32_t *)0x40038008)) |
#define | ADC0_ISC_R (*((volatile uint32_t *)0x4003800C)) |
#define | ADC0_OSTAT_R (*((volatile uint32_t *)0x40038010)) |
#define | ADC0_EMUX_R (*((volatile uint32_t *)0x40038014)) |
#define | ADC0_USTAT_R (*((volatile uint32_t *)0x40038018)) |
#define | ADC0_TSSEL_R (*((volatile uint32_t *)0x4003801C)) |
#define | ADC0_SSPRI_R (*((volatile uint32_t *)0x40038020)) |
#define | ADC0_SPC_R (*((volatile uint32_t *)0x40038024)) |
#define | ADC0_PSSI_R (*((volatile uint32_t *)0x40038028)) |
#define | ADC0_SAC_R (*((volatile uint32_t *)0x40038030)) |
#define | ADC0_DCISC_R (*((volatile uint32_t *)0x40038034)) |
#define | ADC0_CTL_R (*((volatile uint32_t *)0x40038038)) |
#define | ADC0_SSMUX0_R (*((volatile uint32_t *)0x40038040)) |
#define | ADC0_SSCTL0_R (*((volatile uint32_t *)0x40038044)) |
#define | ADC0_SSFIFO0_R (*((volatile uint32_t *)0x40038048)) |
#define | ADC0_SSFSTAT0_R (*((volatile uint32_t *)0x4003804C)) |
#define | ADC0_SSOP0_R (*((volatile uint32_t *)0x40038050)) |
#define | ADC0_SSDC0_R (*((volatile uint32_t *)0x40038054)) |
#define | ADC0_SSMUX1_R (*((volatile uint32_t *)0x40038060)) |
#define | ADC0_SSCTL1_R (*((volatile uint32_t *)0x40038064)) |
#define | ADC0_SSFIFO1_R (*((volatile uint32_t *)0x40038068)) |
#define | ADC0_SSFSTAT1_R (*((volatile uint32_t *)0x4003806C)) |
#define | ADC0_SSOP1_R (*((volatile uint32_t *)0x40038070)) |
#define | ADC0_SSDC1_R (*((volatile uint32_t *)0x40038074)) |
#define | ADC0_SSMUX2_R (*((volatile uint32_t *)0x40038080)) |
#define | ADC0_SSCTL2_R (*((volatile uint32_t *)0x40038084)) |
#define | ADC0_SSFIFO2_R (*((volatile uint32_t *)0x40038088)) |
#define | ADC0_SSFSTAT2_R (*((volatile uint32_t *)0x4003808C)) |
#define | ADC0_SSOP2_R (*((volatile uint32_t *)0x40038090)) |
#define | ADC0_SSDC2_R (*((volatile uint32_t *)0x40038094)) |
#define | ADC0_SSMUX3_R (*((volatile uint32_t *)0x400380A0)) |
#define | ADC0_SSCTL3_R (*((volatile uint32_t *)0x400380A4)) |
#define | ADC0_SSFIFO3_R (*((volatile uint32_t *)0x400380A8)) |
#define | ADC0_SSFSTAT3_R (*((volatile uint32_t *)0x400380AC)) |
#define | ADC0_SSOP3_R (*((volatile uint32_t *)0x400380B0)) |
#define | ADC0_SSDC3_R (*((volatile uint32_t *)0x400380B4)) |
#define | ADC0_DCRIC_R (*((volatile uint32_t *)0x40038D00)) |
#define | ADC0_DCCTL0_R (*((volatile uint32_t *)0x40038E00)) |
#define | ADC0_DCCTL1_R (*((volatile uint32_t *)0x40038E04)) |
#define | ADC0_DCCTL2_R (*((volatile uint32_t *)0x40038E08)) |
#define | ADC0_DCCTL3_R (*((volatile uint32_t *)0x40038E0C)) |
#define | ADC0_DCCTL4_R (*((volatile uint32_t *)0x40038E10)) |
#define | ADC0_DCCTL5_R (*((volatile uint32_t *)0x40038E14)) |
#define | ADC0_DCCTL6_R (*((volatile uint32_t *)0x40038E18)) |
#define | ADC0_DCCTL7_R (*((volatile uint32_t *)0x40038E1C)) |
#define | ADC0_DCCMP0_R (*((volatile uint32_t *)0x40038E40)) |
#define | ADC0_DCCMP1_R (*((volatile uint32_t *)0x40038E44)) |
#define | ADC0_DCCMP2_R (*((volatile uint32_t *)0x40038E48)) |
#define | ADC0_DCCMP3_R (*((volatile uint32_t *)0x40038E4C)) |
#define | ADC0_DCCMP4_R (*((volatile uint32_t *)0x40038E50)) |
#define | ADC0_DCCMP5_R (*((volatile uint32_t *)0x40038E54)) |
#define | ADC0_DCCMP6_R (*((volatile uint32_t *)0x40038E58)) |
#define | ADC0_DCCMP7_R (*((volatile uint32_t *)0x40038E5C)) |
#define | ADC0_PP_R (*((volatile uint32_t *)0x40038FC0)) |
#define | ADC0_PC_R (*((volatile uint32_t *)0x40038FC4)) |
#define | ADC0_CC_R (*((volatile uint32_t *)0x40038FC8)) |
#define | ADC1_ACTSS_R (*((volatile uint32_t *)0x40039000)) |
#define | ADC1_RIS_R (*((volatile uint32_t *)0x40039004)) |
#define | ADC1_IM_R (*((volatile uint32_t *)0x40039008)) |
#define | ADC1_ISC_R (*((volatile uint32_t *)0x4003900C)) |
#define | ADC1_OSTAT_R (*((volatile uint32_t *)0x40039010)) |
#define | ADC1_EMUX_R (*((volatile uint32_t *)0x40039014)) |
#define | ADC1_USTAT_R (*((volatile uint32_t *)0x40039018)) |
#define | ADC1_TSSEL_R (*((volatile uint32_t *)0x4003901C)) |
#define | ADC1_SSPRI_R (*((volatile uint32_t *)0x40039020)) |
#define | ADC1_SPC_R (*((volatile uint32_t *)0x40039024)) |
#define | ADC1_PSSI_R (*((volatile uint32_t *)0x40039028)) |
#define | ADC1_SAC_R (*((volatile uint32_t *)0x40039030)) |
#define | ADC1_DCISC_R (*((volatile uint32_t *)0x40039034)) |
#define | ADC1_CTL_R (*((volatile uint32_t *)0x40039038)) |
#define | ADC1_SSMUX0_R (*((volatile uint32_t *)0x40039040)) |
#define | ADC1_SSCTL0_R (*((volatile uint32_t *)0x40039044)) |
#define | ADC1_SSFIFO0_R (*((volatile uint32_t *)0x40039048)) |
#define | ADC1_SSFSTAT0_R (*((volatile uint32_t *)0x4003904C)) |
#define | ADC1_SSOP0_R (*((volatile uint32_t *)0x40039050)) |
#define | ADC1_SSDC0_R (*((volatile uint32_t *)0x40039054)) |
#define | ADC1_SSMUX1_R (*((volatile uint32_t *)0x40039060)) |
#define | ADC1_SSCTL1_R (*((volatile uint32_t *)0x40039064)) |
#define | ADC1_SSFIFO1_R (*((volatile uint32_t *)0x40039068)) |
#define | ADC1_SSFSTAT1_R (*((volatile uint32_t *)0x4003906C)) |
#define | ADC1_SSOP1_R (*((volatile uint32_t *)0x40039070)) |
#define | ADC1_SSDC1_R (*((volatile uint32_t *)0x40039074)) |
#define | ADC1_SSMUX2_R (*((volatile uint32_t *)0x40039080)) |
#define | ADC1_SSCTL2_R (*((volatile uint32_t *)0x40039084)) |
#define | ADC1_SSFIFO2_R (*((volatile uint32_t *)0x40039088)) |
#define | ADC1_SSFSTAT2_R (*((volatile uint32_t *)0x4003908C)) |
#define | ADC1_SSOP2_R (*((volatile uint32_t *)0x40039090)) |
#define | ADC1_SSDC2_R (*((volatile uint32_t *)0x40039094)) |
#define | ADC1_SSMUX3_R (*((volatile uint32_t *)0x400390A0)) |
#define | ADC1_SSCTL3_R (*((volatile uint32_t *)0x400390A4)) |
#define | ADC1_SSFIFO3_R (*((volatile uint32_t *)0x400390A8)) |
#define | ADC1_SSFSTAT3_R (*((volatile uint32_t *)0x400390AC)) |
#define | ADC1_SSOP3_R (*((volatile uint32_t *)0x400390B0)) |
#define | ADC1_SSDC3_R (*((volatile uint32_t *)0x400390B4)) |
#define | ADC1_DCRIC_R (*((volatile uint32_t *)0x40039D00)) |
#define | ADC1_DCCTL0_R (*((volatile uint32_t *)0x40039E00)) |
#define | ADC1_DCCTL1_R (*((volatile uint32_t *)0x40039E04)) |
#define | ADC1_DCCTL2_R (*((volatile uint32_t *)0x40039E08)) |
#define | ADC1_DCCTL3_R (*((volatile uint32_t *)0x40039E0C)) |
#define | ADC1_DCCTL4_R (*((volatile uint32_t *)0x40039E10)) |
#define | ADC1_DCCTL5_R (*((volatile uint32_t *)0x40039E14)) |
#define | ADC1_DCCTL6_R (*((volatile uint32_t *)0x40039E18)) |
#define | ADC1_DCCTL7_R (*((volatile uint32_t *)0x40039E1C)) |
#define | ADC1_DCCMP0_R (*((volatile uint32_t *)0x40039E40)) |
#define | ADC1_DCCMP1_R (*((volatile uint32_t *)0x40039E44)) |
#define | ADC1_DCCMP2_R (*((volatile uint32_t *)0x40039E48)) |
#define | ADC1_DCCMP3_R (*((volatile uint32_t *)0x40039E4C)) |
#define | ADC1_DCCMP4_R (*((volatile uint32_t *)0x40039E50)) |
#define | ADC1_DCCMP5_R (*((volatile uint32_t *)0x40039E54)) |
#define | ADC1_DCCMP6_R (*((volatile uint32_t *)0x40039E58)) |
#define | ADC1_DCCMP7_R (*((volatile uint32_t *)0x40039E5C)) |
#define | ADC1_PP_R (*((volatile uint32_t *)0x40039FC0)) |
#define | ADC1_PC_R (*((volatile uint32_t *)0x40039FC4)) |
#define | ADC1_CC_R (*((volatile uint32_t *)0x40039FC8)) |
#define | COMP_ACMIS_R (*((volatile uint32_t *)0x4003C000)) |
#define | COMP_ACRIS_R (*((volatile uint32_t *)0x4003C004)) |
#define | COMP_ACINTEN_R (*((volatile uint32_t *)0x4003C008)) |
#define | COMP_ACREFCTL_R (*((volatile uint32_t *)0x4003C010)) |
#define | COMP_ACSTAT0_R (*((volatile uint32_t *)0x4003C020)) |
#define | COMP_ACCTL0_R (*((volatile uint32_t *)0x4003C024)) |
#define | COMP_ACSTAT1_R (*((volatile uint32_t *)0x4003C040)) |
#define | COMP_ACCTL1_R (*((volatile uint32_t *)0x4003C044)) |
#define | COMP_PP_R (*((volatile uint32_t *)0x4003CFC0)) |
#define | CAN0_CTL_R (*((volatile uint32_t *)0x40040000)) |
#define | CAN0_STS_R (*((volatile uint32_t *)0x40040004)) |
#define | CAN0_ERR_R (*((volatile uint32_t *)0x40040008)) |
#define | CAN0_BIT_R (*((volatile uint32_t *)0x4004000C)) |
#define | CAN0_INT_R (*((volatile uint32_t *)0x40040010)) |
#define | CAN0_TST_R (*((volatile uint32_t *)0x40040014)) |
#define | CAN0_BRPE_R (*((volatile uint32_t *)0x40040018)) |
#define | CAN0_IF1CRQ_R (*((volatile uint32_t *)0x40040020)) |
#define | CAN0_IF1CMSK_R (*((volatile uint32_t *)0x40040024)) |
#define | CAN0_IF1MSK1_R (*((volatile uint32_t *)0x40040028)) |
#define | CAN0_IF1MSK2_R (*((volatile uint32_t *)0x4004002C)) |
#define | CAN0_IF1ARB1_R (*((volatile uint32_t *)0x40040030)) |
#define | CAN0_IF1ARB2_R (*((volatile uint32_t *)0x40040034)) |
#define | CAN0_IF1MCTL_R (*((volatile uint32_t *)0x40040038)) |
#define | CAN0_IF1DA1_R (*((volatile uint32_t *)0x4004003C)) |
#define | CAN0_IF1DA2_R (*((volatile uint32_t *)0x40040040)) |
#define | CAN0_IF1DB1_R (*((volatile uint32_t *)0x40040044)) |
#define | CAN0_IF1DB2_R (*((volatile uint32_t *)0x40040048)) |
#define | CAN0_IF2CRQ_R (*((volatile uint32_t *)0x40040080)) |
#define | CAN0_IF2CMSK_R (*((volatile uint32_t *)0x40040084)) |
#define | CAN0_IF2MSK1_R (*((volatile uint32_t *)0x40040088)) |
#define | CAN0_IF2MSK2_R (*((volatile uint32_t *)0x4004008C)) |
#define | CAN0_IF2ARB1_R (*((volatile uint32_t *)0x40040090)) |
#define | CAN0_IF2ARB2_R (*((volatile uint32_t *)0x40040094)) |
#define | CAN0_IF2MCTL_R (*((volatile uint32_t *)0x40040098)) |
#define | CAN0_IF2DA1_R (*((volatile uint32_t *)0x4004009C)) |
#define | CAN0_IF2DA2_R (*((volatile uint32_t *)0x400400A0)) |
#define | CAN0_IF2DB1_R (*((volatile uint32_t *)0x400400A4)) |
#define | CAN0_IF2DB2_R (*((volatile uint32_t *)0x400400A8)) |
#define | CAN0_TXRQ1_R (*((volatile uint32_t *)0x40040100)) |
#define | CAN0_TXRQ2_R (*((volatile uint32_t *)0x40040104)) |
#define | CAN0_NWDA1_R (*((volatile uint32_t *)0x40040120)) |
#define | CAN0_NWDA2_R (*((volatile uint32_t *)0x40040124)) |
#define | CAN0_MSG1INT_R (*((volatile uint32_t *)0x40040140)) |
#define | CAN0_MSG2INT_R (*((volatile uint32_t *)0x40040144)) |
#define | CAN0_MSG1VAL_R (*((volatile uint32_t *)0x40040160)) |
#define | CAN0_MSG2VAL_R (*((volatile uint32_t *)0x40040164)) |
#define | CAN1_CTL_R (*((volatile uint32_t *)0x40041000)) |
#define | CAN1_STS_R (*((volatile uint32_t *)0x40041004)) |
#define | CAN1_ERR_R (*((volatile uint32_t *)0x40041008)) |
#define | CAN1_BIT_R (*((volatile uint32_t *)0x4004100C)) |
#define | CAN1_INT_R (*((volatile uint32_t *)0x40041010)) |
#define | CAN1_TST_R (*((volatile uint32_t *)0x40041014)) |
#define | CAN1_BRPE_R (*((volatile uint32_t *)0x40041018)) |
#define | CAN1_IF1CRQ_R (*((volatile uint32_t *)0x40041020)) |
#define | CAN1_IF1CMSK_R (*((volatile uint32_t *)0x40041024)) |
#define | CAN1_IF1MSK1_R (*((volatile uint32_t *)0x40041028)) |
#define | CAN1_IF1MSK2_R (*((volatile uint32_t *)0x4004102C)) |
#define | CAN1_IF1ARB1_R (*((volatile uint32_t *)0x40041030)) |
#define | CAN1_IF1ARB2_R (*((volatile uint32_t *)0x40041034)) |
#define | CAN1_IF1MCTL_R (*((volatile uint32_t *)0x40041038)) |
#define | CAN1_IF1DA1_R (*((volatile uint32_t *)0x4004103C)) |
#define | CAN1_IF1DA2_R (*((volatile uint32_t *)0x40041040)) |
#define | CAN1_IF1DB1_R (*((volatile uint32_t *)0x40041044)) |
#define | CAN1_IF1DB2_R (*((volatile uint32_t *)0x40041048)) |
#define | CAN1_IF2CRQ_R (*((volatile uint32_t *)0x40041080)) |
#define | CAN1_IF2CMSK_R (*((volatile uint32_t *)0x40041084)) |
#define | CAN1_IF2MSK1_R (*((volatile uint32_t *)0x40041088)) |
#define | CAN1_IF2MSK2_R (*((volatile uint32_t *)0x4004108C)) |
#define | CAN1_IF2ARB1_R (*((volatile uint32_t *)0x40041090)) |
#define | CAN1_IF2ARB2_R (*((volatile uint32_t *)0x40041094)) |
#define | CAN1_IF2MCTL_R (*((volatile uint32_t *)0x40041098)) |
#define | CAN1_IF2DA1_R (*((volatile uint32_t *)0x4004109C)) |
#define | CAN1_IF2DA2_R (*((volatile uint32_t *)0x400410A0)) |
#define | CAN1_IF2DB1_R (*((volatile uint32_t *)0x400410A4)) |
#define | CAN1_IF2DB2_R (*((volatile uint32_t *)0x400410A8)) |
#define | CAN1_TXRQ1_R (*((volatile uint32_t *)0x40041100)) |
#define | CAN1_TXRQ2_R (*((volatile uint32_t *)0x40041104)) |
#define | CAN1_NWDA1_R (*((volatile uint32_t *)0x40041120)) |
#define | CAN1_NWDA2_R (*((volatile uint32_t *)0x40041124)) |
#define | CAN1_MSG1INT_R (*((volatile uint32_t *)0x40041140)) |
#define | CAN1_MSG2INT_R (*((volatile uint32_t *)0x40041144)) |
#define | CAN1_MSG1VAL_R (*((volatile uint32_t *)0x40041160)) |
#define | CAN1_MSG2VAL_R (*((volatile uint32_t *)0x40041164)) |
#define | WTIMER2_CFG_R (*((volatile uint32_t *)0x4004C000)) |
#define | WTIMER2_TAMR_R (*((volatile uint32_t *)0x4004C004)) |
#define | WTIMER2_TBMR_R (*((volatile uint32_t *)0x4004C008)) |
#define | WTIMER2_CTL_R (*((volatile uint32_t *)0x4004C00C)) |
#define | WTIMER2_SYNC_R (*((volatile uint32_t *)0x4004C010)) |
#define | WTIMER2_IMR_R (*((volatile uint32_t *)0x4004C018)) |
#define | WTIMER2_RIS_R (*((volatile uint32_t *)0x4004C01C)) |
#define | WTIMER2_MIS_R (*((volatile uint32_t *)0x4004C020)) |
#define | WTIMER2_ICR_R (*((volatile uint32_t *)0x4004C024)) |
#define | WTIMER2_TAILR_R (*((volatile uint32_t *)0x4004C028)) |
#define | WTIMER2_TBILR_R (*((volatile uint32_t *)0x4004C02C)) |
#define | WTIMER2_TAMATCHR_R (*((volatile uint32_t *)0x4004C030)) |
#define | WTIMER2_TBMATCHR_R (*((volatile uint32_t *)0x4004C034)) |
#define | WTIMER2_TAPR_R (*((volatile uint32_t *)0x4004C038)) |
#define | WTIMER2_TBPR_R (*((volatile uint32_t *)0x4004C03C)) |
#define | WTIMER2_TAPMR_R (*((volatile uint32_t *)0x4004C040)) |
#define | WTIMER2_TBPMR_R (*((volatile uint32_t *)0x4004C044)) |
#define | WTIMER2_TAR_R (*((volatile uint32_t *)0x4004C048)) |
#define | WTIMER2_TBR_R (*((volatile uint32_t *)0x4004C04C)) |
#define | WTIMER2_TAV_R (*((volatile uint32_t *)0x4004C050)) |
#define | WTIMER2_TBV_R (*((volatile uint32_t *)0x4004C054)) |
#define | WTIMER2_RTCPD_R (*((volatile uint32_t *)0x4004C058)) |
#define | WTIMER2_TAPS_R (*((volatile uint32_t *)0x4004C05C)) |
#define | WTIMER2_TBPS_R (*((volatile uint32_t *)0x4004C060)) |
#define | WTIMER2_TAPV_R (*((volatile uint32_t *)0x4004C064)) |
#define | WTIMER2_TBPV_R (*((volatile uint32_t *)0x4004C068)) |
#define | WTIMER2_PP_R (*((volatile uint32_t *)0x4004CFC0)) |
#define | WTIMER3_CFG_R (*((volatile uint32_t *)0x4004D000)) |
#define | WTIMER3_TAMR_R (*((volatile uint32_t *)0x4004D004)) |
#define | WTIMER3_TBMR_R (*((volatile uint32_t *)0x4004D008)) |
#define | WTIMER3_CTL_R (*((volatile uint32_t *)0x4004D00C)) |
#define | WTIMER3_SYNC_R (*((volatile uint32_t *)0x4004D010)) |
#define | WTIMER3_IMR_R (*((volatile uint32_t *)0x4004D018)) |
#define | WTIMER3_RIS_R (*((volatile uint32_t *)0x4004D01C)) |
#define | WTIMER3_MIS_R (*((volatile uint32_t *)0x4004D020)) |
#define | WTIMER3_ICR_R (*((volatile uint32_t *)0x4004D024)) |
#define | WTIMER3_TAILR_R (*((volatile uint32_t *)0x4004D028)) |
#define | WTIMER3_TBILR_R (*((volatile uint32_t *)0x4004D02C)) |
#define | WTIMER3_TAMATCHR_R (*((volatile uint32_t *)0x4004D030)) |
#define | WTIMER3_TBMATCHR_R (*((volatile uint32_t *)0x4004D034)) |
#define | WTIMER3_TAPR_R (*((volatile uint32_t *)0x4004D038)) |
#define | WTIMER3_TBPR_R (*((volatile uint32_t *)0x4004D03C)) |
#define | WTIMER3_TAPMR_R (*((volatile uint32_t *)0x4004D040)) |
#define | WTIMER3_TBPMR_R (*((volatile uint32_t *)0x4004D044)) |
#define | WTIMER3_TAR_R (*((volatile uint32_t *)0x4004D048)) |
#define | WTIMER3_TBR_R (*((volatile uint32_t *)0x4004D04C)) |
#define | WTIMER3_TAV_R (*((volatile uint32_t *)0x4004D050)) |
#define | WTIMER3_TBV_R (*((volatile uint32_t *)0x4004D054)) |
#define | WTIMER3_RTCPD_R (*((volatile uint32_t *)0x4004D058)) |
#define | WTIMER3_TAPS_R (*((volatile uint32_t *)0x4004D05C)) |
#define | WTIMER3_TBPS_R (*((volatile uint32_t *)0x4004D060)) |
#define | WTIMER3_TAPV_R (*((volatile uint32_t *)0x4004D064)) |
#define | WTIMER3_TBPV_R (*((volatile uint32_t *)0x4004D068)) |
#define | WTIMER3_PP_R (*((volatile uint32_t *)0x4004DFC0)) |
#define | WTIMER4_CFG_R (*((volatile uint32_t *)0x4004E000)) |
#define | WTIMER4_TAMR_R (*((volatile uint32_t *)0x4004E004)) |
#define | WTIMER4_TBMR_R (*((volatile uint32_t *)0x4004E008)) |
#define | WTIMER4_CTL_R (*((volatile uint32_t *)0x4004E00C)) |
#define | WTIMER4_SYNC_R (*((volatile uint32_t *)0x4004E010)) |
#define | WTIMER4_IMR_R (*((volatile uint32_t *)0x4004E018)) |
#define | WTIMER4_RIS_R (*((volatile uint32_t *)0x4004E01C)) |
#define | WTIMER4_MIS_R (*((volatile uint32_t *)0x4004E020)) |
#define | WTIMER4_ICR_R (*((volatile uint32_t *)0x4004E024)) |
#define | WTIMER4_TAILR_R (*((volatile uint32_t *)0x4004E028)) |
#define | WTIMER4_TBILR_R (*((volatile uint32_t *)0x4004E02C)) |
#define | WTIMER4_TAMATCHR_R (*((volatile uint32_t *)0x4004E030)) |
#define | WTIMER4_TBMATCHR_R (*((volatile uint32_t *)0x4004E034)) |
#define | WTIMER4_TAPR_R (*((volatile uint32_t *)0x4004E038)) |
#define | WTIMER4_TBPR_R (*((volatile uint32_t *)0x4004E03C)) |
#define | WTIMER4_TAPMR_R (*((volatile uint32_t *)0x4004E040)) |
#define | WTIMER4_TBPMR_R (*((volatile uint32_t *)0x4004E044)) |
#define | WTIMER4_TAR_R (*((volatile uint32_t *)0x4004E048)) |
#define | WTIMER4_TBR_R (*((volatile uint32_t *)0x4004E04C)) |
#define | WTIMER4_TAV_R (*((volatile uint32_t *)0x4004E050)) |
#define | WTIMER4_TBV_R (*((volatile uint32_t *)0x4004E054)) |
#define | WTIMER4_RTCPD_R (*((volatile uint32_t *)0x4004E058)) |
#define | WTIMER4_TAPS_R (*((volatile uint32_t *)0x4004E05C)) |
#define | WTIMER4_TBPS_R (*((volatile uint32_t *)0x4004E060)) |
#define | WTIMER4_TAPV_R (*((volatile uint32_t *)0x4004E064)) |
#define | WTIMER4_TBPV_R (*((volatile uint32_t *)0x4004E068)) |
#define | WTIMER4_PP_R (*((volatile uint32_t *)0x4004EFC0)) |
#define | WTIMER5_CFG_R (*((volatile uint32_t *)0x4004F000)) |
#define | WTIMER5_TAMR_R (*((volatile uint32_t *)0x4004F004)) |
#define | WTIMER5_TBMR_R (*((volatile uint32_t *)0x4004F008)) |
#define | WTIMER5_CTL_R (*((volatile uint32_t *)0x4004F00C)) |
#define | WTIMER5_SYNC_R (*((volatile uint32_t *)0x4004F010)) |
#define | WTIMER5_IMR_R (*((volatile uint32_t *)0x4004F018)) |
#define | WTIMER5_RIS_R (*((volatile uint32_t *)0x4004F01C)) |
#define | WTIMER5_MIS_R (*((volatile uint32_t *)0x4004F020)) |
#define | WTIMER5_ICR_R (*((volatile uint32_t *)0x4004F024)) |
#define | WTIMER5_TAILR_R (*((volatile uint32_t *)0x4004F028)) |
#define | WTIMER5_TBILR_R (*((volatile uint32_t *)0x4004F02C)) |
#define | WTIMER5_TAMATCHR_R (*((volatile uint32_t *)0x4004F030)) |
#define | WTIMER5_TBMATCHR_R (*((volatile uint32_t *)0x4004F034)) |
#define | WTIMER5_TAPR_R (*((volatile uint32_t *)0x4004F038)) |
#define | WTIMER5_TBPR_R (*((volatile uint32_t *)0x4004F03C)) |
#define | WTIMER5_TAPMR_R (*((volatile uint32_t *)0x4004F040)) |
#define | WTIMER5_TBPMR_R (*((volatile uint32_t *)0x4004F044)) |
#define | WTIMER5_TAR_R (*((volatile uint32_t *)0x4004F048)) |
#define | WTIMER5_TBR_R (*((volatile uint32_t *)0x4004F04C)) |
#define | WTIMER5_TAV_R (*((volatile uint32_t *)0x4004F050)) |
#define | WTIMER5_TBV_R (*((volatile uint32_t *)0x4004F054)) |
#define | WTIMER5_RTCPD_R (*((volatile uint32_t *)0x4004F058)) |
#define | WTIMER5_TAPS_R (*((volatile uint32_t *)0x4004F05C)) |
#define | WTIMER5_TBPS_R (*((volatile uint32_t *)0x4004F060)) |
#define | WTIMER5_TAPV_R (*((volatile uint32_t *)0x4004F064)) |
#define | WTIMER5_TBPV_R (*((volatile uint32_t *)0x4004F068)) |
#define | WTIMER5_PP_R (*((volatile uint32_t *)0x4004FFC0)) |
#define | USB0_FADDR_R (*((volatile uint8_t *)0x40050000)) |
#define | USB0_POWER_R (*((volatile uint8_t *)0x40050001)) |
#define | USB0_TXIS_R (*((volatile uint16_t *)0x40050002)) |
#define | USB0_RXIS_R (*((volatile uint16_t *)0x40050004)) |
#define | USB0_TXIE_R (*((volatile uint16_t *)0x40050006)) |
#define | USB0_RXIE_R (*((volatile uint16_t *)0x40050008)) |
#define | USB0_IS_R (*((volatile uint8_t *)0x4005000A)) |
#define | USB0_IE_R (*((volatile uint8_t *)0x4005000B)) |
#define | USB0_FRAME_R (*((volatile uint16_t *)0x4005000C)) |
#define | USB0_EPIDX_R (*((volatile uint8_t *)0x4005000E)) |
#define | USB0_TEST_R (*((volatile uint8_t *)0x4005000F)) |
#define | USB0_FIFO0_R (*((volatile uint32_t *)0x40050020)) |
#define | USB0_FIFO1_R (*((volatile uint32_t *)0x40050024)) |
#define | USB0_FIFO2_R (*((volatile uint32_t *)0x40050028)) |
#define | USB0_FIFO3_R (*((volatile uint32_t *)0x4005002C)) |
#define | USB0_FIFO4_R (*((volatile uint32_t *)0x40050030)) |
#define | USB0_FIFO5_R (*((volatile uint32_t *)0x40050034)) |
#define | USB0_FIFO6_R (*((volatile uint32_t *)0x40050038)) |
#define | USB0_FIFO7_R (*((volatile uint32_t *)0x4005003C)) |
#define | USB0_DEVCTL_R (*((volatile uint8_t *)0x40050060)) |
#define | USB0_TXFIFOSZ_R (*((volatile uint8_t *)0x40050062)) |
#define | USB0_RXFIFOSZ_R (*((volatile uint8_t *)0x40050063)) |
#define | USB0_TXFIFOADD_R (*((volatile uint16_t *)0x40050064)) |
#define | USB0_RXFIFOADD_R (*((volatile uint16_t *)0x40050066)) |
#define | USB0_CONTIM_R (*((volatile uint8_t *)0x4005007A)) |
#define | USB0_VPLEN_R (*((volatile uint8_t *)0x4005007B)) |
#define | USB0_FSEOF_R (*((volatile uint8_t *)0x4005007D)) |
#define | USB0_LSEOF_R (*((volatile uint8_t *)0x4005007E)) |
#define | USB0_TXFUNCADDR0_R (*((volatile uint8_t *)0x40050080)) |
#define | USB0_TXHUBADDR0_R (*((volatile uint8_t *)0x40050082)) |
#define | USB0_TXHUBPORT0_R (*((volatile uint8_t *)0x40050083)) |
#define | USB0_TXFUNCADDR1_R (*((volatile uint8_t *)0x40050088)) |
#define | USB0_TXHUBADDR1_R (*((volatile uint8_t *)0x4005008A)) |
#define | USB0_TXHUBPORT1_R (*((volatile uint8_t *)0x4005008B)) |
#define | USB0_RXFUNCADDR1_R (*((volatile uint8_t *)0x4005008C)) |
#define | USB0_RXHUBADDR1_R (*((volatile uint8_t *)0x4005008E)) |
#define | USB0_RXHUBPORT1_R (*((volatile uint8_t *)0x4005008F)) |
#define | USB0_TXFUNCADDR2_R (*((volatile uint8_t *)0x40050090)) |
#define | USB0_TXHUBADDR2_R (*((volatile uint8_t *)0x40050092)) |
#define | USB0_TXHUBPORT2_R (*((volatile uint8_t *)0x40050093)) |
#define | USB0_RXFUNCADDR2_R (*((volatile uint8_t *)0x40050094)) |
#define | USB0_RXHUBADDR2_R (*((volatile uint8_t *)0x40050096)) |
#define | USB0_RXHUBPORT2_R (*((volatile uint8_t *)0x40050097)) |
#define | USB0_TXFUNCADDR3_R (*((volatile uint8_t *)0x40050098)) |
#define | USB0_TXHUBADDR3_R (*((volatile uint8_t *)0x4005009A)) |
#define | USB0_TXHUBPORT3_R (*((volatile uint8_t *)0x4005009B)) |
#define | USB0_RXFUNCADDR3_R (*((volatile uint8_t *)0x4005009C)) |
#define | USB0_RXHUBADDR3_R (*((volatile uint8_t *)0x4005009E)) |
#define | USB0_RXHUBPORT3_R (*((volatile uint8_t *)0x4005009F)) |
#define | USB0_TXFUNCADDR4_R (*((volatile uint8_t *)0x400500A0)) |
#define | USB0_TXHUBADDR4_R (*((volatile uint8_t *)0x400500A2)) |
#define | USB0_TXHUBPORT4_R (*((volatile uint8_t *)0x400500A3)) |
#define | USB0_RXFUNCADDR4_R (*((volatile uint8_t *)0x400500A4)) |
#define | USB0_RXHUBADDR4_R (*((volatile uint8_t *)0x400500A6)) |
#define | USB0_RXHUBPORT4_R (*((volatile uint8_t *)0x400500A7)) |
#define | USB0_TXFUNCADDR5_R (*((volatile uint8_t *)0x400500A8)) |
#define | USB0_TXHUBADDR5_R (*((volatile uint8_t *)0x400500AA)) |
#define | USB0_TXHUBPORT5_R (*((volatile uint8_t *)0x400500AB)) |
#define | USB0_RXFUNCADDR5_R (*((volatile uint8_t *)0x400500AC)) |
#define | USB0_RXHUBADDR5_R (*((volatile uint8_t *)0x400500AE)) |
#define | USB0_RXHUBPORT5_R (*((volatile uint8_t *)0x400500AF)) |
#define | USB0_TXFUNCADDR6_R (*((volatile uint8_t *)0x400500B0)) |
#define | USB0_TXHUBADDR6_R (*((volatile uint8_t *)0x400500B2)) |
#define | USB0_TXHUBPORT6_R (*((volatile uint8_t *)0x400500B3)) |
#define | USB0_RXFUNCADDR6_R (*((volatile uint8_t *)0x400500B4)) |
#define | USB0_RXHUBADDR6_R (*((volatile uint8_t *)0x400500B6)) |
#define | USB0_RXHUBPORT6_R (*((volatile uint8_t *)0x400500B7)) |
#define | USB0_TXFUNCADDR7_R (*((volatile uint8_t *)0x400500B8)) |
#define | USB0_TXHUBADDR7_R (*((volatile uint8_t *)0x400500BA)) |
#define | USB0_TXHUBPORT7_R (*((volatile uint8_t *)0x400500BB)) |
#define | USB0_RXFUNCADDR7_R (*((volatile uint8_t *)0x400500BC)) |
#define | USB0_RXHUBADDR7_R (*((volatile uint8_t *)0x400500BE)) |
#define | USB0_RXHUBPORT7_R (*((volatile uint8_t *)0x400500BF)) |
#define | USB0_CSRL0_R (*((volatile uint8_t *)0x40050102)) |
#define | USB0_CSRH0_R (*((volatile uint8_t *)0x40050103)) |
#define | USB0_COUNT0_R (*((volatile uint8_t *)0x40050108)) |
#define | USB0_TYPE0_R (*((volatile uint8_t *)0x4005010A)) |
#define | USB0_NAKLMT_R (*((volatile uint8_t *)0x4005010B)) |
#define | USB0_TXMAXP1_R (*((volatile uint16_t *)0x40050110)) |
#define | USB0_TXCSRL1_R (*((volatile uint8_t *)0x40050112)) |
#define | USB0_TXCSRH1_R (*((volatile uint8_t *)0x40050113)) |
#define | USB0_RXMAXP1_R (*((volatile uint16_t *)0x40050114)) |
#define | USB0_RXCSRL1_R (*((volatile uint8_t *)0x40050116)) |
#define | USB0_RXCSRH1_R (*((volatile uint8_t *)0x40050117)) |
#define | USB0_RXCOUNT1_R (*((volatile uint16_t *)0x40050118)) |
#define | USB0_TXTYPE1_R (*((volatile uint8_t *)0x4005011A)) |
#define | USB0_TXINTERVAL1_R (*((volatile uint8_t *)0x4005011B)) |
#define | USB0_RXTYPE1_R (*((volatile uint8_t *)0x4005011C)) |
#define | USB0_RXINTERVAL1_R (*((volatile uint8_t *)0x4005011D)) |
#define | USB0_TXMAXP2_R (*((volatile uint16_t *)0x40050120)) |
#define | USB0_TXCSRL2_R (*((volatile uint8_t *)0x40050122)) |
#define | USB0_TXCSRH2_R (*((volatile uint8_t *)0x40050123)) |
#define | USB0_RXMAXP2_R (*((volatile uint16_t *)0x40050124)) |
#define | USB0_RXCSRL2_R (*((volatile uint8_t *)0x40050126)) |
#define | USB0_RXCSRH2_R (*((volatile uint8_t *)0x40050127)) |
#define | USB0_RXCOUNT2_R (*((volatile uint16_t *)0x40050128)) |
#define | USB0_TXTYPE2_R (*((volatile uint8_t *)0x4005012A)) |
#define | USB0_TXINTERVAL2_R (*((volatile uint8_t *)0x4005012B)) |
#define | USB0_RXTYPE2_R (*((volatile uint8_t *)0x4005012C)) |
#define | USB0_RXINTERVAL2_R (*((volatile uint8_t *)0x4005012D)) |
#define | USB0_TXMAXP3_R (*((volatile uint16_t *)0x40050130)) |
#define | USB0_TXCSRL3_R (*((volatile uint8_t *)0x40050132)) |
#define | USB0_TXCSRH3_R (*((volatile uint8_t *)0x40050133)) |
#define | USB0_RXMAXP3_R (*((volatile uint16_t *)0x40050134)) |
#define | USB0_RXCSRL3_R (*((volatile uint8_t *)0x40050136)) |
#define | USB0_RXCSRH3_R (*((volatile uint8_t *)0x40050137)) |
#define | USB0_RXCOUNT3_R (*((volatile uint16_t *)0x40050138)) |
#define | USB0_TXTYPE3_R (*((volatile uint8_t *)0x4005013A)) |
#define | USB0_TXINTERVAL3_R (*((volatile uint8_t *)0x4005013B)) |
#define | USB0_RXTYPE3_R (*((volatile uint8_t *)0x4005013C)) |
#define | USB0_RXINTERVAL3_R (*((volatile uint8_t *)0x4005013D)) |
#define | USB0_TXMAXP4_R (*((volatile uint16_t *)0x40050140)) |
#define | USB0_TXCSRL4_R (*((volatile uint8_t *)0x40050142)) |
#define | USB0_TXCSRH4_R (*((volatile uint8_t *)0x40050143)) |
#define | USB0_RXMAXP4_R (*((volatile uint16_t *)0x40050144)) |
#define | USB0_RXCSRL4_R (*((volatile uint8_t *)0x40050146)) |
#define | USB0_RXCSRH4_R (*((volatile uint8_t *)0x40050147)) |
#define | USB0_RXCOUNT4_R (*((volatile uint16_t *)0x40050148)) |
#define | USB0_TXTYPE4_R (*((volatile uint8_t *)0x4005014A)) |
#define | USB0_TXINTERVAL4_R (*((volatile uint8_t *)0x4005014B)) |
#define | USB0_RXTYPE4_R (*((volatile uint8_t *)0x4005014C)) |
#define | USB0_RXINTERVAL4_R (*((volatile uint8_t *)0x4005014D)) |
#define | USB0_TXMAXP5_R (*((volatile uint16_t *)0x40050150)) |
#define | USB0_TXCSRL5_R (*((volatile uint8_t *)0x40050152)) |
#define | USB0_TXCSRH5_R (*((volatile uint8_t *)0x40050153)) |
#define | USB0_RXMAXP5_R (*((volatile uint16_t *)0x40050154)) |
#define | USB0_RXCSRL5_R (*((volatile uint8_t *)0x40050156)) |
#define | USB0_RXCSRH5_R (*((volatile uint8_t *)0x40050157)) |
#define | USB0_RXCOUNT5_R (*((volatile uint16_t *)0x40050158)) |
#define | USB0_TXTYPE5_R (*((volatile uint8_t *)0x4005015A)) |
#define | USB0_TXINTERVAL5_R (*((volatile uint8_t *)0x4005015B)) |
#define | USB0_RXTYPE5_R (*((volatile uint8_t *)0x4005015C)) |
#define | USB0_RXINTERVAL5_R (*((volatile uint8_t *)0x4005015D)) |
#define | USB0_TXMAXP6_R (*((volatile uint16_t *)0x40050160)) |
#define | USB0_TXCSRL6_R (*((volatile uint8_t *)0x40050162)) |
#define | USB0_TXCSRH6_R (*((volatile uint8_t *)0x40050163)) |
#define | USB0_RXMAXP6_R (*((volatile uint16_t *)0x40050164)) |
#define | USB0_RXCSRL6_R (*((volatile uint8_t *)0x40050166)) |
#define | USB0_RXCSRH6_R (*((volatile uint8_t *)0x40050167)) |
#define | USB0_RXCOUNT6_R (*((volatile uint16_t *)0x40050168)) |
#define | USB0_TXTYPE6_R (*((volatile uint8_t *)0x4005016A)) |
#define | USB0_TXINTERVAL6_R (*((volatile uint8_t *)0x4005016B)) |
#define | USB0_RXTYPE6_R (*((volatile uint8_t *)0x4005016C)) |
#define | USB0_RXINTERVAL6_R (*((volatile uint8_t *)0x4005016D)) |
#define | USB0_TXMAXP7_R (*((volatile uint16_t *)0x40050170)) |
#define | USB0_TXCSRL7_R (*((volatile uint8_t *)0x40050172)) |
#define | USB0_TXCSRH7_R (*((volatile uint8_t *)0x40050173)) |
#define | USB0_RXMAXP7_R (*((volatile uint16_t *)0x40050174)) |
#define | USB0_RXCSRL7_R (*((volatile uint8_t *)0x40050176)) |
#define | USB0_RXCSRH7_R (*((volatile uint8_t *)0x40050177)) |
#define | USB0_RXCOUNT7_R (*((volatile uint16_t *)0x40050178)) |
#define | USB0_TXTYPE7_R (*((volatile uint8_t *)0x4005017A)) |
#define | USB0_TXINTERVAL7_R (*((volatile uint8_t *)0x4005017B)) |
#define | USB0_RXTYPE7_R (*((volatile uint8_t *)0x4005017C)) |
#define | USB0_RXINTERVAL7_R (*((volatile uint8_t *)0x4005017D)) |
#define | USB0_RQPKTCOUNT1_R (*((volatile uint16_t *)0x40050304)) |
#define | USB0_RQPKTCOUNT2_R (*((volatile uint16_t *)0x40050308)) |
#define | USB0_RQPKTCOUNT3_R (*((volatile uint16_t *)0x4005030C)) |
#define | USB0_RQPKTCOUNT4_R (*((volatile uint16_t *)0x40050310)) |
#define | USB0_RQPKTCOUNT5_R (*((volatile uint16_t *)0x40050314)) |
#define | USB0_RQPKTCOUNT6_R (*((volatile uint16_t *)0x40050318)) |
#define | USB0_RQPKTCOUNT7_R (*((volatile uint16_t *)0x4005031C)) |
#define | USB0_RXDPKTBUFDIS_R (*((volatile uint16_t *)0x40050340)) |
#define | USB0_TXDPKTBUFDIS_R (*((volatile uint16_t *)0x40050342)) |
#define | USB0_EPC_R (*((volatile uint32_t *)0x40050400)) |
#define | USB0_EPCRIS_R (*((volatile uint32_t *)0x40050404)) |
#define | USB0_EPCIM_R (*((volatile uint32_t *)0x40050408)) |
#define | USB0_EPCISC_R (*((volatile uint32_t *)0x4005040C)) |
#define | USB0_DRRIS_R (*((volatile uint32_t *)0x40050410)) |
#define | USB0_DRIM_R (*((volatile uint32_t *)0x40050414)) |
#define | USB0_DRISC_R (*((volatile uint32_t *)0x40050418)) |
#define | USB0_GPCS_R (*((volatile uint32_t *)0x4005041C)) |
#define | USB0_VDC_R (*((volatile uint32_t *)0x40050430)) |
#define | USB0_VDCRIS_R (*((volatile uint32_t *)0x40050434)) |
#define | USB0_VDCIM_R (*((volatile uint32_t *)0x40050438)) |
#define | USB0_VDCISC_R (*((volatile uint32_t *)0x4005043C)) |
#define | USB0_IDVRIS_R (*((volatile uint32_t *)0x40050444)) |
#define | USB0_IDVIM_R (*((volatile uint32_t *)0x40050448)) |
#define | USB0_IDVISC_R (*((volatile uint32_t *)0x4005044C)) |
#define | USB0_DMASEL_R (*((volatile uint32_t *)0x40050450)) |
#define | USB0_PP_R (*((volatile uint32_t *)0x40050FC0)) |
#define | GPIO_PORTA_AHB_DATA_BITS_R ((volatile uint32_t *)0x40058000) |
#define | GPIO_PORTA_AHB_DATA_R (*((volatile uint32_t *)0x400583FC)) |
#define | GPIO_PORTA_AHB_DIR_R (*((volatile uint32_t *)0x40058400)) |
#define | GPIO_PORTA_AHB_IS_R (*((volatile uint32_t *)0x40058404)) |
#define | GPIO_PORTA_AHB_IBE_R (*((volatile uint32_t *)0x40058408)) |
#define | GPIO_PORTA_AHB_IEV_R (*((volatile uint32_t *)0x4005840C)) |
#define | GPIO_PORTA_AHB_IM_R (*((volatile uint32_t *)0x40058410)) |
#define | GPIO_PORTA_AHB_RIS_R (*((volatile uint32_t *)0x40058414)) |
#define | GPIO_PORTA_AHB_MIS_R (*((volatile uint32_t *)0x40058418)) |
#define | GPIO_PORTA_AHB_ICR_R (*((volatile uint32_t *)0x4005841C)) |
#define | GPIO_PORTA_AHB_AFSEL_R (*((volatile uint32_t *)0x40058420)) |
#define | GPIO_PORTA_AHB_DR2R_R (*((volatile uint32_t *)0x40058500)) |
#define | GPIO_PORTA_AHB_DR4R_R (*((volatile uint32_t *)0x40058504)) |
#define | GPIO_PORTA_AHB_DR8R_R (*((volatile uint32_t *)0x40058508)) |
#define | GPIO_PORTA_AHB_ODR_R (*((volatile uint32_t *)0x4005850C)) |
#define | GPIO_PORTA_AHB_PUR_R (*((volatile uint32_t *)0x40058510)) |
#define | GPIO_PORTA_AHB_PDR_R (*((volatile uint32_t *)0x40058514)) |
#define | GPIO_PORTA_AHB_SLR_R (*((volatile uint32_t *)0x40058518)) |
#define | GPIO_PORTA_AHB_DEN_R (*((volatile uint32_t *)0x4005851C)) |
#define | GPIO_PORTA_AHB_LOCK_R (*((volatile uint32_t *)0x40058520)) |
#define | GPIO_PORTA_AHB_CR_R (*((volatile uint32_t *)0x40058524)) |
#define | GPIO_PORTA_AHB_AMSEL_R (*((volatile uint32_t *)0x40058528)) |
#define | GPIO_PORTA_AHB_PCTL_R (*((volatile uint32_t *)0x4005852C)) |
#define | GPIO_PORTA_AHB_ADCCTL_R (*((volatile uint32_t *)0x40058530)) |
#define | GPIO_PORTA_AHB_DMACTL_R (*((volatile uint32_t *)0x40058534)) |
#define | GPIO_PORTB_AHB_DATA_BITS_R ((volatile uint32_t *)0x40059000) |
#define | GPIO_PORTB_AHB_DATA_R (*((volatile uint32_t *)0x400593FC)) |
#define | GPIO_PORTB_AHB_DIR_R (*((volatile uint32_t *)0x40059400)) |
#define | GPIO_PORTB_AHB_IS_R (*((volatile uint32_t *)0x40059404)) |
#define | GPIO_PORTB_AHB_IBE_R (*((volatile uint32_t *)0x40059408)) |
#define | GPIO_PORTB_AHB_IEV_R (*((volatile uint32_t *)0x4005940C)) |
#define | GPIO_PORTB_AHB_IM_R (*((volatile uint32_t *)0x40059410)) |
#define | GPIO_PORTB_AHB_RIS_R (*((volatile uint32_t *)0x40059414)) |
#define | GPIO_PORTB_AHB_MIS_R (*((volatile uint32_t *)0x40059418)) |
#define | GPIO_PORTB_AHB_ICR_R (*((volatile uint32_t *)0x4005941C)) |
#define | GPIO_PORTB_AHB_AFSEL_R (*((volatile uint32_t *)0x40059420)) |
#define | GPIO_PORTB_AHB_DR2R_R (*((volatile uint32_t *)0x40059500)) |
#define | GPIO_PORTB_AHB_DR4R_R (*((volatile uint32_t *)0x40059504)) |
#define | GPIO_PORTB_AHB_DR8R_R (*((volatile uint32_t *)0x40059508)) |
#define | GPIO_PORTB_AHB_ODR_R (*((volatile uint32_t *)0x4005950C)) |
#define | GPIO_PORTB_AHB_PUR_R (*((volatile uint32_t *)0x40059510)) |
#define | GPIO_PORTB_AHB_PDR_R (*((volatile uint32_t *)0x40059514)) |
#define | GPIO_PORTB_AHB_SLR_R (*((volatile uint32_t *)0x40059518)) |
#define | GPIO_PORTB_AHB_DEN_R (*((volatile uint32_t *)0x4005951C)) |
#define | GPIO_PORTB_AHB_LOCK_R (*((volatile uint32_t *)0x40059520)) |
#define | GPIO_PORTB_AHB_CR_R (*((volatile uint32_t *)0x40059524)) |
#define | GPIO_PORTB_AHB_AMSEL_R (*((volatile uint32_t *)0x40059528)) |
#define | GPIO_PORTB_AHB_PCTL_R (*((volatile uint32_t *)0x4005952C)) |
#define | GPIO_PORTB_AHB_ADCCTL_R (*((volatile uint32_t *)0x40059530)) |
#define | GPIO_PORTB_AHB_DMACTL_R (*((volatile uint32_t *)0x40059534)) |
#define | GPIO_PORTC_AHB_DATA_BITS_R ((volatile uint32_t *)0x4005A000) |
#define | GPIO_PORTC_AHB_DATA_R (*((volatile uint32_t *)0x4005A3FC)) |
#define | GPIO_PORTC_AHB_DIR_R (*((volatile uint32_t *)0x4005A400)) |
#define | GPIO_PORTC_AHB_IS_R (*((volatile uint32_t *)0x4005A404)) |
#define | GPIO_PORTC_AHB_IBE_R (*((volatile uint32_t *)0x4005A408)) |
#define | GPIO_PORTC_AHB_IEV_R (*((volatile uint32_t *)0x4005A40C)) |
#define | GPIO_PORTC_AHB_IM_R (*((volatile uint32_t *)0x4005A410)) |
#define | GPIO_PORTC_AHB_RIS_R (*((volatile uint32_t *)0x4005A414)) |
#define | GPIO_PORTC_AHB_MIS_R (*((volatile uint32_t *)0x4005A418)) |
#define | GPIO_PORTC_AHB_ICR_R (*((volatile uint32_t *)0x4005A41C)) |
#define | GPIO_PORTC_AHB_AFSEL_R (*((volatile uint32_t *)0x4005A420)) |
#define | GPIO_PORTC_AHB_DR2R_R (*((volatile uint32_t *)0x4005A500)) |
#define | GPIO_PORTC_AHB_DR4R_R (*((volatile uint32_t *)0x4005A504)) |
#define | GPIO_PORTC_AHB_DR8R_R (*((volatile uint32_t *)0x4005A508)) |
#define | GPIO_PORTC_AHB_ODR_R (*((volatile uint32_t *)0x4005A50C)) |
#define | GPIO_PORTC_AHB_PUR_R (*((volatile uint32_t *)0x4005A510)) |
#define | GPIO_PORTC_AHB_PDR_R (*((volatile uint32_t *)0x4005A514)) |
#define | GPIO_PORTC_AHB_SLR_R (*((volatile uint32_t *)0x4005A518)) |
#define | GPIO_PORTC_AHB_DEN_R (*((volatile uint32_t *)0x4005A51C)) |
#define | GPIO_PORTC_AHB_LOCK_R (*((volatile uint32_t *)0x4005A520)) |
#define | GPIO_PORTC_AHB_CR_R (*((volatile uint32_t *)0x4005A524)) |
#define | GPIO_PORTC_AHB_AMSEL_R (*((volatile uint32_t *)0x4005A528)) |
#define | GPIO_PORTC_AHB_PCTL_R (*((volatile uint32_t *)0x4005A52C)) |
#define | GPIO_PORTC_AHB_ADCCTL_R (*((volatile uint32_t *)0x4005A530)) |
#define | GPIO_PORTC_AHB_DMACTL_R (*((volatile uint32_t *)0x4005A534)) |
#define | GPIO_PORTD_AHB_DATA_BITS_R ((volatile uint32_t *)0x4005B000) |
#define | GPIO_PORTD_AHB_DATA_R (*((volatile uint32_t *)0x4005B3FC)) |
#define | GPIO_PORTD_AHB_DIR_R (*((volatile uint32_t *)0x4005B400)) |
#define | GPIO_PORTD_AHB_IS_R (*((volatile uint32_t *)0x4005B404)) |
#define | GPIO_PORTD_AHB_IBE_R (*((volatile uint32_t *)0x4005B408)) |
#define | GPIO_PORTD_AHB_IEV_R (*((volatile uint32_t *)0x4005B40C)) |
#define | GPIO_PORTD_AHB_IM_R (*((volatile uint32_t *)0x4005B410)) |
#define | GPIO_PORTD_AHB_RIS_R (*((volatile uint32_t *)0x4005B414)) |
#define | GPIO_PORTD_AHB_MIS_R (*((volatile uint32_t *)0x4005B418)) |
#define | GPIO_PORTD_AHB_ICR_R (*((volatile uint32_t *)0x4005B41C)) |
#define | GPIO_PORTD_AHB_AFSEL_R (*((volatile uint32_t *)0x4005B420)) |
#define | GPIO_PORTD_AHB_DR2R_R (*((volatile uint32_t *)0x4005B500)) |
#define | GPIO_PORTD_AHB_DR4R_R (*((volatile uint32_t *)0x4005B504)) |
#define | GPIO_PORTD_AHB_DR8R_R (*((volatile uint32_t *)0x4005B508)) |
#define | GPIO_PORTD_AHB_ODR_R (*((volatile uint32_t *)0x4005B50C)) |
#define | GPIO_PORTD_AHB_PUR_R (*((volatile uint32_t *)0x4005B510)) |
#define | GPIO_PORTD_AHB_PDR_R (*((volatile uint32_t *)0x4005B514)) |
#define | GPIO_PORTD_AHB_SLR_R (*((volatile uint32_t *)0x4005B518)) |
#define | GPIO_PORTD_AHB_DEN_R (*((volatile uint32_t *)0x4005B51C)) |
#define | GPIO_PORTD_AHB_LOCK_R (*((volatile uint32_t *)0x4005B520)) |
#define | GPIO_PORTD_AHB_CR_R (*((volatile uint32_t *)0x4005B524)) |
#define | GPIO_PORTD_AHB_AMSEL_R (*((volatile uint32_t *)0x4005B528)) |
#define | GPIO_PORTD_AHB_PCTL_R (*((volatile uint32_t *)0x4005B52C)) |
#define | GPIO_PORTD_AHB_ADCCTL_R (*((volatile uint32_t *)0x4005B530)) |
#define | GPIO_PORTD_AHB_DMACTL_R (*((volatile uint32_t *)0x4005B534)) |
#define | GPIO_PORTE_AHB_DATA_BITS_R ((volatile uint32_t *)0x4005C000) |
#define | GPIO_PORTE_AHB_DATA_R (*((volatile uint32_t *)0x4005C3FC)) |
#define | GPIO_PORTE_AHB_DIR_R (*((volatile uint32_t *)0x4005C400)) |
#define | GPIO_PORTE_AHB_IS_R (*((volatile uint32_t *)0x4005C404)) |
#define | GPIO_PORTE_AHB_IBE_R (*((volatile uint32_t *)0x4005C408)) |
#define | GPIO_PORTE_AHB_IEV_R (*((volatile uint32_t *)0x4005C40C)) |
#define | GPIO_PORTE_AHB_IM_R (*((volatile uint32_t *)0x4005C410)) |
#define | GPIO_PORTE_AHB_RIS_R (*((volatile uint32_t *)0x4005C414)) |
#define | GPIO_PORTE_AHB_MIS_R (*((volatile uint32_t *)0x4005C418)) |
#define | GPIO_PORTE_AHB_ICR_R (*((volatile uint32_t *)0x4005C41C)) |
#define | GPIO_PORTE_AHB_AFSEL_R (*((volatile uint32_t *)0x4005C420)) |
#define | GPIO_PORTE_AHB_DR2R_R (*((volatile uint32_t *)0x4005C500)) |
#define | GPIO_PORTE_AHB_DR4R_R (*((volatile uint32_t *)0x4005C504)) |
#define | GPIO_PORTE_AHB_DR8R_R (*((volatile uint32_t *)0x4005C508)) |
#define | GPIO_PORTE_AHB_ODR_R (*((volatile uint32_t *)0x4005C50C)) |
#define | GPIO_PORTE_AHB_PUR_R (*((volatile uint32_t *)0x4005C510)) |
#define | GPIO_PORTE_AHB_PDR_R (*((volatile uint32_t *)0x4005C514)) |
#define | GPIO_PORTE_AHB_SLR_R (*((volatile uint32_t *)0x4005C518)) |
#define | GPIO_PORTE_AHB_DEN_R (*((volatile uint32_t *)0x4005C51C)) |
#define | GPIO_PORTE_AHB_LOCK_R (*((volatile uint32_t *)0x4005C520)) |
#define | GPIO_PORTE_AHB_CR_R (*((volatile uint32_t *)0x4005C524)) |
#define | GPIO_PORTE_AHB_AMSEL_R (*((volatile uint32_t *)0x4005C528)) |
#define | GPIO_PORTE_AHB_PCTL_R (*((volatile uint32_t *)0x4005C52C)) |
#define | GPIO_PORTE_AHB_ADCCTL_R (*((volatile uint32_t *)0x4005C530)) |
#define | GPIO_PORTE_AHB_DMACTL_R (*((volatile uint32_t *)0x4005C534)) |
#define | GPIO_PORTF_AHB_DATA_BITS_R ((volatile uint32_t *)0x4005D000) |
#define | GPIO_PORTF_AHB_DATA_R (*((volatile uint32_t *)0x4005D3FC)) |
#define | GPIO_PORTF_AHB_DIR_R (*((volatile uint32_t *)0x4005D400)) |
#define | GPIO_PORTF_AHB_IS_R (*((volatile uint32_t *)0x4005D404)) |
#define | GPIO_PORTF_AHB_IBE_R (*((volatile uint32_t *)0x4005D408)) |
#define | GPIO_PORTF_AHB_IEV_R (*((volatile uint32_t *)0x4005D40C)) |
#define | GPIO_PORTF_AHB_IM_R (*((volatile uint32_t *)0x4005D410)) |
#define | GPIO_PORTF_AHB_RIS_R (*((volatile uint32_t *)0x4005D414)) |
#define | GPIO_PORTF_AHB_MIS_R (*((volatile uint32_t *)0x4005D418)) |
#define | GPIO_PORTF_AHB_ICR_R (*((volatile uint32_t *)0x4005D41C)) |
#define | GPIO_PORTF_AHB_AFSEL_R (*((volatile uint32_t *)0x4005D420)) |
#define | GPIO_PORTF_AHB_DR2R_R (*((volatile uint32_t *)0x4005D500)) |
#define | GPIO_PORTF_AHB_DR4R_R (*((volatile uint32_t *)0x4005D504)) |
#define | GPIO_PORTF_AHB_DR8R_R (*((volatile uint32_t *)0x4005D508)) |
#define | GPIO_PORTF_AHB_ODR_R (*((volatile uint32_t *)0x4005D50C)) |
#define | GPIO_PORTF_AHB_PUR_R (*((volatile uint32_t *)0x4005D510)) |
#define | GPIO_PORTF_AHB_PDR_R (*((volatile uint32_t *)0x4005D514)) |
#define | GPIO_PORTF_AHB_SLR_R (*((volatile uint32_t *)0x4005D518)) |
#define | GPIO_PORTF_AHB_DEN_R (*((volatile uint32_t *)0x4005D51C)) |
#define | GPIO_PORTF_AHB_LOCK_R (*((volatile uint32_t *)0x4005D520)) |
#define | GPIO_PORTF_AHB_CR_R (*((volatile uint32_t *)0x4005D524)) |
#define | GPIO_PORTF_AHB_AMSEL_R (*((volatile uint32_t *)0x4005D528)) |
#define | GPIO_PORTF_AHB_PCTL_R (*((volatile uint32_t *)0x4005D52C)) |
#define | GPIO_PORTF_AHB_ADCCTL_R (*((volatile uint32_t *)0x4005D530)) |
#define | GPIO_PORTF_AHB_DMACTL_R (*((volatile uint32_t *)0x4005D534)) |
#define | GPIO_PORTG_AHB_DATA_BITS_R ((volatile uint32_t *)0x4005E000) |
#define | GPIO_PORTG_AHB_DATA_R (*((volatile uint32_t *)0x4005E3FC)) |
#define | GPIO_PORTG_AHB_DIR_R (*((volatile uint32_t *)0x4005E400)) |
#define | GPIO_PORTG_AHB_IS_R (*((volatile uint32_t *)0x4005E404)) |
#define | GPIO_PORTG_AHB_IBE_R (*((volatile uint32_t *)0x4005E408)) |
#define | GPIO_PORTG_AHB_IEV_R (*((volatile uint32_t *)0x4005E40C)) |
#define | GPIO_PORTG_AHB_IM_R (*((volatile uint32_t *)0x4005E410)) |
#define | GPIO_PORTG_AHB_RIS_R (*((volatile uint32_t *)0x4005E414)) |
#define | GPIO_PORTG_AHB_MIS_R (*((volatile uint32_t *)0x4005E418)) |
#define | GPIO_PORTG_AHB_ICR_R (*((volatile uint32_t *)0x4005E41C)) |
#define | GPIO_PORTG_AHB_AFSEL_R (*((volatile uint32_t *)0x4005E420)) |
#define | GPIO_PORTG_AHB_DR2R_R (*((volatile uint32_t *)0x4005E500)) |
#define | GPIO_PORTG_AHB_DR4R_R (*((volatile uint32_t *)0x4005E504)) |
#define | GPIO_PORTG_AHB_DR8R_R (*((volatile uint32_t *)0x4005E508)) |
#define | GPIO_PORTG_AHB_ODR_R (*((volatile uint32_t *)0x4005E50C)) |
#define | GPIO_PORTG_AHB_PUR_R (*((volatile uint32_t *)0x4005E510)) |
#define | GPIO_PORTG_AHB_PDR_R (*((volatile uint32_t *)0x4005E514)) |
#define | GPIO_PORTG_AHB_SLR_R (*((volatile uint32_t *)0x4005E518)) |
#define | GPIO_PORTG_AHB_DEN_R (*((volatile uint32_t *)0x4005E51C)) |
#define | GPIO_PORTG_AHB_LOCK_R (*((volatile uint32_t *)0x4005E520)) |
#define | GPIO_PORTG_AHB_CR_R (*((volatile uint32_t *)0x4005E524)) |
#define | GPIO_PORTG_AHB_AMSEL_R (*((volatile uint32_t *)0x4005E528)) |
#define | GPIO_PORTG_AHB_PCTL_R (*((volatile uint32_t *)0x4005E52C)) |
#define | GPIO_PORTG_AHB_ADCCTL_R (*((volatile uint32_t *)0x4005E530)) |
#define | GPIO_PORTG_AHB_DMACTL_R (*((volatile uint32_t *)0x4005E534)) |
#define | EEPROM_EESIZE_R (*((volatile uint32_t *)0x400AF000)) |
#define | EEPROM_EEBLOCK_R (*((volatile uint32_t *)0x400AF004)) |
#define | EEPROM_EEOFFSET_R (*((volatile uint32_t *)0x400AF008)) |
#define | EEPROM_EERDWR_R (*((volatile uint32_t *)0x400AF010)) |
#define | EEPROM_EERDWRINC_R (*((volatile uint32_t *)0x400AF014)) |
#define | EEPROM_EEDONE_R (*((volatile uint32_t *)0x400AF018)) |
#define | EEPROM_EESUPP_R (*((volatile uint32_t *)0x400AF01C)) |
#define | EEPROM_EEUNLOCK_R (*((volatile uint32_t *)0x400AF020)) |
#define | EEPROM_EEPROT_R (*((volatile uint32_t *)0x400AF030)) |
#define | EEPROM_EEPASS0_R (*((volatile uint32_t *)0x400AF034)) |
#define | EEPROM_EEPASS1_R (*((volatile uint32_t *)0x400AF038)) |
#define | EEPROM_EEPASS2_R (*((volatile uint32_t *)0x400AF03C)) |
#define | EEPROM_EEINT_R (*((volatile uint32_t *)0x400AF040)) |
#define | EEPROM_EEHIDE_R (*((volatile uint32_t *)0x400AF050)) |
#define | EEPROM_EEDBGME_R (*((volatile uint32_t *)0x400AF080)) |
#define | EEPROM_PP_R (*((volatile uint32_t *)0x400AFFC0)) |
#define | I2C4_MSA_R (*((volatile uint32_t *)0x400C0000)) |
#define | I2C4_MCS_R (*((volatile uint32_t *)0x400C0004)) |
#define | I2C4_MDR_R (*((volatile uint32_t *)0x400C0008)) |
#define | I2C4_MTPR_R (*((volatile uint32_t *)0x400C000C)) |
#define | I2C4_MIMR_R (*((volatile uint32_t *)0x400C0010)) |
#define | I2C4_MRIS_R (*((volatile uint32_t *)0x400C0014)) |
#define | I2C4_MMIS_R (*((volatile uint32_t *)0x400C0018)) |
#define | I2C4_MICR_R (*((volatile uint32_t *)0x400C001C)) |
#define | I2C4_MCR_R (*((volatile uint32_t *)0x400C0020)) |
#define | I2C4_MCLKOCNT_R (*((volatile uint32_t *)0x400C0024)) |
#define | I2C4_MBMON_R (*((volatile uint32_t *)0x400C002C)) |
#define | I2C4_MCR2_R (*((volatile uint32_t *)0x400C0038)) |
#define | I2C4_SOAR_R (*((volatile uint32_t *)0x400C0800)) |
#define | I2C4_SCSR_R (*((volatile uint32_t *)0x400C0804)) |
#define | I2C4_SDR_R (*((volatile uint32_t *)0x400C0808)) |
#define | I2C4_SIMR_R (*((volatile uint32_t *)0x400C080C)) |
#define | I2C4_SRIS_R (*((volatile uint32_t *)0x400C0810)) |
#define | I2C4_SMIS_R (*((volatile uint32_t *)0x400C0814)) |
#define | I2C4_SICR_R (*((volatile uint32_t *)0x400C0818)) |
#define | I2C4_SOAR2_R (*((volatile uint32_t *)0x400C081C)) |
#define | I2C4_SACKCTL_R (*((volatile uint32_t *)0x400C0820)) |
#define | I2C4_PP_R (*((volatile uint32_t *)0x400C0FC0)) |
#define | I2C4_PC_R (*((volatile uint32_t *)0x400C0FC4)) |
#define | I2C5_MSA_R (*((volatile uint32_t *)0x400C1000)) |
#define | I2C5_MCS_R (*((volatile uint32_t *)0x400C1004)) |
#define | I2C5_MDR_R (*((volatile uint32_t *)0x400C1008)) |
#define | I2C5_MTPR_R (*((volatile uint32_t *)0x400C100C)) |
#define | I2C5_MIMR_R (*((volatile uint32_t *)0x400C1010)) |
#define | I2C5_MRIS_R (*((volatile uint32_t *)0x400C1014)) |
#define | I2C5_MMIS_R (*((volatile uint32_t *)0x400C1018)) |
#define | I2C5_MICR_R (*((volatile uint32_t *)0x400C101C)) |
#define | I2C5_MCR_R (*((volatile uint32_t *)0x400C1020)) |
#define | I2C5_MCLKOCNT_R (*((volatile uint32_t *)0x400C1024)) |
#define | I2C5_MBMON_R (*((volatile uint32_t *)0x400C102C)) |
#define | I2C5_MCR2_R (*((volatile uint32_t *)0x400C1038)) |
#define | I2C5_SOAR_R (*((volatile uint32_t *)0x400C1800)) |
#define | I2C5_SCSR_R (*((volatile uint32_t *)0x400C1804)) |
#define | I2C5_SDR_R (*((volatile uint32_t *)0x400C1808)) |
#define | I2C5_SIMR_R (*((volatile uint32_t *)0x400C180C)) |
#define | I2C5_SRIS_R (*((volatile uint32_t *)0x400C1810)) |
#define | I2C5_SMIS_R (*((volatile uint32_t *)0x400C1814)) |
#define | I2C5_SICR_R (*((volatile uint32_t *)0x400C1818)) |
#define | I2C5_SOAR2_R (*((volatile uint32_t *)0x400C181C)) |
#define | I2C5_SACKCTL_R (*((volatile uint32_t *)0x400C1820)) |
#define | I2C5_PP_R (*((volatile uint32_t *)0x400C1FC0)) |
#define | I2C5_PC_R (*((volatile uint32_t *)0x400C1FC4)) |
#define | SYSEXC_RIS_R (*((volatile uint32_t *)0x400F9000)) |
#define | SYSEXC_IM_R (*((volatile uint32_t *)0x400F9004)) |
#define | SYSEXC_MIS_R (*((volatile uint32_t *)0x400F9008)) |
#define | SYSEXC_IC_R (*((volatile uint32_t *)0x400F900C)) |
#define | FLASH_FMA_R (*((volatile uint32_t *)0x400FD000)) |
#define | FLASH_FMD_R (*((volatile uint32_t *)0x400FD004)) |
#define | FLASH_FMC_R (*((volatile uint32_t *)0x400FD008)) |
#define | FLASH_FCRIS_R (*((volatile uint32_t *)0x400FD00C)) |
#define | FLASH_FCIM_R (*((volatile uint32_t *)0x400FD010)) |
#define | FLASH_FCMISC_R (*((volatile uint32_t *)0x400FD014)) |
#define | FLASH_FMC2_R (*((volatile uint32_t *)0x400FD020)) |
#define | FLASH_FWBVAL_R (*((volatile uint32_t *)0x400FD030)) |
#define | FLASH_FWBN_R (*((volatile uint32_t *)0x400FD100)) |
#define | FLASH_FSIZE_R (*((volatile uint32_t *)0x400FDFC0)) |
#define | FLASH_SSIZE_R (*((volatile uint32_t *)0x400FDFC4)) |
#define | FLASH_ROMSWMAP_R (*((volatile uint32_t *)0x400FDFCC)) |
#define | FLASH_RMCTL_R (*((volatile uint32_t *)0x400FE0F0)) |
#define | FLASH_BOOTCFG_R (*((volatile uint32_t *)0x400FE1D0)) |
#define | FLASH_USERREG0_R (*((volatile uint32_t *)0x400FE1E0)) |
#define | FLASH_USERREG1_R (*((volatile uint32_t *)0x400FE1E4)) |
#define | FLASH_USERREG2_R (*((volatile uint32_t *)0x400FE1E8)) |
#define | FLASH_USERREG3_R (*((volatile uint32_t *)0x400FE1EC)) |
#define | FLASH_FMPRE0_R (*((volatile uint32_t *)0x400FE200)) |
#define | FLASH_FMPRE1_R (*((volatile uint32_t *)0x400FE204)) |
#define | FLASH_FMPPE0_R (*((volatile uint32_t *)0x400FE400)) |
#define | FLASH_FMPPE1_R (*((volatile uint32_t *)0x400FE404)) |
#define | SYSCTL_DID0_R (*((volatile uint32_t *)0x400FE000)) |
#define | SYSCTL_DID1_R (*((volatile uint32_t *)0x400FE004)) |
#define | SYSCTL_DC0_R (*((volatile uint32_t *)0x400FE008)) |
#define | SYSCTL_DC1_R (*((volatile uint32_t *)0x400FE010)) |
#define | SYSCTL_DC2_R (*((volatile uint32_t *)0x400FE014)) |
#define | SYSCTL_DC3_R (*((volatile uint32_t *)0x400FE018)) |
#define | SYSCTL_DC4_R (*((volatile uint32_t *)0x400FE01C)) |
#define | SYSCTL_DC5_R (*((volatile uint32_t *)0x400FE020)) |
#define | SYSCTL_DC6_R (*((volatile uint32_t *)0x400FE024)) |
#define | SYSCTL_DC7_R (*((volatile uint32_t *)0x400FE028)) |
#define | SYSCTL_DC8_R (*((volatile uint32_t *)0x400FE02C)) |
#define | SYSCTL_PBORCTL_R (*((volatile uint32_t *)0x400FE030)) |
#define | SYSCTL_SRCR0_R (*((volatile uint32_t *)0x400FE040)) |
#define | SYSCTL_SRCR1_R (*((volatile uint32_t *)0x400FE044)) |
#define | SYSCTL_SRCR2_R (*((volatile uint32_t *)0x400FE048)) |
#define | SYSCTL_RIS_R (*((volatile uint32_t *)0x400FE050)) |
#define | SYSCTL_IMC_R (*((volatile uint32_t *)0x400FE054)) |
#define | SYSCTL_MISC_R (*((volatile uint32_t *)0x400FE058)) |
#define | SYSCTL_RESC_R (*((volatile uint32_t *)0x400FE05C)) |
#define | SYSCTL_RCC_R (*((volatile uint32_t *)0x400FE060)) |
#define | SYSCTL_GPIOHBCTL_R (*((volatile uint32_t *)0x400FE06C)) |
#define | SYSCTL_RCC2_R (*((volatile uint32_t *)0x400FE070)) |
#define | SYSCTL_MOSCCTL_R (*((volatile uint32_t *)0x400FE07C)) |
#define | SYSCTL_RCGC0_R (*((volatile uint32_t *)0x400FE100)) |
#define | SYSCTL_RCGC1_R (*((volatile uint32_t *)0x400FE104)) |
#define | SYSCTL_RCGC2_R (*((volatile uint32_t *)0x400FE108)) |
#define | SYSCTL_SCGC0_R (*((volatile uint32_t *)0x400FE110)) |
#define | SYSCTL_SCGC1_R (*((volatile uint32_t *)0x400FE114)) |
#define | SYSCTL_SCGC2_R (*((volatile uint32_t *)0x400FE118)) |
#define | SYSCTL_DCGC0_R (*((volatile uint32_t *)0x400FE120)) |
#define | SYSCTL_DCGC1_R (*((volatile uint32_t *)0x400FE124)) |
#define | SYSCTL_DCGC2_R (*((volatile uint32_t *)0x400FE128)) |
#define | SYSCTL_DSLPCLKCFG_R (*((volatile uint32_t *)0x400FE144)) |
#define | SYSCTL_SYSPROP_R (*((volatile uint32_t *)0x400FE14C)) |
#define | SYSCTL_PIOSCCAL_R (*((volatile uint32_t *)0x400FE150)) |
#define | SYSCTL_PLLFREQ0_R (*((volatile uint32_t *)0x400FE160)) |
#define | SYSCTL_PLLFREQ1_R (*((volatile uint32_t *)0x400FE164)) |
#define | SYSCTL_PLLSTAT_R (*((volatile uint32_t *)0x400FE168)) |
#define | SYSCTL_SLPPWRCFG_R (*((volatile uint32_t *)0x400FE188)) |
#define | SYSCTL_DSLPPWRCFG_R (*((volatile uint32_t *)0x400FE18C)) |
#define | SYSCTL_DC9_R (*((volatile uint32_t *)0x400FE190)) |
#define | SYSCTL_NVMSTAT_R (*((volatile uint32_t *)0x400FE1A0)) |
#define | SYSCTL_LDOSPCTL_R (*((volatile uint32_t *)0x400FE1B4)) |
#define | SYSCTL_LDODPCTL_R (*((volatile uint32_t *)0x400FE1BC)) |
#define | SYSCTL_PPWD_R (*((volatile uint32_t *)0x400FE300)) |
#define | SYSCTL_PPTIMER_R (*((volatile uint32_t *)0x400FE304)) |
#define | SYSCTL_PPGPIO_R (*((volatile uint32_t *)0x400FE308)) |
#define | SYSCTL_PPDMA_R (*((volatile uint32_t *)0x400FE30C)) |
#define | SYSCTL_PPHIB_R (*((volatile uint32_t *)0x400FE314)) |
#define | SYSCTL_PPUART_R (*((volatile uint32_t *)0x400FE318)) |
#define | SYSCTL_PPSSI_R (*((volatile uint32_t *)0x400FE31C)) |
#define | SYSCTL_PPI2C_R (*((volatile uint32_t *)0x400FE320)) |
#define | SYSCTL_PPUSB_R (*((volatile uint32_t *)0x400FE328)) |
#define | SYSCTL_PPCAN_R (*((volatile uint32_t *)0x400FE334)) |
#define | SYSCTL_PPADC_R (*((volatile uint32_t *)0x400FE338)) |
#define | SYSCTL_PPACMP_R (*((volatile uint32_t *)0x400FE33C)) |
#define | SYSCTL_PPPWM_R (*((volatile uint32_t *)0x400FE340)) |
#define | SYSCTL_PPQEI_R (*((volatile uint32_t *)0x400FE344)) |
#define | SYSCTL_PPEEPROM_R (*((volatile uint32_t *)0x400FE358)) |
#define | SYSCTL_PPWTIMER_R (*((volatile uint32_t *)0x400FE35C)) |
#define | SYSCTL_SRWD_R (*((volatile uint32_t *)0x400FE500)) |
#define | SYSCTL_SRTIMER_R (*((volatile uint32_t *)0x400FE504)) |
#define | SYSCTL_SRGPIO_R (*((volatile uint32_t *)0x400FE508)) |
#define | SYSCTL_SRDMA_R (*((volatile uint32_t *)0x400FE50C)) |
#define | SYSCTL_SRUART_R (*((volatile uint32_t *)0x400FE518)) |
#define | SYSCTL_SRSSI_R (*((volatile uint32_t *)0x400FE51C)) |
#define | SYSCTL_SRI2C_R (*((volatile uint32_t *)0x400FE520)) |
#define | SYSCTL_SRUSB_R (*((volatile uint32_t *)0x400FE528)) |
#define | SYSCTL_SRCAN_R (*((volatile uint32_t *)0x400FE534)) |
#define | SYSCTL_SRADC_R (*((volatile uint32_t *)0x400FE538)) |
#define | SYSCTL_SRACMP_R (*((volatile uint32_t *)0x400FE53C)) |
#define | SYSCTL_SRPWM_R (*((volatile uint32_t *)0x400FE540)) |
#define | SYSCTL_SRQEI_R (*((volatile uint32_t *)0x400FE544)) |
#define | SYSCTL_SREEPROM_R (*((volatile uint32_t *)0x400FE558)) |
#define | SYSCTL_SRWTIMER_R (*((volatile uint32_t *)0x400FE55C)) |
#define | SYSCTL_RCGCWD_R (*((volatile uint32_t *)0x400FE600)) |
#define | SYSCTL_RCGCTIMER_R (*((volatile uint32_t *)0x400FE604)) |
#define | SYSCTL_RCGCGPIO_R (*((volatile uint32_t *)0x400FE608)) |
#define | SYSCTL_RCGCDMA_R (*((volatile uint32_t *)0x400FE60C)) |
#define | SYSCTL_RCGCUART_R (*((volatile uint32_t *)0x400FE618)) |
#define | SYSCTL_RCGCSSI_R (*((volatile uint32_t *)0x400FE61C)) |
#define | SYSCTL_RCGCI2C_R (*((volatile uint32_t *)0x400FE620)) |
#define | SYSCTL_RCGCUSB_R (*((volatile uint32_t *)0x400FE628)) |
#define | SYSCTL_RCGCCAN_R (*((volatile uint32_t *)0x400FE634)) |
#define | SYSCTL_RCGCADC_R (*((volatile uint32_t *)0x400FE638)) |
#define | SYSCTL_RCGCACMP_R (*((volatile uint32_t *)0x400FE63C)) |
#define | SYSCTL_RCGCPWM_R (*((volatile uint32_t *)0x400FE640)) |
#define | SYSCTL_RCGCQEI_R (*((volatile uint32_t *)0x400FE644)) |
#define | SYSCTL_RCGCEEPROM_R (*((volatile uint32_t *)0x400FE658)) |
#define | SYSCTL_RCGCWTIMER_R (*((volatile uint32_t *)0x400FE65C)) |
#define | SYSCTL_SCGCWD_R (*((volatile uint32_t *)0x400FE700)) |
#define | SYSCTL_SCGCTIMER_R (*((volatile uint32_t *)0x400FE704)) |
#define | SYSCTL_SCGCGPIO_R (*((volatile uint32_t *)0x400FE708)) |
#define | SYSCTL_SCGCDMA_R (*((volatile uint32_t *)0x400FE70C)) |
#define | SYSCTL_SCGCUART_R (*((volatile uint32_t *)0x400FE718)) |
#define | SYSCTL_SCGCSSI_R (*((volatile uint32_t *)0x400FE71C)) |
#define | SYSCTL_SCGCI2C_R (*((volatile uint32_t *)0x400FE720)) |
#define | SYSCTL_SCGCUSB_R (*((volatile uint32_t *)0x400FE728)) |
#define | SYSCTL_SCGCCAN_R (*((volatile uint32_t *)0x400FE734)) |
#define | SYSCTL_SCGCADC_R (*((volatile uint32_t *)0x400FE738)) |
#define | SYSCTL_SCGCACMP_R (*((volatile uint32_t *)0x400FE73C)) |
#define | SYSCTL_SCGCPWM_R (*((volatile uint32_t *)0x400FE740)) |
#define | SYSCTL_SCGCQEI_R (*((volatile uint32_t *)0x400FE744)) |
#define | SYSCTL_SCGCEEPROM_R (*((volatile uint32_t *)0x400FE758)) |
#define | SYSCTL_SCGCWTIMER_R (*((volatile uint32_t *)0x400FE75C)) |
#define | SYSCTL_DCGCWD_R (*((volatile uint32_t *)0x400FE800)) |
#define | SYSCTL_DCGCTIMER_R (*((volatile uint32_t *)0x400FE804)) |
#define | SYSCTL_DCGCGPIO_R (*((volatile uint32_t *)0x400FE808)) |
#define | SYSCTL_DCGCDMA_R (*((volatile uint32_t *)0x400FE80C)) |
#define | SYSCTL_DCGCUART_R (*((volatile uint32_t *)0x400FE818)) |
#define | SYSCTL_DCGCSSI_R (*((volatile uint32_t *)0x400FE81C)) |
#define | SYSCTL_DCGCI2C_R (*((volatile uint32_t *)0x400FE820)) |
#define | SYSCTL_DCGCUSB_R (*((volatile uint32_t *)0x400FE828)) |
#define | SYSCTL_DCGCCAN_R (*((volatile uint32_t *)0x400FE834)) |
#define | SYSCTL_DCGCADC_R (*((volatile uint32_t *)0x400FE838)) |
#define | SYSCTL_DCGCACMP_R (*((volatile uint32_t *)0x400FE83C)) |
#define | SYSCTL_DCGCPWM_R (*((volatile uint32_t *)0x400FE840)) |
#define | SYSCTL_DCGCQEI_R (*((volatile uint32_t *)0x400FE844)) |
#define | SYSCTL_DCGCEEPROM_R (*((volatile uint32_t *)0x400FE858)) |
#define | SYSCTL_DCGCWTIMER_R (*((volatile uint32_t *)0x400FE85C)) |
#define | SYSCTL_PRWD_R (*((volatile uint32_t *)0x400FEA00)) |
#define | SYSCTL_PRTIMER_R (*((volatile uint32_t *)0x400FEA04)) |
#define | SYSCTL_PRGPIO_R (*((volatile uint32_t *)0x400FEA08)) |
#define | SYSCTL_PRDMA_R (*((volatile uint32_t *)0x400FEA0C)) |
#define | SYSCTL_PRUART_R (*((volatile uint32_t *)0x400FEA18)) |
#define | SYSCTL_PRSSI_R (*((volatile uint32_t *)0x400FEA1C)) |
#define | SYSCTL_PRI2C_R (*((volatile uint32_t *)0x400FEA20)) |
#define | SYSCTL_PRUSB_R (*((volatile uint32_t *)0x400FEA28)) |
#define | SYSCTL_PRCAN_R (*((volatile uint32_t *)0x400FEA34)) |
#define | SYSCTL_PRADC_R (*((volatile uint32_t *)0x400FEA38)) |
#define | SYSCTL_PRACMP_R (*((volatile uint32_t *)0x400FEA3C)) |
#define | SYSCTL_PRPWM_R (*((volatile uint32_t *)0x400FEA40)) |
#define | SYSCTL_PRQEI_R (*((volatile uint32_t *)0x400FEA44)) |
#define | SYSCTL_PREEPROM_R (*((volatile uint32_t *)0x400FEA58)) |
#define | SYSCTL_PRWTIMER_R (*((volatile uint32_t *)0x400FEA5C)) |
#define | UDMA_STAT_R (*((volatile uint32_t *)0x400FF000)) |
#define | UDMA_CFG_R (*((volatile uint32_t *)0x400FF004)) |
#define | UDMA_CTLBASE_R (*((volatile uint32_t *)0x400FF008)) |
#define | UDMA_ALTBASE_R (*((volatile uint32_t *)0x400FF00C)) |
#define | UDMA_WAITSTAT_R (*((volatile uint32_t *)0x400FF010)) |
#define | UDMA_SWREQ_R (*((volatile uint32_t *)0x400FF014)) |
#define | UDMA_USEBURSTSET_R (*((volatile uint32_t *)0x400FF018)) |
#define | UDMA_USEBURSTCLR_R (*((volatile uint32_t *)0x400FF01C)) |
#define | UDMA_REQMASKSET_R (*((volatile uint32_t *)0x400FF020)) |
#define | UDMA_REQMASKCLR_R (*((volatile uint32_t *)0x400FF024)) |
#define | UDMA_ENASET_R (*((volatile uint32_t *)0x400FF028)) |
#define | UDMA_ENACLR_R (*((volatile uint32_t *)0x400FF02C)) |
#define | UDMA_ALTSET_R (*((volatile uint32_t *)0x400FF030)) |
#define | UDMA_ALTCLR_R (*((volatile uint32_t *)0x400FF034)) |
#define | UDMA_PRIOSET_R (*((volatile uint32_t *)0x400FF038)) |
#define | UDMA_PRIOCLR_R (*((volatile uint32_t *)0x400FF03C)) |
#define | UDMA_ERRCLR_R (*((volatile uint32_t *)0x400FF04C)) |
#define | UDMA_CHASGN_R (*((volatile uint32_t *)0x400FF500)) |
#define | UDMA_CHIS_R (*((volatile uint32_t *)0x400FF504)) |
#define | UDMA_CHMAP0_R (*((volatile uint32_t *)0x400FF510)) |
#define | UDMA_CHMAP1_R (*((volatile uint32_t *)0x400FF514)) |
#define | UDMA_CHMAP2_R (*((volatile uint32_t *)0x400FF518)) |
#define | UDMA_CHMAP3_R (*((volatile uint32_t *)0x400FF51C)) |
#define | UDMA_SRCENDP 0x00000000 |
#define | UDMA_DSTENDP 0x00000004 |
#define | UDMA_CHCTL 0x00000008 |
#define | NVIC_ACTLR_R (*((volatile uint32_t *)0xE000E008)) |
#define | NVIC_ST_CTRL_R (*((volatile uint32_t *)0xE000E010)) |
#define | NVIC_ST_RELOAD_R (*((volatile uint32_t *)0xE000E014)) |
#define | NVIC_ST_CURRENT_R (*((volatile uint32_t *)0xE000E018)) |
#define | NVIC_EN0_R (*((volatile uint32_t *)0xE000E100)) |
#define | NVIC_EN1_R (*((volatile uint32_t *)0xE000E104)) |
#define | NVIC_EN2_R (*((volatile uint32_t *)0xE000E108)) |
#define | NVIC_EN3_R (*((volatile uint32_t *)0xE000E10C)) |
#define | NVIC_EN4_R (*((volatile uint32_t *)0xE000E110)) |
#define | NVIC_DIS0_R (*((volatile uint32_t *)0xE000E180)) |
#define | NVIC_DIS1_R (*((volatile uint32_t *)0xE000E184)) |
#define | NVIC_DIS2_R (*((volatile uint32_t *)0xE000E188)) |
#define | NVIC_DIS3_R (*((volatile uint32_t *)0xE000E18C)) |
#define | NVIC_DIS4_R (*((volatile uint32_t *)0xE000E190)) |
#define | NVIC_PEND0_R (*((volatile uint32_t *)0xE000E200)) |
#define | NVIC_PEND1_R (*((volatile uint32_t *)0xE000E204)) |
#define | NVIC_PEND2_R (*((volatile uint32_t *)0xE000E208)) |
#define | NVIC_PEND3_R (*((volatile uint32_t *)0xE000E20C)) |
#define | NVIC_PEND4_R (*((volatile uint32_t *)0xE000E210)) |
#define | NVIC_UNPEND0_R (*((volatile uint32_t *)0xE000E280)) |
#define | NVIC_UNPEND1_R (*((volatile uint32_t *)0xE000E284)) |
#define | NVIC_UNPEND2_R (*((volatile uint32_t *)0xE000E288)) |
#define | NVIC_UNPEND3_R (*((volatile uint32_t *)0xE000E28C)) |
#define | NVIC_UNPEND4_R (*((volatile uint32_t *)0xE000E290)) |
#define | NVIC_ACTIVE0_R (*((volatile uint32_t *)0xE000E300)) |
#define | NVIC_ACTIVE1_R (*((volatile uint32_t *)0xE000E304)) |
#define | NVIC_ACTIVE2_R (*((volatile uint32_t *)0xE000E308)) |
#define | NVIC_ACTIVE3_R (*((volatile uint32_t *)0xE000E30C)) |
#define | NVIC_ACTIVE4_R (*((volatile uint32_t *)0xE000E310)) |
#define | NVIC_PRI0_R (*((volatile uint32_t *)0xE000E400)) |
#define | NVIC_PRI1_R (*((volatile uint32_t *)0xE000E404)) |
#define | NVIC_PRI2_R (*((volatile uint32_t *)0xE000E408)) |
#define | NVIC_PRI3_R (*((volatile uint32_t *)0xE000E40C)) |
#define | NVIC_PRI4_R (*((volatile uint32_t *)0xE000E410)) |
#define | NVIC_PRI5_R (*((volatile uint32_t *)0xE000E414)) |
#define | NVIC_PRI6_R (*((volatile uint32_t *)0xE000E418)) |
#define | NVIC_PRI7_R (*((volatile uint32_t *)0xE000E41C)) |
#define | NVIC_PRI8_R (*((volatile uint32_t *)0xE000E420)) |
#define | NVIC_PRI9_R (*((volatile uint32_t *)0xE000E424)) |
#define | NVIC_PRI10_R (*((volatile uint32_t *)0xE000E428)) |
#define | NVIC_PRI11_R (*((volatile uint32_t *)0xE000E42C)) |
#define | NVIC_PRI12_R (*((volatile uint32_t *)0xE000E430)) |
#define | NVIC_PRI13_R (*((volatile uint32_t *)0xE000E434)) |
#define | NVIC_PRI14_R (*((volatile uint32_t *)0xE000E438)) |
#define | NVIC_PRI15_R (*((volatile uint32_t *)0xE000E43C)) |
#define | NVIC_PRI16_R (*((volatile uint32_t *)0xE000E440)) |
#define | NVIC_PRI17_R (*((volatile uint32_t *)0xE000E444)) |
#define | NVIC_PRI18_R (*((volatile uint32_t *)0xE000E448)) |
#define | NVIC_PRI19_R (*((volatile uint32_t *)0xE000E44C)) |
#define | NVIC_PRI20_R (*((volatile uint32_t *)0xE000E450)) |
#define | NVIC_PRI21_R (*((volatile uint32_t *)0xE000E454)) |
#define | NVIC_PRI22_R (*((volatile uint32_t *)0xE000E458)) |
#define | NVIC_PRI23_R (*((volatile uint32_t *)0xE000E45C)) |
#define | NVIC_PRI24_R (*((volatile uint32_t *)0xE000E460)) |
#define | NVIC_PRI25_R (*((volatile uint32_t *)0xE000E464)) |
#define | NVIC_PRI26_R (*((volatile uint32_t *)0xE000E468)) |
#define | NVIC_PRI27_R (*((volatile uint32_t *)0xE000E46C)) |
#define | NVIC_PRI28_R (*((volatile uint32_t *)0xE000E470)) |
#define | NVIC_PRI29_R (*((volatile uint32_t *)0xE000E474)) |
#define | NVIC_PRI30_R (*((volatile uint32_t *)0xE000E478)) |
#define | NVIC_PRI31_R (*((volatile uint32_t *)0xE000E47C)) |
#define | NVIC_PRI32_R (*((volatile uint32_t *)0xE000E480)) |
#define | NVIC_PRI33_R (*((volatile uint32_t *)0xE000E484)) |
#define | NVIC_PRI34_R (*((volatile uint32_t *)0xE000E488)) |
#define | NVIC_CPUID_R (*((volatile uint32_t *)0xE000ED00)) |
#define | NVIC_INT_CTRL_R (*((volatile uint32_t *)0xE000ED04)) |
#define | NVIC_VTABLE_R (*((volatile uint32_t *)0xE000ED08)) |
#define | NVIC_APINT_R (*((volatile uint32_t *)0xE000ED0C)) |
#define | NVIC_SYS_CTRL_R (*((volatile uint32_t *)0xE000ED10)) |
#define | NVIC_CFG_CTRL_R (*((volatile uint32_t *)0xE000ED14)) |
#define | NVIC_SYS_PRI1_R (*((volatile uint32_t *)0xE000ED18)) |
#define | NVIC_SYS_PRI2_R (*((volatile uint32_t *)0xE000ED1C)) |
#define | NVIC_SYS_PRI3_R (*((volatile uint32_t *)0xE000ED20)) |
#define | NVIC_SYS_HND_CTRL_R (*((volatile uint32_t *)0xE000ED24)) |
#define | NVIC_FAULT_STAT_R (*((volatile uint32_t *)0xE000ED28)) |
#define | NVIC_HFAULT_STAT_R (*((volatile uint32_t *)0xE000ED2C)) |
#define | NVIC_DEBUG_STAT_R (*((volatile uint32_t *)0xE000ED30)) |
#define | NVIC_MM_ADDR_R (*((volatile uint32_t *)0xE000ED34)) |
#define | NVIC_FAULT_ADDR_R (*((volatile uint32_t *)0xE000ED38)) |
#define | NVIC_CPAC_R (*((volatile uint32_t *)0xE000ED88)) |
#define | NVIC_MPU_TYPE_R (*((volatile uint32_t *)0xE000ED90)) |
#define | NVIC_MPU_CTRL_R (*((volatile uint32_t *)0xE000ED94)) |
#define | NVIC_MPU_NUMBER_R (*((volatile uint32_t *)0xE000ED98)) |
#define | NVIC_MPU_BASE_R (*((volatile uint32_t *)0xE000ED9C)) |
#define | NVIC_MPU_ATTR_R (*((volatile uint32_t *)0xE000EDA0)) |
#define | NVIC_MPU_BASE1_R (*((volatile uint32_t *)0xE000EDA4)) |
#define | NVIC_MPU_ATTR1_R (*((volatile uint32_t *)0xE000EDA8)) |
#define | NVIC_MPU_BASE2_R (*((volatile uint32_t *)0xE000EDAC)) |
#define | NVIC_MPU_ATTR2_R (*((volatile uint32_t *)0xE000EDB0)) |
#define | NVIC_MPU_BASE3_R (*((volatile uint32_t *)0xE000EDB4)) |
#define | NVIC_MPU_ATTR3_R (*((volatile uint32_t *)0xE000EDB8)) |
#define | NVIC_DBG_CTRL_R (*((volatile uint32_t *)0xE000EDF0)) |
#define | NVIC_DBG_XFER_R (*((volatile uint32_t *)0xE000EDF4)) |
#define | NVIC_DBG_DATA_R (*((volatile uint32_t *)0xE000EDF8)) |
#define | NVIC_DBG_INT_R (*((volatile uint32_t *)0xE000EDFC)) |
#define | NVIC_SW_TRIG_R (*((volatile uint32_t *)0xE000EF00)) |
#define | NVIC_FPCC_R (*((volatile uint32_t *)0xE000EF34)) |
#define | NVIC_FPCA_R (*((volatile uint32_t *)0xE000EF38)) |
#define | NVIC_FPDSC_R (*((volatile uint32_t *)0xE000EF3C)) |
#define | WDT_LOAD_M 0xFFFFFFFF |
#define | WDT_LOAD_S 0 |
#define | WDT_VALUE_M 0xFFFFFFFF |
#define | WDT_VALUE_S 0 |
#define | WDT_CTL_WRC 0x80000000 |
#define | WDT_CTL_INTTYPE 0x00000004 |
#define | WDT_CTL_RESEN 0x00000002 |
#define | WDT_CTL_INTEN 0x00000001 |
#define | WDT_ICR_M 0xFFFFFFFF |
#define | WDT_ICR_S 0 |
#define | WDT_RIS_WDTRIS 0x00000001 |
#define | WDT_MIS_WDTMIS 0x00000001 |
#define | WDT_TEST_STALL 0x00000100 |
#define | WDT_LOCK_M 0xFFFFFFFF |
#define | WDT_LOCK_UNLOCKED 0x00000000 |
#define | WDT_LOCK_LOCKED 0x00000001 |
#define | WDT_LOCK_UNLOCK 0x1ACCE551 |
#define | GPIO_IM_GPIO_M 0x000000FF |
#define | GPIO_IM_GPIO_S 0 |
#define | GPIO_RIS_GPIO_M 0x000000FF |
#define | GPIO_RIS_GPIO_S 0 |
#define | GPIO_MIS_GPIO_M 0x000000FF |
#define | GPIO_MIS_GPIO_S 0 |
#define | GPIO_ICR_GPIO_M 0x000000FF |
#define | GPIO_ICR_GPIO_S 0 |
#define | GPIO_LOCK_M 0xFFFFFFFF |
#define | GPIO_LOCK_UNLOCKED 0x00000000 |
#define | GPIO_LOCK_LOCKED 0x00000001 |
#define | GPIO_LOCK_KEY 0x4C4F434B |
#define | GPIO_PCTL_PA7_M 0xF0000000 |
#define | GPIO_PCTL_PA7_I2C1SDA 0x30000000 |
#define | GPIO_PCTL_PA7_M1PWM3 0x50000000 |
#define | GPIO_PCTL_PA6_M 0x0F000000 |
#define | GPIO_PCTL_PA6_I2C1SCL 0x03000000 |
#define | GPIO_PCTL_PA6_M1PWM2 0x05000000 |
#define | GPIO_PCTL_PA5_M 0x00F00000 |
#define | GPIO_PCTL_PA5_SSI0TX 0x00200000 |
#define | GPIO_PCTL_PA4_M 0x000F0000 |
#define | GPIO_PCTL_PA4_SSI0RX 0x00020000 |
#define | GPIO_PCTL_PA3_M 0x0000F000 |
#define | GPIO_PCTL_PA3_SSI0FSS 0x00002000 |
#define | GPIO_PCTL_PA2_M 0x00000F00 |
#define | GPIO_PCTL_PA2_SSI0CLK 0x00000200 |
#define | GPIO_PCTL_PA1_M 0x000000F0 |
#define | GPIO_PCTL_PA1_U0TX 0x00000010 |
#define | GPIO_PCTL_PA1_CAN1TX 0x00000080 |
#define | GPIO_PCTL_PA0_M 0x0000000F |
#define | GPIO_PCTL_PA0_U0RX 0x00000001 |
#define | GPIO_PCTL_PA0_CAN1RX 0x00000008 |
#define | GPIO_PCTL_PB7_M 0xF0000000 |
#define | GPIO_PCTL_PB7_SSI2TX 0x20000000 |
#define | GPIO_PCTL_PB7_I2C5SDA 0x30000000 |
#define | GPIO_PCTL_PB7_M0PWM1 0x40000000 |
#define | GPIO_PCTL_PB7_T0CCP1 0x70000000 |
#define | GPIO_PCTL_PB6_M 0x0F000000 |
#define | GPIO_PCTL_PB6_SSI2RX 0x02000000 |
#define | GPIO_PCTL_PB6_I2C5SCL 0x03000000 |
#define | GPIO_PCTL_PB6_M0PWM0 0x04000000 |
#define | GPIO_PCTL_PB6_T0CCP0 0x07000000 |
#define | GPIO_PCTL_PB5_M 0x00F00000 |
#define | GPIO_PCTL_PB5_SSI2FSS 0x00200000 |
#define | GPIO_PCTL_PB5_M0PWM3 0x00400000 |
#define | GPIO_PCTL_PB5_T1CCP1 0x00700000 |
#define | GPIO_PCTL_PB5_CAN0TX 0x00800000 |
#define | GPIO_PCTL_PB4_M 0x000F0000 |
#define | GPIO_PCTL_PB4_SSI2CLK 0x00020000 |
#define | GPIO_PCTL_PB4_M0PWM2 0x00040000 |
#define | GPIO_PCTL_PB4_T1CCP0 0x00070000 |
#define | GPIO_PCTL_PB4_CAN0RX 0x00080000 |
#define | GPIO_PCTL_PB3_M 0x0000F000 |
#define | GPIO_PCTL_PB3_I2C0SDA 0x00003000 |
#define | GPIO_PCTL_PB3_T3CCP1 0x00007000 |
#define | GPIO_PCTL_PB2_M 0x00000F00 |
#define | GPIO_PCTL_PB2_I2C0SCL 0x00000300 |
#define | GPIO_PCTL_PB2_T3CCP0 0x00000700 |
#define | GPIO_PCTL_PB1_M 0x000000F0 |
#define | GPIO_PCTL_PB1_USB0VBUS 0x00000000 |
#define | GPIO_PCTL_PB1_U1TX 0x00000010 |
#define | GPIO_PCTL_PB1_T2CCP1 0x00000070 |
#define | GPIO_PCTL_PB0_M 0x0000000F |
#define | GPIO_PCTL_PB0_USB0ID 0x00000000 |
#define | GPIO_PCTL_PB0_U1RX 0x00000001 |
#define | GPIO_PCTL_PB0_T2CCP0 0x00000007 |
#define | GPIO_PCTL_PC7_M 0xF0000000 |
#define | GPIO_PCTL_PC7_U3TX 0x10000000 |
#define | GPIO_PCTL_PC7_WT1CCP1 0x70000000 |
#define | GPIO_PCTL_PC7_USB0PFLT 0x80000000 |
#define | GPIO_PCTL_PC6_M 0x0F000000 |
#define | GPIO_PCTL_PC6_U3RX 0x01000000 |
#define | GPIO_PCTL_PC6_PHB1 0x06000000 |
#define | GPIO_PCTL_PC6_WT1CCP0 0x07000000 |
#define | GPIO_PCTL_PC6_USB0EPEN 0x08000000 |
#define | GPIO_PCTL_PC5_M 0x00F00000 |
#define | GPIO_PCTL_PC5_U4TX 0x00100000 |
#define | GPIO_PCTL_PC5_U1TX 0x00200000 |
#define | GPIO_PCTL_PC5_M0PWM7 0x00400000 |
#define | GPIO_PCTL_PC5_PHA1 0x00600000 |
#define | GPIO_PCTL_PC5_WT0CCP1 0x00700000 |
#define | GPIO_PCTL_PC5_U1CTS 0x00800000 |
#define | GPIO_PCTL_PC4_M 0x000F0000 |
#define | GPIO_PCTL_PC4_U4RX 0x00010000 |
#define | GPIO_PCTL_PC4_U1RX 0x00020000 |
#define | GPIO_PCTL_PC4_M0PWM6 0x00040000 |
#define | GPIO_PCTL_PC4_IDX1 0x00060000 |
#define | GPIO_PCTL_PC4_WT0CCP0 0x00070000 |
#define | GPIO_PCTL_PC4_U1RTS 0x00080000 |
#define | GPIO_PCTL_PC3_M 0x0000F000 |
#define | GPIO_PCTL_PC3_TDO 0x00001000 |
#define | GPIO_PCTL_PC3_T5CCP1 0x00007000 |
#define | GPIO_PCTL_PC2_M 0x00000F00 |
#define | GPIO_PCTL_PC2_TDI 0x00000100 |
#define | GPIO_PCTL_PC2_T5CCP0 0x00000700 |
#define | GPIO_PCTL_PC1_M 0x000000F0 |
#define | GPIO_PCTL_PC1_TMS 0x00000010 |
#define | GPIO_PCTL_PC1_T4CCP1 0x00000070 |
#define | GPIO_PCTL_PC0_M 0x0000000F |
#define | GPIO_PCTL_PC0_TCK 0x00000001 |
#define | GPIO_PCTL_PC0_T4CCP0 0x00000007 |
#define | GPIO_PCTL_PD7_M 0xF0000000 |
#define | GPIO_PCTL_PD7_U2TX 0x10000000 |
#define | GPIO_PCTL_PD7_M0FAULT1 0x40000000 |
#define | GPIO_PCTL_PD7_PHB0 0x60000000 |
#define | GPIO_PCTL_PD7_WT5CCP1 0x70000000 |
#define | GPIO_PCTL_PD7_NMI 0x80000000 |
#define | GPIO_PCTL_PD6_M 0x0F000000 |
#define | GPIO_PCTL_PD6_U2RX 0x01000000 |
#define | GPIO_PCTL_PD6_M0FAULT0 0x04000000 |
#define | GPIO_PCTL_PD6_PHA0 0x06000000 |
#define | GPIO_PCTL_PD6_WT5CCP0 0x07000000 |
#define | GPIO_PCTL_PD5_M 0x00F00000 |
#define | GPIO_PCTL_PD5_USB0DP 0x00000000 |
#define | GPIO_PCTL_PD5_U6TX 0x00100000 |
#define | GPIO_PCTL_PD5_WT4CCP1 0x00700000 |
#define | GPIO_PCTL_PD4_M 0x000F0000 |
#define | GPIO_PCTL_PD4_USB0DM 0x00000000 |
#define | GPIO_PCTL_PD4_U6RX 0x00010000 |
#define | GPIO_PCTL_PD4_WT4CCP0 0x00070000 |
#define | GPIO_PCTL_PD3_M 0x0000F000 |
#define | GPIO_PCTL_PD3_AIN4 0x00000000 |
#define | GPIO_PCTL_PD3_SSI3TX 0x00001000 |
#define | GPIO_PCTL_PD3_SSI1TX 0x00002000 |
#define | GPIO_PCTL_PD3_IDX0 0x00006000 |
#define | GPIO_PCTL_PD3_WT3CCP1 0x00007000 |
#define | GPIO_PCTL_PD3_USB0PFLT 0x00008000 |
#define | GPIO_PCTL_PD2_M 0x00000F00 |
#define | GPIO_PCTL_PD2_AIN5 0x00000000 |
#define | GPIO_PCTL_PD2_SSI3RX 0x00000100 |
#define | GPIO_PCTL_PD2_SSI1RX 0x00000200 |
#define | GPIO_PCTL_PD2_M0FAULT0 0x00000400 |
#define | GPIO_PCTL_PD2_WT3CCP0 0x00000700 |
#define | GPIO_PCTL_PD2_USB0EPEN 0x00000800 |
#define | GPIO_PCTL_PD1_M 0x000000F0 |
#define | GPIO_PCTL_PD1_AIN6 0x00000000 |
#define | GPIO_PCTL_PD1_SSI3FSS 0x00000010 |
#define | GPIO_PCTL_PD1_SSI1FSS 0x00000020 |
#define | GPIO_PCTL_PD1_I2C3SDA 0x00000030 |
#define | GPIO_PCTL_PD1_M0PWM7 0x00000040 |
#define | GPIO_PCTL_PD1_M1PWM1 0x00000050 |
#define | GPIO_PCTL_PD1_WT2CCP1 0x00000070 |
#define | GPIO_PCTL_PD0_M 0x0000000F |
#define | GPIO_PCTL_PD0_AIN7 0x00000000 |
#define | GPIO_PCTL_PD0_SSI3CLK 0x00000001 |
#define | GPIO_PCTL_PD0_SSI1CLK 0x00000002 |
#define | GPIO_PCTL_PD0_I2C3SCL 0x00000003 |
#define | GPIO_PCTL_PD0_M0PWM6 0x00000004 |
#define | GPIO_PCTL_PD0_M1PWM0 0x00000005 |
#define | GPIO_PCTL_PD0_WT2CCP0 0x00000007 |
#define | GPIO_PCTL_PE5_M 0x00F00000 |
#define | GPIO_PCTL_PE5_AIN8 0x00000000 |
#define | GPIO_PCTL_PE5_U5TX 0x00100000 |
#define | GPIO_PCTL_PE5_I2C2SDA 0x00300000 |
#define | GPIO_PCTL_PE5_M0PWM5 0x00400000 |
#define | GPIO_PCTL_PE5_M1PWM3 0x00500000 |
#define | GPIO_PCTL_PE5_CAN0TX 0x00800000 |
#define | GPIO_PCTL_PE4_M 0x000F0000 |
#define | GPIO_PCTL_PE4_AIN9 0x00000000 |
#define | GPIO_PCTL_PE4_U5RX 0x00010000 |
#define | GPIO_PCTL_PE4_I2C2SCL 0x00030000 |
#define | GPIO_PCTL_PE4_M0PWM4 0x00040000 |
#define | GPIO_PCTL_PE4_M1PWM2 0x00050000 |
#define | GPIO_PCTL_PE4_CAN0RX 0x00080000 |
#define | GPIO_PCTL_PE3_M 0x0000F000 |
#define | GPIO_PCTL_PE3_AIN0 0x00000000 |
#define | GPIO_PCTL_PE2_M 0x00000F00 |
#define | GPIO_PCTL_PE2_AIN1 0x00000000 |
#define | GPIO_PCTL_PE1_M 0x000000F0 |
#define | GPIO_PCTL_PE1_AIN2 0x00000000 |
#define | GPIO_PCTL_PE1_U7TX 0x00000010 |
#define | GPIO_PCTL_PE0_M 0x0000000F |
#define | GPIO_PCTL_PE0_AIN3 0x00000000 |
#define | GPIO_PCTL_PE0_U7RX 0x00000001 |
#define | GPIO_PCTL_PF4_M 0x000F0000 |
#define | GPIO_PCTL_PF4_M0FAULT2 0x00040000 |
#define | GPIO_PCTL_PF4_M1FAULT0 0x00050000 |
#define | GPIO_PCTL_PF4_IDX0 0x00060000 |
#define | GPIO_PCTL_PF4_T2CCP0 0x00070000 |
#define | GPIO_PCTL_PF4_USB0EPEN 0x00080000 |
#define | GPIO_PCTL_PF3_M 0x0000F000 |
#define | GPIO_PCTL_PF3_SSI1FSS 0x00002000 |
#define | GPIO_PCTL_PF3_CAN0TX 0x00003000 |
#define | GPIO_PCTL_PF3_M0FAULT1 0x00004000 |
#define | GPIO_PCTL_PF3_M1PWM7 0x00005000 |
#define | GPIO_PCTL_PF3_T1CCP1 0x00007000 |
#define | GPIO_PCTL_PF3_TRCLK 0x0000E000 |
#define | GPIO_PCTL_PF2_M 0x00000F00 |
#define | GPIO_PCTL_PF2_SSI1CLK 0x00000200 |
#define | GPIO_PCTL_PF2_M0FAULT0 0x00000400 |
#define | GPIO_PCTL_PF2_M1PWM6 0x00000500 |
#define | GPIO_PCTL_PF2_T1CCP0 0x00000700 |
#define | GPIO_PCTL_PF2_TRD0 0x00000E00 |
#define | GPIO_PCTL_PF1_M 0x000000F0 |
#define | GPIO_PCTL_PF1_U1CTS 0x00000010 |
#define | GPIO_PCTL_PF1_SSI1TX 0x00000020 |
#define | GPIO_PCTL_PF1_M1PWM5 0x00000050 |
#define | GPIO_PCTL_PF1_PHB0 0x00000060 |
#define | GPIO_PCTL_PF1_T0CCP1 0x00000070 |
#define | GPIO_PCTL_PF1_C1O 0x00000090 |
#define | GPIO_PCTL_PF1_TRD1 0x000000E0 |
#define | GPIO_PCTL_PF0_M 0x0000000F |
#define | GPIO_PCTL_PF0_U1RTS 0x00000001 |
#define | GPIO_PCTL_PF0_SSI1RX 0x00000002 |
#define | GPIO_PCTL_PF0_CAN0RX 0x00000003 |
#define | GPIO_PCTL_PF0_M1PWM4 0x00000005 |
#define | GPIO_PCTL_PF0_PHA0 0x00000006 |
#define | GPIO_PCTL_PF0_T0CCP0 0x00000007 |
#define | GPIO_PCTL_PF0_NMI 0x00000008 |
#define | GPIO_PCTL_PF0_C0O 0x00000009 |
#define | GPIO_PCTL_PG5_M 0x00F00000 |
#define | GPIO_PCTL_PG5_U2TX 0x00100000 |
#define | GPIO_PCTL_PG5_I2C1SDA 0x00300000 |
#define | GPIO_PCTL_PG5_M0PWM5 0x00400000 |
#define | GPIO_PCTL_PG5_M1PWM3 0x00500000 |
#define | GPIO_PCTL_PG5_IDX1 0x00600000 |
#define | GPIO_PCTL_PG5_WT0CCP1 0x00700000 |
#define | GPIO_PCTL_PG5_USB0PFLT 0x00800000 |
#define | GPIO_PCTL_PG4_M 0x000F0000 |
#define | GPIO_PCTL_PG4_U2RX 0x00010000 |
#define | GPIO_PCTL_PG4_I2C1SCL 0x00030000 |
#define | GPIO_PCTL_PG4_M0PWM4 0x00040000 |
#define | GPIO_PCTL_PG4_M1PWM2 0x00050000 |
#define | GPIO_PCTL_PG4_PHB1 0x00060000 |
#define | GPIO_PCTL_PG4_WT0CCP0 0x00070000 |
#define | GPIO_PCTL_PG4_USB0EPEN 0x00080000 |
#define | GPIO_PCTL_PG3_M 0x0000F000 |
#define | GPIO_PCTL_PG3_I2C4SDA 0x00003000 |
#define | GPIO_PCTL_PG3_M0FAULT2 0x00004000 |
#define | GPIO_PCTL_PG3_M1PWM1 0x00005000 |
#define | GPIO_PCTL_PG3_PHA1 0x00006000 |
#define | GPIO_PCTL_PG3_T5CCP1 0x00007000 |
#define | GPIO_PCTL_PG2_M 0x00000F00 |
#define | GPIO_PCTL_PG2_I2C4SCL 0x00000300 |
#define | GPIO_PCTL_PG2_M0FAULT1 0x00000400 |
#define | GPIO_PCTL_PG2_M1PWM0 0x00000500 |
#define | GPIO_PCTL_PG2_T5CCP0 0x00000700 |
#define | GPIO_PCTL_PG1_M 0x000000F0 |
#define | GPIO_PCTL_PG1_I2C3SDA 0x00000030 |
#define | GPIO_PCTL_PG1_M1FAULT2 0x00000050 |
#define | GPIO_PCTL_PG1_PHB1 0x00000060 |
#define | GPIO_PCTL_PG1_T4CCP1 0x00000070 |
#define | GPIO_PCTL_PG0_M 0x0000000F |
#define | GPIO_PCTL_PG0_I2C3SCL 0x00000003 |
#define | GPIO_PCTL_PG0_M1FAULT1 0x00000005 |
#define | GPIO_PCTL_PG0_PHA1 0x00000006 |
#define | GPIO_PCTL_PG0_T4CCP0 0x00000007 |
#define | SSI_CR0_SCR_M 0x0000FF00 |
#define | SSI_CR0_SPH 0x00000080 |
#define | SSI_CR0_SPO 0x00000040 |
#define | SSI_CR0_FRF_M 0x00000030 |
#define | SSI_CR0_FRF_MOTO 0x00000000 |
#define | SSI_CR0_FRF_TI 0x00000010 |
#define | SSI_CR0_FRF_NMW 0x00000020 |
#define | SSI_CR0_DSS_M 0x0000000F |
#define | SSI_CR0_DSS_4 0x00000003 |
#define | SSI_CR0_DSS_5 0x00000004 |
#define | SSI_CR0_DSS_6 0x00000005 |
#define | SSI_CR0_DSS_7 0x00000006 |
#define | SSI_CR0_DSS_8 0x00000007 |
#define | SSI_CR0_DSS_9 0x00000008 |
#define | SSI_CR0_DSS_10 0x00000009 |
#define | SSI_CR0_DSS_11 0x0000000A |
#define | SSI_CR0_DSS_12 0x0000000B |
#define | SSI_CR0_DSS_13 0x0000000C |
#define | SSI_CR0_DSS_14 0x0000000D |
#define | SSI_CR0_DSS_15 0x0000000E |
#define | SSI_CR0_DSS_16 0x0000000F |
#define | SSI_CR0_SCR_S 8 |
#define | SSI_CR1_EOT 0x00000010 |
#define | SSI_CR1_MS 0x00000004 |
#define | SSI_CR1_SSE 0x00000002 |
#define | SSI_CR1_LBM 0x00000001 |
#define | SSI_DR_DATA_M 0x0000FFFF |
#define | SSI_DR_DATA_S 0 |
#define | SSI_SR_BSY 0x00000010 |
#define | SSI_SR_RFF 0x00000008 |
#define | SSI_SR_RNE 0x00000004 |
#define | SSI_SR_TNF 0x00000002 |
#define | SSI_SR_TFE 0x00000001 |
#define | SSI_CPSR_CPSDVSR_M 0x000000FF |
#define | SSI_CPSR_CPSDVSR_S 0 |
#define | SSI_IM_TXIM 0x00000008 |
#define | SSI_IM_RXIM 0x00000004 |
#define | SSI_IM_RTIM 0x00000002 |
#define | SSI_IM_RORIM 0x00000001 |
#define | SSI_RIS_TXRIS 0x00000008 |
#define | SSI_RIS_RXRIS 0x00000004 |
#define | SSI_RIS_RTRIS 0x00000002 |
#define | SSI_RIS_RORRIS 0x00000001 |
#define | SSI_MIS_TXMIS 0x00000008 |
#define | SSI_MIS_RXMIS 0x00000004 |
#define | SSI_MIS_RTMIS 0x00000002 |
#define | SSI_MIS_RORMIS 0x00000001 |
#define | SSI_ICR_RTIC 0x00000002 |
#define | SSI_ICR_RORIC 0x00000001 |
#define | SSI_DMACTL_TXDMAE 0x00000002 |
#define | SSI_DMACTL_RXDMAE 0x00000001 |
#define | SSI_CC_CS_M 0x0000000F |
#define | SSI_CC_CS_SYSPLL 0x00000000 |
#define | SSI_CC_CS_PIOSC 0x00000005 |
#define | UART_DR_OE 0x00000800 |
#define | UART_DR_BE 0x00000400 |
#define | UART_DR_PE 0x00000200 |
#define | UART_DR_FE 0x00000100 |
#define | UART_DR_DATA_M 0x000000FF |
#define | UART_DR_DATA_S 0 |
#define | UART_RSR_OE 0x00000008 |
#define | UART_RSR_BE 0x00000004 |
#define | UART_RSR_PE 0x00000002 |
#define | UART_RSR_FE 0x00000001 |
#define | UART_ECR_DATA_M 0x000000FF |
#define | UART_ECR_DATA_S 0 |
#define | UART_FR_TXFE 0x00000080 |
#define | UART_FR_RXFF 0x00000040 |
#define | UART_FR_TXFF 0x00000020 |
#define | UART_FR_RXFE 0x00000010 |
#define | UART_FR_BUSY 0x00000008 |
#define | UART_FR_CTS 0x00000001 |
#define | UART_ILPR_ILPDVSR_M 0x000000FF |
#define | UART_ILPR_ILPDVSR_S 0 |
#define | UART_IBRD_DIVINT_M 0x0000FFFF |
#define | UART_IBRD_DIVINT_S 0 |
#define | UART_FBRD_DIVFRAC_M 0x0000003F |
#define | UART_FBRD_DIVFRAC_S 0 |
#define | UART_LCRH_SPS 0x00000080 |
#define | UART_LCRH_WLEN_M 0x00000060 |
#define | UART_LCRH_WLEN_5 0x00000000 |
#define | UART_LCRH_WLEN_6 0x00000020 |
#define | UART_LCRH_WLEN_7 0x00000040 |
#define | UART_LCRH_WLEN_8 0x00000060 |
#define | UART_LCRH_FEN 0x00000010 |
#define | UART_LCRH_STP2 0x00000008 |
#define | UART_LCRH_EPS 0x00000004 |
#define | UART_LCRH_PEN 0x00000002 |
#define | UART_LCRH_BRK 0x00000001 |
#define | UART_CTL_CTSEN 0x00008000 |
#define | UART_CTL_RTSEN 0x00004000 |
#define | UART_CTL_RTS 0x00000800 |
#define | UART_CTL_RXE 0x00000200 |
#define | UART_CTL_TXE 0x00000100 |
#define | UART_CTL_LBE 0x00000080 |
#define | UART_CTL_HSE 0x00000020 |
#define | UART_CTL_EOT 0x00000010 |
#define | UART_CTL_SMART 0x00000008 |
#define | UART_CTL_SIRLP 0x00000004 |
#define | UART_CTL_SIREN 0x00000002 |
#define | UART_CTL_UARTEN 0x00000001 |
#define | UART_IFLS_RX_M 0x00000038 |
#define | UART_IFLS_RX1_8 0x00000000 |
#define | UART_IFLS_RX2_8 0x00000008 |
#define | UART_IFLS_RX4_8 0x00000010 |
#define | UART_IFLS_RX6_8 0x00000018 |
#define | UART_IFLS_RX7_8 0x00000020 |
#define | UART_IFLS_TX_M 0x00000007 |
#define | UART_IFLS_TX1_8 0x00000000 |
#define | UART_IFLS_TX2_8 0x00000001 |
#define | UART_IFLS_TX4_8 0x00000002 |
#define | UART_IFLS_TX6_8 0x00000003 |
#define | UART_IFLS_TX7_8 0x00000004 |
#define | UART_IM_9BITIM 0x00001000 |
#define | UART_IM_OEIM 0x00000400 |
#define | UART_IM_BEIM 0x00000200 |
#define | UART_IM_PEIM 0x00000100 |
#define | UART_IM_FEIM 0x00000080 |
#define | UART_IM_RTIM 0x00000040 |
#define | UART_IM_TXIM 0x00000020 |
#define | UART_IM_RXIM 0x00000010 |
#define | UART_IM_CTSMIM 0x00000002 |
#define | UART_RIS_9BITRIS 0x00001000 |
#define | UART_RIS_OERIS 0x00000400 |
#define | UART_RIS_BERIS 0x00000200 |
#define | UART_RIS_PERIS 0x00000100 |
#define | UART_RIS_FERIS 0x00000080 |
#define | UART_RIS_RTRIS 0x00000040 |
#define | UART_RIS_TXRIS 0x00000020 |
#define | UART_RIS_RXRIS 0x00000010 |
#define | UART_RIS_CTSRIS 0x00000002 |
#define | UART_MIS_9BITMIS 0x00001000 |
#define | UART_MIS_OEMIS 0x00000400 |
#define | UART_MIS_BEMIS 0x00000200 |
#define | UART_MIS_PEMIS 0x00000100 |
#define | UART_MIS_FEMIS 0x00000080 |
#define | UART_MIS_RTMIS 0x00000040 |
#define | UART_MIS_TXMIS 0x00000020 |
#define | UART_MIS_RXMIS 0x00000010 |
#define | UART_MIS_CTSMIS 0x00000002 |
#define | UART_ICR_9BITIC 0x00001000 |
#define | UART_ICR_OEIC 0x00000400 |
#define | UART_ICR_BEIC 0x00000200 |
#define | UART_ICR_PEIC 0x00000100 |
#define | UART_ICR_FEIC 0x00000080 |
#define | UART_ICR_RTIC 0x00000040 |
#define | UART_ICR_TXIC 0x00000020 |
#define | UART_ICR_RXIC 0x00000010 |
#define | UART_ICR_CTSMIC 0x00000002 |
#define | UART_DMACTL_DMAERR 0x00000004 |
#define | UART_DMACTL_TXDMAE 0x00000002 |
#define | UART_DMACTL_RXDMAE 0x00000001 |
#define | UART_9BITADDR_9BITEN 0x00008000 |
#define | UART_9BITADDR_ADDR_M 0x000000FF |
#define | UART_9BITADDR_ADDR_S 0 |
#define | UART_9BITAMASK_MASK_M 0x000000FF |
#define | UART_9BITAMASK_MASK_S 0 |
#define | UART_PP_NB 0x00000002 |
#define | UART_PP_SC 0x00000001 |
#define | UART_CC_CS_M 0x0000000F |
#define | UART_CC_CS_SYSCLK 0x00000000 |
#define | UART_CC_CS_PIOSC 0x00000005 |
#define | I2C_MSA_SA_M 0x000000FE |
#define | I2C_MSA_RS 0x00000001 |
#define | I2C_MSA_SA_S 1 |
#define | I2C_MCS_CLKTO 0x00000080 |
#define | I2C_MCS_BUSBSY 0x00000040 |
#define | I2C_MCS_IDLE 0x00000020 |
#define | I2C_MCS_ARBLST 0x00000010 |
#define | I2C_MCS_HS 0x00000010 |
#define | I2C_MCS_ACK 0x00000008 |
#define | I2C_MCS_DATACK 0x00000008 |
#define | I2C_MCS_ADRACK 0x00000004 |
#define | I2C_MCS_STOP 0x00000004 |
#define | I2C_MCS_ERROR 0x00000002 |
#define | I2C_MCS_START 0x00000002 |
#define | I2C_MCS_RUN 0x00000001 |
#define | I2C_MCS_BUSY 0x00000001 |
#define | I2C_MDR_DATA_M 0x000000FF |
#define | I2C_MDR_DATA_S 0 |
#define | I2C_MTPR_HS 0x00000080 |
#define | I2C_MTPR_TPR_M 0x0000007F |
#define | I2C_MTPR_TPR_S 0 |
#define | I2C_MIMR_CLKIM 0x00000002 |
#define | I2C_MIMR_IM 0x00000001 |
#define | I2C_MRIS_CLKRIS 0x00000002 |
#define | I2C_MRIS_RIS 0x00000001 |
#define | I2C_MMIS_CLKMIS 0x00000002 |
#define | I2C_MMIS_MIS 0x00000001 |
#define | I2C_MICR_CLKIC 0x00000002 |
#define | I2C_MICR_IC 0x00000001 |
#define | I2C_MCR_GFE 0x00000040 |
#define | I2C_MCR_SFE 0x00000020 |
#define | I2C_MCR_MFE 0x00000010 |
#define | I2C_MCR_LPBK 0x00000001 |
#define | I2C_MCLKOCNT_CNTL_M 0x000000FF |
#define | I2C_MCLKOCNT_CNTL_S 0 |
#define | I2C_MBMON_SDA 0x00000002 |
#define | I2C_MBMON_SCL 0x00000001 |
#define | I2C_MCR2_GFPW_M 0x00000070 |
#define | I2C_MCR2_GFPW_BYPASS 0x00000000 |
#define | I2C_MCR2_GFPW_1 0x00000010 |
#define | I2C_MCR2_GFPW_2 0x00000020 |
#define | I2C_MCR2_GFPW_3 0x00000030 |
#define | I2C_MCR2_GFPW_4 0x00000040 |
#define | I2C_MCR2_GFPW_8 0x00000050 |
#define | I2C_MCR2_GFPW_16 0x00000060 |
#define | I2C_MCR2_GFPW_31 0x00000070 |
#define | I2C_SOAR_OAR_M 0x0000007F |
#define | I2C_SOAR_OAR_S 0 |
#define | I2C_SCSR_OAR2SEL 0x00000008 |
#define | I2C_SCSR_FBR 0x00000004 |
#define | I2C_SCSR_TREQ 0x00000002 |
#define | I2C_SCSR_DA 0x00000001 |
#define | I2C_SCSR_RREQ 0x00000001 |
#define | I2C_SDR_DATA_M 0x000000FF |
#define | I2C_SDR_DATA_S 0 |
#define | I2C_SIMR_STOPIM 0x00000004 |
#define | I2C_SIMR_STARTIM 0x00000002 |
#define | I2C_SIMR_DATAIM 0x00000001 |
#define | I2C_SRIS_STOPRIS 0x00000004 |
#define | I2C_SRIS_STARTRIS 0x00000002 |
#define | I2C_SRIS_DATARIS 0x00000001 |
#define | I2C_SMIS_STOPMIS 0x00000004 |
#define | I2C_SMIS_STARTMIS 0x00000002 |
#define | I2C_SMIS_DATAMIS 0x00000001 |
#define | I2C_SICR_STOPIC 0x00000004 |
#define | I2C_SICR_STARTIC 0x00000002 |
#define | I2C_SICR_DATAIC 0x00000001 |
#define | I2C_SOAR2_OAR2EN 0x00000080 |
#define | I2C_SOAR2_OAR2_M 0x0000007F |
#define | I2C_SOAR2_OAR2_S 0 |
#define | I2C_SACKCTL_ACKOVAL 0x00000002 |
#define | I2C_SACKCTL_ACKOEN 0x00000001 |
#define | I2C_PP_HS 0x00000001 |
#define | I2C_PC_HS 0x00000001 |
#define | PWM_CTL_GLOBALSYNC3 0x00000008 |
#define | PWM_CTL_GLOBALSYNC2 0x00000004 |
#define | PWM_CTL_GLOBALSYNC1 0x00000002 |
#define | PWM_CTL_GLOBALSYNC0 0x00000001 |
#define | PWM_SYNC_SYNC3 0x00000008 |
#define | PWM_SYNC_SYNC2 0x00000004 |
#define | PWM_SYNC_SYNC1 0x00000002 |
#define | PWM_SYNC_SYNC0 0x00000001 |
#define | PWM_ENABLE_PWM7EN 0x00000080 |
#define | PWM_ENABLE_PWM6EN 0x00000040 |
#define | PWM_ENABLE_PWM5EN 0x00000020 |
#define | PWM_ENABLE_PWM4EN 0x00000010 |
#define | PWM_ENABLE_PWM3EN 0x00000008 |
#define | PWM_ENABLE_PWM2EN 0x00000004 |
#define | PWM_ENABLE_PWM1EN 0x00000002 |
#define | PWM_ENABLE_PWM0EN 0x00000001 |
#define | PWM_INVERT_PWM7INV 0x00000080 |
#define | PWM_INVERT_PWM6INV 0x00000040 |
#define | PWM_INVERT_PWM5INV 0x00000020 |
#define | PWM_INVERT_PWM4INV 0x00000010 |
#define | PWM_INVERT_PWM3INV 0x00000008 |
#define | PWM_INVERT_PWM2INV 0x00000004 |
#define | PWM_INVERT_PWM1INV 0x00000002 |
#define | PWM_INVERT_PWM0INV 0x00000001 |
#define | PWM_FAULT_FAULT7 0x00000080 |
#define | PWM_FAULT_FAULT6 0x00000040 |
#define | PWM_FAULT_FAULT5 0x00000020 |
#define | PWM_FAULT_FAULT4 0x00000010 |
#define | PWM_FAULT_FAULT3 0x00000008 |
#define | PWM_FAULT_FAULT2 0x00000004 |
#define | PWM_FAULT_FAULT1 0x00000002 |
#define | PWM_FAULT_FAULT0 0x00000001 |
#define | PWM_INTEN_INTFAULT3 0x00080000 |
#define | PWM_INTEN_INTFAULT2 0x00040000 |
#define | PWM_INTEN_INTFAULT1 0x00020000 |
#define | PWM_INTEN_INTFAULT0 0x00010000 |
#define | PWM_INTEN_INTPWM3 0x00000008 |
#define | PWM_INTEN_INTPWM2 0x00000004 |
#define | PWM_INTEN_INTPWM1 0x00000002 |
#define | PWM_INTEN_INTPWM0 0x00000001 |
#define | PWM_RIS_INTFAULT3 0x00080000 |
#define | PWM_RIS_INTFAULT2 0x00040000 |
#define | PWM_RIS_INTFAULT1 0x00020000 |
#define | PWM_RIS_INTFAULT0 0x00010000 |
#define | PWM_RIS_INTPWM3 0x00000008 |
#define | PWM_RIS_INTPWM2 0x00000004 |
#define | PWM_RIS_INTPWM1 0x00000002 |
#define | PWM_RIS_INTPWM0 0x00000001 |
#define | PWM_ISC_INTFAULT3 0x00080000 |
#define | PWM_ISC_INTFAULT2 0x00040000 |
#define | PWM_ISC_INTFAULT1 0x00020000 |
#define | PWM_ISC_INTFAULT0 0x00010000 |
#define | PWM_ISC_INTPWM3 0x00000008 |
#define | PWM_ISC_INTPWM2 0x00000004 |
#define | PWM_ISC_INTPWM1 0x00000002 |
#define | PWM_ISC_INTPWM0 0x00000001 |
#define | PWM_STATUS_FAULT3 0x00000008 |
#define | PWM_STATUS_FAULT2 0x00000004 |
#define | PWM_STATUS_FAULT1 0x00000002 |
#define | PWM_STATUS_FAULT0 0x00000001 |
#define | PWM_FAULTVAL_PWM7 0x00000080 |
#define | PWM_FAULTVAL_PWM6 0x00000040 |
#define | PWM_FAULTVAL_PWM5 0x00000020 |
#define | PWM_FAULTVAL_PWM4 0x00000010 |
#define | PWM_FAULTVAL_PWM3 0x00000008 |
#define | PWM_FAULTVAL_PWM2 0x00000004 |
#define | PWM_FAULTVAL_PWM1 0x00000002 |
#define | PWM_FAULTVAL_PWM0 0x00000001 |
#define | PWM_ENUPD_ENUPD7_M 0x0000C000 |
#define | PWM_ENUPD_ENUPD7_IMM 0x00000000 |
#define | PWM_ENUPD_ENUPD7_LSYNC 0x00008000 |
#define | PWM_ENUPD_ENUPD7_GSYNC 0x0000C000 |
#define | PWM_ENUPD_ENUPD6_M 0x00003000 |
#define | PWM_ENUPD_ENUPD6_IMM 0x00000000 |
#define | PWM_ENUPD_ENUPD6_LSYNC 0x00002000 |
#define | PWM_ENUPD_ENUPD6_GSYNC 0x00003000 |
#define | PWM_ENUPD_ENUPD5_M 0x00000C00 |
#define | PWM_ENUPD_ENUPD5_IMM 0x00000000 |
#define | PWM_ENUPD_ENUPD5_LSYNC 0x00000800 |
#define | PWM_ENUPD_ENUPD5_GSYNC 0x00000C00 |
#define | PWM_ENUPD_ENUPD4_M 0x00000300 |
#define | PWM_ENUPD_ENUPD4_IMM 0x00000000 |
#define | PWM_ENUPD_ENUPD4_LSYNC 0x00000200 |
#define | PWM_ENUPD_ENUPD4_GSYNC 0x00000300 |
#define | PWM_ENUPD_ENUPD3_M 0x000000C0 |
#define | PWM_ENUPD_ENUPD3_IMM 0x00000000 |
#define | PWM_ENUPD_ENUPD3_LSYNC 0x00000080 |
#define | PWM_ENUPD_ENUPD3_GSYNC 0x000000C0 |
#define | PWM_ENUPD_ENUPD2_M 0x00000030 |
#define | PWM_ENUPD_ENUPD2_IMM 0x00000000 |
#define | PWM_ENUPD_ENUPD2_LSYNC 0x00000020 |
#define | PWM_ENUPD_ENUPD2_GSYNC 0x00000030 |
#define | PWM_ENUPD_ENUPD1_M 0x0000000C |
#define | PWM_ENUPD_ENUPD1_IMM 0x00000000 |
#define | PWM_ENUPD_ENUPD1_LSYNC 0x00000008 |
#define | PWM_ENUPD_ENUPD1_GSYNC 0x0000000C |
#define | PWM_ENUPD_ENUPD0_M 0x00000003 |
#define | PWM_ENUPD_ENUPD0_IMM 0x00000000 |
#define | PWM_ENUPD_ENUPD0_LSYNC 0x00000002 |
#define | PWM_ENUPD_ENUPD0_GSYNC 0x00000003 |
#define | PWM_0_CTL_LATCH 0x00040000 |
#define | PWM_0_CTL_MINFLTPER 0x00020000 |
#define | PWM_0_CTL_FLTSRC 0x00010000 |
#define | PWM_0_CTL_DBFALLUPD_M 0x0000C000 |
#define | PWM_0_CTL_DBFALLUPD_I 0x00000000 |
#define | PWM_0_CTL_DBFALLUPD_LS 0x00008000 |
#define | PWM_0_CTL_DBFALLUPD_GS 0x0000C000 |
#define | PWM_0_CTL_DBRISEUPD_M 0x00003000 |
#define | PWM_0_CTL_DBRISEUPD_I 0x00000000 |
#define | PWM_0_CTL_DBRISEUPD_LS 0x00002000 |
#define | PWM_0_CTL_DBRISEUPD_GS 0x00003000 |
#define | PWM_0_CTL_DBCTLUPD_M 0x00000C00 |
#define | PWM_0_CTL_DBCTLUPD_I 0x00000000 |
#define | PWM_0_CTL_DBCTLUPD_LS 0x00000800 |
#define | PWM_0_CTL_DBCTLUPD_GS 0x00000C00 |
#define | PWM_0_CTL_GENBUPD_M 0x00000300 |
#define | PWM_0_CTL_GENBUPD_I 0x00000000 |
#define | PWM_0_CTL_GENBUPD_LS 0x00000200 |
#define | PWM_0_CTL_GENBUPD_GS 0x00000300 |
#define | PWM_0_CTL_GENAUPD_M 0x000000C0 |
#define | PWM_0_CTL_GENAUPD_I 0x00000000 |
#define | PWM_0_CTL_GENAUPD_LS 0x00000080 |
#define | PWM_0_CTL_GENAUPD_GS 0x000000C0 |
#define | PWM_0_CTL_CMPBUPD 0x00000020 |
#define | PWM_0_CTL_CMPAUPD 0x00000010 |
#define | PWM_0_CTL_LOADUPD 0x00000008 |
#define | PWM_0_CTL_DEBUG 0x00000004 |
#define | PWM_0_CTL_MODE 0x00000002 |
#define | PWM_0_CTL_ENABLE 0x00000001 |
#define | PWM_0_INTEN_TRCMPBD 0x00002000 |
#define | PWM_0_INTEN_TRCMPBU 0x00001000 |
#define | PWM_0_INTEN_TRCMPAD 0x00000800 |
#define | PWM_0_INTEN_TRCMPAU 0x00000400 |
#define | PWM_0_INTEN_TRCNTLOAD 0x00000200 |
#define | PWM_0_INTEN_TRCNTZERO 0x00000100 |
#define | PWM_0_INTEN_INTCMPBD 0x00000020 |
#define | PWM_0_INTEN_INTCMPBU 0x00000010 |
#define | PWM_0_INTEN_INTCMPAD 0x00000008 |
#define | PWM_0_INTEN_INTCMPAU 0x00000004 |
#define | PWM_0_INTEN_INTCNTLOAD 0x00000002 |
#define | PWM_0_INTEN_INTCNTZERO 0x00000001 |
#define | PWM_0_RIS_INTCMPBD 0x00000020 |
#define | PWM_0_RIS_INTCMPBU 0x00000010 |
#define | PWM_0_RIS_INTCMPAD 0x00000008 |
#define | PWM_0_RIS_INTCMPAU 0x00000004 |
#define | PWM_0_RIS_INTCNTLOAD 0x00000002 |
#define | PWM_0_RIS_INTCNTZERO 0x00000001 |
#define | PWM_0_ISC_INTCMPBD 0x00000020 |
#define | PWM_0_ISC_INTCMPBU 0x00000010 |
#define | PWM_0_ISC_INTCMPAD 0x00000008 |
#define | PWM_0_ISC_INTCMPAU 0x00000004 |
#define | PWM_0_ISC_INTCNTLOAD 0x00000002 |
#define | PWM_0_ISC_INTCNTZERO 0x00000001 |
#define | PWM_0_LOAD_M 0x0000FFFF |
#define | PWM_0_LOAD_S 0 |
#define | PWM_0_COUNT_M 0x0000FFFF |
#define | PWM_0_COUNT_S 0 |
#define | PWM_0_CMPA_M 0x0000FFFF |
#define | PWM_0_CMPA_S 0 |
#define | PWM_0_CMPB_M 0x0000FFFF |
#define | PWM_0_CMPB_S 0 |
#define | PWM_0_GENA_ACTCMPBD_M 0x00000C00 |
#define | PWM_0_GENA_ACTCMPBD_NONE 0x00000000 |
#define | PWM_0_GENA_ACTCMPBD_INV 0x00000400 |
#define | PWM_0_GENA_ACTCMPBD_ZERO 0x00000800 |
#define | PWM_0_GENA_ACTCMPBD_ONE 0x00000C00 |
#define | PWM_0_GENA_ACTCMPBU_M 0x00000300 |
#define | PWM_0_GENA_ACTCMPBU_NONE 0x00000000 |
#define | PWM_0_GENA_ACTCMPBU_INV 0x00000100 |
#define | PWM_0_GENA_ACTCMPBU_ZERO 0x00000200 |
#define | PWM_0_GENA_ACTCMPBU_ONE 0x00000300 |
#define | PWM_0_GENA_ACTCMPAD_M 0x000000C0 |
#define | PWM_0_GENA_ACTCMPAD_NONE 0x00000000 |
#define | PWM_0_GENA_ACTCMPAD_INV 0x00000040 |
#define | PWM_0_GENA_ACTCMPAD_ZERO 0x00000080 |
#define | PWM_0_GENA_ACTCMPAD_ONE 0x000000C0 |
#define | PWM_0_GENA_ACTCMPAU_M 0x00000030 |
#define | PWM_0_GENA_ACTCMPAU_NONE 0x00000000 |
#define | PWM_0_GENA_ACTCMPAU_INV 0x00000010 |
#define | PWM_0_GENA_ACTCMPAU_ZERO 0x00000020 |
#define | PWM_0_GENA_ACTCMPAU_ONE 0x00000030 |
#define | PWM_0_GENA_ACTLOAD_M 0x0000000C |
#define | PWM_0_GENA_ACTLOAD_NONE 0x00000000 |
#define | PWM_0_GENA_ACTLOAD_INV 0x00000004 |
#define | PWM_0_GENA_ACTLOAD_ZERO 0x00000008 |
#define | PWM_0_GENA_ACTLOAD_ONE 0x0000000C |
#define | PWM_0_GENA_ACTZERO_M 0x00000003 |
#define | PWM_0_GENA_ACTZERO_NONE 0x00000000 |
#define | PWM_0_GENA_ACTZERO_INV 0x00000001 |
#define | PWM_0_GENA_ACTZERO_ZERO 0x00000002 |
#define | PWM_0_GENA_ACTZERO_ONE 0x00000003 |
#define | PWM_0_GENB_ACTCMPBD_M 0x00000C00 |
#define | PWM_0_GENB_ACTCMPBD_NONE 0x00000000 |
#define | PWM_0_GENB_ACTCMPBD_INV 0x00000400 |
#define | PWM_0_GENB_ACTCMPBD_ZERO 0x00000800 |
#define | PWM_0_GENB_ACTCMPBD_ONE 0x00000C00 |
#define | PWM_0_GENB_ACTCMPBU_M 0x00000300 |
#define | PWM_0_GENB_ACTCMPBU_NONE 0x00000000 |
#define | PWM_0_GENB_ACTCMPBU_INV 0x00000100 |
#define | PWM_0_GENB_ACTCMPBU_ZERO 0x00000200 |
#define | PWM_0_GENB_ACTCMPBU_ONE 0x00000300 |
#define | PWM_0_GENB_ACTCMPAD_M 0x000000C0 |
#define | PWM_0_GENB_ACTCMPAD_NONE 0x00000000 |
#define | PWM_0_GENB_ACTCMPAD_INV 0x00000040 |
#define | PWM_0_GENB_ACTCMPAD_ZERO 0x00000080 |
#define | PWM_0_GENB_ACTCMPAD_ONE 0x000000C0 |
#define | PWM_0_GENB_ACTCMPAU_M 0x00000030 |
#define | PWM_0_GENB_ACTCMPAU_NONE 0x00000000 |
#define | PWM_0_GENB_ACTCMPAU_INV 0x00000010 |
#define | PWM_0_GENB_ACTCMPAU_ZERO 0x00000020 |
#define | PWM_0_GENB_ACTCMPAU_ONE 0x00000030 |
#define | PWM_0_GENB_ACTLOAD_M 0x0000000C |
#define | PWM_0_GENB_ACTLOAD_NONE 0x00000000 |
#define | PWM_0_GENB_ACTLOAD_INV 0x00000004 |
#define | PWM_0_GENB_ACTLOAD_ZERO 0x00000008 |
#define | PWM_0_GENB_ACTLOAD_ONE 0x0000000C |
#define | PWM_0_GENB_ACTZERO_M 0x00000003 |
#define | PWM_0_GENB_ACTZERO_NONE 0x00000000 |
#define | PWM_0_GENB_ACTZERO_INV 0x00000001 |
#define | PWM_0_GENB_ACTZERO_ZERO 0x00000002 |
#define | PWM_0_GENB_ACTZERO_ONE 0x00000003 |
#define | PWM_0_DBCTL_ENABLE 0x00000001 |
#define | PWM_0_DBRISE_DELAY_M 0x00000FFF |
#define | PWM_0_DBRISE_DELAY_S 0 |
#define | PWM_0_DBFALL_DELAY_M 0x00000FFF |
#define | PWM_0_DBFALL_DELAY_S 0 |
#define | PWM_0_FLTSRC0_FAULT3 0x00000008 |
#define | PWM_0_FLTSRC0_FAULT2 0x00000004 |
#define | PWM_0_FLTSRC0_FAULT1 0x00000002 |
#define | PWM_0_FLTSRC0_FAULT0 0x00000001 |
#define | PWM_0_FLTSRC1_DCMP7 0x00000080 |
#define | PWM_0_FLTSRC1_DCMP6 0x00000040 |
#define | PWM_0_FLTSRC1_DCMP5 0x00000020 |
#define | PWM_0_FLTSRC1_DCMP4 0x00000010 |
#define | PWM_0_FLTSRC1_DCMP3 0x00000008 |
#define | PWM_0_FLTSRC1_DCMP2 0x00000004 |
#define | PWM_0_FLTSRC1_DCMP1 0x00000002 |
#define | PWM_0_FLTSRC1_DCMP0 0x00000001 |
#define | PWM_0_MINFLTPER_M 0x0000FFFF |
#define | PWM_0_MINFLTPER_S 0 |
#define | PWM_1_CTL_LATCH 0x00040000 |
#define | PWM_1_CTL_MINFLTPER 0x00020000 |
#define | PWM_1_CTL_FLTSRC 0x00010000 |
#define | PWM_1_CTL_DBFALLUPD_M 0x0000C000 |
#define | PWM_1_CTL_DBFALLUPD_I 0x00000000 |
#define | PWM_1_CTL_DBFALLUPD_LS 0x00008000 |
#define | PWM_1_CTL_DBFALLUPD_GS 0x0000C000 |
#define | PWM_1_CTL_DBRISEUPD_M 0x00003000 |
#define | PWM_1_CTL_DBRISEUPD_I 0x00000000 |
#define | PWM_1_CTL_DBRISEUPD_LS 0x00002000 |
#define | PWM_1_CTL_DBRISEUPD_GS 0x00003000 |
#define | PWM_1_CTL_DBCTLUPD_M 0x00000C00 |
#define | PWM_1_CTL_DBCTLUPD_I 0x00000000 |
#define | PWM_1_CTL_DBCTLUPD_LS 0x00000800 |
#define | PWM_1_CTL_DBCTLUPD_GS 0x00000C00 |
#define | PWM_1_CTL_GENBUPD_M 0x00000300 |
#define | PWM_1_CTL_GENBUPD_I 0x00000000 |
#define | PWM_1_CTL_GENBUPD_LS 0x00000200 |
#define | PWM_1_CTL_GENBUPD_GS 0x00000300 |
#define | PWM_1_CTL_GENAUPD_M 0x000000C0 |
#define | PWM_1_CTL_GENAUPD_I 0x00000000 |
#define | PWM_1_CTL_GENAUPD_LS 0x00000080 |
#define | PWM_1_CTL_GENAUPD_GS 0x000000C0 |
#define | PWM_1_CTL_CMPBUPD 0x00000020 |
#define | PWM_1_CTL_CMPAUPD 0x00000010 |
#define | PWM_1_CTL_LOADUPD 0x00000008 |
#define | PWM_1_CTL_DEBUG 0x00000004 |
#define | PWM_1_CTL_MODE 0x00000002 |
#define | PWM_1_CTL_ENABLE 0x00000001 |
#define | PWM_1_INTEN_TRCMPBD 0x00002000 |
#define | PWM_1_INTEN_TRCMPBU 0x00001000 |
#define | PWM_1_INTEN_TRCMPAD 0x00000800 |
#define | PWM_1_INTEN_TRCMPAU 0x00000400 |
#define | PWM_1_INTEN_TRCNTLOAD 0x00000200 |
#define | PWM_1_INTEN_TRCNTZERO 0x00000100 |
#define | PWM_1_INTEN_INTCMPBD 0x00000020 |
#define | PWM_1_INTEN_INTCMPBU 0x00000010 |
#define | PWM_1_INTEN_INTCMPAD 0x00000008 |
#define | PWM_1_INTEN_INTCMPAU 0x00000004 |
#define | PWM_1_INTEN_INTCNTLOAD 0x00000002 |
#define | PWM_1_INTEN_INTCNTZERO 0x00000001 |
#define | PWM_1_RIS_INTCMPBD 0x00000020 |
#define | PWM_1_RIS_INTCMPBU 0x00000010 |
#define | PWM_1_RIS_INTCMPAD 0x00000008 |
#define | PWM_1_RIS_INTCMPAU 0x00000004 |
#define | PWM_1_RIS_INTCNTLOAD 0x00000002 |
#define | PWM_1_RIS_INTCNTZERO 0x00000001 |
#define | PWM_1_ISC_INTCMPBD 0x00000020 |
#define | PWM_1_ISC_INTCMPBU 0x00000010 |
#define | PWM_1_ISC_INTCMPAD 0x00000008 |
#define | PWM_1_ISC_INTCMPAU 0x00000004 |
#define | PWM_1_ISC_INTCNTLOAD 0x00000002 |
#define | PWM_1_ISC_INTCNTZERO 0x00000001 |
#define | PWM_1_LOAD_LOAD_M 0x0000FFFF |
#define | PWM_1_LOAD_LOAD_S 0 |
#define | PWM_1_COUNT_COUNT_M 0x0000FFFF |
#define | PWM_1_COUNT_COUNT_S 0 |
#define | PWM_1_CMPA_COMPA_M 0x0000FFFF |
#define | PWM_1_CMPA_COMPA_S 0 |
#define | PWM_1_CMPB_COMPB_M 0x0000FFFF |
#define | PWM_1_CMPB_COMPB_S 0 |
#define | PWM_1_GENA_ACTCMPBD_M 0x00000C00 |
#define | PWM_1_GENA_ACTCMPBD_NONE 0x00000000 |
#define | PWM_1_GENA_ACTCMPBD_INV 0x00000400 |
#define | PWM_1_GENA_ACTCMPBD_ZERO 0x00000800 |
#define | PWM_1_GENA_ACTCMPBD_ONE 0x00000C00 |
#define | PWM_1_GENA_ACTCMPBU_M 0x00000300 |
#define | PWM_1_GENA_ACTCMPBU_NONE 0x00000000 |
#define | PWM_1_GENA_ACTCMPBU_INV 0x00000100 |
#define | PWM_1_GENA_ACTCMPBU_ZERO 0x00000200 |
#define | PWM_1_GENA_ACTCMPBU_ONE 0x00000300 |
#define | PWM_1_GENA_ACTCMPAD_M 0x000000C0 |
#define | PWM_1_GENA_ACTCMPAD_NONE 0x00000000 |
#define | PWM_1_GENA_ACTCMPAD_INV 0x00000040 |
#define | PWM_1_GENA_ACTCMPAD_ZERO 0x00000080 |
#define | PWM_1_GENA_ACTCMPAD_ONE 0x000000C0 |
#define | PWM_1_GENA_ACTCMPAU_M 0x00000030 |
#define | PWM_1_GENA_ACTCMPAU_NONE 0x00000000 |
#define | PWM_1_GENA_ACTCMPAU_INV 0x00000010 |
#define | PWM_1_GENA_ACTCMPAU_ZERO 0x00000020 |
#define | PWM_1_GENA_ACTCMPAU_ONE 0x00000030 |
#define | PWM_1_GENA_ACTLOAD_M 0x0000000C |
#define | PWM_1_GENA_ACTLOAD_NONE 0x00000000 |
#define | PWM_1_GENA_ACTLOAD_INV 0x00000004 |
#define | PWM_1_GENA_ACTLOAD_ZERO 0x00000008 |
#define | PWM_1_GENA_ACTLOAD_ONE 0x0000000C |
#define | PWM_1_GENA_ACTZERO_M 0x00000003 |
#define | PWM_1_GENA_ACTZERO_NONE 0x00000000 |
#define | PWM_1_GENA_ACTZERO_INV 0x00000001 |
#define | PWM_1_GENA_ACTZERO_ZERO 0x00000002 |
#define | PWM_1_GENA_ACTZERO_ONE 0x00000003 |
#define | PWM_1_GENB_ACTCMPBD_M 0x00000C00 |
#define | PWM_1_GENB_ACTCMPBD_NONE 0x00000000 |
#define | PWM_1_GENB_ACTCMPBD_INV 0x00000400 |
#define | PWM_1_GENB_ACTCMPBD_ZERO 0x00000800 |
#define | PWM_1_GENB_ACTCMPBD_ONE 0x00000C00 |
#define | PWM_1_GENB_ACTCMPBU_M 0x00000300 |
#define | PWM_1_GENB_ACTCMPBU_NONE 0x00000000 |
#define | PWM_1_GENB_ACTCMPBU_INV 0x00000100 |
#define | PWM_1_GENB_ACTCMPBU_ZERO 0x00000200 |
#define | PWM_1_GENB_ACTCMPBU_ONE 0x00000300 |
#define | PWM_1_GENB_ACTCMPAD_M 0x000000C0 |
#define | PWM_1_GENB_ACTCMPAD_NONE 0x00000000 |
#define | PWM_1_GENB_ACTCMPAD_INV 0x00000040 |
#define | PWM_1_GENB_ACTCMPAD_ZERO 0x00000080 |
#define | PWM_1_GENB_ACTCMPAD_ONE 0x000000C0 |
#define | PWM_1_GENB_ACTCMPAU_M 0x00000030 |
#define | PWM_1_GENB_ACTCMPAU_NONE 0x00000000 |
#define | PWM_1_GENB_ACTCMPAU_INV 0x00000010 |
#define | PWM_1_GENB_ACTCMPAU_ZERO 0x00000020 |
#define | PWM_1_GENB_ACTCMPAU_ONE 0x00000030 |
#define | PWM_1_GENB_ACTLOAD_M 0x0000000C |
#define | PWM_1_GENB_ACTLOAD_NONE 0x00000000 |
#define | PWM_1_GENB_ACTLOAD_INV 0x00000004 |
#define | PWM_1_GENB_ACTLOAD_ZERO 0x00000008 |
#define | PWM_1_GENB_ACTLOAD_ONE 0x0000000C |
#define | PWM_1_GENB_ACTZERO_M 0x00000003 |
#define | PWM_1_GENB_ACTZERO_NONE 0x00000000 |
#define | PWM_1_GENB_ACTZERO_INV 0x00000001 |
#define | PWM_1_GENB_ACTZERO_ZERO 0x00000002 |
#define | PWM_1_GENB_ACTZERO_ONE 0x00000003 |
#define | PWM_1_DBCTL_ENABLE 0x00000001 |
#define | PWM_1_DBRISE_RISEDELAY_M 0x00000FFF |
#define | PWM_1_DBRISE_RISEDELAY_S 0 |
#define | PWM_1_DBFALL_FALLDELAY_M 0x00000FFF |
#define | PWM_1_DBFALL_FALLDELAY_S 0 |
#define | PWM_1_FLTSRC0_FAULT3 0x00000008 |
#define | PWM_1_FLTSRC0_FAULT2 0x00000004 |
#define | PWM_1_FLTSRC0_FAULT1 0x00000002 |
#define | PWM_1_FLTSRC0_FAULT0 0x00000001 |
#define | PWM_1_FLTSRC1_DCMP7 0x00000080 |
#define | PWM_1_FLTSRC1_DCMP6 0x00000040 |
#define | PWM_1_FLTSRC1_DCMP5 0x00000020 |
#define | PWM_1_FLTSRC1_DCMP4 0x00000010 |
#define | PWM_1_FLTSRC1_DCMP3 0x00000008 |
#define | PWM_1_FLTSRC1_DCMP2 0x00000004 |
#define | PWM_1_FLTSRC1_DCMP1 0x00000002 |
#define | PWM_1_FLTSRC1_DCMP0 0x00000001 |
#define | PWM_1_MINFLTPER_MFP_M 0x0000FFFF |
#define | PWM_1_MINFLTPER_MFP_S 0 |
#define | PWM_2_CTL_LATCH 0x00040000 |
#define | PWM_2_CTL_MINFLTPER 0x00020000 |
#define | PWM_2_CTL_FLTSRC 0x00010000 |
#define | PWM_2_CTL_DBFALLUPD_M 0x0000C000 |
#define | PWM_2_CTL_DBFALLUPD_I 0x00000000 |
#define | PWM_2_CTL_DBFALLUPD_LS 0x00008000 |
#define | PWM_2_CTL_DBFALLUPD_GS 0x0000C000 |
#define | PWM_2_CTL_DBRISEUPD_M 0x00003000 |
#define | PWM_2_CTL_DBRISEUPD_I 0x00000000 |
#define | PWM_2_CTL_DBRISEUPD_LS 0x00002000 |
#define | PWM_2_CTL_DBRISEUPD_GS 0x00003000 |
#define | PWM_2_CTL_DBCTLUPD_M 0x00000C00 |
#define | PWM_2_CTL_DBCTLUPD_I 0x00000000 |
#define | PWM_2_CTL_DBCTLUPD_LS 0x00000800 |
#define | PWM_2_CTL_DBCTLUPD_GS 0x00000C00 |
#define | PWM_2_CTL_GENBUPD_M 0x00000300 |
#define | PWM_2_CTL_GENBUPD_I 0x00000000 |
#define | PWM_2_CTL_GENBUPD_LS 0x00000200 |
#define | PWM_2_CTL_GENBUPD_GS 0x00000300 |
#define | PWM_2_CTL_GENAUPD_M 0x000000C0 |
#define | PWM_2_CTL_GENAUPD_I 0x00000000 |
#define | PWM_2_CTL_GENAUPD_LS 0x00000080 |
#define | PWM_2_CTL_GENAUPD_GS 0x000000C0 |
#define | PWM_2_CTL_CMPBUPD 0x00000020 |
#define | PWM_2_CTL_CMPAUPD 0x00000010 |
#define | PWM_2_CTL_LOADUPD 0x00000008 |
#define | PWM_2_CTL_DEBUG 0x00000004 |
#define | PWM_2_CTL_MODE 0x00000002 |
#define | PWM_2_CTL_ENABLE 0x00000001 |
#define | PWM_2_INTEN_TRCMPBD 0x00002000 |
#define | PWM_2_INTEN_TRCMPBU 0x00001000 |
#define | PWM_2_INTEN_TRCMPAD 0x00000800 |
#define | PWM_2_INTEN_TRCMPAU 0x00000400 |
#define | PWM_2_INTEN_TRCNTLOAD 0x00000200 |
#define | PWM_2_INTEN_TRCNTZERO 0x00000100 |
#define | PWM_2_INTEN_INTCMPBD 0x00000020 |
#define | PWM_2_INTEN_INTCMPBU 0x00000010 |
#define | PWM_2_INTEN_INTCMPAD 0x00000008 |
#define | PWM_2_INTEN_INTCMPAU 0x00000004 |
#define | PWM_2_INTEN_INTCNTLOAD 0x00000002 |
#define | PWM_2_INTEN_INTCNTZERO 0x00000001 |
#define | PWM_2_RIS_INTCMPBD 0x00000020 |
#define | PWM_2_RIS_INTCMPBU 0x00000010 |
#define | PWM_2_RIS_INTCMPAD 0x00000008 |
#define | PWM_2_RIS_INTCMPAU 0x00000004 |
#define | PWM_2_RIS_INTCNTLOAD 0x00000002 |
#define | PWM_2_RIS_INTCNTZERO 0x00000001 |
#define | PWM_2_ISC_INTCMPBD 0x00000020 |
#define | PWM_2_ISC_INTCMPBU 0x00000010 |
#define | PWM_2_ISC_INTCMPAD 0x00000008 |
#define | PWM_2_ISC_INTCMPAU 0x00000004 |
#define | PWM_2_ISC_INTCNTLOAD 0x00000002 |
#define | PWM_2_ISC_INTCNTZERO 0x00000001 |
#define | PWM_2_LOAD_LOAD_M 0x0000FFFF |
#define | PWM_2_LOAD_LOAD_S 0 |
#define | PWM_2_COUNT_COUNT_M 0x0000FFFF |
#define | PWM_2_COUNT_COUNT_S 0 |
#define | PWM_2_CMPA_COMPA_M 0x0000FFFF |
#define | PWM_2_CMPA_COMPA_S 0 |
#define | PWM_2_CMPB_COMPB_M 0x0000FFFF |
#define | PWM_2_CMPB_COMPB_S 0 |
#define | PWM_2_GENA_ACTCMPBD_M 0x00000C00 |
#define | PWM_2_GENA_ACTCMPBD_NONE 0x00000000 |
#define | PWM_2_GENA_ACTCMPBD_INV 0x00000400 |
#define | PWM_2_GENA_ACTCMPBD_ZERO 0x00000800 |
#define | PWM_2_GENA_ACTCMPBD_ONE 0x00000C00 |
#define | PWM_2_GENA_ACTCMPBU_M 0x00000300 |
#define | PWM_2_GENA_ACTCMPBU_NONE 0x00000000 |
#define | PWM_2_GENA_ACTCMPBU_INV 0x00000100 |
#define | PWM_2_GENA_ACTCMPBU_ZERO 0x00000200 |
#define | PWM_2_GENA_ACTCMPBU_ONE 0x00000300 |
#define | PWM_2_GENA_ACTCMPAD_M 0x000000C0 |
#define | PWM_2_GENA_ACTCMPAD_NONE 0x00000000 |
#define | PWM_2_GENA_ACTCMPAD_INV 0x00000040 |
#define | PWM_2_GENA_ACTCMPAD_ZERO 0x00000080 |
#define | PWM_2_GENA_ACTCMPAD_ONE 0x000000C0 |
#define | PWM_2_GENA_ACTCMPAU_M 0x00000030 |
#define | PWM_2_GENA_ACTCMPAU_NONE 0x00000000 |
#define | PWM_2_GENA_ACTCMPAU_INV 0x00000010 |
#define | PWM_2_GENA_ACTCMPAU_ZERO 0x00000020 |
#define | PWM_2_GENA_ACTCMPAU_ONE 0x00000030 |
#define | PWM_2_GENA_ACTLOAD_M 0x0000000C |
#define | PWM_2_GENA_ACTLOAD_NONE 0x00000000 |
#define | PWM_2_GENA_ACTLOAD_INV 0x00000004 |
#define | PWM_2_GENA_ACTLOAD_ZERO 0x00000008 |
#define | PWM_2_GENA_ACTLOAD_ONE 0x0000000C |
#define | PWM_2_GENA_ACTZERO_M 0x00000003 |
#define | PWM_2_GENA_ACTZERO_NONE 0x00000000 |
#define | PWM_2_GENA_ACTZERO_INV 0x00000001 |
#define | PWM_2_GENA_ACTZERO_ZERO 0x00000002 |
#define | PWM_2_GENA_ACTZERO_ONE 0x00000003 |
#define | PWM_2_GENB_ACTCMPBD_M 0x00000C00 |
#define | PWM_2_GENB_ACTCMPBD_NONE 0x00000000 |
#define | PWM_2_GENB_ACTCMPBD_INV 0x00000400 |
#define | PWM_2_GENB_ACTCMPBD_ZERO 0x00000800 |
#define | PWM_2_GENB_ACTCMPBD_ONE 0x00000C00 |
#define | PWM_2_GENB_ACTCMPBU_M 0x00000300 |
#define | PWM_2_GENB_ACTCMPBU_NONE 0x00000000 |
#define | PWM_2_GENB_ACTCMPBU_INV 0x00000100 |
#define | PWM_2_GENB_ACTCMPBU_ZERO 0x00000200 |
#define | PWM_2_GENB_ACTCMPBU_ONE 0x00000300 |
#define | PWM_2_GENB_ACTCMPAD_M 0x000000C0 |
#define | PWM_2_GENB_ACTCMPAD_NONE 0x00000000 |
#define | PWM_2_GENB_ACTCMPAD_INV 0x00000040 |
#define | PWM_2_GENB_ACTCMPAD_ZERO 0x00000080 |
#define | PWM_2_GENB_ACTCMPAD_ONE 0x000000C0 |
#define | PWM_2_GENB_ACTCMPAU_M 0x00000030 |
#define | PWM_2_GENB_ACTCMPAU_NONE 0x00000000 |
#define | PWM_2_GENB_ACTCMPAU_INV 0x00000010 |
#define | PWM_2_GENB_ACTCMPAU_ZERO 0x00000020 |
#define | PWM_2_GENB_ACTCMPAU_ONE 0x00000030 |
#define | PWM_2_GENB_ACTLOAD_M 0x0000000C |
#define | PWM_2_GENB_ACTLOAD_NONE 0x00000000 |
#define | PWM_2_GENB_ACTLOAD_INV 0x00000004 |
#define | PWM_2_GENB_ACTLOAD_ZERO 0x00000008 |
#define | PWM_2_GENB_ACTLOAD_ONE 0x0000000C |
#define | PWM_2_GENB_ACTZERO_M 0x00000003 |
#define | PWM_2_GENB_ACTZERO_NONE 0x00000000 |
#define | PWM_2_GENB_ACTZERO_INV 0x00000001 |
#define | PWM_2_GENB_ACTZERO_ZERO 0x00000002 |
#define | PWM_2_GENB_ACTZERO_ONE 0x00000003 |
#define | PWM_2_DBCTL_ENABLE 0x00000001 |
#define | PWM_2_DBRISE_RISEDELAY_M 0x00000FFF |
#define | PWM_2_DBRISE_RISEDELAY_S 0 |
#define | PWM_2_DBFALL_FALLDELAY_M 0x00000FFF |
#define | PWM_2_DBFALL_FALLDELAY_S 0 |
#define | PWM_2_FLTSRC0_FAULT3 0x00000008 |
#define | PWM_2_FLTSRC0_FAULT2 0x00000004 |
#define | PWM_2_FLTSRC0_FAULT1 0x00000002 |
#define | PWM_2_FLTSRC0_FAULT0 0x00000001 |
#define | PWM_2_FLTSRC1_DCMP7 0x00000080 |
#define | PWM_2_FLTSRC1_DCMP6 0x00000040 |
#define | PWM_2_FLTSRC1_DCMP5 0x00000020 |
#define | PWM_2_FLTSRC1_DCMP4 0x00000010 |
#define | PWM_2_FLTSRC1_DCMP3 0x00000008 |
#define | PWM_2_FLTSRC1_DCMP2 0x00000004 |
#define | PWM_2_FLTSRC1_DCMP1 0x00000002 |
#define | PWM_2_FLTSRC1_DCMP0 0x00000001 |
#define | PWM_2_MINFLTPER_MFP_M 0x0000FFFF |
#define | PWM_2_MINFLTPER_MFP_S 0 |
#define | PWM_3_CTL_LATCH 0x00040000 |
#define | PWM_3_CTL_MINFLTPER 0x00020000 |
#define | PWM_3_CTL_FLTSRC 0x00010000 |
#define | PWM_3_CTL_DBFALLUPD_M 0x0000C000 |
#define | PWM_3_CTL_DBFALLUPD_I 0x00000000 |
#define | PWM_3_CTL_DBFALLUPD_LS 0x00008000 |
#define | PWM_3_CTL_DBFALLUPD_GS 0x0000C000 |
#define | PWM_3_CTL_DBRISEUPD_M 0x00003000 |
#define | PWM_3_CTL_DBRISEUPD_I 0x00000000 |
#define | PWM_3_CTL_DBRISEUPD_LS 0x00002000 |
#define | PWM_3_CTL_DBRISEUPD_GS 0x00003000 |
#define | PWM_3_CTL_DBCTLUPD_M 0x00000C00 |
#define | PWM_3_CTL_DBCTLUPD_I 0x00000000 |
#define | PWM_3_CTL_DBCTLUPD_LS 0x00000800 |
#define | PWM_3_CTL_DBCTLUPD_GS 0x00000C00 |
#define | PWM_3_CTL_GENBUPD_M 0x00000300 |
#define | PWM_3_CTL_GENBUPD_I 0x00000000 |
#define | PWM_3_CTL_GENBUPD_LS 0x00000200 |
#define | PWM_3_CTL_GENBUPD_GS 0x00000300 |
#define | PWM_3_CTL_GENAUPD_M 0x000000C0 |
#define | PWM_3_CTL_GENAUPD_I 0x00000000 |
#define | PWM_3_CTL_GENAUPD_LS 0x00000080 |
#define | PWM_3_CTL_GENAUPD_GS 0x000000C0 |
#define | PWM_3_CTL_CMPBUPD 0x00000020 |
#define | PWM_3_CTL_CMPAUPD 0x00000010 |
#define | PWM_3_CTL_LOADUPD 0x00000008 |
#define | PWM_3_CTL_DEBUG 0x00000004 |
#define | PWM_3_CTL_MODE 0x00000002 |
#define | PWM_3_CTL_ENABLE 0x00000001 |
#define | PWM_3_INTEN_TRCMPBD 0x00002000 |
#define | PWM_3_INTEN_TRCMPBU 0x00001000 |
#define | PWM_3_INTEN_TRCMPAD 0x00000800 |
#define | PWM_3_INTEN_TRCMPAU 0x00000400 |
#define | PWM_3_INTEN_TRCNTLOAD 0x00000200 |
#define | PWM_3_INTEN_TRCNTZERO 0x00000100 |
#define | PWM_3_INTEN_INTCMPBD 0x00000020 |
#define | PWM_3_INTEN_INTCMPBU 0x00000010 |
#define | PWM_3_INTEN_INTCMPAD 0x00000008 |
#define | PWM_3_INTEN_INTCMPAU 0x00000004 |
#define | PWM_3_INTEN_INTCNTLOAD 0x00000002 |
#define | PWM_3_INTEN_INTCNTZERO 0x00000001 |
#define | PWM_3_RIS_INTCMPBD 0x00000020 |
#define | PWM_3_RIS_INTCMPBU 0x00000010 |
#define | PWM_3_RIS_INTCMPAD 0x00000008 |
#define | PWM_3_RIS_INTCMPAU 0x00000004 |
#define | PWM_3_RIS_INTCNTLOAD 0x00000002 |
#define | PWM_3_RIS_INTCNTZERO 0x00000001 |
#define | PWM_3_ISC_INTCMPBD 0x00000020 |
#define | PWM_3_ISC_INTCMPBU 0x00000010 |
#define | PWM_3_ISC_INTCMPAD 0x00000008 |
#define | PWM_3_ISC_INTCMPAU 0x00000004 |
#define | PWM_3_ISC_INTCNTLOAD 0x00000002 |
#define | PWM_3_ISC_INTCNTZERO 0x00000001 |
#define | PWM_3_LOAD_LOAD_M 0x0000FFFF |
#define | PWM_3_LOAD_LOAD_S 0 |
#define | PWM_3_COUNT_COUNT_M 0x0000FFFF |
#define | PWM_3_COUNT_COUNT_S 0 |
#define | PWM_3_CMPA_COMPA_M 0x0000FFFF |
#define | PWM_3_CMPA_COMPA_S 0 |
#define | PWM_3_CMPB_COMPB_M 0x0000FFFF |
#define | PWM_3_CMPB_COMPB_S 0 |
#define | PWM_3_GENA_ACTCMPBD_M 0x00000C00 |
#define | PWM_3_GENA_ACTCMPBD_NONE 0x00000000 |
#define | PWM_3_GENA_ACTCMPBD_INV 0x00000400 |
#define | PWM_3_GENA_ACTCMPBD_ZERO 0x00000800 |
#define | PWM_3_GENA_ACTCMPBD_ONE 0x00000C00 |
#define | PWM_3_GENA_ACTCMPBU_M 0x00000300 |
#define | PWM_3_GENA_ACTCMPBU_NONE 0x00000000 |
#define | PWM_3_GENA_ACTCMPBU_INV 0x00000100 |
#define | PWM_3_GENA_ACTCMPBU_ZERO 0x00000200 |
#define | PWM_3_GENA_ACTCMPBU_ONE 0x00000300 |
#define | PWM_3_GENA_ACTCMPAD_M 0x000000C0 |
#define | PWM_3_GENA_ACTCMPAD_NONE 0x00000000 |
#define | PWM_3_GENA_ACTCMPAD_INV 0x00000040 |
#define | PWM_3_GENA_ACTCMPAD_ZERO 0x00000080 |
#define | PWM_3_GENA_ACTCMPAD_ONE 0x000000C0 |
#define | PWM_3_GENA_ACTCMPAU_M 0x00000030 |
#define | PWM_3_GENA_ACTCMPAU_NONE 0x00000000 |
#define | PWM_3_GENA_ACTCMPAU_INV 0x00000010 |
#define | PWM_3_GENA_ACTCMPAU_ZERO 0x00000020 |
#define | PWM_3_GENA_ACTCMPAU_ONE 0x00000030 |
#define | PWM_3_GENA_ACTLOAD_M 0x0000000C |
#define | PWM_3_GENA_ACTLOAD_NONE 0x00000000 |
#define | PWM_3_GENA_ACTLOAD_INV 0x00000004 |
#define | PWM_3_GENA_ACTLOAD_ZERO 0x00000008 |
#define | PWM_3_GENA_ACTLOAD_ONE 0x0000000C |
#define | PWM_3_GENA_ACTZERO_M 0x00000003 |
#define | PWM_3_GENA_ACTZERO_NONE 0x00000000 |
#define | PWM_3_GENA_ACTZERO_INV 0x00000001 |
#define | PWM_3_GENA_ACTZERO_ZERO 0x00000002 |
#define | PWM_3_GENA_ACTZERO_ONE 0x00000003 |
#define | PWM_3_GENB_ACTCMPBD_M 0x00000C00 |
#define | PWM_3_GENB_ACTCMPBD_NONE 0x00000000 |
#define | PWM_3_GENB_ACTCMPBD_INV 0x00000400 |
#define | PWM_3_GENB_ACTCMPBD_ZERO 0x00000800 |
#define | PWM_3_GENB_ACTCMPBD_ONE 0x00000C00 |
#define | PWM_3_GENB_ACTCMPBU_M 0x00000300 |
#define | PWM_3_GENB_ACTCMPBU_NONE 0x00000000 |
#define | PWM_3_GENB_ACTCMPBU_INV 0x00000100 |
#define | PWM_3_GENB_ACTCMPBU_ZERO 0x00000200 |
#define | PWM_3_GENB_ACTCMPBU_ONE 0x00000300 |
#define | PWM_3_GENB_ACTCMPAD_M 0x000000C0 |
#define | PWM_3_GENB_ACTCMPAD_NONE 0x00000000 |
#define | PWM_3_GENB_ACTCMPAD_INV 0x00000040 |
#define | PWM_3_GENB_ACTCMPAD_ZERO 0x00000080 |
#define | PWM_3_GENB_ACTCMPAD_ONE 0x000000C0 |
#define | PWM_3_GENB_ACTCMPAU_M 0x00000030 |
#define | PWM_3_GENB_ACTCMPAU_NONE 0x00000000 |
#define | PWM_3_GENB_ACTCMPAU_INV 0x00000010 |
#define | PWM_3_GENB_ACTCMPAU_ZERO 0x00000020 |
#define | PWM_3_GENB_ACTCMPAU_ONE 0x00000030 |
#define | PWM_3_GENB_ACTLOAD_M 0x0000000C |
#define | PWM_3_GENB_ACTLOAD_NONE 0x00000000 |
#define | PWM_3_GENB_ACTLOAD_INV 0x00000004 |
#define | PWM_3_GENB_ACTLOAD_ZERO 0x00000008 |
#define | PWM_3_GENB_ACTLOAD_ONE 0x0000000C |
#define | PWM_3_GENB_ACTZERO_M 0x00000003 |
#define | PWM_3_GENB_ACTZERO_NONE 0x00000000 |
#define | PWM_3_GENB_ACTZERO_INV 0x00000001 |
#define | PWM_3_GENB_ACTZERO_ZERO 0x00000002 |
#define | PWM_3_GENB_ACTZERO_ONE 0x00000003 |
#define | PWM_3_DBCTL_ENABLE 0x00000001 |
#define | PWM_3_DBRISE_RISEDELAY_M 0x00000FFF |
#define | PWM_3_DBRISE_RISEDELAY_S 0 |
#define | PWM_3_DBFALL_FALLDELAY_M 0x00000FFF |
#define | PWM_3_DBFALL_FALLDELAY_S 0 |
#define | PWM_3_FLTSRC0_FAULT3 0x00000008 |
#define | PWM_3_FLTSRC0_FAULT2 0x00000004 |
#define | PWM_3_FLTSRC0_FAULT1 0x00000002 |
#define | PWM_3_FLTSRC0_FAULT0 0x00000001 |
#define | PWM_3_FLTSRC1_DCMP7 0x00000080 |
#define | PWM_3_FLTSRC1_DCMP6 0x00000040 |
#define | PWM_3_FLTSRC1_DCMP5 0x00000020 |
#define | PWM_3_FLTSRC1_DCMP4 0x00000010 |
#define | PWM_3_FLTSRC1_DCMP3 0x00000008 |
#define | PWM_3_FLTSRC1_DCMP2 0x00000004 |
#define | PWM_3_FLTSRC1_DCMP1 0x00000002 |
#define | PWM_3_FLTSRC1_DCMP0 0x00000001 |
#define | PWM_3_MINFLTPER_MFP_M 0x0000FFFF |
#define | PWM_3_MINFLTPER_MFP_S 0 |
#define | PWM_0_FLTSEN_FAULT3 0x00000008 |
#define | PWM_0_FLTSEN_FAULT2 0x00000004 |
#define | PWM_0_FLTSEN_FAULT1 0x00000002 |
#define | PWM_0_FLTSEN_FAULT0 0x00000001 |
#define | PWM_0_FLTSTAT0_FAULT3 0x00000008 |
#define | PWM_0_FLTSTAT0_FAULT2 0x00000004 |
#define | PWM_0_FLTSTAT0_FAULT1 0x00000002 |
#define | PWM_0_FLTSTAT0_FAULT0 0x00000001 |
#define | PWM_0_FLTSTAT1_DCMP7 0x00000080 |
#define | PWM_0_FLTSTAT1_DCMP6 0x00000040 |
#define | PWM_0_FLTSTAT1_DCMP5 0x00000020 |
#define | PWM_0_FLTSTAT1_DCMP4 0x00000010 |
#define | PWM_0_FLTSTAT1_DCMP3 0x00000008 |
#define | PWM_0_FLTSTAT1_DCMP2 0x00000004 |
#define | PWM_0_FLTSTAT1_DCMP1 0x00000002 |
#define | PWM_0_FLTSTAT1_DCMP0 0x00000001 |
#define | PWM_1_FLTSEN_FAULT3 0x00000008 |
#define | PWM_1_FLTSEN_FAULT2 0x00000004 |
#define | PWM_1_FLTSEN_FAULT1 0x00000002 |
#define | PWM_1_FLTSEN_FAULT0 0x00000001 |
#define | PWM_1_FLTSTAT0_FAULT3 0x00000008 |
#define | PWM_1_FLTSTAT0_FAULT2 0x00000004 |
#define | PWM_1_FLTSTAT0_FAULT1 0x00000002 |
#define | PWM_1_FLTSTAT0_FAULT0 0x00000001 |
#define | PWM_1_FLTSTAT1_DCMP7 0x00000080 |
#define | PWM_1_FLTSTAT1_DCMP6 0x00000040 |
#define | PWM_1_FLTSTAT1_DCMP5 0x00000020 |
#define | PWM_1_FLTSTAT1_DCMP4 0x00000010 |
#define | PWM_1_FLTSTAT1_DCMP3 0x00000008 |
#define | PWM_1_FLTSTAT1_DCMP2 0x00000004 |
#define | PWM_1_FLTSTAT1_DCMP1 0x00000002 |
#define | PWM_1_FLTSTAT1_DCMP0 0x00000001 |
#define | PWM_2_FLTSEN_FAULT3 0x00000008 |
#define | PWM_2_FLTSEN_FAULT2 0x00000004 |
#define | PWM_2_FLTSEN_FAULT1 0x00000002 |
#define | PWM_2_FLTSEN_FAULT0 0x00000001 |
#define | PWM_2_FLTSTAT0_FAULT3 0x00000008 |
#define | PWM_2_FLTSTAT0_FAULT2 0x00000004 |
#define | PWM_2_FLTSTAT0_FAULT1 0x00000002 |
#define | PWM_2_FLTSTAT0_FAULT0 0x00000001 |
#define | PWM_2_FLTSTAT1_DCMP7 0x00000080 |
#define | PWM_2_FLTSTAT1_DCMP6 0x00000040 |
#define | PWM_2_FLTSTAT1_DCMP5 0x00000020 |
#define | PWM_2_FLTSTAT1_DCMP4 0x00000010 |
#define | PWM_2_FLTSTAT1_DCMP3 0x00000008 |
#define | PWM_2_FLTSTAT1_DCMP2 0x00000004 |
#define | PWM_2_FLTSTAT1_DCMP1 0x00000002 |
#define | PWM_2_FLTSTAT1_DCMP0 0x00000001 |
#define | PWM_3_FLTSEN_FAULT3 0x00000008 |
#define | PWM_3_FLTSEN_FAULT2 0x00000004 |
#define | PWM_3_FLTSEN_FAULT1 0x00000002 |
#define | PWM_3_FLTSEN_FAULT0 0x00000001 |
#define | PWM_3_FLTSTAT0_FAULT3 0x00000008 |
#define | PWM_3_FLTSTAT0_FAULT2 0x00000004 |
#define | PWM_3_FLTSTAT0_FAULT1 0x00000002 |
#define | PWM_3_FLTSTAT0_FAULT0 0x00000001 |
#define | PWM_3_FLTSTAT1_DCMP7 0x00000080 |
#define | PWM_3_FLTSTAT1_DCMP6 0x00000040 |
#define | PWM_3_FLTSTAT1_DCMP5 0x00000020 |
#define | PWM_3_FLTSTAT1_DCMP4 0x00000010 |
#define | PWM_3_FLTSTAT1_DCMP3 0x00000008 |
#define | PWM_3_FLTSTAT1_DCMP2 0x00000004 |
#define | PWM_3_FLTSTAT1_DCMP1 0x00000002 |
#define | PWM_3_FLTSTAT1_DCMP0 0x00000001 |
#define | PWM_PP_ONE 0x00000400 |
#define | PWM_PP_EFAULT 0x00000200 |
#define | PWM_PP_ESYNC 0x00000100 |
#define | PWM_PP_FCNT_M 0x000000F0 |
#define | PWM_PP_GCNT_M 0x0000000F |
#define | PWM_PP_FCNT_S 4 |
#define | PWM_PP_GCNT_S 0 |
#define | QEI_CTL_FILTCNT_M 0x000F0000 |
#define | QEI_CTL_FILTEN 0x00002000 |
#define | QEI_CTL_STALLEN 0x00001000 |
#define | QEI_CTL_INVI 0x00000800 |
#define | QEI_CTL_INVB 0x00000400 |
#define | QEI_CTL_INVA 0x00000200 |
#define | QEI_CTL_VELDIV_M 0x000001C0 |
#define | QEI_CTL_VELDIV_1 0x00000000 |
#define | QEI_CTL_VELDIV_2 0x00000040 |
#define | QEI_CTL_VELDIV_4 0x00000080 |
#define | QEI_CTL_VELDIV_8 0x000000C0 |
#define | QEI_CTL_VELDIV_16 0x00000100 |
#define | QEI_CTL_VELDIV_32 0x00000140 |
#define | QEI_CTL_VELDIV_64 0x00000180 |
#define | QEI_CTL_VELDIV_128 0x000001C0 |
#define | QEI_CTL_VELEN 0x00000020 |
#define | QEI_CTL_RESMODE 0x00000010 |
#define | QEI_CTL_CAPMODE 0x00000008 |
#define | QEI_CTL_SIGMODE 0x00000004 |
#define | QEI_CTL_SWAP 0x00000002 |
#define | QEI_CTL_ENABLE 0x00000001 |
#define | QEI_CTL_FILTCNT_S 16 |
#define | QEI_STAT_DIRECTION 0x00000002 |
#define | QEI_STAT_ERROR 0x00000001 |
#define | QEI_POS_M 0xFFFFFFFF |
#define | QEI_POS_S 0 |
#define | QEI_MAXPOS_M 0xFFFFFFFF |
#define | QEI_MAXPOS_S 0 |
#define | QEI_LOAD_M 0xFFFFFFFF |
#define | QEI_LOAD_S 0 |
#define | QEI_TIME_M 0xFFFFFFFF |
#define | QEI_TIME_S 0 |
#define | QEI_COUNT_M 0xFFFFFFFF |
#define | QEI_COUNT_S 0 |
#define | QEI_SPEED_M 0xFFFFFFFF |
#define | QEI_SPEED_S 0 |
#define | QEI_INTEN_ERROR 0x00000008 |
#define | QEI_INTEN_DIR 0x00000004 |
#define | QEI_INTEN_TIMER 0x00000002 |
#define | QEI_INTEN_INDEX 0x00000001 |
#define | QEI_RIS_ERROR 0x00000008 |
#define | QEI_RIS_DIR 0x00000004 |
#define | QEI_RIS_TIMER 0x00000002 |
#define | QEI_RIS_INDEX 0x00000001 |
#define | QEI_ISC_ERROR 0x00000008 |
#define | QEI_ISC_DIR 0x00000004 |
#define | QEI_ISC_TIMER 0x00000002 |
#define | QEI_ISC_INDEX 0x00000001 |
#define | TIMER_CFG_M 0x00000007 |
#define | TIMER_CFG_32_BIT_TIMER 0x00000000 |
#define | TIMER_CFG_32_BIT_RTC 0x00000001 |
#define | TIMER_CFG_16_BIT 0x00000004 |
#define | TIMER_TAMR_TAPLO 0x00000800 |
#define | TIMER_TAMR_TAMRSU 0x00000400 |
#define | TIMER_TAMR_TAPWMIE 0x00000200 |
#define | TIMER_TAMR_TAILD 0x00000100 |
#define | TIMER_TAMR_TASNAPS 0x00000080 |
#define | TIMER_TAMR_TAWOT 0x00000040 |
#define | TIMER_TAMR_TAMIE 0x00000020 |
#define | TIMER_TAMR_TACDIR 0x00000010 |
#define | TIMER_TAMR_TAAMS 0x00000008 |
#define | TIMER_TAMR_TACMR 0x00000004 |
#define | TIMER_TAMR_TAMR_M 0x00000003 |
#define | TIMER_TAMR_TAMR_1_SHOT 0x00000001 |
#define | TIMER_TAMR_TAMR_PERIOD 0x00000002 |
#define | TIMER_TAMR_TAMR_CAP 0x00000003 |
#define | TIMER_TBMR_TBPLO 0x00000800 |
#define | TIMER_TBMR_TBMRSU 0x00000400 |
#define | TIMER_TBMR_TBPWMIE 0x00000200 |
#define | TIMER_TBMR_TBILD 0x00000100 |
#define | TIMER_TBMR_TBSNAPS 0x00000080 |
#define | TIMER_TBMR_TBWOT 0x00000040 |
#define | TIMER_TBMR_TBMIE 0x00000020 |
#define | TIMER_TBMR_TBCDIR 0x00000010 |
#define | TIMER_TBMR_TBAMS 0x00000008 |
#define | TIMER_TBMR_TBCMR 0x00000004 |
#define | TIMER_TBMR_TBMR_M 0x00000003 |
#define | TIMER_TBMR_TBMR_1_SHOT 0x00000001 |
#define | TIMER_TBMR_TBMR_PERIOD 0x00000002 |
#define | TIMER_TBMR_TBMR_CAP 0x00000003 |
#define | TIMER_CTL_TBPWML 0x00004000 |
#define | TIMER_CTL_TBOTE 0x00002000 |
#define | TIMER_CTL_TBEVENT_M 0x00000C00 |
#define | TIMER_CTL_TBEVENT_POS 0x00000000 |
#define | TIMER_CTL_TBEVENT_NEG 0x00000400 |
#define | TIMER_CTL_TBEVENT_BOTH 0x00000C00 |
#define | TIMER_CTL_TBSTALL 0x00000200 |
#define | TIMER_CTL_TBEN 0x00000100 |
#define | TIMER_CTL_TAPWML 0x00000040 |
#define | TIMER_CTL_TAOTE 0x00000020 |
#define | TIMER_CTL_RTCEN 0x00000010 |
#define | TIMER_CTL_TAEVENT_M 0x0000000C |
#define | TIMER_CTL_TAEVENT_POS 0x00000000 |
#define | TIMER_CTL_TAEVENT_NEG 0x00000004 |
#define | TIMER_CTL_TAEVENT_BOTH 0x0000000C |
#define | TIMER_CTL_TASTALL 0x00000002 |
#define | TIMER_CTL_TAEN 0x00000001 |
#define | TIMER_SYNC_SYNCWT5_M 0x00C00000 |
#define | TIMER_SYNC_SYNCWT5_NONE 0x00000000 |
#define | TIMER_SYNC_SYNCWT5_TA 0x00400000 |
#define | TIMER_SYNC_SYNCWT5_TB 0x00800000 |
#define | TIMER_SYNC_SYNCWT5_TATB 0x00C00000 |
#define | TIMER_SYNC_SYNCWT4_M 0x00300000 |
#define | TIMER_SYNC_SYNCWT4_NONE 0x00000000 |
#define | TIMER_SYNC_SYNCWT4_TA 0x00100000 |
#define | TIMER_SYNC_SYNCWT4_TB 0x00200000 |
#define | TIMER_SYNC_SYNCWT4_TATB 0x00300000 |
#define | TIMER_SYNC_SYNCWT3_M 0x000C0000 |
#define | TIMER_SYNC_SYNCWT3_NONE 0x00000000 |
#define | TIMER_SYNC_SYNCWT3_TA 0x00040000 |
#define | TIMER_SYNC_SYNCWT3_TB 0x00080000 |
#define | TIMER_SYNC_SYNCWT3_TATB 0x000C0000 |
#define | TIMER_SYNC_SYNCWT2_M 0x00030000 |
#define | TIMER_SYNC_SYNCWT2_NONE 0x00000000 |
#define | TIMER_SYNC_SYNCWT2_TA 0x00010000 |
#define | TIMER_SYNC_SYNCWT2_TB 0x00020000 |
#define | TIMER_SYNC_SYNCWT2_TATB 0x00030000 |
#define | TIMER_SYNC_SYNCWT1_M 0x0000C000 |
#define | TIMER_SYNC_SYNCWT1_NONE 0x00000000 |
#define | TIMER_SYNC_SYNCWT1_TA 0x00004000 |
#define | TIMER_SYNC_SYNCWT1_TB 0x00008000 |
#define | TIMER_SYNC_SYNCWT1_TATB 0x0000C000 |
#define | TIMER_SYNC_SYNCWT0_M 0x00003000 |
#define | TIMER_SYNC_SYNCWT0_NONE 0x00000000 |
#define | TIMER_SYNC_SYNCWT0_TA 0x00001000 |
#define | TIMER_SYNC_SYNCWT0_TB 0x00002000 |
#define | TIMER_SYNC_SYNCWT0_TATB 0x00003000 |
#define | TIMER_SYNC_SYNCT5_M 0x00000C00 |
#define | TIMER_SYNC_SYNCT5_NONE 0x00000000 |
#define | TIMER_SYNC_SYNCT5_TA 0x00000400 |
#define | TIMER_SYNC_SYNCT5_TB 0x00000800 |
#define | TIMER_SYNC_SYNCT5_TATB 0x00000C00 |
#define | TIMER_SYNC_SYNCT4_M 0x00000300 |
#define | TIMER_SYNC_SYNCT4_NONE 0x00000000 |
#define | TIMER_SYNC_SYNCT4_TA 0x00000100 |
#define | TIMER_SYNC_SYNCT4_TB 0x00000200 |
#define | TIMER_SYNC_SYNCT4_TATB 0x00000300 |
#define | TIMER_SYNC_SYNCT3_M 0x000000C0 |
#define | TIMER_SYNC_SYNCT3_NONE 0x00000000 |
#define | TIMER_SYNC_SYNCT3_TA 0x00000040 |
#define | TIMER_SYNC_SYNCT3_TB 0x00000080 |
#define | TIMER_SYNC_SYNCT3_TATB 0x000000C0 |
#define | TIMER_SYNC_SYNCT2_M 0x00000030 |
#define | TIMER_SYNC_SYNCT2_NONE 0x00000000 |
#define | TIMER_SYNC_SYNCT2_TA 0x00000010 |
#define | TIMER_SYNC_SYNCT2_TB 0x00000020 |
#define | TIMER_SYNC_SYNCT2_TATB 0x00000030 |
#define | TIMER_SYNC_SYNCT1_M 0x0000000C |
#define | TIMER_SYNC_SYNCT1_NONE 0x00000000 |
#define | TIMER_SYNC_SYNCT1_TA 0x00000004 |
#define | TIMER_SYNC_SYNCT1_TB 0x00000008 |
#define | TIMER_SYNC_SYNCT1_TATB 0x0000000C |
#define | TIMER_SYNC_SYNCT0_M 0x00000003 |
#define | TIMER_SYNC_SYNCT0_NONE 0x00000000 |
#define | TIMER_SYNC_SYNCT0_TA 0x00000001 |
#define | TIMER_SYNC_SYNCT0_TB 0x00000002 |
#define | TIMER_SYNC_SYNCT0_TATB 0x00000003 |
#define | TIMER_IMR_WUEIM 0x00010000 |
#define | TIMER_IMR_TBMIM 0x00000800 |
#define | TIMER_IMR_CBEIM 0x00000400 |
#define | TIMER_IMR_CBMIM 0x00000200 |
#define | TIMER_IMR_TBTOIM 0x00000100 |
#define | TIMER_IMR_TAMIM 0x00000010 |
#define | TIMER_IMR_RTCIM 0x00000008 |
#define | TIMER_IMR_CAEIM 0x00000004 |
#define | TIMER_IMR_CAMIM 0x00000002 |
#define | TIMER_IMR_TATOIM 0x00000001 |
#define | TIMER_RIS_WUERIS 0x00010000 |
#define | TIMER_RIS_TBMRIS 0x00000800 |
#define | TIMER_RIS_CBERIS 0x00000400 |
#define | TIMER_RIS_CBMRIS 0x00000200 |
#define | TIMER_RIS_TBTORIS 0x00000100 |
#define | TIMER_RIS_TAMRIS 0x00000010 |
#define | TIMER_RIS_RTCRIS 0x00000008 |
#define | TIMER_RIS_CAERIS 0x00000004 |
#define | TIMER_RIS_CAMRIS 0x00000002 |
#define | TIMER_RIS_TATORIS 0x00000001 |
#define | TIMER_MIS_WUEMIS 0x00010000 |
#define | TIMER_MIS_TBMMIS 0x00000800 |
#define | TIMER_MIS_CBEMIS 0x00000400 |
#define | TIMER_MIS_CBMMIS 0x00000200 |
#define | TIMER_MIS_TBTOMIS 0x00000100 |
#define | TIMER_MIS_TAMMIS 0x00000010 |
#define | TIMER_MIS_RTCMIS 0x00000008 |
#define | TIMER_MIS_CAEMIS 0x00000004 |
#define | TIMER_MIS_CAMMIS 0x00000002 |
#define | TIMER_MIS_TATOMIS 0x00000001 |
#define | TIMER_ICR_WUECINT 0x00010000 |
#define | TIMER_ICR_TBMCINT 0x00000800 |
#define | TIMER_ICR_CBECINT 0x00000400 |
#define | TIMER_ICR_CBMCINT 0x00000200 |
#define | TIMER_ICR_TBTOCINT 0x00000100 |
#define | TIMER_ICR_TAMCINT 0x00000010 |
#define | TIMER_ICR_RTCCINT 0x00000008 |
#define | TIMER_ICR_CAECINT 0x00000004 |
#define | TIMER_ICR_CAMCINT 0x00000002 |
#define | TIMER_ICR_TATOCINT 0x00000001 |
#define | TIMER_TAILR_M 0xFFFFFFFF |
#define | TIMER_TAILR_S 0 |
#define | TIMER_TBILR_M 0xFFFFFFFF |
#define | TIMER_TBILR_S 0 |
#define | TIMER_TAMATCHR_TAMR_M 0xFFFFFFFF |
#define | TIMER_TAMATCHR_TAMR_S 0 |
#define | TIMER_TBMATCHR_TBMR_M 0xFFFFFFFF |
#define | TIMER_TBMATCHR_TBMR_S 0 |
#define | TIMER_TAPR_TAPSRH_M 0x0000FF00 |
#define | TIMER_TAPR_TAPSR_M 0x000000FF |
#define | TIMER_TAPR_TAPSRH_S 8 |
#define | TIMER_TAPR_TAPSR_S 0 |
#define | TIMER_TBPR_TBPSRH_M 0x0000FF00 |
#define | TIMER_TBPR_TBPSR_M 0x000000FF |
#define | TIMER_TBPR_TBPSRH_S 8 |
#define | TIMER_TBPR_TBPSR_S 0 |
#define | TIMER_TAPMR_TAPSMRH_M 0x0000FF00 |
#define | TIMER_TAPMR_TAPSMR_M 0x000000FF |
#define | TIMER_TAPMR_TAPSMRH_S 8 |
#define | TIMER_TAPMR_TAPSMR_S 0 |
#define | TIMER_TBPMR_TBPSMRH_M 0x0000FF00 |
#define | TIMER_TBPMR_TBPSMR_M 0x000000FF |
#define | TIMER_TBPMR_TBPSMRH_S 8 |
#define | TIMER_TBPMR_TBPSMR_S 0 |
#define | TIMER_TAR_M 0xFFFFFFFF |
#define | TIMER_TAR_S 0 |
#define | TIMER_TBR_M 0xFFFFFFFF |
#define | TIMER_TBR_S 0 |
#define | TIMER_TAV_M 0xFFFFFFFF |
#define | TIMER_TAV_S 0 |
#define | TIMER_TBV_M 0xFFFFFFFF |
#define | TIMER_TBV_S 0 |
#define | TIMER_RTCPD_RTCPD_M 0x0000FFFF |
#define | TIMER_RTCPD_RTCPD_S 0 |
#define | TIMER_TAPS_PSS_M 0x0000FFFF |
#define | TIMER_TAPS_PSS_S 0 |
#define | TIMER_TBPS_PSS_M 0x0000FFFF |
#define | TIMER_TBPS_PSS_S 0 |
#define | TIMER_TAPV_PSV_M 0x0000FFFF |
#define | TIMER_TAPV_PSV_S 0 |
#define | TIMER_TBPV_PSV_M 0x0000FFFF |
#define | TIMER_TBPV_PSV_S 0 |
#define | TIMER_PP_SIZE_M 0x0000000F |
#define | TIMER_PP_SIZE_16 0x00000000 |
#define | TIMER_PP_SIZE_32 0x00000001 |
#define | ADC_ACTSS_BUSY 0x00010000 |
#define | ADC_ACTSS_ASEN3 0x00000008 |
#define | ADC_ACTSS_ASEN2 0x00000004 |
#define | ADC_ACTSS_ASEN1 0x00000002 |
#define | ADC_ACTSS_ASEN0 0x00000001 |
#define | ADC_RIS_INRDC 0x00010000 |
#define | ADC_RIS_INR3 0x00000008 |
#define | ADC_RIS_INR2 0x00000004 |
#define | ADC_RIS_INR1 0x00000002 |
#define | ADC_RIS_INR0 0x00000001 |
#define | ADC_IM_DCONSS3 0x00080000 |
#define | ADC_IM_DCONSS2 0x00040000 |
#define | ADC_IM_DCONSS1 0x00020000 |
#define | ADC_IM_DCONSS0 0x00010000 |
#define | ADC_IM_MASK3 0x00000008 |
#define | ADC_IM_MASK2 0x00000004 |
#define | ADC_IM_MASK1 0x00000002 |
#define | ADC_IM_MASK0 0x00000001 |
#define | ADC_ISC_DCINSS3 0x00080000 |
#define | ADC_ISC_DCINSS2 0x00040000 |
#define | ADC_ISC_DCINSS1 0x00020000 |
#define | ADC_ISC_DCINSS0 0x00010000 |
#define | ADC_ISC_IN3 0x00000008 |
#define | ADC_ISC_IN2 0x00000004 |
#define | ADC_ISC_IN1 0x00000002 |
#define | ADC_ISC_IN0 0x00000001 |
#define | ADC_OSTAT_OV3 0x00000008 |
#define | ADC_OSTAT_OV2 0x00000004 |
#define | ADC_OSTAT_OV1 0x00000002 |
#define | ADC_OSTAT_OV0 0x00000001 |
#define | ADC_EMUX_EM3_M 0x0000F000 |
#define | ADC_EMUX_EM3_PROCESSOR 0x00000000 |
#define | ADC_EMUX_EM3_COMP0 0x00001000 |
#define | ADC_EMUX_EM3_COMP1 0x00002000 |
#define | ADC_EMUX_EM3_EXTERNAL 0x00004000 |
#define | ADC_EMUX_EM3_TIMER 0x00005000 |
#define | ADC_EMUX_EM3_PWM0 0x00006000 |
#define | ADC_EMUX_EM3_PWM1 0x00007000 |
#define | ADC_EMUX_EM3_PWM2 0x00008000 |
#define | ADC_EMUX_EM3_PWM3 0x00009000 |
#define | ADC_EMUX_EM3_ALWAYS 0x0000F000 |
#define | ADC_EMUX_EM2_M 0x00000F00 |
#define | ADC_EMUX_EM2_PROCESSOR 0x00000000 |
#define | ADC_EMUX_EM2_COMP0 0x00000100 |
#define | ADC_EMUX_EM2_COMP1 0x00000200 |
#define | ADC_EMUX_EM2_EXTERNAL 0x00000400 |
#define | ADC_EMUX_EM2_TIMER 0x00000500 |
#define | ADC_EMUX_EM2_PWM0 0x00000600 |
#define | ADC_EMUX_EM2_PWM1 0x00000700 |
#define | ADC_EMUX_EM2_PWM2 0x00000800 |
#define | ADC_EMUX_EM2_PWM3 0x00000900 |
#define | ADC_EMUX_EM2_ALWAYS 0x00000F00 |
#define | ADC_EMUX_EM1_M 0x000000F0 |
#define | ADC_EMUX_EM1_PROCESSOR 0x00000000 |
#define | ADC_EMUX_EM1_COMP0 0x00000010 |
#define | ADC_EMUX_EM1_COMP1 0x00000020 |
#define | ADC_EMUX_EM1_EXTERNAL 0x00000040 |
#define | ADC_EMUX_EM1_TIMER 0x00000050 |
#define | ADC_EMUX_EM1_PWM0 0x00000060 |
#define | ADC_EMUX_EM1_PWM1 0x00000070 |
#define | ADC_EMUX_EM1_PWM2 0x00000080 |
#define | ADC_EMUX_EM1_PWM3 0x00000090 |
#define | ADC_EMUX_EM1_ALWAYS 0x000000F0 |
#define | ADC_EMUX_EM0_M 0x0000000F |
#define | ADC_EMUX_EM0_PROCESSOR 0x00000000 |
#define | ADC_EMUX_EM0_COMP0 0x00000001 |
#define | ADC_EMUX_EM0_COMP1 0x00000002 |
#define | ADC_EMUX_EM0_EXTERNAL 0x00000004 |
#define | ADC_EMUX_EM0_TIMER 0x00000005 |
#define | ADC_EMUX_EM0_PWM0 0x00000006 |
#define | ADC_EMUX_EM0_PWM1 0x00000007 |
#define | ADC_EMUX_EM0_PWM2 0x00000008 |
#define | ADC_EMUX_EM0_PWM3 0x00000009 |
#define | ADC_EMUX_EM0_ALWAYS 0x0000000F |
#define | ADC_USTAT_UV3 0x00000008 |
#define | ADC_USTAT_UV2 0x00000004 |
#define | ADC_USTAT_UV1 0x00000002 |
#define | ADC_USTAT_UV0 0x00000001 |
#define | ADC_TSSEL_PS3_M 0x30000000 |
#define | ADC_TSSEL_PS3_0 0x00000000 |
#define | ADC_TSSEL_PS3_1 0x10000000 |
#define | ADC_TSSEL_PS2_M 0x00300000 |
#define | ADC_TSSEL_PS2_0 0x00000000 |
#define | ADC_TSSEL_PS2_1 0x00100000 |
#define | ADC_TSSEL_PS1_M 0x00003000 |
#define | ADC_TSSEL_PS1_0 0x00000000 |
#define | ADC_TSSEL_PS1_1 0x00001000 |
#define | ADC_TSSEL_PS0_M 0x00000030 |
#define | ADC_TSSEL_PS0_0 0x00000000 |
#define | ADC_TSSEL_PS0_1 0x00000010 |
#define | ADC_SSPRI_SS3_M 0x00003000 |
#define | ADC_SSPRI_SS2_M 0x00000300 |
#define | ADC_SSPRI_SS1_M 0x00000030 |
#define | ADC_SSPRI_SS0_M 0x00000003 |
#define | ADC_SPC_PHASE_M 0x0000000F |
#define | ADC_SPC_PHASE_0 0x00000000 |
#define | ADC_SPC_PHASE_22_5 0x00000001 |
#define | ADC_SPC_PHASE_45 0x00000002 |
#define | ADC_SPC_PHASE_67_5 0x00000003 |
#define | ADC_SPC_PHASE_90 0x00000004 |
#define | ADC_SPC_PHASE_112_5 0x00000005 |
#define | ADC_SPC_PHASE_135 0x00000006 |
#define | ADC_SPC_PHASE_157_5 0x00000007 |
#define | ADC_SPC_PHASE_180 0x00000008 |
#define | ADC_SPC_PHASE_202_5 0x00000009 |
#define | ADC_SPC_PHASE_225 0x0000000A |
#define | ADC_SPC_PHASE_247_5 0x0000000B |
#define | ADC_SPC_PHASE_270 0x0000000C |
#define | ADC_SPC_PHASE_292_5 0x0000000D |
#define | ADC_SPC_PHASE_315 0x0000000E |
#define | ADC_SPC_PHASE_337_5 0x0000000F |
#define | ADC_PSSI_GSYNC 0x80000000 |
#define | ADC_PSSI_SYNCWAIT 0x08000000 |
#define | ADC_PSSI_SS3 0x00000008 |
#define | ADC_PSSI_SS2 0x00000004 |
#define | ADC_PSSI_SS1 0x00000002 |
#define | ADC_PSSI_SS0 0x00000001 |
#define | ADC_SAC_AVG_M 0x00000007 |
#define | ADC_SAC_AVG_OFF 0x00000000 |
#define | ADC_SAC_AVG_2X 0x00000001 |
#define | ADC_SAC_AVG_4X 0x00000002 |
#define | ADC_SAC_AVG_8X 0x00000003 |
#define | ADC_SAC_AVG_16X 0x00000004 |
#define | ADC_SAC_AVG_32X 0x00000005 |
#define | ADC_SAC_AVG_64X 0x00000006 |
#define | ADC_DCISC_DCINT7 0x00000080 |
#define | ADC_DCISC_DCINT6 0x00000040 |
#define | ADC_DCISC_DCINT5 0x00000020 |
#define | ADC_DCISC_DCINT4 0x00000010 |
#define | ADC_DCISC_DCINT3 0x00000008 |
#define | ADC_DCISC_DCINT2 0x00000004 |
#define | ADC_DCISC_DCINT1 0x00000002 |
#define | ADC_DCISC_DCINT0 0x00000001 |
#define | ADC_CTL_DITHER 0x00000040 |
#define | ADC_CTL_VREF_M 0x00000001 |
#define | ADC_CTL_VREF_INTERNAL 0x00000000 |
#define | ADC_SSMUX0_MUX7_M 0xF0000000 |
#define | ADC_SSMUX0_MUX6_M 0x0F000000 |
#define | ADC_SSMUX0_MUX5_M 0x00F00000 |
#define | ADC_SSMUX0_MUX4_M 0x000F0000 |
#define | ADC_SSMUX0_MUX3_M 0x0000F000 |
#define | ADC_SSMUX0_MUX2_M 0x00000F00 |
#define | ADC_SSMUX0_MUX1_M 0x000000F0 |
#define | ADC_SSMUX0_MUX0_M 0x0000000F |
#define | ADC_SSMUX0_MUX7_S 28 |
#define | ADC_SSMUX0_MUX6_S 24 |
#define | ADC_SSMUX0_MUX5_S 20 |
#define | ADC_SSMUX0_MUX4_S 16 |
#define | ADC_SSMUX0_MUX3_S 12 |
#define | ADC_SSMUX0_MUX2_S 8 |
#define | ADC_SSMUX0_MUX1_S 4 |
#define | ADC_SSMUX0_MUX0_S 0 |
#define | ADC_SSCTL0_TS7 0x80000000 |
#define | ADC_SSCTL0_IE7 0x40000000 |
#define | ADC_SSCTL0_END7 0x20000000 |
#define | ADC_SSCTL0_D7 0x10000000 |
#define | ADC_SSCTL0_TS6 0x08000000 |
#define | ADC_SSCTL0_IE6 0x04000000 |
#define | ADC_SSCTL0_END6 0x02000000 |
#define | ADC_SSCTL0_D6 0x01000000 |
#define | ADC_SSCTL0_TS5 0x00800000 |
#define | ADC_SSCTL0_IE5 0x00400000 |
#define | ADC_SSCTL0_END5 0x00200000 |
#define | ADC_SSCTL0_D5 0x00100000 |
#define | ADC_SSCTL0_TS4 0x00080000 |
#define | ADC_SSCTL0_IE4 0x00040000 |
#define | ADC_SSCTL0_END4 0x00020000 |
#define | ADC_SSCTL0_D4 0x00010000 |
#define | ADC_SSCTL0_TS3 0x00008000 |
#define | ADC_SSCTL0_IE3 0x00004000 |
#define | ADC_SSCTL0_END3 0x00002000 |
#define | ADC_SSCTL0_D3 0x00001000 |
#define | ADC_SSCTL0_TS2 0x00000800 |
#define | ADC_SSCTL0_IE2 0x00000400 |
#define | ADC_SSCTL0_END2 0x00000200 |
#define | ADC_SSCTL0_D2 0x00000100 |
#define | ADC_SSCTL0_TS1 0x00000080 |
#define | ADC_SSCTL0_IE1 0x00000040 |
#define | ADC_SSCTL0_END1 0x00000020 |
#define | ADC_SSCTL0_D1 0x00000010 |
#define | ADC_SSCTL0_TS0 0x00000008 |
#define | ADC_SSCTL0_IE0 0x00000004 |
#define | ADC_SSCTL0_END0 0x00000002 |
#define | ADC_SSCTL0_D0 0x00000001 |
#define | ADC_SSFIFO0_DATA_M 0x00000FFF |
#define | ADC_SSFIFO0_DATA_S 0 |
#define | ADC_SSFSTAT0_FULL 0x00001000 |
#define | ADC_SSFSTAT0_EMPTY 0x00000100 |
#define | ADC_SSFSTAT0_HPTR_M 0x000000F0 |
#define | ADC_SSFSTAT0_TPTR_M 0x0000000F |
#define | ADC_SSFSTAT0_HPTR_S 4 |
#define | ADC_SSFSTAT0_TPTR_S 0 |
#define | ADC_SSOP0_S7DCOP 0x10000000 |
#define | ADC_SSOP0_S6DCOP 0x01000000 |
#define | ADC_SSOP0_S5DCOP 0x00100000 |
#define | ADC_SSOP0_S4DCOP 0x00010000 |
#define | ADC_SSOP0_S3DCOP 0x00001000 |
#define | ADC_SSOP0_S2DCOP 0x00000100 |
#define | ADC_SSOP0_S1DCOP 0x00000010 |
#define | ADC_SSOP0_S0DCOP 0x00000001 |
#define | ADC_SSDC0_S7DCSEL_M 0xF0000000 |
#define | ADC_SSDC0_S6DCSEL_M 0x0F000000 |
#define | ADC_SSDC0_S5DCSEL_M 0x00F00000 |
#define | ADC_SSDC0_S4DCSEL_M 0x000F0000 |
#define | ADC_SSDC0_S3DCSEL_M 0x0000F000 |
#define | ADC_SSDC0_S2DCSEL_M 0x00000F00 |
#define | ADC_SSDC0_S1DCSEL_M 0x000000F0 |
#define | ADC_SSDC0_S0DCSEL_M 0x0000000F |
#define | ADC_SSDC0_S6DCSEL_S 24 |
#define | ADC_SSDC0_S5DCSEL_S 20 |
#define | ADC_SSDC0_S4DCSEL_S 16 |
#define | ADC_SSDC0_S3DCSEL_S 12 |
#define | ADC_SSDC0_S2DCSEL_S 8 |
#define | ADC_SSDC0_S1DCSEL_S 4 |
#define | ADC_SSDC0_S0DCSEL_S 0 |
#define | ADC_SSMUX1_MUX3_M 0x0000F000 |
#define | ADC_SSMUX1_MUX2_M 0x00000F00 |
#define | ADC_SSMUX1_MUX1_M 0x000000F0 |
#define | ADC_SSMUX1_MUX0_M 0x0000000F |
#define | ADC_SSMUX1_MUX3_S 12 |
#define | ADC_SSMUX1_MUX2_S 8 |
#define | ADC_SSMUX1_MUX1_S 4 |
#define | ADC_SSMUX1_MUX0_S 0 |
#define | ADC_SSCTL1_TS3 0x00008000 |
#define | ADC_SSCTL1_IE3 0x00004000 |
#define | ADC_SSCTL1_END3 0x00002000 |
#define | ADC_SSCTL1_D3 0x00001000 |
#define | ADC_SSCTL1_TS2 0x00000800 |
#define | ADC_SSCTL1_IE2 0x00000400 |
#define | ADC_SSCTL1_END2 0x00000200 |
#define | ADC_SSCTL1_D2 0x00000100 |
#define | ADC_SSCTL1_TS1 0x00000080 |
#define | ADC_SSCTL1_IE1 0x00000040 |
#define | ADC_SSCTL1_END1 0x00000020 |
#define | ADC_SSCTL1_D1 0x00000010 |
#define | ADC_SSCTL1_TS0 0x00000008 |
#define | ADC_SSCTL1_IE0 0x00000004 |
#define | ADC_SSCTL1_END0 0x00000002 |
#define | ADC_SSCTL1_D0 0x00000001 |
#define | ADC_SSFIFO1_DATA_M 0x00000FFF |
#define | ADC_SSFIFO1_DATA_S 0 |
#define | ADC_SSFSTAT1_FULL 0x00001000 |
#define | ADC_SSFSTAT1_EMPTY 0x00000100 |
#define | ADC_SSFSTAT1_HPTR_M 0x000000F0 |
#define | ADC_SSFSTAT1_TPTR_M 0x0000000F |
#define | ADC_SSFSTAT1_HPTR_S 4 |
#define | ADC_SSFSTAT1_TPTR_S 0 |
#define | ADC_SSOP1_S3DCOP 0x00001000 |
#define | ADC_SSOP1_S2DCOP 0x00000100 |
#define | ADC_SSOP1_S1DCOP 0x00000010 |
#define | ADC_SSOP1_S0DCOP 0x00000001 |
#define | ADC_SSDC1_S3DCSEL_M 0x0000F000 |
#define | ADC_SSDC1_S2DCSEL_M 0x00000F00 |
#define | ADC_SSDC1_S1DCSEL_M 0x000000F0 |
#define | ADC_SSDC1_S0DCSEL_M 0x0000000F |
#define | ADC_SSDC1_S2DCSEL_S 8 |
#define | ADC_SSDC1_S1DCSEL_S 4 |
#define | ADC_SSDC1_S0DCSEL_S 0 |
#define | ADC_SSMUX2_MUX3_M 0x0000F000 |
#define | ADC_SSMUX2_MUX2_M 0x00000F00 |
#define | ADC_SSMUX2_MUX1_M 0x000000F0 |
#define | ADC_SSMUX2_MUX0_M 0x0000000F |
#define | ADC_SSMUX2_MUX3_S 12 |
#define | ADC_SSMUX2_MUX2_S 8 |
#define | ADC_SSMUX2_MUX1_S 4 |
#define | ADC_SSMUX2_MUX0_S 0 |
#define | ADC_SSCTL2_TS3 0x00008000 |
#define | ADC_SSCTL2_IE3 0x00004000 |
#define | ADC_SSCTL2_END3 0x00002000 |
#define | ADC_SSCTL2_D3 0x00001000 |
#define | ADC_SSCTL2_TS2 0x00000800 |
#define | ADC_SSCTL2_IE2 0x00000400 |
#define | ADC_SSCTL2_END2 0x00000200 |
#define | ADC_SSCTL2_D2 0x00000100 |
#define | ADC_SSCTL2_TS1 0x00000080 |
#define | ADC_SSCTL2_IE1 0x00000040 |
#define | ADC_SSCTL2_END1 0x00000020 |
#define | ADC_SSCTL2_D1 0x00000010 |
#define | ADC_SSCTL2_TS0 0x00000008 |
#define | ADC_SSCTL2_IE0 0x00000004 |
#define | ADC_SSCTL2_END0 0x00000002 |
#define | ADC_SSCTL2_D0 0x00000001 |
#define | ADC_SSFIFO2_DATA_M 0x00000FFF |
#define | ADC_SSFIFO2_DATA_S 0 |
#define | ADC_SSFSTAT2_FULL 0x00001000 |
#define | ADC_SSFSTAT2_EMPTY 0x00000100 |
#define | ADC_SSFSTAT2_HPTR_M 0x000000F0 |
#define | ADC_SSFSTAT2_TPTR_M 0x0000000F |
#define | ADC_SSFSTAT2_HPTR_S 4 |
#define | ADC_SSFSTAT2_TPTR_S 0 |
#define | ADC_SSOP2_S3DCOP 0x00001000 |
#define | ADC_SSOP2_S2DCOP 0x00000100 |
#define | ADC_SSOP2_S1DCOP 0x00000010 |
#define | ADC_SSOP2_S0DCOP 0x00000001 |
#define | ADC_SSDC2_S3DCSEL_M 0x0000F000 |
#define | ADC_SSDC2_S2DCSEL_M 0x00000F00 |
#define | ADC_SSDC2_S1DCSEL_M 0x000000F0 |
#define | ADC_SSDC2_S0DCSEL_M 0x0000000F |
#define | ADC_SSDC2_S2DCSEL_S 8 |
#define | ADC_SSDC2_S1DCSEL_S 4 |
#define | ADC_SSDC2_S0DCSEL_S 0 |
#define | ADC_SSMUX3_MUX0_M 0x0000000F |
#define | ADC_SSMUX3_MUX0_S 0 |
#define | ADC_SSCTL3_TS0 0x00000008 |
#define | ADC_SSCTL3_IE0 0x00000004 |
#define | ADC_SSCTL3_END0 0x00000002 |
#define | ADC_SSCTL3_D0 0x00000001 |
#define | ADC_SSFIFO3_DATA_M 0x00000FFF |
#define | ADC_SSFIFO3_DATA_S 0 |
#define | ADC_SSFSTAT3_FULL 0x00001000 |
#define | ADC_SSFSTAT3_EMPTY 0x00000100 |
#define | ADC_SSFSTAT3_HPTR_M 0x000000F0 |
#define | ADC_SSFSTAT3_TPTR_M 0x0000000F |
#define | ADC_SSFSTAT3_HPTR_S 4 |
#define | ADC_SSFSTAT3_TPTR_S 0 |
#define | ADC_SSOP3_S0DCOP 0x00000001 |
#define | ADC_SSDC3_S0DCSEL_M 0x0000000F |
#define | ADC_DCRIC_DCTRIG7 0x00800000 |
#define | ADC_DCRIC_DCTRIG6 0x00400000 |
#define | ADC_DCRIC_DCTRIG5 0x00200000 |
#define | ADC_DCRIC_DCTRIG4 0x00100000 |
#define | ADC_DCRIC_DCTRIG3 0x00080000 |
#define | ADC_DCRIC_DCTRIG2 0x00040000 |
#define | ADC_DCRIC_DCTRIG1 0x00020000 |
#define | ADC_DCRIC_DCTRIG0 0x00010000 |
#define | ADC_DCRIC_DCINT7 0x00000080 |
#define | ADC_DCRIC_DCINT6 0x00000040 |
#define | ADC_DCRIC_DCINT5 0x00000020 |
#define | ADC_DCRIC_DCINT4 0x00000010 |
#define | ADC_DCRIC_DCINT3 0x00000008 |
#define | ADC_DCRIC_DCINT2 0x00000004 |
#define | ADC_DCRIC_DCINT1 0x00000002 |
#define | ADC_DCRIC_DCINT0 0x00000001 |
#define | ADC_DCCTL0_CTE 0x00001000 |
#define | ADC_DCCTL0_CTC_M 0x00000C00 |
#define | ADC_DCCTL0_CTC_LOW 0x00000000 |
#define | ADC_DCCTL0_CTC_MID 0x00000400 |
#define | ADC_DCCTL0_CTC_HIGH 0x00000C00 |
#define | ADC_DCCTL0_CTM_M 0x00000300 |
#define | ADC_DCCTL0_CTM_ALWAYS 0x00000000 |
#define | ADC_DCCTL0_CTM_ONCE 0x00000100 |
#define | ADC_DCCTL0_CTM_HALWAYS 0x00000200 |
#define | ADC_DCCTL0_CTM_HONCE 0x00000300 |
#define | ADC_DCCTL0_CIE 0x00000010 |
#define | ADC_DCCTL0_CIC_M 0x0000000C |
#define | ADC_DCCTL0_CIC_LOW 0x00000000 |
#define | ADC_DCCTL0_CIC_MID 0x00000004 |
#define | ADC_DCCTL0_CIC_HIGH 0x0000000C |
#define | ADC_DCCTL0_CIM_M 0x00000003 |
#define | ADC_DCCTL0_CIM_ALWAYS 0x00000000 |
#define | ADC_DCCTL0_CIM_ONCE 0x00000001 |
#define | ADC_DCCTL0_CIM_HALWAYS 0x00000002 |
#define | ADC_DCCTL0_CIM_HONCE 0x00000003 |
#define | ADC_DCCTL1_CTE 0x00001000 |
#define | ADC_DCCTL1_CTC_M 0x00000C00 |
#define | ADC_DCCTL1_CTC_LOW 0x00000000 |
#define | ADC_DCCTL1_CTC_MID 0x00000400 |
#define | ADC_DCCTL1_CTC_HIGH 0x00000C00 |
#define | ADC_DCCTL1_CTM_M 0x00000300 |
#define | ADC_DCCTL1_CTM_ALWAYS 0x00000000 |
#define | ADC_DCCTL1_CTM_ONCE 0x00000100 |
#define | ADC_DCCTL1_CTM_HALWAYS 0x00000200 |
#define | ADC_DCCTL1_CTM_HONCE 0x00000300 |
#define | ADC_DCCTL1_CIE 0x00000010 |
#define | ADC_DCCTL1_CIC_M 0x0000000C |
#define | ADC_DCCTL1_CIC_LOW 0x00000000 |
#define | ADC_DCCTL1_CIC_MID 0x00000004 |
#define | ADC_DCCTL1_CIC_HIGH 0x0000000C |
#define | ADC_DCCTL1_CIM_M 0x00000003 |
#define | ADC_DCCTL1_CIM_ALWAYS 0x00000000 |
#define | ADC_DCCTL1_CIM_ONCE 0x00000001 |
#define | ADC_DCCTL1_CIM_HALWAYS 0x00000002 |
#define | ADC_DCCTL1_CIM_HONCE 0x00000003 |
#define | ADC_DCCTL2_CTE 0x00001000 |
#define | ADC_DCCTL2_CTC_M 0x00000C00 |
#define | ADC_DCCTL2_CTC_LOW 0x00000000 |
#define | ADC_DCCTL2_CTC_MID 0x00000400 |
#define | ADC_DCCTL2_CTC_HIGH 0x00000C00 |
#define | ADC_DCCTL2_CTM_M 0x00000300 |
#define | ADC_DCCTL2_CTM_ALWAYS 0x00000000 |
#define | ADC_DCCTL2_CTM_ONCE 0x00000100 |
#define | ADC_DCCTL2_CTM_HALWAYS 0x00000200 |
#define | ADC_DCCTL2_CTM_HONCE 0x00000300 |
#define | ADC_DCCTL2_CIE 0x00000010 |
#define | ADC_DCCTL2_CIC_M 0x0000000C |
#define | ADC_DCCTL2_CIC_LOW 0x00000000 |
#define | ADC_DCCTL2_CIC_MID 0x00000004 |
#define | ADC_DCCTL2_CIC_HIGH 0x0000000C |
#define | ADC_DCCTL2_CIM_M 0x00000003 |
#define | ADC_DCCTL2_CIM_ALWAYS 0x00000000 |
#define | ADC_DCCTL2_CIM_ONCE 0x00000001 |
#define | ADC_DCCTL2_CIM_HALWAYS 0x00000002 |
#define | ADC_DCCTL2_CIM_HONCE 0x00000003 |
#define | ADC_DCCTL3_CTE 0x00001000 |
#define | ADC_DCCTL3_CTC_M 0x00000C00 |
#define | ADC_DCCTL3_CTC_LOW 0x00000000 |
#define | ADC_DCCTL3_CTC_MID 0x00000400 |
#define | ADC_DCCTL3_CTC_HIGH 0x00000C00 |
#define | ADC_DCCTL3_CTM_M 0x00000300 |
#define | ADC_DCCTL3_CTM_ALWAYS 0x00000000 |
#define | ADC_DCCTL3_CTM_ONCE 0x00000100 |
#define | ADC_DCCTL3_CTM_HALWAYS 0x00000200 |
#define | ADC_DCCTL3_CTM_HONCE 0x00000300 |
#define | ADC_DCCTL3_CIE 0x00000010 |
#define | ADC_DCCTL3_CIC_M 0x0000000C |
#define | ADC_DCCTL3_CIC_LOW 0x00000000 |
#define | ADC_DCCTL3_CIC_MID 0x00000004 |
#define | ADC_DCCTL3_CIC_HIGH 0x0000000C |
#define | ADC_DCCTL3_CIM_M 0x00000003 |
#define | ADC_DCCTL3_CIM_ALWAYS 0x00000000 |
#define | ADC_DCCTL3_CIM_ONCE 0x00000001 |
#define | ADC_DCCTL3_CIM_HALWAYS 0x00000002 |
#define | ADC_DCCTL3_CIM_HONCE 0x00000003 |
#define | ADC_DCCTL4_CTE 0x00001000 |
#define | ADC_DCCTL4_CTC_M 0x00000C00 |
#define | ADC_DCCTL4_CTC_LOW 0x00000000 |
#define | ADC_DCCTL4_CTC_MID 0x00000400 |
#define | ADC_DCCTL4_CTC_HIGH 0x00000C00 |
#define | ADC_DCCTL4_CTM_M 0x00000300 |
#define | ADC_DCCTL4_CTM_ALWAYS 0x00000000 |
#define | ADC_DCCTL4_CTM_ONCE 0x00000100 |
#define | ADC_DCCTL4_CTM_HALWAYS 0x00000200 |
#define | ADC_DCCTL4_CTM_HONCE 0x00000300 |
#define | ADC_DCCTL4_CIE 0x00000010 |
#define | ADC_DCCTL4_CIC_M 0x0000000C |
#define | ADC_DCCTL4_CIC_LOW 0x00000000 |
#define | ADC_DCCTL4_CIC_MID 0x00000004 |
#define | ADC_DCCTL4_CIC_HIGH 0x0000000C |
#define | ADC_DCCTL4_CIM_M 0x00000003 |
#define | ADC_DCCTL4_CIM_ALWAYS 0x00000000 |
#define | ADC_DCCTL4_CIM_ONCE 0x00000001 |
#define | ADC_DCCTL4_CIM_HALWAYS 0x00000002 |
#define | ADC_DCCTL4_CIM_HONCE 0x00000003 |
#define | ADC_DCCTL5_CTE 0x00001000 |
#define | ADC_DCCTL5_CTC_M 0x00000C00 |
#define | ADC_DCCTL5_CTC_LOW 0x00000000 |
#define | ADC_DCCTL5_CTC_MID 0x00000400 |
#define | ADC_DCCTL5_CTC_HIGH 0x00000C00 |
#define | ADC_DCCTL5_CTM_M 0x00000300 |
#define | ADC_DCCTL5_CTM_ALWAYS 0x00000000 |
#define | ADC_DCCTL5_CTM_ONCE 0x00000100 |
#define | ADC_DCCTL5_CTM_HALWAYS 0x00000200 |
#define | ADC_DCCTL5_CTM_HONCE 0x00000300 |
#define | ADC_DCCTL5_CIE 0x00000010 |
#define | ADC_DCCTL5_CIC_M 0x0000000C |
#define | ADC_DCCTL5_CIC_LOW 0x00000000 |
#define | ADC_DCCTL5_CIC_MID 0x00000004 |
#define | ADC_DCCTL5_CIC_HIGH 0x0000000C |
#define | ADC_DCCTL5_CIM_M 0x00000003 |
#define | ADC_DCCTL5_CIM_ALWAYS 0x00000000 |
#define | ADC_DCCTL5_CIM_ONCE 0x00000001 |
#define | ADC_DCCTL5_CIM_HALWAYS 0x00000002 |
#define | ADC_DCCTL5_CIM_HONCE 0x00000003 |
#define | ADC_DCCTL6_CTE 0x00001000 |
#define | ADC_DCCTL6_CTC_M 0x00000C00 |
#define | ADC_DCCTL6_CTC_LOW 0x00000000 |
#define | ADC_DCCTL6_CTC_MID 0x00000400 |
#define | ADC_DCCTL6_CTC_HIGH 0x00000C00 |
#define | ADC_DCCTL6_CTM_M 0x00000300 |
#define | ADC_DCCTL6_CTM_ALWAYS 0x00000000 |
#define | ADC_DCCTL6_CTM_ONCE 0x00000100 |
#define | ADC_DCCTL6_CTM_HALWAYS 0x00000200 |
#define | ADC_DCCTL6_CTM_HONCE 0x00000300 |
#define | ADC_DCCTL6_CIE 0x00000010 |
#define | ADC_DCCTL6_CIC_M 0x0000000C |
#define | ADC_DCCTL6_CIC_LOW 0x00000000 |
#define | ADC_DCCTL6_CIC_MID 0x00000004 |
#define | ADC_DCCTL6_CIC_HIGH 0x0000000C |
#define | ADC_DCCTL6_CIM_M 0x00000003 |
#define | ADC_DCCTL6_CIM_ALWAYS 0x00000000 |
#define | ADC_DCCTL6_CIM_ONCE 0x00000001 |
#define | ADC_DCCTL6_CIM_HALWAYS 0x00000002 |
#define | ADC_DCCTL6_CIM_HONCE 0x00000003 |
#define | ADC_DCCTL7_CTE 0x00001000 |
#define | ADC_DCCTL7_CTC_M 0x00000C00 |
#define | ADC_DCCTL7_CTC_LOW 0x00000000 |
#define | ADC_DCCTL7_CTC_MID 0x00000400 |
#define | ADC_DCCTL7_CTC_HIGH 0x00000C00 |
#define | ADC_DCCTL7_CTM_M 0x00000300 |
#define | ADC_DCCTL7_CTM_ALWAYS 0x00000000 |
#define | ADC_DCCTL7_CTM_ONCE 0x00000100 |
#define | ADC_DCCTL7_CTM_HALWAYS 0x00000200 |
#define | ADC_DCCTL7_CTM_HONCE 0x00000300 |
#define | ADC_DCCTL7_CIE 0x00000010 |
#define | ADC_DCCTL7_CIC_M 0x0000000C |
#define | ADC_DCCTL7_CIC_LOW 0x00000000 |
#define | ADC_DCCTL7_CIC_MID 0x00000004 |
#define | ADC_DCCTL7_CIC_HIGH 0x0000000C |
#define | ADC_DCCTL7_CIM_M 0x00000003 |
#define | ADC_DCCTL7_CIM_ALWAYS 0x00000000 |
#define | ADC_DCCTL7_CIM_ONCE 0x00000001 |
#define | ADC_DCCTL7_CIM_HALWAYS 0x00000002 |
#define | ADC_DCCTL7_CIM_HONCE 0x00000003 |
#define | ADC_DCCMP0_COMP1_M 0x0FFF0000 |
#define | ADC_DCCMP0_COMP0_M 0x00000FFF |
#define | ADC_DCCMP0_COMP1_S 16 |
#define | ADC_DCCMP0_COMP0_S 0 |
#define | ADC_DCCMP1_COMP1_M 0x0FFF0000 |
#define | ADC_DCCMP1_COMP0_M 0x00000FFF |
#define | ADC_DCCMP1_COMP1_S 16 |
#define | ADC_DCCMP1_COMP0_S 0 |
#define | ADC_DCCMP2_COMP1_M 0x0FFF0000 |
#define | ADC_DCCMP2_COMP0_M 0x00000FFF |
#define | ADC_DCCMP2_COMP1_S 16 |
#define | ADC_DCCMP2_COMP0_S 0 |
#define | ADC_DCCMP3_COMP1_M 0x0FFF0000 |
#define | ADC_DCCMP3_COMP0_M 0x00000FFF |
#define | ADC_DCCMP3_COMP1_S 16 |
#define | ADC_DCCMP3_COMP0_S 0 |
#define | ADC_DCCMP4_COMP1_M 0x0FFF0000 |
#define | ADC_DCCMP4_COMP0_M 0x00000FFF |
#define | ADC_DCCMP4_COMP1_S 16 |
#define | ADC_DCCMP4_COMP0_S 0 |
#define | ADC_DCCMP5_COMP1_M 0x0FFF0000 |
#define | ADC_DCCMP5_COMP0_M 0x00000FFF |
#define | ADC_DCCMP5_COMP1_S 16 |
#define | ADC_DCCMP5_COMP0_S 0 |
#define | ADC_DCCMP6_COMP1_M 0x0FFF0000 |
#define | ADC_DCCMP6_COMP0_M 0x00000FFF |
#define | ADC_DCCMP6_COMP1_S 16 |
#define | ADC_DCCMP6_COMP0_S 0 |
#define | ADC_DCCMP7_COMP1_M 0x0FFF0000 |
#define | ADC_DCCMP7_COMP0_M 0x00000FFF |
#define | ADC_DCCMP7_COMP1_S 16 |
#define | ADC_DCCMP7_COMP0_S 0 |
#define | ADC_PP_TS 0x00800000 |
#define | ADC_PP_RSL_M 0x007C0000 |
#define | ADC_PP_TYPE_M 0x00030000 |
#define | ADC_PP_TYPE_SAR 0x00000000 |
#define | ADC_PP_DC_M 0x0000FC00 |
#define | ADC_PP_CH_M 0x000003F0 |
#define | ADC_PP_MSR_M 0x0000000F |
#define | ADC_PP_MSR_125K 0x00000001 |
#define | ADC_PP_MSR_250K 0x00000003 |
#define | ADC_PP_MSR_500K 0x00000005 |
#define | ADC_PP_MSR_1M 0x00000007 |
#define | ADC_PP_RSL_S 18 |
#define | ADC_PP_DC_S 10 |
#define | ADC_PP_CH_S 4 |
#define | ADC_PC_SR_M 0x0000000F |
#define | ADC_PC_SR_125K 0x00000001 |
#define | ADC_PC_SR_250K 0x00000003 |
#define | ADC_PC_SR_500K 0x00000005 |
#define | ADC_PC_SR_1M 0x00000007 |
#define | ADC_CC_CS_M 0x0000000F |
#define | ADC_CC_CS_SYSPLL 0x00000000 |
#define | ADC_CC_CS_PIOSC 0x00000001 |
#define | COMP_ACMIS_IN1 0x00000002 |
#define | COMP_ACMIS_IN0 0x00000001 |
#define | COMP_ACRIS_IN1 0x00000002 |
#define | COMP_ACRIS_IN0 0x00000001 |
#define | COMP_ACINTEN_IN1 0x00000002 |
#define | COMP_ACINTEN_IN0 0x00000001 |
#define | COMP_ACREFCTL_EN 0x00000200 |
#define | COMP_ACREFCTL_RNG 0x00000100 |
#define | COMP_ACREFCTL_VREF_M 0x0000000F |
#define | COMP_ACREFCTL_VREF_S 0 |
#define | COMP_ACSTAT0_OVAL 0x00000002 |
#define | COMP_ACCTL0_TOEN 0x00000800 |
#define | COMP_ACCTL0_ASRCP_M 0x00000600 |
#define | COMP_ACCTL0_ASRCP_PIN 0x00000000 |
#define | COMP_ACCTL0_ASRCP_PIN0 0x00000200 |
#define | COMP_ACCTL0_ASRCP_REF 0x00000400 |
#define | COMP_ACCTL0_TSLVAL 0x00000080 |
#define | COMP_ACCTL0_TSEN_M 0x00000060 |
#define | COMP_ACCTL0_TSEN_LEVEL 0x00000000 |
#define | COMP_ACCTL0_TSEN_FALL 0x00000020 |
#define | COMP_ACCTL0_TSEN_RISE 0x00000040 |
#define | COMP_ACCTL0_TSEN_BOTH 0x00000060 |
#define | COMP_ACCTL0_ISLVAL 0x00000010 |
#define | COMP_ACCTL0_ISEN_M 0x0000000C |
#define | COMP_ACCTL0_ISEN_LEVEL 0x00000000 |
#define | COMP_ACCTL0_ISEN_FALL 0x00000004 |
#define | COMP_ACCTL0_ISEN_RISE 0x00000008 |
#define | COMP_ACCTL0_ISEN_BOTH 0x0000000C |
#define | COMP_ACCTL0_CINV 0x00000002 |
#define | COMP_ACSTAT1_OVAL 0x00000002 |
#define | COMP_ACCTL1_TOEN 0x00000800 |
#define | COMP_ACCTL1_ASRCP_M 0x00000600 |
#define | COMP_ACCTL1_ASRCP_PIN 0x00000000 |
#define | COMP_ACCTL1_ASRCP_PIN0 0x00000200 |
#define | COMP_ACCTL1_ASRCP_REF 0x00000400 |
#define | COMP_ACCTL1_TSLVAL 0x00000080 |
#define | COMP_ACCTL1_TSEN_M 0x00000060 |
#define | COMP_ACCTL1_TSEN_LEVEL 0x00000000 |
#define | COMP_ACCTL1_TSEN_FALL 0x00000020 |
#define | COMP_ACCTL1_TSEN_RISE 0x00000040 |
#define | COMP_ACCTL1_TSEN_BOTH 0x00000060 |
#define | COMP_ACCTL1_ISLVAL 0x00000010 |
#define | COMP_ACCTL1_ISEN_M 0x0000000C |
#define | COMP_ACCTL1_ISEN_LEVEL 0x00000000 |
#define | COMP_ACCTL1_ISEN_FALL 0x00000004 |
#define | COMP_ACCTL1_ISEN_RISE 0x00000008 |
#define | COMP_ACCTL1_ISEN_BOTH 0x0000000C |
#define | COMP_ACCTL1_CINV 0x00000002 |
#define | COMP_PP_C1O 0x00020000 |
#define | COMP_PP_C0O 0x00010000 |
#define | COMP_PP_CMP1 0x00000002 |
#define | COMP_PP_CMP0 0x00000001 |
#define | CAN_CTL_TEST 0x00000080 |
#define | CAN_CTL_CCE 0x00000040 |
#define | CAN_CTL_DAR 0x00000020 |
#define | CAN_CTL_EIE 0x00000008 |
#define | CAN_CTL_SIE 0x00000004 |
#define | CAN_CTL_IE 0x00000002 |
#define | CAN_CTL_INIT 0x00000001 |
#define | CAN_STS_BOFF 0x00000080 |
#define | CAN_STS_EWARN 0x00000040 |
#define | CAN_STS_EPASS 0x00000020 |
#define | CAN_STS_RXOK 0x00000010 |
#define | CAN_STS_TXOK 0x00000008 |
#define | CAN_STS_LEC_M 0x00000007 |
#define | CAN_STS_LEC_NONE 0x00000000 |
#define | CAN_STS_LEC_STUFF 0x00000001 |
#define | CAN_STS_LEC_FORM 0x00000002 |
#define | CAN_STS_LEC_ACK 0x00000003 |
#define | CAN_STS_LEC_BIT1 0x00000004 |
#define | CAN_STS_LEC_BIT0 0x00000005 |
#define | CAN_STS_LEC_CRC 0x00000006 |
#define | CAN_STS_LEC_NOEVENT 0x00000007 |
#define | CAN_ERR_RP 0x00008000 |
#define | CAN_ERR_REC_M 0x00007F00 |
#define | CAN_ERR_TEC_M 0x000000FF |
#define | CAN_ERR_REC_S 8 |
#define | CAN_ERR_TEC_S 0 |
#define | CAN_BIT_TSEG2_M 0x00007000 |
#define | CAN_BIT_TSEG1_M 0x00000F00 |
#define | CAN_BIT_SJW_M 0x000000C0 |
#define | CAN_BIT_BRP_M 0x0000003F |
#define | CAN_BIT_TSEG2_S 12 |
#define | CAN_BIT_TSEG1_S 8 |
#define | CAN_BIT_SJW_S 6 |
#define | CAN_BIT_BRP_S 0 |
#define | CAN_INT_INTID_M 0x0000FFFF |
#define | CAN_INT_INTID_NONE 0x00000000 |
#define | CAN_INT_INTID_STATUS 0x00008000 |
#define | CAN_TST_RX 0x00000080 |
#define | CAN_TST_TX_M 0x00000060 |
#define | CAN_TST_TX_CANCTL 0x00000000 |
#define | CAN_TST_TX_SAMPLE 0x00000020 |
#define | CAN_TST_TX_DOMINANT 0x00000040 |
#define | CAN_TST_TX_RECESSIVE 0x00000060 |
#define | CAN_TST_LBACK 0x00000010 |
#define | CAN_TST_SILENT 0x00000008 |
#define | CAN_TST_BASIC 0x00000004 |
#define | CAN_BRPE_BRPE_M 0x0000000F |
#define | CAN_BRPE_BRPE_S 0 |
#define | CAN_IF1CRQ_BUSY 0x00008000 |
#define | CAN_IF1CRQ_MNUM_M 0x0000003F |
#define | CAN_IF1CRQ_MNUM_S 0 |
#define | CAN_IF1CMSK_WRNRD 0x00000080 |
#define | CAN_IF1CMSK_MASK 0x00000040 |
#define | CAN_IF1CMSK_ARB 0x00000020 |
#define | CAN_IF1CMSK_CONTROL 0x00000010 |
#define | CAN_IF1CMSK_CLRINTPND 0x00000008 |
#define | CAN_IF1CMSK_NEWDAT 0x00000004 |
#define | CAN_IF1CMSK_TXRQST 0x00000004 |
#define | CAN_IF1CMSK_DATAA 0x00000002 |
#define | CAN_IF1CMSK_DATAB 0x00000001 |
#define | CAN_IF1MSK1_IDMSK_M 0x0000FFFF |
#define | CAN_IF1MSK1_IDMSK_S 0 |
#define | CAN_IF1MSK2_MXTD 0x00008000 |
#define | CAN_IF1MSK2_MDIR 0x00004000 |
#define | CAN_IF1MSK2_IDMSK_M 0x00001FFF |
#define | CAN_IF1MSK2_IDMSK_S 0 |
#define | CAN_IF1ARB1_ID_M 0x0000FFFF |
#define | CAN_IF1ARB1_ID_S 0 |
#define | CAN_IF1ARB2_MSGVAL 0x00008000 |
#define | CAN_IF1ARB2_XTD 0x00004000 |
#define | CAN_IF1ARB2_DIR 0x00002000 |
#define | CAN_IF1ARB2_ID_M 0x00001FFF |
#define | CAN_IF1ARB2_ID_S 0 |
#define | CAN_IF1MCTL_NEWDAT 0x00008000 |
#define | CAN_IF1MCTL_MSGLST 0x00004000 |
#define | CAN_IF1MCTL_INTPND 0x00002000 |
#define | CAN_IF1MCTL_UMASK 0x00001000 |
#define | CAN_IF1MCTL_TXIE 0x00000800 |
#define | CAN_IF1MCTL_RXIE 0x00000400 |
#define | CAN_IF1MCTL_RMTEN 0x00000200 |
#define | CAN_IF1MCTL_TXRQST 0x00000100 |
#define | CAN_IF1MCTL_EOB 0x00000080 |
#define | CAN_IF1MCTL_DLC_M 0x0000000F |
#define | CAN_IF1MCTL_DLC_S 0 |
#define | CAN_IF1DA1_DATA_M 0x0000FFFF |
#define | CAN_IF1DA1_DATA_S 0 |
#define | CAN_IF1DA2_DATA_M 0x0000FFFF |
#define | CAN_IF1DA2_DATA_S 0 |
#define | CAN_IF1DB1_DATA_M 0x0000FFFF |
#define | CAN_IF1DB1_DATA_S 0 |
#define | CAN_IF1DB2_DATA_M 0x0000FFFF |
#define | CAN_IF1DB2_DATA_S 0 |
#define | CAN_IF2CRQ_BUSY 0x00008000 |
#define | CAN_IF2CRQ_MNUM_M 0x0000003F |
#define | CAN_IF2CRQ_MNUM_S 0 |
#define | CAN_IF2CMSK_WRNRD 0x00000080 |
#define | CAN_IF2CMSK_MASK 0x00000040 |
#define | CAN_IF2CMSK_ARB 0x00000020 |
#define | CAN_IF2CMSK_CONTROL 0x00000010 |
#define | CAN_IF2CMSK_CLRINTPND 0x00000008 |
#define | CAN_IF2CMSK_NEWDAT 0x00000004 |
#define | CAN_IF2CMSK_TXRQST 0x00000004 |
#define | CAN_IF2CMSK_DATAA 0x00000002 |
#define | CAN_IF2CMSK_DATAB 0x00000001 |
#define | CAN_IF2MSK1_IDMSK_M 0x0000FFFF |
#define | CAN_IF2MSK1_IDMSK_S 0 |
#define | CAN_IF2MSK2_MXTD 0x00008000 |
#define | CAN_IF2MSK2_MDIR 0x00004000 |
#define | CAN_IF2MSK2_IDMSK_M 0x00001FFF |
#define | CAN_IF2MSK2_IDMSK_S 0 |
#define | CAN_IF2ARB1_ID_M 0x0000FFFF |
#define | CAN_IF2ARB1_ID_S 0 |
#define | CAN_IF2ARB2_MSGVAL 0x00008000 |
#define | CAN_IF2ARB2_XTD 0x00004000 |
#define | CAN_IF2ARB2_DIR 0x00002000 |
#define | CAN_IF2ARB2_ID_M 0x00001FFF |
#define | CAN_IF2ARB2_ID_S 0 |
#define | CAN_IF2MCTL_NEWDAT 0x00008000 |
#define | CAN_IF2MCTL_MSGLST 0x00004000 |
#define | CAN_IF2MCTL_INTPND 0x00002000 |
#define | CAN_IF2MCTL_UMASK 0x00001000 |
#define | CAN_IF2MCTL_TXIE 0x00000800 |
#define | CAN_IF2MCTL_RXIE 0x00000400 |
#define | CAN_IF2MCTL_RMTEN 0x00000200 |
#define | CAN_IF2MCTL_TXRQST 0x00000100 |
#define | CAN_IF2MCTL_EOB 0x00000080 |
#define | CAN_IF2MCTL_DLC_M 0x0000000F |
#define | CAN_IF2MCTL_DLC_S 0 |
#define | CAN_IF2DA1_DATA_M 0x0000FFFF |
#define | CAN_IF2DA1_DATA_S 0 |
#define | CAN_IF2DA2_DATA_M 0x0000FFFF |
#define | CAN_IF2DA2_DATA_S 0 |
#define | CAN_IF2DB1_DATA_M 0x0000FFFF |
#define | CAN_IF2DB1_DATA_S 0 |
#define | CAN_IF2DB2_DATA_M 0x0000FFFF |
#define | CAN_IF2DB2_DATA_S 0 |
#define | CAN_TXRQ1_TXRQST_M 0x0000FFFF |
#define | CAN_TXRQ1_TXRQST_S 0 |
#define | CAN_TXRQ2_TXRQST_M 0x0000FFFF |
#define | CAN_TXRQ2_TXRQST_S 0 |
#define | CAN_NWDA1_NEWDAT_M 0x0000FFFF |
#define | CAN_NWDA1_NEWDAT_S 0 |
#define | CAN_NWDA2_NEWDAT_M 0x0000FFFF |
#define | CAN_NWDA2_NEWDAT_S 0 |
#define | CAN_MSG1INT_INTPND_M 0x0000FFFF |
#define | CAN_MSG1INT_INTPND_S 0 |
#define | CAN_MSG2INT_INTPND_M 0x0000FFFF |
#define | CAN_MSG2INT_INTPND_S 0 |
#define | CAN_MSG1VAL_MSGVAL_M 0x0000FFFF |
#define | CAN_MSG1VAL_MSGVAL_S 0 |
#define | CAN_MSG2VAL_MSGVAL_M 0x0000FFFF |
#define | CAN_MSG2VAL_MSGVAL_S 0 |
#define | USB_FADDR_M 0x0000007F |
#define | USB_FADDR_S 0 |
#define | USB_POWER_ISOUP 0x00000080 |
#define | USB_POWER_SOFTCONN 0x00000040 |
#define | USB_POWER_RESET 0x00000008 |
#define | USB_POWER_RESUME 0x00000004 |
#define | USB_POWER_SUSPEND 0x00000002 |
#define | USB_POWER_PWRDNPHY 0x00000001 |
#define | USB_TXIS_EP7 0x00000080 |
#define | USB_TXIS_EP6 0x00000040 |
#define | USB_TXIS_EP5 0x00000020 |
#define | USB_TXIS_EP4 0x00000010 |
#define | USB_TXIS_EP3 0x00000008 |
#define | USB_TXIS_EP2 0x00000004 |
#define | USB_TXIS_EP1 0x00000002 |
#define | USB_TXIS_EP0 0x00000001 |
#define | USB_RXIS_EP7 0x00000080 |
#define | USB_RXIS_EP6 0x00000040 |
#define | USB_RXIS_EP5 0x00000020 |
#define | USB_RXIS_EP4 0x00000010 |
#define | USB_RXIS_EP3 0x00000008 |
#define | USB_RXIS_EP2 0x00000004 |
#define | USB_RXIS_EP1 0x00000002 |
#define | USB_TXIE_EP7 0x00000080 |
#define | USB_TXIE_EP6 0x00000040 |
#define | USB_TXIE_EP5 0x00000020 |
#define | USB_TXIE_EP4 0x00000010 |
#define | USB_TXIE_EP3 0x00000008 |
#define | USB_TXIE_EP2 0x00000004 |
#define | USB_TXIE_EP1 0x00000002 |
#define | USB_TXIE_EP0 0x00000001 |
#define | USB_RXIE_EP7 0x00000080 |
#define | USB_RXIE_EP6 0x00000040 |
#define | USB_RXIE_EP5 0x00000020 |
#define | USB_RXIE_EP4 0x00000010 |
#define | USB_RXIE_EP3 0x00000008 |
#define | USB_RXIE_EP2 0x00000004 |
#define | USB_RXIE_EP1 0x00000002 |
#define | USB_IS_VBUSERR 0x00000080 |
#define | USB_IS_SESREQ 0x00000040 |
#define | USB_IS_DISCON 0x00000020 |
#define | USB_IS_CONN 0x00000010 |
#define | USB_IS_SOF 0x00000008 |
#define | USB_IS_BABBLE 0x00000004 |
#define | USB_IS_RESET 0x00000004 |
#define | USB_IS_RESUME 0x00000002 |
#define | USB_IS_SUSPEND 0x00000001 |
#define | USB_IE_VBUSERR 0x00000080 |
#define | USB_IE_SESREQ 0x00000040 |
#define | USB_IE_DISCON 0x00000020 |
#define | USB_IE_CONN 0x00000010 |
#define | USB_IE_SOF 0x00000008 |
#define | USB_IE_BABBLE 0x00000004 |
#define | USB_IE_RESET 0x00000004 |
#define | USB_IE_RESUME 0x00000002 |
#define | USB_IE_SUSPND 0x00000001 |
#define | USB_FRAME_M 0x000007FF |
#define | USB_FRAME_S 0 |
#define | USB_EPIDX_EPIDX_M 0x0000000F |
#define | USB_EPIDX_EPIDX_S 0 |
#define | USB_TEST_FORCEH 0x00000080 |
#define | USB_TEST_FIFOACC 0x00000040 |
#define | USB_TEST_FORCEFS 0x00000020 |
#define | USB_FIFO0_EPDATA_M 0xFFFFFFFF |
#define | USB_FIFO0_EPDATA_S 0 |
#define | USB_FIFO1_EPDATA_M 0xFFFFFFFF |
#define | USB_FIFO1_EPDATA_S 0 |
#define | USB_FIFO2_EPDATA_M 0xFFFFFFFF |
#define | USB_FIFO2_EPDATA_S 0 |
#define | USB_FIFO3_EPDATA_M 0xFFFFFFFF |
#define | USB_FIFO3_EPDATA_S 0 |
#define | USB_FIFO4_EPDATA_M 0xFFFFFFFF |
#define | USB_FIFO4_EPDATA_S 0 |
#define | USB_FIFO5_EPDATA_M 0xFFFFFFFF |
#define | USB_FIFO5_EPDATA_S 0 |
#define | USB_FIFO6_EPDATA_M 0xFFFFFFFF |
#define | USB_FIFO6_EPDATA_S 0 |
#define | USB_FIFO7_EPDATA_M 0xFFFFFFFF |
#define | USB_FIFO7_EPDATA_S 0 |
#define | USB_DEVCTL_DEV 0x00000080 |
#define | USB_DEVCTL_FSDEV 0x00000040 |
#define | USB_DEVCTL_LSDEV 0x00000020 |
#define | USB_DEVCTL_VBUS_M 0x00000018 |
#define | USB_DEVCTL_VBUS_NONE 0x00000000 |
#define | USB_DEVCTL_VBUS_SEND 0x00000008 |
#define | USB_DEVCTL_VBUS_AVALID 0x00000010 |
#define | USB_DEVCTL_VBUS_VALID 0x00000018 |
#define | USB_DEVCTL_HOST 0x00000004 |
#define | USB_DEVCTL_HOSTREQ 0x00000002 |
#define | USB_DEVCTL_SESSION 0x00000001 |
#define | USB_TXFIFOSZ_DPB 0x00000010 |
#define | USB_TXFIFOSZ_SIZE_M 0x0000000F |
#define | USB_TXFIFOSZ_SIZE_8 0x00000000 |
#define | USB_TXFIFOSZ_SIZE_16 0x00000001 |
#define | USB_TXFIFOSZ_SIZE_32 0x00000002 |
#define | USB_TXFIFOSZ_SIZE_64 0x00000003 |
#define | USB_TXFIFOSZ_SIZE_128 0x00000004 |
#define | USB_TXFIFOSZ_SIZE_256 0x00000005 |
#define | USB_TXFIFOSZ_SIZE_512 0x00000006 |
#define | USB_TXFIFOSZ_SIZE_1024 0x00000007 |
#define | USB_TXFIFOSZ_SIZE_2048 0x00000008 |
#define | USB_RXFIFOSZ_DPB 0x00000010 |
#define | USB_RXFIFOSZ_SIZE_M 0x0000000F |
#define | USB_RXFIFOSZ_SIZE_8 0x00000000 |
#define | USB_RXFIFOSZ_SIZE_16 0x00000001 |
#define | USB_RXFIFOSZ_SIZE_32 0x00000002 |
#define | USB_RXFIFOSZ_SIZE_64 0x00000003 |
#define | USB_RXFIFOSZ_SIZE_128 0x00000004 |
#define | USB_RXFIFOSZ_SIZE_256 0x00000005 |
#define | USB_RXFIFOSZ_SIZE_512 0x00000006 |
#define | USB_RXFIFOSZ_SIZE_1024 0x00000007 |
#define | USB_RXFIFOSZ_SIZE_2048 0x00000008 |
#define | USB_TXFIFOADD_ADDR_M 0x000001FF |
#define | USB_TXFIFOADD_ADDR_S 0 |
#define | USB_RXFIFOADD_ADDR_M 0x000001FF |
#define | USB_RXFIFOADD_ADDR_S 0 |
#define | USB_CONTIM_WTCON_M 0x000000F0 |
#define | USB_CONTIM_WTID_M 0x0000000F |
#define | USB_CONTIM_WTCON_S 4 |
#define | USB_CONTIM_WTID_S 0 |
#define | USB_VPLEN_VPLEN_M 0x000000FF |
#define | USB_VPLEN_VPLEN_S 0 |
#define | USB_FSEOF_FSEOFG_M 0x000000FF |
#define | USB_FSEOF_FSEOFG_S 0 |
#define | USB_LSEOF_LSEOFG_M 0x000000FF |
#define | USB_LSEOF_LSEOFG_S 0 |
#define | USB_TXFUNCADDR0_ADDR_M 0x0000007F |
#define | USB_TXFUNCADDR0_ADDR_S 0 |
#define | USB_TXHUBADDR0_ADDR_M 0x0000007F |
#define | USB_TXHUBADDR0_ADDR_S 0 |
#define | USB_TXHUBPORT0_PORT_M 0x0000007F |
#define | USB_TXHUBPORT0_PORT_S 0 |
#define | USB_TXFUNCADDR1_ADDR_M 0x0000007F |
#define | USB_TXFUNCADDR1_ADDR_S 0 |
#define | USB_TXHUBADDR1_ADDR_M 0x0000007F |
#define | USB_TXHUBADDR1_ADDR_S 0 |
#define | USB_TXHUBPORT1_PORT_M 0x0000007F |
#define | USB_TXHUBPORT1_PORT_S 0 |
#define | USB_RXFUNCADDR1_ADDR_M 0x0000007F |
#define | USB_RXFUNCADDR1_ADDR_S 0 |
#define | USB_RXHUBADDR1_ADDR_M 0x0000007F |
#define | USB_RXHUBADDR1_ADDR_S 0 |
#define | USB_RXHUBPORT1_PORT_M 0x0000007F |
#define | USB_RXHUBPORT1_PORT_S 0 |
#define | USB_TXFUNCADDR2_ADDR_M 0x0000007F |
#define | USB_TXFUNCADDR2_ADDR_S 0 |
#define | USB_TXHUBADDR2_ADDR_M 0x0000007F |
#define | USB_TXHUBADDR2_ADDR_S 0 |
#define | USB_TXHUBPORT2_PORT_M 0x0000007F |
#define | USB_TXHUBPORT2_PORT_S 0 |
#define | USB_RXFUNCADDR2_ADDR_M 0x0000007F |
#define | USB_RXFUNCADDR2_ADDR_S 0 |
#define | USB_RXHUBADDR2_ADDR_M 0x0000007F |
#define | USB_RXHUBADDR2_ADDR_S 0 |
#define | USB_RXHUBPORT2_PORT_M 0x0000007F |
#define | USB_RXHUBPORT2_PORT_S 0 |
#define | USB_TXFUNCADDR3_ADDR_M 0x0000007F |
#define | USB_TXFUNCADDR3_ADDR_S 0 |
#define | USB_TXHUBADDR3_ADDR_M 0x0000007F |
#define | USB_TXHUBADDR3_ADDR_S 0 |
#define | USB_TXHUBPORT3_PORT_M 0x0000007F |
#define | USB_TXHUBPORT3_PORT_S 0 |
#define | USB_RXFUNCADDR3_ADDR_M 0x0000007F |
#define | USB_RXFUNCADDR3_ADDR_S 0 |
#define | USB_RXHUBADDR3_ADDR_M 0x0000007F |
#define | USB_RXHUBADDR3_ADDR_S 0 |
#define | USB_RXHUBPORT3_PORT_M 0x0000007F |
#define | USB_RXHUBPORT3_PORT_S 0 |
#define | USB_TXFUNCADDR4_ADDR_M 0x0000007F |
#define | USB_TXFUNCADDR4_ADDR_S 0 |
#define | USB_TXHUBADDR4_ADDR_M 0x0000007F |
#define | USB_TXHUBADDR4_ADDR_S 0 |
#define | USB_TXHUBPORT4_PORT_M 0x0000007F |
#define | USB_TXHUBPORT4_PORT_S 0 |
#define | USB_RXFUNCADDR4_ADDR_M 0x0000007F |
#define | USB_RXFUNCADDR4_ADDR_S 0 |
#define | USB_RXHUBADDR4_ADDR_M 0x0000007F |
#define | USB_RXHUBADDR4_ADDR_S 0 |
#define | USB_RXHUBPORT4_PORT_M 0x0000007F |
#define | USB_RXHUBPORT4_PORT_S 0 |
#define | USB_TXFUNCADDR5_ADDR_M 0x0000007F |
#define | USB_TXFUNCADDR5_ADDR_S 0 |
#define | USB_TXHUBADDR5_ADDR_M 0x0000007F |
#define | USB_TXHUBADDR5_ADDR_S 0 |
#define | USB_TXHUBPORT5_PORT_M 0x0000007F |
#define | USB_TXHUBPORT5_PORT_S 0 |
#define | USB_RXFUNCADDR5_ADDR_M 0x0000007F |
#define | USB_RXFUNCADDR5_ADDR_S 0 |
#define | USB_RXHUBADDR5_ADDR_M 0x0000007F |
#define | USB_RXHUBADDR5_ADDR_S 0 |
#define | USB_RXHUBPORT5_PORT_M 0x0000007F |
#define | USB_RXHUBPORT5_PORT_S 0 |
#define | USB_TXFUNCADDR6_ADDR_M 0x0000007F |
#define | USB_TXFUNCADDR6_ADDR_S 0 |
#define | USB_TXHUBADDR6_ADDR_M 0x0000007F |
#define | USB_TXHUBADDR6_ADDR_S 0 |
#define | USB_TXHUBPORT6_PORT_M 0x0000007F |
#define | USB_TXHUBPORT6_PORT_S 0 |
#define | USB_RXFUNCADDR6_ADDR_M 0x0000007F |
#define | USB_RXFUNCADDR6_ADDR_S 0 |
#define | USB_RXHUBADDR6_ADDR_M 0x0000007F |
#define | USB_RXHUBADDR6_ADDR_S 0 |
#define | USB_RXHUBPORT6_PORT_M 0x0000007F |
#define | USB_RXHUBPORT6_PORT_S 0 |
#define | USB_TXFUNCADDR7_ADDR_M 0x0000007F |
#define | USB_TXFUNCADDR7_ADDR_S 0 |
#define | USB_TXHUBADDR7_ADDR_M 0x0000007F |
#define | USB_TXHUBADDR7_ADDR_S 0 |
#define | USB_TXHUBPORT7_PORT_M 0x0000007F |
#define | USB_TXHUBPORT7_PORT_S 0 |
#define | USB_RXFUNCADDR7_ADDR_M 0x0000007F |
#define | USB_RXFUNCADDR7_ADDR_S 0 |
#define | USB_RXHUBADDR7_ADDR_M 0x0000007F |
#define | USB_RXHUBADDR7_ADDR_S 0 |
#define | USB_RXHUBPORT7_PORT_M 0x0000007F |
#define | USB_RXHUBPORT7_PORT_S 0 |
#define | USB_CSRL0_NAKTO 0x00000080 |
#define | USB_CSRL0_SETENDC 0x00000080 |
#define | USB_CSRL0_STATUS 0x00000040 |
#define | USB_CSRL0_RXRDYC 0x00000040 |
#define | USB_CSRL0_REQPKT 0x00000020 |
#define | USB_CSRL0_STALL 0x00000020 |
#define | USB_CSRL0_SETEND 0x00000010 |
#define | USB_CSRL0_ERROR 0x00000010 |
#define | USB_CSRL0_DATAEND 0x00000008 |
#define | USB_CSRL0_SETUP 0x00000008 |
#define | USB_CSRL0_STALLED 0x00000004 |
#define | USB_CSRL0_TXRDY 0x00000002 |
#define | USB_CSRL0_RXRDY 0x00000001 |
#define | USB_CSRH0_DTWE 0x00000004 |
#define | USB_CSRH0_DT 0x00000002 |
#define | USB_CSRH0_FLUSH 0x00000001 |
#define | USB_COUNT0_COUNT_M 0x0000007F |
#define | USB_COUNT0_COUNT_S 0 |
#define | USB_TYPE0_SPEED_M 0x000000C0 |
#define | USB_TYPE0_SPEED_FULL 0x00000080 |
#define | USB_TYPE0_SPEED_LOW 0x000000C0 |
#define | USB_NAKLMT_NAKLMT_M 0x0000001F |
#define | USB_NAKLMT_NAKLMT_S 0 |
#define | USB_TXMAXP1_MAXLOAD_M 0x000007FF |
#define | USB_TXMAXP1_MAXLOAD_S 0 |
#define | USB_TXCSRL1_NAKTO 0x00000080 |
#define | USB_TXCSRL1_CLRDT 0x00000040 |
#define | USB_TXCSRL1_STALLED 0x00000020 |
#define | USB_TXCSRL1_STALL 0x00000010 |
#define | USB_TXCSRL1_SETUP 0x00000010 |
#define | USB_TXCSRL1_FLUSH 0x00000008 |
#define | USB_TXCSRL1_ERROR 0x00000004 |
#define | USB_TXCSRL1_UNDRN 0x00000004 |
#define | USB_TXCSRL1_FIFONE 0x00000002 |
#define | USB_TXCSRL1_TXRDY 0x00000001 |
#define | USB_TXCSRH1_AUTOSET 0x00000080 |
#define | USB_TXCSRH1_ISO 0x00000040 |
#define | USB_TXCSRH1_MODE 0x00000020 |
#define | USB_TXCSRH1_DMAEN 0x00000010 |
#define | USB_TXCSRH1_FDT 0x00000008 |
#define | USB_TXCSRH1_DMAMOD 0x00000004 |
#define | USB_TXCSRH1_DTWE 0x00000002 |
#define | USB_TXCSRH1_DT 0x00000001 |
#define | USB_RXMAXP1_MAXLOAD_M 0x000007FF |
#define | USB_RXMAXP1_MAXLOAD_S 0 |
#define | USB_RXCSRL1_CLRDT 0x00000080 |
#define | USB_RXCSRL1_STALLED 0x00000040 |
#define | USB_RXCSRL1_STALL 0x00000020 |
#define | USB_RXCSRL1_REQPKT 0x00000020 |
#define | USB_RXCSRL1_FLUSH 0x00000010 |
#define | USB_RXCSRL1_DATAERR 0x00000008 |
#define | USB_RXCSRL1_NAKTO 0x00000008 |
#define | USB_RXCSRL1_OVER 0x00000004 |
#define | USB_RXCSRL1_ERROR 0x00000004 |
#define | USB_RXCSRL1_FULL 0x00000002 |
#define | USB_RXCSRL1_RXRDY 0x00000001 |
#define | USB_RXCSRH1_AUTOCL 0x00000080 |
#define | USB_RXCSRH1_AUTORQ 0x00000040 |
#define | USB_RXCSRH1_ISO 0x00000040 |
#define | USB_RXCSRH1_DMAEN 0x00000020 |
#define | USB_RXCSRH1_DISNYET 0x00000010 |
#define | USB_RXCSRH1_PIDERR 0x00000010 |
#define | USB_RXCSRH1_DMAMOD 0x00000008 |
#define | USB_RXCSRH1_DTWE 0x00000004 |
#define | USB_RXCSRH1_DT 0x00000002 |
#define | USB_RXCOUNT1_COUNT_M 0x00001FFF |
#define | USB_RXCOUNT1_COUNT_S 0 |
#define | USB_TXTYPE1_SPEED_M 0x000000C0 |
#define | USB_TXTYPE1_SPEED_DFLT 0x00000000 |
#define | USB_TXTYPE1_SPEED_FULL 0x00000080 |
#define | USB_TXTYPE1_SPEED_LOW 0x000000C0 |
#define | USB_TXTYPE1_PROTO_M 0x00000030 |
#define | USB_TXTYPE1_PROTO_CTRL 0x00000000 |
#define | USB_TXTYPE1_PROTO_ISOC 0x00000010 |
#define | USB_TXTYPE1_PROTO_BULK 0x00000020 |
#define | USB_TXTYPE1_PROTO_INT 0x00000030 |
#define | USB_TXTYPE1_TEP_M 0x0000000F |
#define | USB_TXTYPE1_TEP_S 0 |
#define | USB_TXINTERVAL1_NAKLMT_M 0x000000FF |
#define | USB_TXINTERVAL1_TXPOLL_M 0x000000FF |
#define | USB_TXINTERVAL1_TXPOLL_S 0 |
#define | USB_TXINTERVAL1_NAKLMT_S 0 |
#define | USB_RXTYPE1_SPEED_M 0x000000C0 |
#define | USB_RXTYPE1_SPEED_DFLT 0x00000000 |
#define | USB_RXTYPE1_SPEED_FULL 0x00000080 |
#define | USB_RXTYPE1_SPEED_LOW 0x000000C0 |
#define | USB_RXTYPE1_PROTO_M 0x00000030 |
#define | USB_RXTYPE1_PROTO_CTRL 0x00000000 |
#define | USB_RXTYPE1_PROTO_ISOC 0x00000010 |
#define | USB_RXTYPE1_PROTO_BULK 0x00000020 |
#define | USB_RXTYPE1_PROTO_INT 0x00000030 |
#define | USB_RXTYPE1_TEP_M 0x0000000F |
#define | USB_RXTYPE1_TEP_S 0 |
#define | USB_RXINTERVAL1_TXPOLL_M 0x000000FF |
#define | USB_RXINTERVAL1_NAKLMT_M 0x000000FF |
#define | USB_RXINTERVAL1_TXPOLL_S 0 |
#define | USB_RXINTERVAL1_NAKLMT_S 0 |
#define | USB_TXMAXP2_MAXLOAD_M 0x000007FF |
#define | USB_TXMAXP2_MAXLOAD_S 0 |
#define | USB_TXCSRL2_NAKTO 0x00000080 |
#define | USB_TXCSRL2_CLRDT 0x00000040 |
#define | USB_TXCSRL2_STALLED 0x00000020 |
#define | USB_TXCSRL2_SETUP 0x00000010 |
#define | USB_TXCSRL2_STALL 0x00000010 |
#define | USB_TXCSRL2_FLUSH 0x00000008 |
#define | USB_TXCSRL2_ERROR 0x00000004 |
#define | USB_TXCSRL2_UNDRN 0x00000004 |
#define | USB_TXCSRL2_FIFONE 0x00000002 |
#define | USB_TXCSRL2_TXRDY 0x00000001 |
#define | USB_TXCSRH2_AUTOSET 0x00000080 |
#define | USB_TXCSRH2_ISO 0x00000040 |
#define | USB_TXCSRH2_MODE 0x00000020 |
#define | USB_TXCSRH2_DMAEN 0x00000010 |
#define | USB_TXCSRH2_FDT 0x00000008 |
#define | USB_TXCSRH2_DMAMOD 0x00000004 |
#define | USB_TXCSRH2_DTWE 0x00000002 |
#define | USB_TXCSRH2_DT 0x00000001 |
#define | USB_RXMAXP2_MAXLOAD_M 0x000007FF |
#define | USB_RXMAXP2_MAXLOAD_S 0 |
#define | USB_RXCSRL2_CLRDT 0x00000080 |
#define | USB_RXCSRL2_STALLED 0x00000040 |
#define | USB_RXCSRL2_REQPKT 0x00000020 |
#define | USB_RXCSRL2_STALL 0x00000020 |
#define | USB_RXCSRL2_FLUSH 0x00000010 |
#define | USB_RXCSRL2_DATAERR 0x00000008 |
#define | USB_RXCSRL2_NAKTO 0x00000008 |
#define | USB_RXCSRL2_ERROR 0x00000004 |
#define | USB_RXCSRL2_OVER 0x00000004 |
#define | USB_RXCSRL2_FULL 0x00000002 |
#define | USB_RXCSRL2_RXRDY 0x00000001 |
#define | USB_RXCSRH2_AUTOCL 0x00000080 |
#define | USB_RXCSRH2_AUTORQ 0x00000040 |
#define | USB_RXCSRH2_ISO 0x00000040 |
#define | USB_RXCSRH2_DMAEN 0x00000020 |
#define | USB_RXCSRH2_DISNYET 0x00000010 |
#define | USB_RXCSRH2_PIDERR 0x00000010 |
#define | USB_RXCSRH2_DMAMOD 0x00000008 |
#define | USB_RXCSRH2_DTWE 0x00000004 |
#define | USB_RXCSRH2_DT 0x00000002 |
#define | USB_RXCOUNT2_COUNT_M 0x00001FFF |
#define | USB_RXCOUNT2_COUNT_S 0 |
#define | USB_TXTYPE2_SPEED_M 0x000000C0 |
#define | USB_TXTYPE2_SPEED_DFLT 0x00000000 |
#define | USB_TXTYPE2_SPEED_FULL 0x00000080 |
#define | USB_TXTYPE2_SPEED_LOW 0x000000C0 |
#define | USB_TXTYPE2_PROTO_M 0x00000030 |
#define | USB_TXTYPE2_PROTO_CTRL 0x00000000 |
#define | USB_TXTYPE2_PROTO_ISOC 0x00000010 |
#define | USB_TXTYPE2_PROTO_BULK 0x00000020 |
#define | USB_TXTYPE2_PROTO_INT 0x00000030 |
#define | USB_TXTYPE2_TEP_M 0x0000000F |
#define | USB_TXTYPE2_TEP_S 0 |
#define | USB_TXINTERVAL2_TXPOLL_M 0x000000FF |
#define | USB_TXINTERVAL2_NAKLMT_M 0x000000FF |
#define | USB_TXINTERVAL2_NAKLMT_S 0 |
#define | USB_TXINTERVAL2_TXPOLL_S 0 |
#define | USB_RXTYPE2_SPEED_M 0x000000C0 |
#define | USB_RXTYPE2_SPEED_DFLT 0x00000000 |
#define | USB_RXTYPE2_SPEED_FULL 0x00000080 |
#define | USB_RXTYPE2_SPEED_LOW 0x000000C0 |
#define | USB_RXTYPE2_PROTO_M 0x00000030 |
#define | USB_RXTYPE2_PROTO_CTRL 0x00000000 |
#define | USB_RXTYPE2_PROTO_ISOC 0x00000010 |
#define | USB_RXTYPE2_PROTO_BULK 0x00000020 |
#define | USB_RXTYPE2_PROTO_INT 0x00000030 |
#define | USB_RXTYPE2_TEP_M 0x0000000F |
#define | USB_RXTYPE2_TEP_S 0 |
#define | USB_RXINTERVAL2_TXPOLL_M 0x000000FF |
#define | USB_RXINTERVAL2_NAKLMT_M 0x000000FF |
#define | USB_RXINTERVAL2_TXPOLL_S 0 |
#define | USB_RXINTERVAL2_NAKLMT_S 0 |
#define | USB_TXMAXP3_MAXLOAD_M 0x000007FF |
#define | USB_TXMAXP3_MAXLOAD_S 0 |
#define | USB_TXCSRL3_NAKTO 0x00000080 |
#define | USB_TXCSRL3_CLRDT 0x00000040 |
#define | USB_TXCSRL3_STALLED 0x00000020 |
#define | USB_TXCSRL3_SETUP 0x00000010 |
#define | USB_TXCSRL3_STALL 0x00000010 |
#define | USB_TXCSRL3_FLUSH 0x00000008 |
#define | USB_TXCSRL3_ERROR 0x00000004 |
#define | USB_TXCSRL3_UNDRN 0x00000004 |
#define | USB_TXCSRL3_FIFONE 0x00000002 |
#define | USB_TXCSRL3_TXRDY 0x00000001 |
#define | USB_TXCSRH3_AUTOSET 0x00000080 |
#define | USB_TXCSRH3_ISO 0x00000040 |
#define | USB_TXCSRH3_MODE 0x00000020 |
#define | USB_TXCSRH3_DMAEN 0x00000010 |
#define | USB_TXCSRH3_FDT 0x00000008 |
#define | USB_TXCSRH3_DMAMOD 0x00000004 |
#define | USB_TXCSRH3_DTWE 0x00000002 |
#define | USB_TXCSRH3_DT 0x00000001 |
#define | USB_RXMAXP3_MAXLOAD_M 0x000007FF |
#define | USB_RXMAXP3_MAXLOAD_S 0 |
#define | USB_RXCSRL3_CLRDT 0x00000080 |
#define | USB_RXCSRL3_STALLED 0x00000040 |
#define | USB_RXCSRL3_STALL 0x00000020 |
#define | USB_RXCSRL3_REQPKT 0x00000020 |
#define | USB_RXCSRL3_FLUSH 0x00000010 |
#define | USB_RXCSRL3_DATAERR 0x00000008 |
#define | USB_RXCSRL3_NAKTO 0x00000008 |
#define | USB_RXCSRL3_ERROR 0x00000004 |
#define | USB_RXCSRL3_OVER 0x00000004 |
#define | USB_RXCSRL3_FULL 0x00000002 |
#define | USB_RXCSRL3_RXRDY 0x00000001 |
#define | USB_RXCSRH3_AUTOCL 0x00000080 |
#define | USB_RXCSRH3_AUTORQ 0x00000040 |
#define | USB_RXCSRH3_ISO 0x00000040 |
#define | USB_RXCSRH3_DMAEN 0x00000020 |
#define | USB_RXCSRH3_DISNYET 0x00000010 |
#define | USB_RXCSRH3_PIDERR 0x00000010 |
#define | USB_RXCSRH3_DMAMOD 0x00000008 |
#define | USB_RXCSRH3_DTWE 0x00000004 |
#define | USB_RXCSRH3_DT 0x00000002 |
#define | USB_RXCOUNT3_COUNT_M 0x00001FFF |
#define | USB_RXCOUNT3_COUNT_S 0 |
#define | USB_TXTYPE3_SPEED_M 0x000000C0 |
#define | USB_TXTYPE3_SPEED_DFLT 0x00000000 |
#define | USB_TXTYPE3_SPEED_FULL 0x00000080 |
#define | USB_TXTYPE3_SPEED_LOW 0x000000C0 |
#define | USB_TXTYPE3_PROTO_M 0x00000030 |
#define | USB_TXTYPE3_PROTO_CTRL 0x00000000 |
#define | USB_TXTYPE3_PROTO_ISOC 0x00000010 |
#define | USB_TXTYPE3_PROTO_BULK 0x00000020 |
#define | USB_TXTYPE3_PROTO_INT 0x00000030 |
#define | USB_TXTYPE3_TEP_M 0x0000000F |
#define | USB_TXTYPE3_TEP_S 0 |
#define | USB_TXINTERVAL3_TXPOLL_M 0x000000FF |
#define | USB_TXINTERVAL3_NAKLMT_M 0x000000FF |
#define | USB_TXINTERVAL3_TXPOLL_S 0 |
#define | USB_TXINTERVAL3_NAKLMT_S 0 |
#define | USB_RXTYPE3_SPEED_M 0x000000C0 |
#define | USB_RXTYPE3_SPEED_DFLT 0x00000000 |
#define | USB_RXTYPE3_SPEED_FULL 0x00000080 |
#define | USB_RXTYPE3_SPEED_LOW 0x000000C0 |
#define | USB_RXTYPE3_PROTO_M 0x00000030 |
#define | USB_RXTYPE3_PROTO_CTRL 0x00000000 |
#define | USB_RXTYPE3_PROTO_ISOC 0x00000010 |
#define | USB_RXTYPE3_PROTO_BULK 0x00000020 |
#define | USB_RXTYPE3_PROTO_INT 0x00000030 |
#define | USB_RXTYPE3_TEP_M 0x0000000F |
#define | USB_RXTYPE3_TEP_S 0 |
#define | USB_RXINTERVAL3_TXPOLL_M 0x000000FF |
#define | USB_RXINTERVAL3_NAKLMT_M 0x000000FF |
#define | USB_RXINTERVAL3_TXPOLL_S 0 |
#define | USB_RXINTERVAL3_NAKLMT_S 0 |
#define | USB_TXMAXP4_MAXLOAD_M 0x000007FF |
#define | USB_TXMAXP4_MAXLOAD_S 0 |
#define | USB_TXCSRL4_NAKTO 0x00000080 |
#define | USB_TXCSRL4_CLRDT 0x00000040 |
#define | USB_TXCSRL4_STALLED 0x00000020 |
#define | USB_TXCSRL4_SETUP 0x00000010 |
#define | USB_TXCSRL4_STALL 0x00000010 |
#define | USB_TXCSRL4_FLUSH 0x00000008 |
#define | USB_TXCSRL4_ERROR 0x00000004 |
#define | USB_TXCSRL4_UNDRN 0x00000004 |
#define | USB_TXCSRL4_FIFONE 0x00000002 |
#define | USB_TXCSRL4_TXRDY 0x00000001 |
#define | USB_TXCSRH4_AUTOSET 0x00000080 |
#define | USB_TXCSRH4_ISO 0x00000040 |
#define | USB_TXCSRH4_MODE 0x00000020 |
#define | USB_TXCSRH4_DMAEN 0x00000010 |
#define | USB_TXCSRH4_FDT 0x00000008 |
#define | USB_TXCSRH4_DMAMOD 0x00000004 |
#define | USB_TXCSRH4_DTWE 0x00000002 |
#define | USB_TXCSRH4_DT 0x00000001 |
#define | USB_RXMAXP4_MAXLOAD_M 0x000007FF |
#define | USB_RXMAXP4_MAXLOAD_S 0 |
#define | USB_RXCSRL4_CLRDT 0x00000080 |
#define | USB_RXCSRL4_STALLED 0x00000040 |
#define | USB_RXCSRL4_STALL 0x00000020 |
#define | USB_RXCSRL4_REQPKT 0x00000020 |
#define | USB_RXCSRL4_FLUSH 0x00000010 |
#define | USB_RXCSRL4_NAKTO 0x00000008 |
#define | USB_RXCSRL4_DATAERR 0x00000008 |
#define | USB_RXCSRL4_OVER 0x00000004 |
#define | USB_RXCSRL4_ERROR 0x00000004 |
#define | USB_RXCSRL4_FULL 0x00000002 |
#define | USB_RXCSRL4_RXRDY 0x00000001 |
#define | USB_RXCSRH4_AUTOCL 0x00000080 |
#define | USB_RXCSRH4_AUTORQ 0x00000040 |
#define | USB_RXCSRH4_ISO 0x00000040 |
#define | USB_RXCSRH4_DMAEN 0x00000020 |
#define | USB_RXCSRH4_DISNYET 0x00000010 |
#define | USB_RXCSRH4_PIDERR 0x00000010 |
#define | USB_RXCSRH4_DMAMOD 0x00000008 |
#define | USB_RXCSRH4_DTWE 0x00000004 |
#define | USB_RXCSRH4_DT 0x00000002 |
#define | USB_RXCOUNT4_COUNT_M 0x00001FFF |
#define | USB_RXCOUNT4_COUNT_S 0 |
#define | USB_TXTYPE4_SPEED_M 0x000000C0 |
#define | USB_TXTYPE4_SPEED_DFLT 0x00000000 |
#define | USB_TXTYPE4_SPEED_FULL 0x00000080 |
#define | USB_TXTYPE4_SPEED_LOW 0x000000C0 |
#define | USB_TXTYPE4_PROTO_M 0x00000030 |
#define | USB_TXTYPE4_PROTO_CTRL 0x00000000 |
#define | USB_TXTYPE4_PROTO_ISOC 0x00000010 |
#define | USB_TXTYPE4_PROTO_BULK 0x00000020 |
#define | USB_TXTYPE4_PROTO_INT 0x00000030 |
#define | USB_TXTYPE4_TEP_M 0x0000000F |
#define | USB_TXTYPE4_TEP_S 0 |
#define | USB_TXINTERVAL4_TXPOLL_M 0x000000FF |
#define | USB_TXINTERVAL4_NAKLMT_M 0x000000FF |
#define | USB_TXINTERVAL4_NAKLMT_S 0 |
#define | USB_TXINTERVAL4_TXPOLL_S 0 |
#define | USB_RXTYPE4_SPEED_M 0x000000C0 |
#define | USB_RXTYPE4_SPEED_DFLT 0x00000000 |
#define | USB_RXTYPE4_SPEED_FULL 0x00000080 |
#define | USB_RXTYPE4_SPEED_LOW 0x000000C0 |
#define | USB_RXTYPE4_PROTO_M 0x00000030 |
#define | USB_RXTYPE4_PROTO_CTRL 0x00000000 |
#define | USB_RXTYPE4_PROTO_ISOC 0x00000010 |
#define | USB_RXTYPE4_PROTO_BULK 0x00000020 |
#define | USB_RXTYPE4_PROTO_INT 0x00000030 |
#define | USB_RXTYPE4_TEP_M 0x0000000F |
#define | USB_RXTYPE4_TEP_S 0 |
#define | USB_RXINTERVAL4_TXPOLL_M 0x000000FF |
#define | USB_RXINTERVAL4_NAKLMT_M 0x000000FF |
#define | USB_RXINTERVAL4_NAKLMT_S 0 |
#define | USB_RXINTERVAL4_TXPOLL_S 0 |
#define | USB_TXMAXP5_MAXLOAD_M 0x000007FF |
#define | USB_TXMAXP5_MAXLOAD_S 0 |
#define | USB_TXCSRL5_NAKTO 0x00000080 |
#define | USB_TXCSRL5_CLRDT 0x00000040 |
#define | USB_TXCSRL5_STALLED 0x00000020 |
#define | USB_TXCSRL5_SETUP 0x00000010 |
#define | USB_TXCSRL5_STALL 0x00000010 |
#define | USB_TXCSRL5_FLUSH 0x00000008 |
#define | USB_TXCSRL5_ERROR 0x00000004 |
#define | USB_TXCSRL5_UNDRN 0x00000004 |
#define | USB_TXCSRL5_FIFONE 0x00000002 |
#define | USB_TXCSRL5_TXRDY 0x00000001 |
#define | USB_TXCSRH5_AUTOSET 0x00000080 |
#define | USB_TXCSRH5_ISO 0x00000040 |
#define | USB_TXCSRH5_MODE 0x00000020 |
#define | USB_TXCSRH5_DMAEN 0x00000010 |
#define | USB_TXCSRH5_FDT 0x00000008 |
#define | USB_TXCSRH5_DMAMOD 0x00000004 |
#define | USB_TXCSRH5_DTWE 0x00000002 |
#define | USB_TXCSRH5_DT 0x00000001 |
#define | USB_RXMAXP5_MAXLOAD_M 0x000007FF |
#define | USB_RXMAXP5_MAXLOAD_S 0 |
#define | USB_RXCSRL5_CLRDT 0x00000080 |
#define | USB_RXCSRL5_STALLED 0x00000040 |
#define | USB_RXCSRL5_STALL 0x00000020 |
#define | USB_RXCSRL5_REQPKT 0x00000020 |
#define | USB_RXCSRL5_FLUSH 0x00000010 |
#define | USB_RXCSRL5_NAKTO 0x00000008 |
#define | USB_RXCSRL5_DATAERR 0x00000008 |
#define | USB_RXCSRL5_ERROR 0x00000004 |
#define | USB_RXCSRL5_OVER 0x00000004 |
#define | USB_RXCSRL5_FULL 0x00000002 |
#define | USB_RXCSRL5_RXRDY 0x00000001 |
#define | USB_RXCSRH5_AUTOCL 0x00000080 |
#define | USB_RXCSRH5_AUTORQ 0x00000040 |
#define | USB_RXCSRH5_ISO 0x00000040 |
#define | USB_RXCSRH5_DMAEN 0x00000020 |
#define | USB_RXCSRH5_DISNYET 0x00000010 |
#define | USB_RXCSRH5_PIDERR 0x00000010 |
#define | USB_RXCSRH5_DMAMOD 0x00000008 |
#define | USB_RXCSRH5_DTWE 0x00000004 |
#define | USB_RXCSRH5_DT 0x00000002 |
#define | USB_RXCOUNT5_COUNT_M 0x00001FFF |
#define | USB_RXCOUNT5_COUNT_S 0 |
#define | USB_TXTYPE5_SPEED_M 0x000000C0 |
#define | USB_TXTYPE5_SPEED_DFLT 0x00000000 |
#define | USB_TXTYPE5_SPEED_FULL 0x00000080 |
#define | USB_TXTYPE5_SPEED_LOW 0x000000C0 |
#define | USB_TXTYPE5_PROTO_M 0x00000030 |
#define | USB_TXTYPE5_PROTO_CTRL 0x00000000 |
#define | USB_TXTYPE5_PROTO_ISOC 0x00000010 |
#define | USB_TXTYPE5_PROTO_BULK 0x00000020 |
#define | USB_TXTYPE5_PROTO_INT 0x00000030 |
#define | USB_TXTYPE5_TEP_M 0x0000000F |
#define | USB_TXTYPE5_TEP_S 0 |
#define | USB_TXINTERVAL5_TXPOLL_M 0x000000FF |
#define | USB_TXINTERVAL5_NAKLMT_M 0x000000FF |
#define | USB_TXINTERVAL5_NAKLMT_S 0 |
#define | USB_TXINTERVAL5_TXPOLL_S 0 |
#define | USB_RXTYPE5_SPEED_M 0x000000C0 |
#define | USB_RXTYPE5_SPEED_DFLT 0x00000000 |
#define | USB_RXTYPE5_SPEED_FULL 0x00000080 |
#define | USB_RXTYPE5_SPEED_LOW 0x000000C0 |
#define | USB_RXTYPE5_PROTO_M 0x00000030 |
#define | USB_RXTYPE5_PROTO_CTRL 0x00000000 |
#define | USB_RXTYPE5_PROTO_ISOC 0x00000010 |
#define | USB_RXTYPE5_PROTO_BULK 0x00000020 |
#define | USB_RXTYPE5_PROTO_INT 0x00000030 |
#define | USB_RXTYPE5_TEP_M 0x0000000F |
#define | USB_RXTYPE5_TEP_S 0 |
#define | USB_RXINTERVAL5_TXPOLL_M 0x000000FF |
#define | USB_RXINTERVAL5_NAKLMT_M 0x000000FF |
#define | USB_RXINTERVAL5_TXPOLL_S 0 |
#define | USB_RXINTERVAL5_NAKLMT_S 0 |
#define | USB_TXMAXP6_MAXLOAD_M 0x000007FF |
#define | USB_TXMAXP6_MAXLOAD_S 0 |
#define | USB_TXCSRL6_NAKTO 0x00000080 |
#define | USB_TXCSRL6_CLRDT 0x00000040 |
#define | USB_TXCSRL6_STALLED 0x00000020 |
#define | USB_TXCSRL6_STALL 0x00000010 |
#define | USB_TXCSRL6_SETUP 0x00000010 |
#define | USB_TXCSRL6_FLUSH 0x00000008 |
#define | USB_TXCSRL6_ERROR 0x00000004 |
#define | USB_TXCSRL6_UNDRN 0x00000004 |
#define | USB_TXCSRL6_FIFONE 0x00000002 |
#define | USB_TXCSRL6_TXRDY 0x00000001 |
#define | USB_TXCSRH6_AUTOSET 0x00000080 |
#define | USB_TXCSRH6_ISO 0x00000040 |
#define | USB_TXCSRH6_MODE 0x00000020 |
#define | USB_TXCSRH6_DMAEN 0x00000010 |
#define | USB_TXCSRH6_FDT 0x00000008 |
#define | USB_TXCSRH6_DMAMOD 0x00000004 |
#define | USB_TXCSRH6_DTWE 0x00000002 |
#define | USB_TXCSRH6_DT 0x00000001 |
#define | USB_RXMAXP6_MAXLOAD_M 0x000007FF |
#define | USB_RXMAXP6_MAXLOAD_S 0 |
#define | USB_RXCSRL6_CLRDT 0x00000080 |
#define | USB_RXCSRL6_STALLED 0x00000040 |
#define | USB_RXCSRL6_REQPKT 0x00000020 |
#define | USB_RXCSRL6_STALL 0x00000020 |
#define | USB_RXCSRL6_FLUSH 0x00000010 |
#define | USB_RXCSRL6_NAKTO 0x00000008 |
#define | USB_RXCSRL6_DATAERR 0x00000008 |
#define | USB_RXCSRL6_ERROR 0x00000004 |
#define | USB_RXCSRL6_OVER 0x00000004 |
#define | USB_RXCSRL6_FULL 0x00000002 |
#define | USB_RXCSRL6_RXRDY 0x00000001 |
#define | USB_RXCSRH6_AUTOCL 0x00000080 |
#define | USB_RXCSRH6_AUTORQ 0x00000040 |
#define | USB_RXCSRH6_ISO 0x00000040 |
#define | USB_RXCSRH6_DMAEN 0x00000020 |
#define | USB_RXCSRH6_DISNYET 0x00000010 |
#define | USB_RXCSRH6_PIDERR 0x00000010 |
#define | USB_RXCSRH6_DMAMOD 0x00000008 |
#define | USB_RXCSRH6_DTWE 0x00000004 |
#define | USB_RXCSRH6_DT 0x00000002 |
#define | USB_RXCOUNT6_COUNT_M 0x00001FFF |
#define | USB_RXCOUNT6_COUNT_S 0 |
#define | USB_TXTYPE6_SPEED_M 0x000000C0 |
#define | USB_TXTYPE6_SPEED_DFLT 0x00000000 |
#define | USB_TXTYPE6_SPEED_FULL 0x00000080 |
#define | USB_TXTYPE6_SPEED_LOW 0x000000C0 |
#define | USB_TXTYPE6_PROTO_M 0x00000030 |
#define | USB_TXTYPE6_PROTO_CTRL 0x00000000 |
#define | USB_TXTYPE6_PROTO_ISOC 0x00000010 |
#define | USB_TXTYPE6_PROTO_BULK 0x00000020 |
#define | USB_TXTYPE6_PROTO_INT 0x00000030 |
#define | USB_TXTYPE6_TEP_M 0x0000000F |
#define | USB_TXTYPE6_TEP_S 0 |
#define | USB_TXINTERVAL6_TXPOLL_M 0x000000FF |
#define | USB_TXINTERVAL6_NAKLMT_M 0x000000FF |
#define | USB_TXINTERVAL6_TXPOLL_S 0 |
#define | USB_TXINTERVAL6_NAKLMT_S 0 |
#define | USB_RXTYPE6_SPEED_M 0x000000C0 |
#define | USB_RXTYPE6_SPEED_DFLT 0x00000000 |
#define | USB_RXTYPE6_SPEED_FULL 0x00000080 |
#define | USB_RXTYPE6_SPEED_LOW 0x000000C0 |
#define | USB_RXTYPE6_PROTO_M 0x00000030 |
#define | USB_RXTYPE6_PROTO_CTRL 0x00000000 |
#define | USB_RXTYPE6_PROTO_ISOC 0x00000010 |
#define | USB_RXTYPE6_PROTO_BULK 0x00000020 |
#define | USB_RXTYPE6_PROTO_INT 0x00000030 |
#define | USB_RXTYPE6_TEP_M 0x0000000F |
#define | USB_RXTYPE6_TEP_S 0 |
#define | USB_RXINTERVAL6_TXPOLL_M 0x000000FF |
#define | USB_RXINTERVAL6_NAKLMT_M 0x000000FF |
#define | USB_RXINTERVAL6_NAKLMT_S 0 |
#define | USB_RXINTERVAL6_TXPOLL_S 0 |
#define | USB_TXMAXP7_MAXLOAD_M 0x000007FF |
#define | USB_TXMAXP7_MAXLOAD_S 0 |
#define | USB_TXCSRL7_NAKTO 0x00000080 |
#define | USB_TXCSRL7_CLRDT 0x00000040 |
#define | USB_TXCSRL7_STALLED 0x00000020 |
#define | USB_TXCSRL7_STALL 0x00000010 |
#define | USB_TXCSRL7_SETUP 0x00000010 |
#define | USB_TXCSRL7_FLUSH 0x00000008 |
#define | USB_TXCSRL7_ERROR 0x00000004 |
#define | USB_TXCSRL7_UNDRN 0x00000004 |
#define | USB_TXCSRL7_FIFONE 0x00000002 |
#define | USB_TXCSRL7_TXRDY 0x00000001 |
#define | USB_TXCSRH7_AUTOSET 0x00000080 |
#define | USB_TXCSRH7_ISO 0x00000040 |
#define | USB_TXCSRH7_MODE 0x00000020 |
#define | USB_TXCSRH7_DMAEN 0x00000010 |
#define | USB_TXCSRH7_FDT 0x00000008 |
#define | USB_TXCSRH7_DMAMOD 0x00000004 |
#define | USB_TXCSRH7_DTWE 0x00000002 |
#define | USB_TXCSRH7_DT 0x00000001 |
#define | USB_RXMAXP7_MAXLOAD_M 0x000007FF |
#define | USB_RXMAXP7_MAXLOAD_S 0 |
#define | USB_RXCSRL7_CLRDT 0x00000080 |
#define | USB_RXCSRL7_STALLED 0x00000040 |
#define | USB_RXCSRL7_REQPKT 0x00000020 |
#define | USB_RXCSRL7_STALL 0x00000020 |
#define | USB_RXCSRL7_FLUSH 0x00000010 |
#define | USB_RXCSRL7_DATAERR 0x00000008 |
#define | USB_RXCSRL7_NAKTO 0x00000008 |
#define | USB_RXCSRL7_ERROR 0x00000004 |
#define | USB_RXCSRL7_OVER 0x00000004 |
#define | USB_RXCSRL7_FULL 0x00000002 |
#define | USB_RXCSRL7_RXRDY 0x00000001 |
#define | USB_RXCSRH7_AUTOCL 0x00000080 |
#define | USB_RXCSRH7_ISO 0x00000040 |
#define | USB_RXCSRH7_AUTORQ 0x00000040 |
#define | USB_RXCSRH7_DMAEN 0x00000020 |
#define | USB_RXCSRH7_PIDERR 0x00000010 |
#define | USB_RXCSRH7_DISNYET 0x00000010 |
#define | USB_RXCSRH7_DMAMOD 0x00000008 |
#define | USB_RXCSRH7_DTWE 0x00000004 |
#define | USB_RXCSRH7_DT 0x00000002 |
#define | USB_RXCOUNT7_COUNT_M 0x00001FFF |
#define | USB_RXCOUNT7_COUNT_S 0 |
#define | USB_TXTYPE7_SPEED_M 0x000000C0 |
#define | USB_TXTYPE7_SPEED_DFLT 0x00000000 |
#define | USB_TXTYPE7_SPEED_FULL 0x00000080 |
#define | USB_TXTYPE7_SPEED_LOW 0x000000C0 |
#define | USB_TXTYPE7_PROTO_M 0x00000030 |
#define | USB_TXTYPE7_PROTO_CTRL 0x00000000 |
#define | USB_TXTYPE7_PROTO_ISOC 0x00000010 |
#define | USB_TXTYPE7_PROTO_BULK 0x00000020 |
#define | USB_TXTYPE7_PROTO_INT 0x00000030 |
#define | USB_TXTYPE7_TEP_M 0x0000000F |
#define | USB_TXTYPE7_TEP_S 0 |
#define | USB_TXINTERVAL7_TXPOLL_M 0x000000FF |
#define | USB_TXINTERVAL7_NAKLMT_M 0x000000FF |
#define | USB_TXINTERVAL7_NAKLMT_S 0 |
#define | USB_TXINTERVAL7_TXPOLL_S 0 |
#define | USB_RXTYPE7_SPEED_M 0x000000C0 |
#define | USB_RXTYPE7_SPEED_DFLT 0x00000000 |
#define | USB_RXTYPE7_SPEED_FULL 0x00000080 |
#define | USB_RXTYPE7_SPEED_LOW 0x000000C0 |
#define | USB_RXTYPE7_PROTO_M 0x00000030 |
#define | USB_RXTYPE7_PROTO_CTRL 0x00000000 |
#define | USB_RXTYPE7_PROTO_ISOC 0x00000010 |
#define | USB_RXTYPE7_PROTO_BULK 0x00000020 |
#define | USB_RXTYPE7_PROTO_INT 0x00000030 |
#define | USB_RXTYPE7_TEP_M 0x0000000F |
#define | USB_RXTYPE7_TEP_S 0 |
#define | USB_RXINTERVAL7_TXPOLL_M 0x000000FF |
#define | USB_RXINTERVAL7_NAKLMT_M 0x000000FF |
#define | USB_RXINTERVAL7_NAKLMT_S 0 |
#define | USB_RXINTERVAL7_TXPOLL_S 0 |
#define | USB_RQPKTCOUNT1_M 0x0000FFFF |
#define | USB_RQPKTCOUNT1_S 0 |
#define | USB_RQPKTCOUNT2_M 0x0000FFFF |
#define | USB_RQPKTCOUNT2_S 0 |
#define | USB_RQPKTCOUNT3_M 0x0000FFFF |
#define | USB_RQPKTCOUNT3_S 0 |
#define | USB_RQPKTCOUNT4_COUNT_M 0x0000FFFF |
#define | USB_RQPKTCOUNT4_COUNT_S 0 |
#define | USB_RQPKTCOUNT5_COUNT_M 0x0000FFFF |
#define | USB_RQPKTCOUNT5_COUNT_S 0 |
#define | USB_RQPKTCOUNT6_COUNT_M 0x0000FFFF |
#define | USB_RQPKTCOUNT6_COUNT_S 0 |
#define | USB_RQPKTCOUNT7_COUNT_M 0x0000FFFF |
#define | USB_RQPKTCOUNT7_COUNT_S 0 |
#define | USB_RXDPKTBUFDIS_EP7 0x00000080 |
#define | USB_RXDPKTBUFDIS_EP6 0x00000040 |
#define | USB_RXDPKTBUFDIS_EP5 0x00000020 |
#define | USB_RXDPKTBUFDIS_EP4 0x00000010 |
#define | USB_RXDPKTBUFDIS_EP3 0x00000008 |
#define | USB_RXDPKTBUFDIS_EP2 0x00000004 |
#define | USB_RXDPKTBUFDIS_EP1 0x00000002 |
#define | USB_TXDPKTBUFDIS_EP7 0x00000080 |
#define | USB_TXDPKTBUFDIS_EP6 0x00000040 |
#define | USB_TXDPKTBUFDIS_EP5 0x00000020 |
#define | USB_TXDPKTBUFDIS_EP4 0x00000010 |
#define | USB_TXDPKTBUFDIS_EP3 0x00000008 |
#define | USB_TXDPKTBUFDIS_EP2 0x00000004 |
#define | USB_TXDPKTBUFDIS_EP1 0x00000002 |
#define | USB_EPC_PFLTACT_M 0x00000300 |
#define | USB_EPC_PFLTACT_UNCHG 0x00000000 |
#define | USB_EPC_PFLTACT_TRIS 0x00000100 |
#define | USB_EPC_PFLTACT_LOW 0x00000200 |
#define | USB_EPC_PFLTACT_HIGH 0x00000300 |
#define | USB_EPC_PFLTAEN 0x00000040 |
#define | USB_EPC_PFLTSEN_HIGH 0x00000020 |
#define | USB_EPC_PFLTEN 0x00000010 |
#define | USB_EPC_EPENDE 0x00000004 |
#define | USB_EPC_EPEN_M 0x00000003 |
#define | USB_EPC_EPEN_LOW 0x00000000 |
#define | USB_EPC_EPEN_HIGH 0x00000001 |
#define | USB_EPC_EPEN_VBLOW 0x00000002 |
#define | USB_EPC_EPEN_VBHIGH 0x00000003 |
#define | USB_EPCRIS_PF 0x00000001 |
#define | USB_EPCIM_PF 0x00000001 |
#define | USB_EPCISC_PF 0x00000001 |
#define | USB_DRRIS_RESUME 0x00000001 |
#define | USB_DRIM_RESUME 0x00000001 |
#define | USB_DRISC_RESUME 0x00000001 |
#define | USB_GPCS_DEVMODOTG 0x00000002 |
#define | USB_GPCS_DEVMOD 0x00000001 |
#define | USB_VDC_VBDEN 0x00000001 |
#define | USB_VDCRIS_VD 0x00000001 |
#define | USB_VDCIM_VD 0x00000001 |
#define | USB_VDCISC_VD 0x00000001 |
#define | USB_IDVRIS_ID 0x00000001 |
#define | USB_IDVIM_ID 0x00000001 |
#define | USB_IDVISC_ID 0x00000001 |
#define | USB_DMASEL_DMACTX_M 0x00F00000 |
#define | USB_DMASEL_DMACRX_M 0x000F0000 |
#define | USB_DMASEL_DMABTX_M 0x0000F000 |
#define | USB_DMASEL_DMABRX_M 0x00000F00 |
#define | USB_DMASEL_DMAATX_M 0x000000F0 |
#define | USB_DMASEL_DMAARX_M 0x0000000F |
#define | USB_DMASEL_DMACTX_S 20 |
#define | USB_DMASEL_DMACRX_S 16 |
#define | USB_DMASEL_DMABTX_S 12 |
#define | USB_DMASEL_DMABRX_S 8 |
#define | USB_DMASEL_DMAATX_S 4 |
#define | USB_DMASEL_DMAARX_S 0 |
#define | USB_PP_ECNT_M 0x0000FF00 |
#define | USB_PP_USB_M 0x000000C0 |
#define | USB_PP_USB_DEVICE 0x00000040 |
#define | USB_PP_USB_HOSTDEVICE 0x00000080 |
#define | USB_PP_USB_OTG 0x000000C0 |
#define | USB_PP_PHY 0x00000010 |
#define | USB_PP_TYPE_M 0x0000000F |
#define | USB_PP_TYPE_0 0x00000000 |
#define | USB_PP_ECNT_S 8 |
#define | EEPROM_EESIZE_BLKCNT_M 0x07FF0000 |
#define | EEPROM_EESIZE_WORDCNT_M 0x0000FFFF |
#define | EEPROM_EESIZE_BLKCNT_S 16 |
#define | EEPROM_EESIZE_WORDCNT_S 0 |
#define | EEPROM_EEBLOCK_BLOCK_M 0x0000FFFF |
#define | EEPROM_EEBLOCK_BLOCK_S 0 |
#define | EEPROM_EEOFFSET_OFFSET_M 0x0000000F |
#define | EEPROM_EEOFFSET_OFFSET_S 0 |
#define | EEPROM_EERDWR_VALUE_M 0xFFFFFFFF |
#define | EEPROM_EERDWR_VALUE_S 0 |
#define | EEPROM_EERDWRINC_VALUE_M 0xFFFFFFFF |
#define | EEPROM_EERDWRINC_VALUE_S 0 |
#define | EEPROM_EEDONE_WRBUSY 0x00000020 |
#define | EEPROM_EEDONE_NOPERM 0x00000010 |
#define | EEPROM_EEDONE_WKCOPY 0x00000008 |
#define | EEPROM_EEDONE_WKERASE 0x00000004 |
#define | EEPROM_EEDONE_WORKING 0x00000001 |
#define | EEPROM_EESUPP_PRETRY 0x00000008 |
#define | EEPROM_EESUPP_ERETRY 0x00000004 |
#define | EEPROM_EEUNLOCK_UNLOCK_M 0xFFFFFFFF |
#define | EEPROM_EEPROT_ACC 0x00000008 |
#define | EEPROM_EEPROT_PROT_M 0x00000007 |
#define | EEPROM_EEPROT_PROT_RWNPW 0x00000000 |
#define | EEPROM_EEPROT_PROT_RWPW 0x00000001 |
#define | EEPROM_EEPROT_PROT_RONPW 0x00000002 |
#define | EEPROM_EEPASS0_PASS_M 0xFFFFFFFF |
#define | EEPROM_EEPASS0_PASS_S 0 |
#define | EEPROM_EEPASS1_PASS_M 0xFFFFFFFF |
#define | EEPROM_EEPASS1_PASS_S 0 |
#define | EEPROM_EEPASS2_PASS_M 0xFFFFFFFF |
#define | EEPROM_EEPASS2_PASS_S 0 |
#define | EEPROM_EEINT_INT 0x00000001 |
#define | EEPROM_EEHIDE_HN_M 0xFFFFFFFE |
#define | EEPROM_EEDBGME_KEY_M 0xFFFF0000 |
#define | EEPROM_EEDBGME_ME 0x00000001 |
#define | EEPROM_EEDBGME_KEY_S 16 |
#define | EEPROM_PP_SIZE_M 0x0000001F |
#define | EEPROM_PP_SIZE_S 0 |
#define | SYSEXC_RIS_FPIXCRIS 0x00000020 |
#define | SYSEXC_RIS_FPOFCRIS 0x00000010 |
#define | SYSEXC_RIS_FPUFCRIS 0x00000008 |
#define | SYSEXC_RIS_FPIOCRIS 0x00000004 |
#define | SYSEXC_RIS_FPDZCRIS 0x00000002 |
#define | SYSEXC_RIS_FPIDCRIS 0x00000001 |
#define | SYSEXC_IM_FPIXCIM 0x00000020 |
#define | SYSEXC_IM_FPOFCIM 0x00000010 |
#define | SYSEXC_IM_FPUFCIM 0x00000008 |
#define | SYSEXC_IM_FPIOCIM 0x00000004 |
#define | SYSEXC_IM_FPDZCIM 0x00000002 |
#define | SYSEXC_IM_FPIDCIM 0x00000001 |
#define | SYSEXC_MIS_FPIXCMIS 0x00000020 |
#define | SYSEXC_MIS_FPOFCMIS 0x00000010 |
#define | SYSEXC_MIS_FPUFCMIS 0x00000008 |
#define | SYSEXC_MIS_FPIOCMIS 0x00000004 |
#define | SYSEXC_MIS_FPDZCMIS 0x00000002 |
#define | SYSEXC_MIS_FPIDCMIS 0x00000001 |
#define | SYSEXC_IC_FPIXCIC 0x00000020 |
#define | SYSEXC_IC_FPOFCIC 0x00000010 |
#define | SYSEXC_IC_FPUFCIC 0x00000008 |
#define | SYSEXC_IC_FPIOCIC 0x00000004 |
#define | SYSEXC_IC_FPDZCIC 0x00000002 |
#define | SYSEXC_IC_FPIDCIC 0x00000001 |
#define | FLASH_FMA_OFFSET_M 0x0001FFFF |
#define | FLASH_FMA_OFFSET_S 0 |
#define | FLASH_FMD_DATA_M 0xFFFFFFFF |
#define | FLASH_FMD_DATA_S 0 |
#define | FLASH_FMC_WRKEY 0xA4420000 |
#define | FLASH_FMC_COMT 0x00000008 |
#define | FLASH_FMC_MERASE 0x00000004 |
#define | FLASH_FMC_ERASE 0x00000002 |
#define | FLASH_FMC_WRITE 0x00000001 |
#define | FLASH_FCRIS_PROGRIS 0x00002000 |
#define | FLASH_FCRIS_ERRIS 0x00000800 |
#define | FLASH_FCRIS_INVDRIS 0x00000400 |
#define | FLASH_FCRIS_VOLTRIS 0x00000200 |
#define | FLASH_FCRIS_ERIS 0x00000004 |
#define | FLASH_FCRIS_PRIS 0x00000002 |
#define | FLASH_FCRIS_ARIS 0x00000001 |
#define | FLASH_FCIM_PROGMASK 0x00002000 |
#define | FLASH_FCIM_ERMASK 0x00000800 |
#define | FLASH_FCIM_INVDMASK 0x00000400 |
#define | FLASH_FCIM_VOLTMASK 0x00000200 |
#define | FLASH_FCIM_EMASK 0x00000004 |
#define | FLASH_FCIM_PMASK 0x00000002 |
#define | FLASH_FCIM_AMASK 0x00000001 |
#define | FLASH_FCMISC_PROGMISC 0x00002000 |
#define | FLASH_FCMISC_ERMISC 0x00000800 |
#define | FLASH_FCMISC_INVDMISC 0x00000400 |
#define | FLASH_FCMISC_VOLTMISC 0x00000200 |
#define | FLASH_FCMISC_EMISC 0x00000004 |
#define | FLASH_FCMISC_PMISC 0x00000002 |
#define | FLASH_FCMISC_AMISC 0x00000001 |
#define | FLASH_FMC2_WRBUF 0x00000001 |
#define | FLASH_FWBVAL_FWB_M 0xFFFFFFFF |
#define | FLASH_FWBN_DATA_M 0xFFFFFFFF |
#define | FLASH_FSIZE_SIZE_M 0x0000FFFF |
#define | FLASH_FSIZE_SIZE_128KB 0x0000003F |
#define | FLASH_SSIZE_SIZE_M 0x0000FFFF |
#define | FLASH_SSIZE_SIZE_32KB 0x0000007F |
#define | FLASH_ROMSWMAP_SAFERTOS 0x00000001 |
#define | FLASH_RMCTL_BA 0x00000001 |
#define | FLASH_BOOTCFG_NW 0x80000000 |
#define | FLASH_BOOTCFG_PORT_M 0x0000E000 |
#define | FLASH_BOOTCFG_PORT_A 0x00000000 |
#define | FLASH_BOOTCFG_PORT_B 0x00002000 |
#define | FLASH_BOOTCFG_PORT_C 0x00004000 |
#define | FLASH_BOOTCFG_PORT_D 0x00006000 |
#define | FLASH_BOOTCFG_PORT_E 0x00008000 |
#define | FLASH_BOOTCFG_PORT_F 0x0000A000 |
#define | FLASH_BOOTCFG_PORT_G 0x0000C000 |
#define | FLASH_BOOTCFG_PORT_H 0x0000E000 |
#define | FLASH_BOOTCFG_PIN_M 0x00001C00 |
#define | FLASH_BOOTCFG_PIN_0 0x00000000 |
#define | FLASH_BOOTCFG_PIN_1 0x00000400 |
#define | FLASH_BOOTCFG_PIN_2 0x00000800 |
#define | FLASH_BOOTCFG_PIN_3 0x00000C00 |
#define | FLASH_BOOTCFG_PIN_4 0x00001000 |
#define | FLASH_BOOTCFG_PIN_5 0x00001400 |
#define | FLASH_BOOTCFG_PIN_6 0x00001800 |
#define | FLASH_BOOTCFG_PIN_7 0x00001C00 |
#define | FLASH_BOOTCFG_POL 0x00000200 |
#define | FLASH_BOOTCFG_EN 0x00000100 |
#define | FLASH_BOOTCFG_KEY 0x00000010 |
#define | FLASH_BOOTCFG_DBG1 0x00000002 |
#define | FLASH_BOOTCFG_DBG0 0x00000001 |
#define | FLASH_USERREG0_DATA_M 0xFFFFFFFF |
#define | FLASH_USERREG0_DATA_S 0 |
#define | FLASH_USERREG1_DATA_M 0xFFFFFFFF |
#define | FLASH_USERREG1_DATA_S 0 |
#define | FLASH_USERREG2_DATA_M 0xFFFFFFFF |
#define | FLASH_USERREG2_DATA_S 0 |
#define | FLASH_USERREG3_DATA_M 0xFFFFFFFF |
#define | FLASH_USERREG3_DATA_S 0 |
#define | SYSCTL_DID0_VER_M 0x70000000 |
#define | SYSCTL_DID0_VER_1 0x10000000 |
#define | SYSCTL_DID0_CLASS_M 0x00FF0000 |
#define | SYSCTL_DID0_CLASS_TM4C123 0x00050000 |
#define | SYSCTL_DID0_MAJ_M 0x0000FF00 |
#define | SYSCTL_DID0_MAJ_REVA 0x00000000 |
#define | SYSCTL_DID0_MAJ_REVB 0x00000100 |
#define | SYSCTL_DID0_MAJ_REVC 0x00000200 |
#define | SYSCTL_DID0_MIN_M 0x000000FF |
#define | SYSCTL_DID0_MIN_0 0x00000000 |
#define | SYSCTL_DID0_MIN_1 0x00000001 |
#define | SYSCTL_DID0_MIN_2 0x00000002 |
#define | SYSCTL_DID1_VER_M 0xF0000000 |
#define | SYSCTL_DID1_VER_1 0x10000000 |
#define | SYSCTL_DID1_FAM_M 0x0F000000 |
#define | SYSCTL_DID1_FAM_TIVA 0x00000000 |
#define | SYSCTL_DID1_PRTNO_M 0x00FF0000 |
#define | SYSCTL_DID1_PRTNO_TM4C123FE6PM 0x00B00000 |
#define | SYSCTL_DID1_PINCNT_M 0x0000E000 |
#define | SYSCTL_DID1_PINCNT_100 0x00004000 |
#define | SYSCTL_DID1_PINCNT_64 0x00006000 |
#define | SYSCTL_DID1_PINCNT_144 0x00008000 |
#define | SYSCTL_DID1_PINCNT_157 0x0000A000 |
#define | SYSCTL_DID1_PINCNT_128 0x0000C000 |
#define | SYSCTL_DID1_TEMP_M 0x000000E0 |
#define | SYSCTL_DID1_TEMP_I 0x00000020 |
#define | SYSCTL_DID1_TEMP_E 0x00000040 |
#define | SYSCTL_DID1_TEMP_IE 0x00000060 |
#define | SYSCTL_DID1_PKG_M 0x00000018 |
#define | SYSCTL_DID1_PKG_QFP 0x00000008 |
#define | SYSCTL_DID1_PKG_BGA 0x00000010 |
#define | SYSCTL_DID1_ROHS 0x00000004 |
#define | SYSCTL_DID1_QUAL_M 0x00000003 |
#define | SYSCTL_DID1_QUAL_ES 0x00000000 |
#define | SYSCTL_DID1_QUAL_PP 0x00000001 |
#define | SYSCTL_DID1_QUAL_FQ 0x00000002 |
#define | SYSCTL_DC0_SRAMSZ_M 0xFFFF0000 |
#define | SYSCTL_DC0_SRAMSZ_2KB 0x00070000 |
#define | SYSCTL_DC0_SRAMSZ_4KB 0x000F0000 |
#define | SYSCTL_DC0_SRAMSZ_6KB 0x00170000 |
#define | SYSCTL_DC0_SRAMSZ_8KB 0x001F0000 |
#define | SYSCTL_DC0_SRAMSZ_12KB 0x002F0000 |
#define | SYSCTL_DC0_SRAMSZ_16KB 0x003F0000 |
#define | SYSCTL_DC0_SRAMSZ_20KB 0x004F0000 |
#define | SYSCTL_DC0_SRAMSZ_24KB 0x005F0000 |
#define | SYSCTL_DC0_SRAMSZ_32KB 0x007F0000 |
#define | SYSCTL_DC0_FLASHSZ_M 0x0000FFFF |
#define | SYSCTL_DC0_FLASHSZ_8KB 0x00000003 |
#define | SYSCTL_DC0_FLASHSZ_16KB 0x00000007 |
#define | SYSCTL_DC0_FLASHSZ_32KB 0x0000000F |
#define | SYSCTL_DC0_FLASHSZ_64KB 0x0000001F |
#define | SYSCTL_DC0_FLASHSZ_96KB 0x0000002F |
#define | SYSCTL_DC0_FLASHSZ_128K 0x0000003F |
#define | SYSCTL_DC0_FLASHSZ_192K 0x0000005F |
#define | SYSCTL_DC0_FLASHSZ_256K 0x0000007F |
#define | SYSCTL_DC1_WDT1 0x10000000 |
#define | SYSCTL_DC1_CAN1 0x02000000 |
#define | SYSCTL_DC1_CAN0 0x01000000 |
#define | SYSCTL_DC1_PWM1 0x00200000 |
#define | SYSCTL_DC1_PWM0 0x00100000 |
#define | SYSCTL_DC1_ADC1 0x00020000 |
#define | SYSCTL_DC1_ADC0 0x00010000 |
#define | SYSCTL_DC1_MINSYSDIV_M 0x0000F000 |
#define | SYSCTL_DC1_MINSYSDIV_80 0x00001000 |
#define | SYSCTL_DC1_MINSYSDIV_66 0x00002000 |
#define | SYSCTL_DC1_MINSYSDIV_50 0x00003000 |
#define | SYSCTL_DC1_MINSYSDIV_40 0x00004000 |
#define | SYSCTL_DC1_MINSYSDIV_25 0x00007000 |
#define | SYSCTL_DC1_MINSYSDIV_20 0x00009000 |
#define | SYSCTL_DC1_ADC1SPD_M 0x00000C00 |
#define | SYSCTL_DC1_ADC1SPD_125K 0x00000000 |
#define | SYSCTL_DC1_ADC1SPD_250K 0x00000400 |
#define | SYSCTL_DC1_ADC1SPD_500K 0x00000800 |
#define | SYSCTL_DC1_ADC1SPD_1M 0x00000C00 |
#define | SYSCTL_DC1_ADC0SPD_M 0x00000300 |
#define | SYSCTL_DC1_ADC0SPD_125K 0x00000000 |
#define | SYSCTL_DC1_ADC0SPD_250K 0x00000100 |
#define | SYSCTL_DC1_ADC0SPD_500K 0x00000200 |
#define | SYSCTL_DC1_ADC0SPD_1M 0x00000300 |
#define | SYSCTL_DC1_MPU 0x00000080 |
#define | SYSCTL_DC1_HIB 0x00000040 |
#define | SYSCTL_DC1_TEMP 0x00000020 |
#define | SYSCTL_DC1_PLL 0x00000010 |
#define | SYSCTL_DC1_WDT0 0x00000008 |
#define | SYSCTL_DC1_SWO 0x00000004 |
#define | SYSCTL_DC1_SWD 0x00000002 |
#define | SYSCTL_DC1_JTAG 0x00000001 |
#define | SYSCTL_DC2_EPI0 0x40000000 |
#define | SYSCTL_DC2_I2S0 0x10000000 |
#define | SYSCTL_DC2_COMP2 0x04000000 |
#define | SYSCTL_DC2_COMP1 0x02000000 |
#define | SYSCTL_DC2_COMP0 0x01000000 |
#define | SYSCTL_DC2_TIMER3 0x00080000 |
#define | SYSCTL_DC2_TIMER2 0x00040000 |
#define | SYSCTL_DC2_TIMER1 0x00020000 |
#define | SYSCTL_DC2_TIMER0 0x00010000 |
#define | SYSCTL_DC2_I2C1HS 0x00008000 |
#define | SYSCTL_DC2_I2C1 0x00004000 |
#define | SYSCTL_DC2_I2C0HS 0x00002000 |
#define | SYSCTL_DC2_I2C0 0x00001000 |
#define | SYSCTL_DC2_QEI1 0x00000200 |
#define | SYSCTL_DC2_QEI0 0x00000100 |
#define | SYSCTL_DC2_SSI1 0x00000020 |
#define | SYSCTL_DC2_SSI0 0x00000010 |
#define | SYSCTL_DC2_UART2 0x00000004 |
#define | SYSCTL_DC2_UART1 0x00000002 |
#define | SYSCTL_DC2_UART0 0x00000001 |
#define | SYSCTL_DC3_32KHZ 0x80000000 |
#define | SYSCTL_DC3_CCP5 0x20000000 |
#define | SYSCTL_DC3_CCP4 0x10000000 |
#define | SYSCTL_DC3_CCP3 0x08000000 |
#define | SYSCTL_DC3_CCP2 0x04000000 |
#define | SYSCTL_DC3_CCP1 0x02000000 |
#define | SYSCTL_DC3_CCP0 0x01000000 |
#define | SYSCTL_DC3_ADC0AIN7 0x00800000 |
#define | SYSCTL_DC3_ADC0AIN6 0x00400000 |
#define | SYSCTL_DC3_ADC0AIN5 0x00200000 |
#define | SYSCTL_DC3_ADC0AIN4 0x00100000 |
#define | SYSCTL_DC3_ADC0AIN3 0x00080000 |
#define | SYSCTL_DC3_ADC0AIN2 0x00040000 |
#define | SYSCTL_DC3_ADC0AIN1 0x00020000 |
#define | SYSCTL_DC3_ADC0AIN0 0x00010000 |
#define | SYSCTL_DC3_PWMFAULT 0x00008000 |
#define | SYSCTL_DC3_C2O 0x00004000 |
#define | SYSCTL_DC3_C2PLUS 0x00002000 |
#define | SYSCTL_DC3_C2MINUS 0x00001000 |
#define | SYSCTL_DC3_C1O 0x00000800 |
#define | SYSCTL_DC3_C1PLUS 0x00000400 |
#define | SYSCTL_DC3_C1MINUS 0x00000200 |
#define | SYSCTL_DC3_C0O 0x00000100 |
#define | SYSCTL_DC3_C0PLUS 0x00000080 |
#define | SYSCTL_DC3_C0MINUS 0x00000040 |
#define | SYSCTL_DC3_PWM5 0x00000020 |
#define | SYSCTL_DC3_PWM4 0x00000010 |
#define | SYSCTL_DC3_PWM3 0x00000008 |
#define | SYSCTL_DC3_PWM2 0x00000004 |
#define | SYSCTL_DC3_PWM1 0x00000002 |
#define | SYSCTL_DC3_PWM0 0x00000001 |
#define | SYSCTL_DC4_EPHY0 0x40000000 |
#define | SYSCTL_DC4_EMAC0 0x10000000 |
#define | SYSCTL_DC4_E1588 0x01000000 |
#define | SYSCTL_DC4_PICAL 0x00040000 |
#define | SYSCTL_DC4_CCP7 0x00008000 |
#define | SYSCTL_DC4_CCP6 0x00004000 |
#define | SYSCTL_DC4_UDMA 0x00002000 |
#define | SYSCTL_DC4_ROM 0x00001000 |
#define | SYSCTL_DC4_GPIOJ 0x00000100 |
#define | SYSCTL_DC4_GPIOH 0x00000080 |
#define | SYSCTL_DC4_GPIOG 0x00000040 |
#define | SYSCTL_DC4_GPIOF 0x00000020 |
#define | SYSCTL_DC4_GPIOE 0x00000010 |
#define | SYSCTL_DC4_GPIOD 0x00000008 |
#define | SYSCTL_DC4_GPIOC 0x00000004 |
#define | SYSCTL_DC4_GPIOB 0x00000002 |
#define | SYSCTL_DC4_GPIOA 0x00000001 |
#define | SYSCTL_DC5_PWMFAULT3 0x08000000 |
#define | SYSCTL_DC5_PWMFAULT2 0x04000000 |
#define | SYSCTL_DC5_PWMFAULT1 0x02000000 |
#define | SYSCTL_DC5_PWMFAULT0 0x01000000 |
#define | SYSCTL_DC5_PWMEFLT 0x00200000 |
#define | SYSCTL_DC5_PWMESYNC 0x00100000 |
#define | SYSCTL_DC5_PWM7 0x00000080 |
#define | SYSCTL_DC5_PWM6 0x00000040 |
#define | SYSCTL_DC5_PWM5 0x00000020 |
#define | SYSCTL_DC5_PWM4 0x00000010 |
#define | SYSCTL_DC5_PWM3 0x00000008 |
#define | SYSCTL_DC5_PWM2 0x00000004 |
#define | SYSCTL_DC5_PWM1 0x00000002 |
#define | SYSCTL_DC5_PWM0 0x00000001 |
#define | SYSCTL_DC6_USB0PHY 0x00000010 |
#define | SYSCTL_DC6_USB0_M 0x00000003 |
#define | SYSCTL_DC6_USB0_DEV 0x00000001 |
#define | SYSCTL_DC6_USB0_HOSTDEV 0x00000002 |
#define | SYSCTL_DC6_USB0_OTG 0x00000003 |
#define | SYSCTL_DC7_DMACH30 0x40000000 |
#define | SYSCTL_DC7_DMACH29 0x20000000 |
#define | SYSCTL_DC7_DMACH28 0x10000000 |
#define | SYSCTL_DC7_DMACH27 0x08000000 |
#define | SYSCTL_DC7_DMACH26 0x04000000 |
#define | SYSCTL_DC7_DMACH25 0x02000000 |
#define | SYSCTL_DC7_DMACH24 0x01000000 |
#define | SYSCTL_DC7_DMACH23 0x00800000 |
#define | SYSCTL_DC7_DMACH22 0x00400000 |
#define | SYSCTL_DC7_DMACH21 0x00200000 |
#define | SYSCTL_DC7_DMACH20 0x00100000 |
#define | SYSCTL_DC7_DMACH19 0x00080000 |
#define | SYSCTL_DC7_DMACH18 0x00040000 |
#define | SYSCTL_DC7_DMACH17 0x00020000 |
#define | SYSCTL_DC7_DMACH16 0x00010000 |
#define | SYSCTL_DC7_DMACH15 0x00008000 |
#define | SYSCTL_DC7_DMACH14 0x00004000 |
#define | SYSCTL_DC7_DMACH13 0x00002000 |
#define | SYSCTL_DC7_DMACH12 0x00001000 |
#define | SYSCTL_DC7_DMACH11 0x00000800 |
#define | SYSCTL_DC7_DMACH10 0x00000400 |
#define | SYSCTL_DC7_DMACH9 0x00000200 |
#define | SYSCTL_DC7_DMACH8 0x00000100 |
#define | SYSCTL_DC7_DMACH7 0x00000080 |
#define | SYSCTL_DC7_DMACH6 0x00000040 |
#define | SYSCTL_DC7_DMACH5 0x00000020 |
#define | SYSCTL_DC7_DMACH4 0x00000010 |
#define | SYSCTL_DC7_DMACH3 0x00000008 |
#define | SYSCTL_DC7_DMACH2 0x00000004 |
#define | SYSCTL_DC7_DMACH1 0x00000002 |
#define | SYSCTL_DC7_DMACH0 0x00000001 |
#define | SYSCTL_DC8_ADC1AIN15 0x80000000 |
#define | SYSCTL_DC8_ADC1AIN14 0x40000000 |
#define | SYSCTL_DC8_ADC1AIN13 0x20000000 |
#define | SYSCTL_DC8_ADC1AIN12 0x10000000 |
#define | SYSCTL_DC8_ADC1AIN11 0x08000000 |
#define | SYSCTL_DC8_ADC1AIN10 0x04000000 |
#define | SYSCTL_DC8_ADC1AIN9 0x02000000 |
#define | SYSCTL_DC8_ADC1AIN8 0x01000000 |
#define | SYSCTL_DC8_ADC1AIN7 0x00800000 |
#define | SYSCTL_DC8_ADC1AIN6 0x00400000 |
#define | SYSCTL_DC8_ADC1AIN5 0x00200000 |
#define | SYSCTL_DC8_ADC1AIN4 0x00100000 |
#define | SYSCTL_DC8_ADC1AIN3 0x00080000 |
#define | SYSCTL_DC8_ADC1AIN2 0x00040000 |
#define | SYSCTL_DC8_ADC1AIN1 0x00020000 |
#define | SYSCTL_DC8_ADC1AIN0 0x00010000 |
#define | SYSCTL_DC8_ADC0AIN15 0x00008000 |
#define | SYSCTL_DC8_ADC0AIN14 0x00004000 |
#define | SYSCTL_DC8_ADC0AIN13 0x00002000 |
#define | SYSCTL_DC8_ADC0AIN12 0x00001000 |
#define | SYSCTL_DC8_ADC0AIN11 0x00000800 |
#define | SYSCTL_DC8_ADC0AIN10 0x00000400 |
#define | SYSCTL_DC8_ADC0AIN9 0x00000200 |
#define | SYSCTL_DC8_ADC0AIN8 0x00000100 |
#define | SYSCTL_DC8_ADC0AIN7 0x00000080 |
#define | SYSCTL_DC8_ADC0AIN6 0x00000040 |
#define | SYSCTL_DC8_ADC0AIN5 0x00000020 |
#define | SYSCTL_DC8_ADC0AIN4 0x00000010 |
#define | SYSCTL_DC8_ADC0AIN3 0x00000008 |
#define | SYSCTL_DC8_ADC0AIN2 0x00000004 |
#define | SYSCTL_DC8_ADC0AIN1 0x00000002 |
#define | SYSCTL_DC8_ADC0AIN0 0x00000001 |
#define | SYSCTL_PBORCTL_BOR0 0x00000004 |
#define | SYSCTL_PBORCTL_BOR1 0x00000002 |
#define | SYSCTL_SRCR0_WDT1 0x10000000 |
#define | SYSCTL_SRCR0_CAN1 0x02000000 |
#define | SYSCTL_SRCR0_CAN0 0x01000000 |
#define | SYSCTL_SRCR0_PWM0 0x00100000 |
#define | SYSCTL_SRCR0_ADC1 0x00020000 |
#define | SYSCTL_SRCR0_ADC0 0x00010000 |
#define | SYSCTL_SRCR0_WDT0 0x00000008 |
#define | SYSCTL_SRCR1_COMP1 0x02000000 |
#define | SYSCTL_SRCR1_COMP0 0x01000000 |
#define | SYSCTL_SRCR1_TIMER3 0x00080000 |
#define | SYSCTL_SRCR1_TIMER2 0x00040000 |
#define | SYSCTL_SRCR1_TIMER1 0x00020000 |
#define | SYSCTL_SRCR1_TIMER0 0x00010000 |
#define | SYSCTL_SRCR1_I2C1 0x00004000 |
#define | SYSCTL_SRCR1_I2C0 0x00001000 |
#define | SYSCTL_SRCR1_QEI1 0x00000200 |
#define | SYSCTL_SRCR1_QEI0 0x00000100 |
#define | SYSCTL_SRCR1_SSI1 0x00000020 |
#define | SYSCTL_SRCR1_SSI0 0x00000010 |
#define | SYSCTL_SRCR1_UART2 0x00000004 |
#define | SYSCTL_SRCR1_UART1 0x00000002 |
#define | SYSCTL_SRCR1_UART0 0x00000001 |
#define | SYSCTL_SRCR2_USB0 0x00010000 |
#define | SYSCTL_SRCR2_UDMA 0x00002000 |
#define | SYSCTL_SRCR2_GPIOG 0x00000040 |
#define | SYSCTL_SRCR2_GPIOF 0x00000020 |
#define | SYSCTL_SRCR2_GPIOE 0x00000010 |
#define | SYSCTL_SRCR2_GPIOD 0x00000008 |
#define | SYSCTL_SRCR2_GPIOC 0x00000004 |
#define | SYSCTL_SRCR2_GPIOB 0x00000002 |
#define | SYSCTL_SRCR2_GPIOA 0x00000001 |
#define | SYSCTL_RIS_BOR0RIS 0x00000800 |
#define | SYSCTL_RIS_VDDARIS 0x00000400 |
#define | SYSCTL_RIS_MOSCPUPRIS 0x00000100 |
#define | SYSCTL_RIS_USBPLLLRIS 0x00000080 |
#define | SYSCTL_RIS_PLLLRIS 0x00000040 |
#define | SYSCTL_RIS_MOFRIS 0x00000008 |
#define | SYSCTL_RIS_BOR1RIS 0x00000002 |
#define | SYSCTL_IMC_BOR0IM 0x00000800 |
#define | SYSCTL_IMC_VDDAIM 0x00000400 |
#define | SYSCTL_IMC_MOSCPUPIM 0x00000100 |
#define | SYSCTL_IMC_USBPLLLIM 0x00000080 |
#define | SYSCTL_IMC_PLLLIM 0x00000040 |
#define | SYSCTL_IMC_MOFIM 0x00000008 |
#define | SYSCTL_IMC_BOR1IM 0x00000002 |
#define | SYSCTL_MISC_BOR0MIS 0x00000800 |
#define | SYSCTL_MISC_VDDAMIS 0x00000400 |
#define | SYSCTL_MISC_MOSCPUPMIS 0x00000100 |
#define | SYSCTL_MISC_USBPLLLMIS 0x00000080 |
#define | SYSCTL_MISC_PLLLMIS 0x00000040 |
#define | SYSCTL_MISC_MOFMIS 0x00000008 |
#define | SYSCTL_MISC_BOR1MIS 0x00000002 |
#define | SYSCTL_RESC_MOSCFAIL 0x00010000 |
#define | SYSCTL_RESC_WDT1 0x00000020 |
#define | SYSCTL_RESC_SW 0x00000010 |
#define | SYSCTL_RESC_WDT0 0x00000008 |
#define | SYSCTL_RESC_BOR 0x00000004 |
#define | SYSCTL_RESC_POR 0x00000002 |
#define | SYSCTL_RESC_EXT 0x00000001 |
#define | SYSCTL_RCC_ACG 0x08000000 |
#define | SYSCTL_RCC_SYSDIV_M 0x07800000 |
#define | SYSCTL_RCC_USESYSDIV 0x00400000 |
#define | SYSCTL_RCC_USEPWMDIV 0x00100000 |
#define | SYSCTL_RCC_PWMDIV_M 0x000E0000 |
#define | SYSCTL_RCC_PWMDIV_2 0x00000000 |
#define | SYSCTL_RCC_PWMDIV_4 0x00020000 |
#define | SYSCTL_RCC_PWMDIV_8 0x00040000 |
#define | SYSCTL_RCC_PWMDIV_16 0x00060000 |
#define | SYSCTL_RCC_PWMDIV_32 0x00080000 |
#define | SYSCTL_RCC_PWMDIV_64 0x000A0000 |
#define | SYSCTL_RCC_PWRDN 0x00002000 |
#define | SYSCTL_RCC_BYPASS 0x00000800 |
#define | SYSCTL_RCC_XTAL_M 0x000007C0 |
#define | SYSCTL_RCC_XTAL_4MHZ 0x00000180 |
#define | SYSCTL_RCC_XTAL_4_09MHZ 0x000001C0 |
#define | SYSCTL_RCC_XTAL_4_91MHZ 0x00000200 |
#define | SYSCTL_RCC_XTAL_5MHZ 0x00000240 |
#define | SYSCTL_RCC_XTAL_5_12MHZ 0x00000280 |
#define | SYSCTL_RCC_XTAL_6MHZ 0x000002C0 |
#define | SYSCTL_RCC_XTAL_6_14MHZ 0x00000300 |
#define | SYSCTL_RCC_XTAL_7_37MHZ 0x00000340 |
#define | SYSCTL_RCC_XTAL_8MHZ 0x00000380 |
#define | SYSCTL_RCC_XTAL_8_19MHZ 0x000003C0 |
#define | SYSCTL_RCC_XTAL_10MHZ 0x00000400 |
#define | SYSCTL_RCC_XTAL_12MHZ 0x00000440 |
#define | SYSCTL_RCC_XTAL_12_2MHZ 0x00000480 |
#define | SYSCTL_RCC_XTAL_13_5MHZ 0x000004C0 |
#define | SYSCTL_RCC_XTAL_14_3MHZ 0x00000500 |
#define | SYSCTL_RCC_XTAL_16MHZ 0x00000540 |
#define | SYSCTL_RCC_XTAL_16_3MHZ 0x00000580 |
#define | SYSCTL_RCC_XTAL_18MHZ 0x000005C0 |
#define | SYSCTL_RCC_XTAL_20MHZ 0x00000600 |
#define | SYSCTL_RCC_XTAL_24MHZ 0x00000640 |
#define | SYSCTL_RCC_XTAL_25MHZ 0x00000680 |
#define | SYSCTL_RCC_OSCSRC_M 0x00000030 |
#define | SYSCTL_RCC_OSCSRC_MAIN 0x00000000 |
#define | SYSCTL_RCC_OSCSRC_INT 0x00000010 |
#define | SYSCTL_RCC_OSCSRC_INT4 0x00000020 |
#define | SYSCTL_RCC_OSCSRC_30 0x00000030 |
#define | SYSCTL_RCC_MOSCDIS 0x00000001 |
#define | SYSCTL_RCC_SYSDIV_S 23 |
#define | SYSCTL_GPIOHBCTL_PORTG 0x00000040 |
#define | SYSCTL_GPIOHBCTL_PORTF 0x00000020 |
#define | SYSCTL_GPIOHBCTL_PORTE 0x00000010 |
#define | SYSCTL_GPIOHBCTL_PORTD 0x00000008 |
#define | SYSCTL_GPIOHBCTL_PORTC 0x00000004 |
#define | SYSCTL_GPIOHBCTL_PORTB 0x00000002 |
#define | SYSCTL_GPIOHBCTL_PORTA 0x00000001 |
#define | SYSCTL_RCC2_USERCC2 0x80000000 |
#define | SYSCTL_RCC2_DIV400 0x40000000 |
#define | SYSCTL_RCC2_SYSDIV2_M 0x1F800000 |
#define | SYSCTL_RCC2_SYSDIV2LSB 0x00400000 |
#define | SYSCTL_RCC2_USBPWRDN 0x00004000 |
#define | SYSCTL_RCC2_PWRDN2 0x00002000 |
#define | SYSCTL_RCC2_BYPASS2 0x00000800 |
#define | SYSCTL_RCC2_OSCSRC2_M 0x00000070 |
#define | SYSCTL_RCC2_OSCSRC2_MO 0x00000000 |
#define | SYSCTL_RCC2_OSCSRC2_IO 0x00000010 |
#define | SYSCTL_RCC2_OSCSRC2_IO4 0x00000020 |
#define | SYSCTL_RCC2_OSCSRC2_30 0x00000030 |
#define | SYSCTL_RCC2_SYSDIV2_S 23 |
#define | SYSCTL_MOSCCTL_NOXTAL 0x00000004 |
#define | SYSCTL_MOSCCTL_MOSCIM 0x00000002 |
#define | SYSCTL_MOSCCTL_CVAL 0x00000001 |
#define | SYSCTL_RCGC0_WDT1 0x10000000 |
#define | SYSCTL_RCGC0_CAN1 0x02000000 |
#define | SYSCTL_RCGC0_CAN0 0x01000000 |
#define | SYSCTL_RCGC0_PWM0 0x00100000 |
#define | SYSCTL_RCGC0_ADC1 0x00020000 |
#define | SYSCTL_RCGC0_ADC0 0x00010000 |
#define | SYSCTL_RCGC0_ADC1SPD_M 0x00000C00 |
#define | SYSCTL_RCGC0_ADC1SPD_125K 0x00000000 |
#define | SYSCTL_RCGC0_ADC1SPD_250K 0x00000400 |
#define | SYSCTL_RCGC0_ADC1SPD_500K 0x00000800 |
#define | SYSCTL_RCGC0_ADC1SPD_1M 0x00000C00 |
#define | SYSCTL_RCGC0_ADC0SPD_M 0x00000300 |
#define | SYSCTL_RCGC0_ADC0SPD_125K 0x00000000 |
#define | SYSCTL_RCGC0_ADC0SPD_250K 0x00000100 |
#define | SYSCTL_RCGC0_ADC0SPD_500K 0x00000200 |
#define | SYSCTL_RCGC0_ADC0SPD_1M 0x00000300 |
#define | SYSCTL_RCGC0_WDT0 0x00000008 |
#define | SYSCTL_RCGC1_COMP1 0x02000000 |
#define | SYSCTL_RCGC1_COMP0 0x01000000 |
#define | SYSCTL_RCGC1_TIMER3 0x00080000 |
#define | SYSCTL_RCGC1_TIMER2 0x00040000 |
#define | SYSCTL_RCGC1_TIMER1 0x00020000 |
#define | SYSCTL_RCGC1_TIMER0 0x00010000 |
#define | SYSCTL_RCGC1_I2C1 0x00004000 |
#define | SYSCTL_RCGC1_I2C0 0x00001000 |
#define | SYSCTL_RCGC1_QEI1 0x00000200 |
#define | SYSCTL_RCGC1_QEI0 0x00000100 |
#define | SYSCTL_RCGC1_SSI1 0x00000020 |
#define | SYSCTL_RCGC1_SSI0 0x00000010 |
#define | SYSCTL_RCGC1_UART2 0x00000004 |
#define | SYSCTL_RCGC1_UART1 0x00000002 |
#define | SYSCTL_RCGC1_UART0 0x00000001 |
#define | SYSCTL_RCGC2_USB0 0x00010000 |
#define | SYSCTL_RCGC2_UDMA 0x00002000 |
#define | SYSCTL_RCGC2_GPIOG 0x00000040 |
#define | SYSCTL_RCGC2_GPIOF 0x00000020 |
#define | SYSCTL_RCGC2_GPIOE 0x00000010 |
#define | SYSCTL_RCGC2_GPIOD 0x00000008 |
#define | SYSCTL_RCGC2_GPIOC 0x00000004 |
#define | SYSCTL_RCGC2_GPIOB 0x00000002 |
#define | SYSCTL_RCGC2_GPIOA 0x00000001 |
#define | SYSCTL_SCGC0_WDT1 0x10000000 |
#define | SYSCTL_SCGC0_CAN1 0x02000000 |
#define | SYSCTL_SCGC0_CAN0 0x01000000 |
#define | SYSCTL_SCGC0_PWM0 0x00100000 |
#define | SYSCTL_SCGC0_ADC1 0x00020000 |
#define | SYSCTL_SCGC0_ADC0 0x00010000 |
#define | SYSCTL_SCGC0_WDT0 0x00000008 |
#define | SYSCTL_SCGC1_COMP1 0x02000000 |
#define | SYSCTL_SCGC1_COMP0 0x01000000 |
#define | SYSCTL_SCGC1_TIMER3 0x00080000 |
#define | SYSCTL_SCGC1_TIMER2 0x00040000 |
#define | SYSCTL_SCGC1_TIMER1 0x00020000 |
#define | SYSCTL_SCGC1_TIMER0 0x00010000 |
#define | SYSCTL_SCGC1_I2C1 0x00004000 |
#define | SYSCTL_SCGC1_I2C0 0x00001000 |
#define | SYSCTL_SCGC1_QEI1 0x00000200 |
#define | SYSCTL_SCGC1_QEI0 0x00000100 |
#define | SYSCTL_SCGC1_SSI1 0x00000020 |
#define | SYSCTL_SCGC1_SSI0 0x00000010 |
#define | SYSCTL_SCGC1_UART2 0x00000004 |
#define | SYSCTL_SCGC1_UART1 0x00000002 |
#define | SYSCTL_SCGC1_UART0 0x00000001 |
#define | SYSCTL_SCGC2_USB0 0x00010000 |
#define | SYSCTL_SCGC2_UDMA 0x00002000 |
#define | SYSCTL_SCGC2_GPIOG 0x00000040 |
#define | SYSCTL_SCGC2_GPIOF 0x00000020 |
#define | SYSCTL_SCGC2_GPIOE 0x00000010 |
#define | SYSCTL_SCGC2_GPIOD 0x00000008 |
#define | SYSCTL_SCGC2_GPIOC 0x00000004 |
#define | SYSCTL_SCGC2_GPIOB 0x00000002 |
#define | SYSCTL_SCGC2_GPIOA 0x00000001 |
#define | SYSCTL_DCGC0_WDT1 0x10000000 |
#define | SYSCTL_DCGC0_CAN1 0x02000000 |
#define | SYSCTL_DCGC0_CAN0 0x01000000 |
#define | SYSCTL_DCGC0_PWM0 0x00100000 |
#define | SYSCTL_DCGC0_ADC1 0x00020000 |
#define | SYSCTL_DCGC0_ADC0 0x00010000 |
#define | SYSCTL_DCGC0_WDT0 0x00000008 |
#define | SYSCTL_DCGC1_COMP1 0x02000000 |
#define | SYSCTL_DCGC1_COMP0 0x01000000 |
#define | SYSCTL_DCGC1_TIMER3 0x00080000 |
#define | SYSCTL_DCGC1_TIMER2 0x00040000 |
#define | SYSCTL_DCGC1_TIMER1 0x00020000 |
#define | SYSCTL_DCGC1_TIMER0 0x00010000 |
#define | SYSCTL_DCGC1_I2C1 0x00004000 |
#define | SYSCTL_DCGC1_I2C0 0x00001000 |
#define | SYSCTL_DCGC1_QEI1 0x00000200 |
#define | SYSCTL_DCGC1_QEI0 0x00000100 |
#define | SYSCTL_DCGC1_SSI1 0x00000020 |
#define | SYSCTL_DCGC1_SSI0 0x00000010 |
#define | SYSCTL_DCGC1_UART2 0x00000004 |
#define | SYSCTL_DCGC1_UART1 0x00000002 |
#define | SYSCTL_DCGC1_UART0 0x00000001 |
#define | SYSCTL_DCGC2_USB0 0x00010000 |
#define | SYSCTL_DCGC2_UDMA 0x00002000 |
#define | SYSCTL_DCGC2_GPIOG 0x00000040 |
#define | SYSCTL_DCGC2_GPIOF 0x00000020 |
#define | SYSCTL_DCGC2_GPIOE 0x00000010 |
#define | SYSCTL_DCGC2_GPIOD 0x00000008 |
#define | SYSCTL_DCGC2_GPIOC 0x00000004 |
#define | SYSCTL_DCGC2_GPIOB 0x00000002 |
#define | SYSCTL_DCGC2_GPIOA 0x00000001 |
#define | SYSCTL_DSLPCLKCFG_D_M 0x1F800000 |
#define | SYSCTL_DSLPCLKCFG_O_M 0x00000070 |
#define | SYSCTL_DSLPCLKCFG_O_IGN 0x00000000 |
#define | SYSCTL_DSLPCLKCFG_O_IO 0x00000010 |
#define | SYSCTL_DSLPCLKCFG_O_30 0x00000030 |
#define | SYSCTL_DSLPCLKCFG_PIOSCPD 0x00000002 |
#define | SYSCTL_DSLPCLKCFG_D_S 23 |
#define | SYSCTL_SYSPROP_FPU 0x00000001 |
#define | SYSCTL_PIOSCCAL_UTEN 0x80000000 |
#define | SYSCTL_PIOSCCAL_UPDATE 0x00000100 |
#define | SYSCTL_PIOSCCAL_UT_M 0x0000007F |
#define | SYSCTL_PIOSCCAL_UT_S 0 |
#define | SYSCTL_PLLFREQ0_MFRAC_M 0x000FFC00 |
#define | SYSCTL_PLLFREQ0_MINT_M 0x000003FF |
#define | SYSCTL_PLLFREQ0_MFRAC_S 10 |
#define | SYSCTL_PLLFREQ0_MINT_S 0 |
#define | SYSCTL_PLLFREQ1_Q_M 0x00001F00 |
#define | SYSCTL_PLLFREQ1_N_M 0x0000001F |
#define | SYSCTL_PLLFREQ1_Q_S 8 |
#define | SYSCTL_PLLFREQ1_N_S 0 |
#define | SYSCTL_PLLSTAT_LOCK 0x00000001 |
#define | SYSCTL_SLPPWRCFG_FLASHPM_M 0x00000030 |
#define | SYSCTL_SLPPWRCFG_FLASHPM_NRM 0x00000000 |
#define | SYSCTL_SLPPWRCFG_FLASHPM_SLP 0x00000020 |
#define | SYSCTL_SLPPWRCFG_SRAMPM_M 0x00000003 |
#define | SYSCTL_SLPPWRCFG_SRAMPM_NRM 0x00000000 |
#define | SYSCTL_SLPPWRCFG_SRAMPM_SBY 0x00000001 |
#define | SYSCTL_SLPPWRCFG_SRAMPM_LP 0x00000003 |
#define | SYSCTL_DSLPPWRCFG_FLASHPM_M 0x00000030 |
#define | SYSCTL_DSLPPWRCFG_FLASHPM_NRM 0x00000000 |
#define | SYSCTL_DSLPPWRCFG_FLASHPM_SLP 0x00000020 |
#define | SYSCTL_DSLPPWRCFG_SRAMPM_M 0x00000003 |
#define | SYSCTL_DSLPPWRCFG_SRAMPM_NRM 0x00000000 |
#define | SYSCTL_DSLPPWRCFG_SRAMPM_SBY 0x00000001 |
#define | SYSCTL_DSLPPWRCFG_SRAMPM_LP 0x00000003 |
#define | SYSCTL_DC9_ADC1DC7 0x00800000 |
#define | SYSCTL_DC9_ADC1DC6 0x00400000 |
#define | SYSCTL_DC9_ADC1DC5 0x00200000 |
#define | SYSCTL_DC9_ADC1DC4 0x00100000 |
#define | SYSCTL_DC9_ADC1DC3 0x00080000 |
#define | SYSCTL_DC9_ADC1DC2 0x00040000 |
#define | SYSCTL_DC9_ADC1DC1 0x00020000 |
#define | SYSCTL_DC9_ADC1DC0 0x00010000 |
#define | SYSCTL_DC9_ADC0DC7 0x00000080 |
#define | SYSCTL_DC9_ADC0DC6 0x00000040 |
#define | SYSCTL_DC9_ADC0DC5 0x00000020 |
#define | SYSCTL_DC9_ADC0DC4 0x00000010 |
#define | SYSCTL_DC9_ADC0DC3 0x00000008 |
#define | SYSCTL_DC9_ADC0DC2 0x00000004 |
#define | SYSCTL_DC9_ADC0DC1 0x00000002 |
#define | SYSCTL_DC9_ADC0DC0 0x00000001 |
#define | SYSCTL_NVMSTAT_FWB 0x00000001 |
#define | SYSCTL_LDOSPCTL_VADJEN 0x80000000 |
#define | SYSCTL_LDOSPCTL_VLDO_M 0x000000FF |
#define | SYSCTL_LDOSPCTL_VLDO_0_90V 0x00000012 |
#define | SYSCTL_LDOSPCTL_VLDO_0_95V 0x00000013 |
#define | SYSCTL_LDOSPCTL_VLDO_1_00V 0x00000014 |
#define | SYSCTL_LDOSPCTL_VLDO_1_05V 0x00000015 |
#define | SYSCTL_LDOSPCTL_VLDO_1_10V 0x00000016 |
#define | SYSCTL_LDOSPCTL_VLDO_1_15V 0x00000017 |
#define | SYSCTL_LDOSPCTL_VLDO_1_20V 0x00000018 |
#define | SYSCTL_LDODPCTL_VADJEN 0x80000000 |
#define | SYSCTL_LDODPCTL_VLDO_M 0x000000FF |
#define | SYSCTL_LDODPCTL_VLDO_0_90V 0x00000012 |
#define | SYSCTL_LDODPCTL_VLDO_0_95V 0x00000013 |
#define | SYSCTL_LDODPCTL_VLDO_1_00V 0x00000014 |
#define | SYSCTL_LDODPCTL_VLDO_1_05V 0x00000015 |
#define | SYSCTL_LDODPCTL_VLDO_1_10V 0x00000016 |
#define | SYSCTL_LDODPCTL_VLDO_1_15V 0x00000017 |
#define | SYSCTL_LDODPCTL_VLDO_1_20V 0x00000018 |
#define | SYSCTL_PPWD_P1 0x00000002 |
#define | SYSCTL_PPWD_P0 0x00000001 |
#define | SYSCTL_PPTIMER_P5 0x00000020 |
#define | SYSCTL_PPTIMER_P4 0x00000010 |
#define | SYSCTL_PPTIMER_P3 0x00000008 |
#define | SYSCTL_PPTIMER_P2 0x00000004 |
#define | SYSCTL_PPTIMER_P1 0x00000002 |
#define | SYSCTL_PPTIMER_P0 0x00000001 |
#define | SYSCTL_PPGPIO_P14 0x00004000 |
#define | SYSCTL_PPGPIO_P13 0x00002000 |
#define | SYSCTL_PPGPIO_P12 0x00001000 |
#define | SYSCTL_PPGPIO_P11 0x00000800 |
#define | SYSCTL_PPGPIO_P10 0x00000400 |
#define | SYSCTL_PPGPIO_P9 0x00000200 |
#define | SYSCTL_PPGPIO_P8 0x00000100 |
#define | SYSCTL_PPGPIO_P7 0x00000080 |
#define | SYSCTL_PPGPIO_P6 0x00000040 |
#define | SYSCTL_PPGPIO_P5 0x00000020 |
#define | SYSCTL_PPGPIO_P4 0x00000010 |
#define | SYSCTL_PPGPIO_P3 0x00000008 |
#define | SYSCTL_PPGPIO_P2 0x00000004 |
#define | SYSCTL_PPGPIO_P1 0x00000002 |
#define | SYSCTL_PPGPIO_P0 0x00000001 |
#define | SYSCTL_PPDMA_P0 0x00000001 |
#define | SYSCTL_PPHIB_P0 0x00000001 |
#define | SYSCTL_PPUART_P7 0x00000080 |
#define | SYSCTL_PPUART_P6 0x00000040 |
#define | SYSCTL_PPUART_P5 0x00000020 |
#define | SYSCTL_PPUART_P4 0x00000010 |
#define | SYSCTL_PPUART_P3 0x00000008 |
#define | SYSCTL_PPUART_P2 0x00000004 |
#define | SYSCTL_PPUART_P1 0x00000002 |
#define | SYSCTL_PPUART_P0 0x00000001 |
#define | SYSCTL_PPSSI_P3 0x00000008 |
#define | SYSCTL_PPSSI_P2 0x00000004 |
#define | SYSCTL_PPSSI_P1 0x00000002 |
#define | SYSCTL_PPSSI_P0 0x00000001 |
#define | SYSCTL_PPI2C_P5 0x00000020 |
#define | SYSCTL_PPI2C_P4 0x00000010 |
#define | SYSCTL_PPI2C_P3 0x00000008 |
#define | SYSCTL_PPI2C_P2 0x00000004 |
#define | SYSCTL_PPI2C_P1 0x00000002 |
#define | SYSCTL_PPI2C_P0 0x00000001 |
#define | SYSCTL_PPUSB_P0 0x00000001 |
#define | SYSCTL_PPCAN_P1 0x00000002 |
#define | SYSCTL_PPCAN_P0 0x00000001 |
#define | SYSCTL_PPADC_P1 0x00000002 |
#define | SYSCTL_PPADC_P0 0x00000001 |
#define | SYSCTL_PPACMP_P0 0x00000001 |
#define | SYSCTL_PPPWM_P1 0x00000002 |
#define | SYSCTL_PPPWM_P0 0x00000001 |
#define | SYSCTL_PPQEI_P1 0x00000002 |
#define | SYSCTL_PPQEI_P0 0x00000001 |
#define | SYSCTL_PPEEPROM_P0 0x00000001 |
#define | SYSCTL_PPWTIMER_P5 0x00000020 |
#define | SYSCTL_PPWTIMER_P4 0x00000010 |
#define | SYSCTL_PPWTIMER_P3 0x00000008 |
#define | SYSCTL_PPWTIMER_P2 0x00000004 |
#define | SYSCTL_PPWTIMER_P1 0x00000002 |
#define | SYSCTL_PPWTIMER_P0 0x00000001 |
#define | SYSCTL_SRWD_R1 0x00000002 |
#define | SYSCTL_SRWD_R0 0x00000001 |
#define | SYSCTL_SRTIMER_R5 0x00000020 |
#define | SYSCTL_SRTIMER_R4 0x00000010 |
#define | SYSCTL_SRTIMER_R3 0x00000008 |
#define | SYSCTL_SRTIMER_R2 0x00000004 |
#define | SYSCTL_SRTIMER_R1 0x00000002 |
#define | SYSCTL_SRTIMER_R0 0x00000001 |
#define | SYSCTL_SRGPIO_R6 0x00000040 |
#define | SYSCTL_SRGPIO_R5 0x00000020 |
#define | SYSCTL_SRGPIO_R4 0x00000010 |
#define | SYSCTL_SRGPIO_R3 0x00000008 |
#define | SYSCTL_SRGPIO_R2 0x00000004 |
#define | SYSCTL_SRGPIO_R1 0x00000002 |
#define | SYSCTL_SRGPIO_R0 0x00000001 |
#define | SYSCTL_SRDMA_R0 0x00000001 |
#define | SYSCTL_SRUART_R7 0x00000080 |
#define | SYSCTL_SRUART_R6 0x00000040 |
#define | SYSCTL_SRUART_R5 0x00000020 |
#define | SYSCTL_SRUART_R4 0x00000010 |
#define | SYSCTL_SRUART_R3 0x00000008 |
#define | SYSCTL_SRUART_R2 0x00000004 |
#define | SYSCTL_SRUART_R1 0x00000002 |
#define | SYSCTL_SRUART_R0 0x00000001 |
#define | SYSCTL_SRSSI_R3 0x00000008 |
#define | SYSCTL_SRSSI_R2 0x00000004 |
#define | SYSCTL_SRSSI_R1 0x00000002 |
#define | SYSCTL_SRSSI_R0 0x00000001 |
#define | SYSCTL_SRI2C_R5 0x00000020 |
#define | SYSCTL_SRI2C_R4 0x00000010 |
#define | SYSCTL_SRI2C_R3 0x00000008 |
#define | SYSCTL_SRI2C_R2 0x00000004 |
#define | SYSCTL_SRI2C_R1 0x00000002 |
#define | SYSCTL_SRI2C_R0 0x00000001 |
#define | SYSCTL_SRUSB_R0 0x00000001 |
#define | SYSCTL_SRCAN_R1 0x00000002 |
#define | SYSCTL_SRCAN_R0 0x00000001 |
#define | SYSCTL_SRADC_R1 0x00000002 |
#define | SYSCTL_SRADC_R0 0x00000001 |
#define | SYSCTL_SRACMP_R0 0x00000001 |
#define | SYSCTL_SRPWM_R1 0x00000002 |
#define | SYSCTL_SRPWM_R0 0x00000001 |
#define | SYSCTL_SRQEI_R1 0x00000002 |
#define | SYSCTL_SRQEI_R0 0x00000001 |
#define | SYSCTL_SREEPROM_R0 0x00000001 |
#define | SYSCTL_SRWTIMER_R5 0x00000020 |
#define | SYSCTL_SRWTIMER_R4 0x00000010 |
#define | SYSCTL_SRWTIMER_R3 0x00000008 |
#define | SYSCTL_SRWTIMER_R2 0x00000004 |
#define | SYSCTL_SRWTIMER_R1 0x00000002 |
#define | SYSCTL_SRWTIMER_R0 0x00000001 |
#define | SYSCTL_RCGCWD_R1 0x00000002 |
#define | SYSCTL_RCGCWD_R0 0x00000001 |
#define | SYSCTL_RCGCTIMER_R5 0x00000020 |
#define | SYSCTL_RCGCTIMER_R4 0x00000010 |
#define | SYSCTL_RCGCTIMER_R3 0x00000008 |
#define | SYSCTL_RCGCTIMER_R2 0x00000004 |
#define | SYSCTL_RCGCTIMER_R1 0x00000002 |
#define | SYSCTL_RCGCTIMER_R0 0x00000001 |
#define | SYSCTL_RCGCGPIO_R6 0x00000040 |
#define | SYSCTL_RCGCGPIO_R5 0x00000020 |
#define | SYSCTL_RCGCGPIO_R4 0x00000010 |
#define | SYSCTL_RCGCGPIO_R3 0x00000008 |
#define | SYSCTL_RCGCGPIO_R2 0x00000004 |
#define | SYSCTL_RCGCGPIO_R1 0x00000002 |
#define | SYSCTL_RCGCGPIO_R0 0x00000001 |
#define | SYSCTL_RCGCDMA_R0 0x00000001 |
#define | SYSCTL_RCGCUART_R7 0x00000080 |
#define | SYSCTL_RCGCUART_R6 0x00000040 |
#define | SYSCTL_RCGCUART_R5 0x00000020 |
#define | SYSCTL_RCGCUART_R4 0x00000010 |
#define | SYSCTL_RCGCUART_R3 0x00000008 |
#define | SYSCTL_RCGCUART_R2 0x00000004 |
#define | SYSCTL_RCGCUART_R1 0x00000002 |
#define | SYSCTL_RCGCUART_R0 0x00000001 |
#define | SYSCTL_RCGCSSI_R3 0x00000008 |
#define | SYSCTL_RCGCSSI_R2 0x00000004 |
#define | SYSCTL_RCGCSSI_R1 0x00000002 |
#define | SYSCTL_RCGCSSI_R0 0x00000001 |
#define | SYSCTL_RCGCI2C_R5 0x00000020 |
#define | SYSCTL_RCGCI2C_R4 0x00000010 |
#define | SYSCTL_RCGCI2C_R3 0x00000008 |
#define | SYSCTL_RCGCI2C_R2 0x00000004 |
#define | SYSCTL_RCGCI2C_R1 0x00000002 |
#define | SYSCTL_RCGCI2C_R0 0x00000001 |
#define | SYSCTL_RCGCUSB_R0 0x00000001 |
#define | SYSCTL_RCGCCAN_R1 0x00000002 |
#define | SYSCTL_RCGCCAN_R0 0x00000001 |
#define | SYSCTL_RCGCADC_R1 0x00000002 |
#define | SYSCTL_RCGCADC_R0 0x00000001 |
#define | SYSCTL_RCGCACMP_R0 0x00000001 |
#define | SYSCTL_RCGCPWM_R1 0x00000002 |
#define | SYSCTL_RCGCPWM_R0 0x00000001 |
#define | SYSCTL_RCGCQEI_R1 0x00000002 |
#define | SYSCTL_RCGCQEI_R0 0x00000001 |
#define | SYSCTL_RCGCEEPROM_R0 0x00000001 |
#define | SYSCTL_RCGCWTIMER_R5 0x00000020 |
#define | SYSCTL_RCGCWTIMER_R4 0x00000010 |
#define | SYSCTL_RCGCWTIMER_R3 0x00000008 |
#define | SYSCTL_RCGCWTIMER_R2 0x00000004 |
#define | SYSCTL_RCGCWTIMER_R1 0x00000002 |
#define | SYSCTL_RCGCWTIMER_R0 0x00000001 |
#define | SYSCTL_SCGCWD_S1 0x00000002 |
#define | SYSCTL_SCGCWD_S0 0x00000001 |
#define | SYSCTL_SCGCTIMER_S5 0x00000020 |
#define | SYSCTL_SCGCTIMER_S4 0x00000010 |
#define | SYSCTL_SCGCTIMER_S3 0x00000008 |
#define | SYSCTL_SCGCTIMER_S2 0x00000004 |
#define | SYSCTL_SCGCTIMER_S1 0x00000002 |
#define | SYSCTL_SCGCTIMER_S0 0x00000001 |
#define | SYSCTL_SCGCGPIO_S6 0x00000040 |
#define | SYSCTL_SCGCGPIO_S5 0x00000020 |
#define | SYSCTL_SCGCGPIO_S4 0x00000010 |
#define | SYSCTL_SCGCGPIO_S3 0x00000008 |
#define | SYSCTL_SCGCGPIO_S2 0x00000004 |
#define | SYSCTL_SCGCGPIO_S1 0x00000002 |
#define | SYSCTL_SCGCGPIO_S0 0x00000001 |
#define | SYSCTL_SCGCDMA_S0 0x00000001 |
#define | SYSCTL_SCGCUART_S7 0x00000080 |
#define | SYSCTL_SCGCUART_S6 0x00000040 |
#define | SYSCTL_SCGCUART_S5 0x00000020 |
#define | SYSCTL_SCGCUART_S4 0x00000010 |
#define | SYSCTL_SCGCUART_S3 0x00000008 |
#define | SYSCTL_SCGCUART_S2 0x00000004 |
#define | SYSCTL_SCGCUART_S1 0x00000002 |
#define | SYSCTL_SCGCUART_S0 0x00000001 |
#define | SYSCTL_SCGCSSI_S3 0x00000008 |
#define | SYSCTL_SCGCSSI_S2 0x00000004 |
#define | SYSCTL_SCGCSSI_S1 0x00000002 |
#define | SYSCTL_SCGCSSI_S0 0x00000001 |
#define | SYSCTL_SCGCI2C_S5 0x00000020 |
#define | SYSCTL_SCGCI2C_S4 0x00000010 |
#define | SYSCTL_SCGCI2C_S3 0x00000008 |
#define | SYSCTL_SCGCI2C_S2 0x00000004 |
#define | SYSCTL_SCGCI2C_S1 0x00000002 |
#define | SYSCTL_SCGCI2C_S0 0x00000001 |
#define | SYSCTL_SCGCUSB_S0 0x00000001 |
#define | SYSCTL_SCGCCAN_S1 0x00000002 |
#define | SYSCTL_SCGCCAN_S0 0x00000001 |
#define | SYSCTL_SCGCADC_S1 0x00000002 |
#define | SYSCTL_SCGCADC_S0 0x00000001 |
#define | SYSCTL_SCGCACMP_S0 0x00000001 |
#define | SYSCTL_SCGCPWM_S1 0x00000002 |
#define | SYSCTL_SCGCPWM_S0 0x00000001 |
#define | SYSCTL_SCGCQEI_S1 0x00000002 |
#define | SYSCTL_SCGCQEI_S0 0x00000001 |
#define | SYSCTL_SCGCEEPROM_S0 0x00000001 |
#define | SYSCTL_SCGCWTIMER_S5 0x00000020 |
#define | SYSCTL_SCGCWTIMER_S4 0x00000010 |
#define | SYSCTL_SCGCWTIMER_S3 0x00000008 |
#define | SYSCTL_SCGCWTIMER_S2 0x00000004 |
#define | SYSCTL_SCGCWTIMER_S1 0x00000002 |
#define | SYSCTL_SCGCWTIMER_S0 0x00000001 |
#define | SYSCTL_DCGCWD_D1 0x00000002 |
#define | SYSCTL_DCGCWD_D0 0x00000001 |
#define | SYSCTL_DCGCTIMER_D5 0x00000020 |
#define | SYSCTL_DCGCTIMER_D4 0x00000010 |
#define | SYSCTL_DCGCTIMER_D3 0x00000008 |
#define | SYSCTL_DCGCTIMER_D2 0x00000004 |
#define | SYSCTL_DCGCTIMER_D1 0x00000002 |
#define | SYSCTL_DCGCTIMER_D0 0x00000001 |
#define | SYSCTL_DCGCGPIO_D6 0x00000040 |
#define | SYSCTL_DCGCGPIO_D5 0x00000020 |
#define | SYSCTL_DCGCGPIO_D4 0x00000010 |
#define | SYSCTL_DCGCGPIO_D3 0x00000008 |
#define | SYSCTL_DCGCGPIO_D2 0x00000004 |
#define | SYSCTL_DCGCGPIO_D1 0x00000002 |
#define | SYSCTL_DCGCGPIO_D0 0x00000001 |
#define | SYSCTL_DCGCDMA_D0 0x00000001 |
#define | SYSCTL_DCGCUART_D7 0x00000080 |
#define | SYSCTL_DCGCUART_D6 0x00000040 |
#define | SYSCTL_DCGCUART_D5 0x00000020 |
#define | SYSCTL_DCGCUART_D4 0x00000010 |
#define | SYSCTL_DCGCUART_D3 0x00000008 |
#define | SYSCTL_DCGCUART_D2 0x00000004 |
#define | SYSCTL_DCGCUART_D1 0x00000002 |
#define | SYSCTL_DCGCUART_D0 0x00000001 |
#define | SYSCTL_DCGCSSI_D3 0x00000008 |
#define | SYSCTL_DCGCSSI_D2 0x00000004 |
#define | SYSCTL_DCGCSSI_D1 0x00000002 |
#define | SYSCTL_DCGCSSI_D0 0x00000001 |
#define | SYSCTL_DCGCI2C_D5 0x00000020 |
#define | SYSCTL_DCGCI2C_D4 0x00000010 |
#define | SYSCTL_DCGCI2C_D3 0x00000008 |
#define | SYSCTL_DCGCI2C_D2 0x00000004 |
#define | SYSCTL_DCGCI2C_D1 0x00000002 |
#define | SYSCTL_DCGCI2C_D0 0x00000001 |
#define | SYSCTL_DCGCUSB_D0 0x00000001 |
#define | SYSCTL_DCGCCAN_D1 0x00000002 |
#define | SYSCTL_DCGCCAN_D0 0x00000001 |
#define | SYSCTL_DCGCADC_D1 0x00000002 |
#define | SYSCTL_DCGCADC_D0 0x00000001 |
#define | SYSCTL_DCGCACMP_D0 0x00000001 |
#define | SYSCTL_DCGCPWM_D1 0x00000002 |
#define | SYSCTL_DCGCPWM_D0 0x00000001 |
#define | SYSCTL_DCGCQEI_D1 0x00000002 |
#define | SYSCTL_DCGCQEI_D0 0x00000001 |
#define | SYSCTL_DCGCEEPROM_D0 0x00000001 |
#define | SYSCTL_DCGCWTIMER_D5 0x00000020 |
#define | SYSCTL_DCGCWTIMER_D4 0x00000010 |
#define | SYSCTL_DCGCWTIMER_D3 0x00000008 |
#define | SYSCTL_DCGCWTIMER_D2 0x00000004 |
#define | SYSCTL_DCGCWTIMER_D1 0x00000002 |
#define | SYSCTL_DCGCWTIMER_D0 0x00000001 |
#define | SYSCTL_PRWD_R1 0x00000002 |
#define | SYSCTL_PRWD_R0 0x00000001 |
#define | SYSCTL_PRTIMER_R5 0x00000020 |
#define | SYSCTL_PRTIMER_R4 0x00000010 |
#define | SYSCTL_PRTIMER_R3 0x00000008 |
#define | SYSCTL_PRTIMER_R2 0x00000004 |
#define | SYSCTL_PRTIMER_R1 0x00000002 |
#define | SYSCTL_PRTIMER_R0 0x00000001 |
#define | SYSCTL_PRGPIO_R6 0x00000040 |
#define | SYSCTL_PRGPIO_R5 0x00000020 |
#define | SYSCTL_PRGPIO_R4 0x00000010 |
#define | SYSCTL_PRGPIO_R3 0x00000008 |
#define | SYSCTL_PRGPIO_R2 0x00000004 |
#define | SYSCTL_PRGPIO_R1 0x00000002 |
#define | SYSCTL_PRGPIO_R0 0x00000001 |
#define | SYSCTL_PRDMA_R0 0x00000001 |
#define | SYSCTL_PRUART_R7 0x00000080 |
#define | SYSCTL_PRUART_R6 0x00000040 |
#define | SYSCTL_PRUART_R5 0x00000020 |
#define | SYSCTL_PRUART_R4 0x00000010 |
#define | SYSCTL_PRUART_R3 0x00000008 |
#define | SYSCTL_PRUART_R2 0x00000004 |
#define | SYSCTL_PRUART_R1 0x00000002 |
#define | SYSCTL_PRUART_R0 0x00000001 |
#define | SYSCTL_PRSSI_R3 0x00000008 |
#define | SYSCTL_PRSSI_R2 0x00000004 |
#define | SYSCTL_PRSSI_R1 0x00000002 |
#define | SYSCTL_PRSSI_R0 0x00000001 |
#define | SYSCTL_PRI2C_R5 0x00000020 |
#define | SYSCTL_PRI2C_R4 0x00000010 |
#define | SYSCTL_PRI2C_R3 0x00000008 |
#define | SYSCTL_PRI2C_R2 0x00000004 |
#define | SYSCTL_PRI2C_R1 0x00000002 |
#define | SYSCTL_PRI2C_R0 0x00000001 |
#define | SYSCTL_PRUSB_R0 0x00000001 |
#define | SYSCTL_PRCAN_R1 0x00000002 |
#define | SYSCTL_PRCAN_R0 0x00000001 |
#define | SYSCTL_PRADC_R1 0x00000002 |
#define | SYSCTL_PRADC_R0 0x00000001 |
#define | SYSCTL_PRACMP_R0 0x00000001 |
#define | SYSCTL_PRPWM_R1 0x00000002 |
#define | SYSCTL_PRPWM_R0 0x00000001 |
#define | SYSCTL_PRQEI_R1 0x00000002 |
#define | SYSCTL_PRQEI_R0 0x00000001 |
#define | SYSCTL_PREEPROM_R0 0x00000001 |
#define | SYSCTL_PRWTIMER_R5 0x00000020 |
#define | SYSCTL_PRWTIMER_R4 0x00000010 |
#define | SYSCTL_PRWTIMER_R3 0x00000008 |
#define | SYSCTL_PRWTIMER_R2 0x00000004 |
#define | SYSCTL_PRWTIMER_R1 0x00000002 |
#define | SYSCTL_PRWTIMER_R0 0x00000001 |
#define | UDMA_STAT_DMACHANS_M 0x001F0000 |
#define | UDMA_STAT_STATE_M 0x000000F0 |
#define | UDMA_STAT_STATE_IDLE 0x00000000 |
#define | UDMA_STAT_STATE_RD_CTRL 0x00000010 |
#define | UDMA_STAT_STATE_RD_SRCENDP 0x00000020 |
#define | UDMA_STAT_STATE_RD_DSTENDP 0x00000030 |
#define | UDMA_STAT_STATE_RD_SRCDAT 0x00000040 |
#define | UDMA_STAT_STATE_WR_DSTDAT 0x00000050 |
#define | UDMA_STAT_STATE_WAIT 0x00000060 |
#define | UDMA_STAT_STATE_WR_CTRL 0x00000070 |
#define | UDMA_STAT_STATE_STALL 0x00000080 |
#define | UDMA_STAT_STATE_DONE 0x00000090 |
#define | UDMA_STAT_STATE_UNDEF 0x000000A0 |
#define | UDMA_STAT_MASTEN 0x00000001 |
#define | UDMA_STAT_DMACHANS_S 16 |
#define | UDMA_CFG_MASTEN 0x00000001 |
#define | UDMA_CTLBASE_ADDR_M 0xFFFFFC00 |
#define | UDMA_CTLBASE_ADDR_S 10 |
#define | UDMA_ALTBASE_ADDR_M 0xFFFFFFFF |
#define | UDMA_ALTBASE_ADDR_S 0 |
#define | UDMA_WAITSTAT_WAITREQ_M 0xFFFFFFFF |
#define | UDMA_SWREQ_M 0xFFFFFFFF |
#define | UDMA_USEBURSTSET_SET_M 0xFFFFFFFF |
#define | UDMA_USEBURSTCLR_CLR_M 0xFFFFFFFF |
#define | UDMA_REQMASKSET_SET_M 0xFFFFFFFF |
#define | UDMA_REQMASKCLR_CLR_M 0xFFFFFFFF |
#define | UDMA_ENASET_SET_M 0xFFFFFFFF |
#define | UDMA_ENACLR_CLR_M 0xFFFFFFFF |
#define | UDMA_ALTSET_SET_M 0xFFFFFFFF |
#define | UDMA_ALTCLR_CLR_M 0xFFFFFFFF |
#define | UDMA_PRIOSET_SET_M 0xFFFFFFFF |
#define | UDMA_PRIOCLR_CLR_M 0xFFFFFFFF |
#define | UDMA_ERRCLR_ERRCLR 0x00000001 |
#define | UDMA_CHASGN_M 0xFFFFFFFF |
#define | UDMA_CHASGN_PRIMARY 0x00000000 |
#define | UDMA_CHASGN_SECONDARY 0x00000001 |
#define | UDMA_CHIS_M 0xFFFFFFFF |
#define | UDMA_CHMAP0_CH7SEL_M 0xF0000000 |
#define | UDMA_CHMAP0_CH6SEL_M 0x0F000000 |
#define | UDMA_CHMAP0_CH5SEL_M 0x00F00000 |
#define | UDMA_CHMAP0_CH4SEL_M 0x000F0000 |
#define | UDMA_CHMAP0_CH3SEL_M 0x0000F000 |
#define | UDMA_CHMAP0_CH2SEL_M 0x00000F00 |
#define | UDMA_CHMAP0_CH1SEL_M 0x000000F0 |
#define | UDMA_CHMAP0_CH0SEL_M 0x0000000F |
#define | UDMA_CHMAP0_CH7SEL_S 28 |
#define | UDMA_CHMAP0_CH6SEL_S 24 |
#define | UDMA_CHMAP0_CH5SEL_S 20 |
#define | UDMA_CHMAP0_CH4SEL_S 16 |
#define | UDMA_CHMAP0_CH3SEL_S 12 |
#define | UDMA_CHMAP0_CH2SEL_S 8 |
#define | UDMA_CHMAP0_CH1SEL_S 4 |
#define | UDMA_CHMAP0_CH0SEL_S 0 |
#define | UDMA_CHMAP1_CH15SEL_M 0xF0000000 |
#define | UDMA_CHMAP1_CH14SEL_M 0x0F000000 |
#define | UDMA_CHMAP1_CH13SEL_M 0x00F00000 |
#define | UDMA_CHMAP1_CH12SEL_M 0x000F0000 |
#define | UDMA_CHMAP1_CH11SEL_M 0x0000F000 |
#define | UDMA_CHMAP1_CH10SEL_M 0x00000F00 |
#define | UDMA_CHMAP1_CH9SEL_M 0x000000F0 |
#define | UDMA_CHMAP1_CH8SEL_M 0x0000000F |
#define | UDMA_CHMAP1_CH15SEL_S 28 |
#define | UDMA_CHMAP1_CH14SEL_S 24 |
#define | UDMA_CHMAP1_CH13SEL_S 20 |
#define | UDMA_CHMAP1_CH12SEL_S 16 |
#define | UDMA_CHMAP1_CH11SEL_S 12 |
#define | UDMA_CHMAP1_CH10SEL_S 8 |
#define | UDMA_CHMAP1_CH9SEL_S 4 |
#define | UDMA_CHMAP1_CH8SEL_S 0 |
#define | UDMA_CHMAP2_CH23SEL_M 0xF0000000 |
#define | UDMA_CHMAP2_CH22SEL_M 0x0F000000 |
#define | UDMA_CHMAP2_CH21SEL_M 0x00F00000 |
#define | UDMA_CHMAP2_CH20SEL_M 0x000F0000 |
#define | UDMA_CHMAP2_CH19SEL_M 0x0000F000 |
#define | UDMA_CHMAP2_CH18SEL_M 0x00000F00 |
#define | UDMA_CHMAP2_CH17SEL_M 0x000000F0 |
#define | UDMA_CHMAP2_CH16SEL_M 0x0000000F |
#define | UDMA_CHMAP2_CH23SEL_S 28 |
#define | UDMA_CHMAP2_CH22SEL_S 24 |
#define | UDMA_CHMAP2_CH21SEL_S 20 |
#define | UDMA_CHMAP2_CH20SEL_S 16 |
#define | UDMA_CHMAP2_CH19SEL_S 12 |
#define | UDMA_CHMAP2_CH18SEL_S 8 |
#define | UDMA_CHMAP2_CH17SEL_S 4 |
#define | UDMA_CHMAP2_CH16SEL_S 0 |
#define | UDMA_CHMAP3_CH31SEL_M 0xF0000000 |
#define | UDMA_CHMAP3_CH30SEL_M 0x0F000000 |
#define | UDMA_CHMAP3_CH29SEL_M 0x00F00000 |
#define | UDMA_CHMAP3_CH28SEL_M 0x000F0000 |
#define | UDMA_CHMAP3_CH27SEL_M 0x0000F000 |
#define | UDMA_CHMAP3_CH26SEL_M 0x00000F00 |
#define | UDMA_CHMAP3_CH25SEL_M 0x000000F0 |
#define | UDMA_CHMAP3_CH24SEL_M 0x0000000F |
#define | UDMA_CHMAP3_CH31SEL_S 28 |
#define | UDMA_CHMAP3_CH30SEL_S 24 |
#define | UDMA_CHMAP3_CH29SEL_S 20 |
#define | UDMA_CHMAP3_CH28SEL_S 16 |
#define | UDMA_CHMAP3_CH27SEL_S 12 |
#define | UDMA_CHMAP3_CH26SEL_S 8 |
#define | UDMA_CHMAP3_CH25SEL_S 4 |
#define | UDMA_CHMAP3_CH24SEL_S 0 |
#define | UDMA_SRCENDP_ADDR_M 0xFFFFFFFF |
#define | UDMA_SRCENDP_ADDR_S 0 |
#define | UDMA_DSTENDP_ADDR_M 0xFFFFFFFF |
#define | UDMA_DSTENDP_ADDR_S 0 |
#define | UDMA_CHCTL_DSTINC_M 0xC0000000 |
#define | UDMA_CHCTL_DSTINC_8 0x00000000 |
#define | UDMA_CHCTL_DSTINC_16 0x40000000 |
#define | UDMA_CHCTL_DSTINC_32 0x80000000 |
#define | UDMA_CHCTL_DSTINC_NONE 0xC0000000 |
#define | UDMA_CHCTL_DSTSIZE_M 0x30000000 |
#define | UDMA_CHCTL_DSTSIZE_8 0x00000000 |
#define | UDMA_CHCTL_DSTSIZE_16 0x10000000 |
#define | UDMA_CHCTL_DSTSIZE_32 0x20000000 |
#define | UDMA_CHCTL_SRCINC_M 0x0C000000 |
#define | UDMA_CHCTL_SRCINC_8 0x00000000 |
#define | UDMA_CHCTL_SRCINC_16 0x04000000 |
#define | UDMA_CHCTL_SRCINC_32 0x08000000 |
#define | UDMA_CHCTL_SRCINC_NONE 0x0C000000 |
#define | UDMA_CHCTL_SRCSIZE_M 0x03000000 |
#define | UDMA_CHCTL_SRCSIZE_8 0x00000000 |
#define | UDMA_CHCTL_SRCSIZE_16 0x01000000 |
#define | UDMA_CHCTL_SRCSIZE_32 0x02000000 |
#define | UDMA_CHCTL_ARBSIZE_M 0x0003C000 |
#define | UDMA_CHCTL_ARBSIZE_1 0x00000000 |
#define | UDMA_CHCTL_ARBSIZE_2 0x00004000 |
#define | UDMA_CHCTL_ARBSIZE_4 0x00008000 |
#define | UDMA_CHCTL_ARBSIZE_8 0x0000C000 |
#define | UDMA_CHCTL_ARBSIZE_16 0x00010000 |
#define | UDMA_CHCTL_ARBSIZE_32 0x00014000 |
#define | UDMA_CHCTL_ARBSIZE_64 0x00018000 |
#define | UDMA_CHCTL_ARBSIZE_128 0x0001C000 |
#define | UDMA_CHCTL_ARBSIZE_256 0x00020000 |
#define | UDMA_CHCTL_ARBSIZE_512 0x00024000 |
#define | UDMA_CHCTL_ARBSIZE_1024 0x00028000 |
#define | UDMA_CHCTL_XFERSIZE_M 0x00003FF0 |
#define | UDMA_CHCTL_NXTUSEBURST 0x00000008 |
#define | UDMA_CHCTL_XFERMODE_M 0x00000007 |
#define | UDMA_CHCTL_XFERMODE_STOP 0x00000000 |
#define | UDMA_CHCTL_XFERMODE_BASIC 0x00000001 |
#define | UDMA_CHCTL_XFERMODE_AUTO 0x00000002 |
#define | UDMA_CHCTL_XFERMODE_PINGPONG 0x00000003 |
#define | UDMA_CHCTL_XFERMODE_MEM_SG 0x00000004 |
#define | UDMA_CHCTL_XFERMODE_MEM_SGA 0x00000005 |
#define | UDMA_CHCTL_XFERMODE_PER_SG 0x00000006 |
#define | UDMA_CHCTL_XFERMODE_PER_SGA 0x00000007 |
#define | UDMA_CHCTL_XFERSIZE_S 4 |
#define | NVIC_ACTLR_DISOOFP 0x00000200 |
#define | NVIC_ACTLR_DISFPCA 0x00000100 |
#define | NVIC_ACTLR_DISFOLD 0x00000004 |
#define | NVIC_ACTLR_DISWBUF 0x00000002 |
#define | NVIC_ACTLR_DISMCYC 0x00000001 |
#define | NVIC_ST_CTRL_COUNT 0x00010000 |
#define | NVIC_ST_CTRL_CLK_SRC 0x00000004 |
#define | NVIC_ST_CTRL_INTEN 0x00000002 |
#define | NVIC_ST_CTRL_ENABLE 0x00000001 |
#define | NVIC_ST_RELOAD_M 0x00FFFFFF |
#define | NVIC_ST_RELOAD_S 0 |
#define | NVIC_ST_CURRENT_M 0x00FFFFFF |
#define | NVIC_ST_CURRENT_S 0 |
#define | NVIC_EN0_INT_M 0xFFFFFFFF |
#define | NVIC_EN1_INT_M 0xFFFFFFFF |
#define | NVIC_EN2_INT_M 0xFFFFFFFF |
#define | NVIC_EN3_INT_M 0xFFFFFFFF |
#define | NVIC_EN4_INT_M 0x000007FF |
#define | NVIC_DIS0_INT_M 0xFFFFFFFF |
#define | NVIC_DIS1_INT_M 0xFFFFFFFF |
#define | NVIC_DIS2_INT_M 0xFFFFFFFF |
#define | NVIC_DIS3_INT_M 0xFFFFFFFF |
#define | NVIC_DIS4_INT_M 0x000007FF |
#define | NVIC_PEND0_INT_M 0xFFFFFFFF |
#define | NVIC_PEND1_INT_M 0xFFFFFFFF |
#define | NVIC_PEND2_INT_M 0xFFFFFFFF |
#define | NVIC_PEND3_INT_M 0xFFFFFFFF |
#define | NVIC_PEND4_INT_M 0x000007FF |
#define | NVIC_UNPEND0_INT_M 0xFFFFFFFF |
#define | NVIC_UNPEND1_INT_M 0xFFFFFFFF |
#define | NVIC_UNPEND2_INT_M 0xFFFFFFFF |
#define | NVIC_UNPEND3_INT_M 0xFFFFFFFF |
#define | NVIC_UNPEND4_INT_M 0x000007FF |
#define | NVIC_ACTIVE0_INT_M 0xFFFFFFFF |
#define | NVIC_ACTIVE1_INT_M 0xFFFFFFFF |
#define | NVIC_ACTIVE2_INT_M 0xFFFFFFFF |
#define | NVIC_ACTIVE3_INT_M 0xFFFFFFFF |
#define | NVIC_ACTIVE4_INT_M 0x000007FF |
#define | NVIC_PRI0_INT3_M 0xE0000000 |
#define | NVIC_PRI0_INT2_M 0x00E00000 |
#define | NVIC_PRI0_INT1_M 0x0000E000 |
#define | NVIC_PRI0_INT0_M 0x000000E0 |
#define | NVIC_PRI0_INT3_S 29 |
#define | NVIC_PRI0_INT2_S 21 |
#define | NVIC_PRI0_INT1_S 13 |
#define | NVIC_PRI0_INT0_S 5 |
#define | NVIC_PRI1_INT7_M 0xE0000000 |
#define | NVIC_PRI1_INT6_M 0x00E00000 |
#define | NVIC_PRI1_INT5_M 0x0000E000 |
#define | NVIC_PRI1_INT4_M 0x000000E0 |
#define | NVIC_PRI1_INT7_S 29 |
#define | NVIC_PRI1_INT6_S 21 |
#define | NVIC_PRI1_INT5_S 13 |
#define | NVIC_PRI1_INT4_S 5 |
#define | NVIC_PRI2_INT11_M 0xE0000000 |
#define | NVIC_PRI2_INT10_M 0x00E00000 |
#define | NVIC_PRI2_INT9_M 0x0000E000 |
#define | NVIC_PRI2_INT8_M 0x000000E0 |
#define | NVIC_PRI2_INT11_S 29 |
#define | NVIC_PRI2_INT10_S 21 |
#define | NVIC_PRI2_INT9_S 13 |
#define | NVIC_PRI2_INT8_S 5 |
#define | NVIC_PRI3_INT15_M 0xE0000000 |
#define | NVIC_PRI3_INT14_M 0x00E00000 |
#define | NVIC_PRI3_INT13_M 0x0000E000 |
#define | NVIC_PRI3_INT12_M 0x000000E0 |
#define | NVIC_PRI3_INT15_S 29 |
#define | NVIC_PRI3_INT14_S 21 |
#define | NVIC_PRI3_INT13_S 13 |
#define | NVIC_PRI3_INT12_S 5 |
#define | NVIC_PRI4_INT19_M 0xE0000000 |
#define | NVIC_PRI4_INT18_M 0x00E00000 |
#define | NVIC_PRI4_INT17_M 0x0000E000 |
#define | NVIC_PRI4_INT16_M 0x000000E0 |
#define | NVIC_PRI4_INT19_S 29 |
#define | NVIC_PRI4_INT18_S 21 |
#define | NVIC_PRI4_INT17_S 13 |
#define | NVIC_PRI4_INT16_S 5 |
#define | NVIC_PRI5_INT23_M 0xE0000000 |
#define | NVIC_PRI5_INT22_M 0x00E00000 |
#define | NVIC_PRI5_INT21_M 0x0000E000 |
#define | NVIC_PRI5_INT20_M 0x000000E0 |
#define | NVIC_PRI5_INT23_S 29 |
#define | NVIC_PRI5_INT22_S 21 |
#define | NVIC_PRI5_INT21_S 13 |
#define | NVIC_PRI5_INT20_S 5 |
#define | NVIC_PRI6_INT27_M 0xE0000000 |
#define | NVIC_PRI6_INT26_M 0x00E00000 |
#define | NVIC_PRI6_INT25_M 0x0000E000 |
#define | NVIC_PRI6_INT24_M 0x000000E0 |
#define | NVIC_PRI6_INT27_S 29 |
#define | NVIC_PRI6_INT26_S 21 |
#define | NVIC_PRI6_INT25_S 13 |
#define | NVIC_PRI6_INT24_S 5 |
#define | NVIC_PRI7_INT31_M 0xE0000000 |
#define | NVIC_PRI7_INT30_M 0x00E00000 |
#define | NVIC_PRI7_INT29_M 0x0000E000 |
#define | NVIC_PRI7_INT28_M 0x000000E0 |
#define | NVIC_PRI7_INT31_S 29 |
#define | NVIC_PRI7_INT30_S 21 |
#define | NVIC_PRI7_INT29_S 13 |
#define | NVIC_PRI7_INT28_S 5 |
#define | NVIC_PRI8_INT35_M 0xE0000000 |
#define | NVIC_PRI8_INT34_M 0x00E00000 |
#define | NVIC_PRI8_INT33_M 0x0000E000 |
#define | NVIC_PRI8_INT32_M 0x000000E0 |
#define | NVIC_PRI8_INT35_S 29 |
#define | NVIC_PRI8_INT34_S 21 |
#define | NVIC_PRI8_INT33_S 13 |
#define | NVIC_PRI8_INT32_S 5 |
#define | NVIC_PRI9_INT39_M 0xE0000000 |
#define | NVIC_PRI9_INT38_M 0x00E00000 |
#define | NVIC_PRI9_INT37_M 0x0000E000 |
#define | NVIC_PRI9_INT36_M 0x000000E0 |
#define | NVIC_PRI9_INT39_S 29 |
#define | NVIC_PRI9_INT38_S 21 |
#define | NVIC_PRI9_INT37_S 13 |
#define | NVIC_PRI9_INT36_S 5 |
#define | NVIC_PRI10_INT43_M 0xE0000000 |
#define | NVIC_PRI10_INT42_M 0x00E00000 |
#define | NVIC_PRI10_INT41_M 0x0000E000 |
#define | NVIC_PRI10_INT40_M 0x000000E0 |
#define | NVIC_PRI10_INT43_S 29 |
#define | NVIC_PRI10_INT42_S 21 |
#define | NVIC_PRI10_INT41_S 13 |
#define | NVIC_PRI10_INT40_S 5 |
#define | NVIC_PRI11_INT47_M 0xE0000000 |
#define | NVIC_PRI11_INT46_M 0x00E00000 |
#define | NVIC_PRI11_INT45_M 0x0000E000 |
#define | NVIC_PRI11_INT44_M 0x000000E0 |
#define | NVIC_PRI11_INT47_S 29 |
#define | NVIC_PRI11_INT46_S 21 |
#define | NVIC_PRI11_INT45_S 13 |
#define | NVIC_PRI11_INT44_S 5 |
#define | NVIC_PRI12_INT51_M 0xE0000000 |
#define | NVIC_PRI12_INT50_M 0x00E00000 |
#define | NVIC_PRI12_INT49_M 0x0000E000 |
#define | NVIC_PRI12_INT48_M 0x000000E0 |
#define | NVIC_PRI12_INT51_S 29 |
#define | NVIC_PRI12_INT50_S 21 |
#define | NVIC_PRI12_INT49_S 13 |
#define | NVIC_PRI12_INT48_S 5 |
#define | NVIC_PRI13_INT55_M 0xE0000000 |
#define | NVIC_PRI13_INT54_M 0x00E00000 |
#define | NVIC_PRI13_INT53_M 0x0000E000 |
#define | NVIC_PRI13_INT52_M 0x000000E0 |
#define | NVIC_PRI13_INT55_S 29 |
#define | NVIC_PRI13_INT54_S 21 |
#define | NVIC_PRI13_INT53_S 13 |
#define | NVIC_PRI13_INT52_S 5 |
#define | NVIC_PRI14_INTD_M 0xE0000000 |
#define | NVIC_PRI14_INTC_M 0x00E00000 |
#define | NVIC_PRI14_INTB_M 0x0000E000 |
#define | NVIC_PRI14_INTA_M 0x000000E0 |
#define | NVIC_PRI14_INTD_S 29 |
#define | NVIC_PRI14_INTC_S 21 |
#define | NVIC_PRI14_INTB_S 13 |
#define | NVIC_PRI14_INTA_S 5 |
#define | NVIC_PRI15_INTD_M 0xE0000000 |
#define | NVIC_PRI15_INTC_M 0x00E00000 |
#define | NVIC_PRI15_INTB_M 0x0000E000 |
#define | NVIC_PRI15_INTA_M 0x000000E0 |
#define | NVIC_PRI15_INTD_S 29 |
#define | NVIC_PRI15_INTC_S 21 |
#define | NVIC_PRI15_INTB_S 13 |
#define | NVIC_PRI15_INTA_S 5 |
#define | NVIC_PRI16_INTD_M 0xE0000000 |
#define | NVIC_PRI16_INTC_M 0x00E00000 |
#define | NVIC_PRI16_INTB_M 0x0000E000 |
#define | NVIC_PRI16_INTA_M 0x000000E0 |
#define | NVIC_PRI16_INTD_S 29 |
#define | NVIC_PRI16_INTC_S 21 |
#define | NVIC_PRI16_INTB_S 13 |
#define | NVIC_PRI16_INTA_S 5 |
#define | NVIC_PRI17_INTD_M 0xE0000000 |
#define | NVIC_PRI17_INTC_M 0x00E00000 |
#define | NVIC_PRI17_INTB_M 0x0000E000 |
#define | NVIC_PRI17_INTA_M 0x000000E0 |
#define | NVIC_PRI17_INTD_S 29 |
#define | NVIC_PRI17_INTC_S 21 |
#define | NVIC_PRI17_INTB_S 13 |
#define | NVIC_PRI17_INTA_S 5 |
#define | NVIC_PRI18_INTD_M 0xE0000000 |
#define | NVIC_PRI18_INTC_M 0x00E00000 |
#define | NVIC_PRI18_INTB_M 0x0000E000 |
#define | NVIC_PRI18_INTA_M 0x000000E0 |
#define | NVIC_PRI18_INTD_S 29 |
#define | NVIC_PRI18_INTC_S 21 |
#define | NVIC_PRI18_INTB_S 13 |
#define | NVIC_PRI18_INTA_S 5 |
#define | NVIC_PRI19_INTD_M 0xE0000000 |
#define | NVIC_PRI19_INTC_M 0x00E00000 |
#define | NVIC_PRI19_INTB_M 0x0000E000 |
#define | NVIC_PRI19_INTA_M 0x000000E0 |
#define | NVIC_PRI19_INTD_S 29 |
#define | NVIC_PRI19_INTC_S 21 |
#define | NVIC_PRI19_INTB_S 13 |
#define | NVIC_PRI19_INTA_S 5 |
#define | NVIC_PRI20_INTD_M 0xE0000000 |
#define | NVIC_PRI20_INTC_M 0x00E00000 |
#define | NVIC_PRI20_INTB_M 0x0000E000 |
#define | NVIC_PRI20_INTA_M 0x000000E0 |
#define | NVIC_PRI20_INTD_S 29 |
#define | NVIC_PRI20_INTC_S 21 |
#define | NVIC_PRI20_INTB_S 13 |
#define | NVIC_PRI20_INTA_S 5 |
#define | NVIC_PRI21_INTD_M 0xE0000000 |
#define | NVIC_PRI21_INTC_M 0x00E00000 |
#define | NVIC_PRI21_INTB_M 0x0000E000 |
#define | NVIC_PRI21_INTA_M 0x000000E0 |
#define | NVIC_PRI21_INTD_S 29 |
#define | NVIC_PRI21_INTC_S 21 |
#define | NVIC_PRI21_INTB_S 13 |
#define | NVIC_PRI21_INTA_S 5 |
#define | NVIC_PRI22_INTD_M 0xE0000000 |
#define | NVIC_PRI22_INTC_M 0x00E00000 |
#define | NVIC_PRI22_INTB_M 0x0000E000 |
#define | NVIC_PRI22_INTA_M 0x000000E0 |
#define | NVIC_PRI22_INTD_S 29 |
#define | NVIC_PRI22_INTC_S 21 |
#define | NVIC_PRI22_INTB_S 13 |
#define | NVIC_PRI22_INTA_S 5 |
#define | NVIC_PRI23_INTD_M 0xE0000000 |
#define | NVIC_PRI23_INTC_M 0x00E00000 |
#define | NVIC_PRI23_INTB_M 0x0000E000 |
#define | NVIC_PRI23_INTA_M 0x000000E0 |
#define | NVIC_PRI23_INTD_S 29 |
#define | NVIC_PRI23_INTC_S 21 |
#define | NVIC_PRI23_INTB_S 13 |
#define | NVIC_PRI23_INTA_S 5 |
#define | NVIC_PRI24_INTD_M 0xE0000000 |
#define | NVIC_PRI24_INTC_M 0x00E00000 |
#define | NVIC_PRI24_INTB_M 0x0000E000 |
#define | NVIC_PRI24_INTA_M 0x000000E0 |
#define | NVIC_PRI24_INTD_S 29 |
#define | NVIC_PRI24_INTC_S 21 |
#define | NVIC_PRI24_INTB_S 13 |
#define | NVIC_PRI24_INTA_S 5 |
#define | NVIC_PRI25_INTD_M 0xE0000000 |
#define | NVIC_PRI25_INTC_M 0x00E00000 |
#define | NVIC_PRI25_INTB_M 0x0000E000 |
#define | NVIC_PRI25_INTA_M 0x000000E0 |
#define | NVIC_PRI25_INTD_S 29 |
#define | NVIC_PRI25_INTC_S 21 |
#define | NVIC_PRI25_INTB_S 13 |
#define | NVIC_PRI25_INTA_S 5 |
#define | NVIC_PRI26_INTD_M 0xE0000000 |
#define | NVIC_PRI26_INTC_M 0x00E00000 |
#define | NVIC_PRI26_INTB_M 0x0000E000 |
#define | NVIC_PRI26_INTA_M 0x000000E0 |
#define | NVIC_PRI26_INTD_S 29 |
#define | NVIC_PRI26_INTC_S 21 |
#define | NVIC_PRI26_INTB_S 13 |
#define | NVIC_PRI26_INTA_S 5 |
#define | NVIC_PRI27_INTD_M 0xE0000000 |
#define | NVIC_PRI27_INTC_M 0x00E00000 |
#define | NVIC_PRI27_INTB_M 0x0000E000 |
#define | NVIC_PRI27_INTA_M 0x000000E0 |
#define | NVIC_PRI27_INTD_S 29 |
#define | NVIC_PRI27_INTC_S 21 |
#define | NVIC_PRI27_INTB_S 13 |
#define | NVIC_PRI27_INTA_S 5 |
#define | NVIC_PRI28_INTD_M 0xE0000000 |
#define | NVIC_PRI28_INTC_M 0x00E00000 |
#define | NVIC_PRI28_INTB_M 0x0000E000 |
#define | NVIC_PRI28_INTA_M 0x000000E0 |
#define | NVIC_PRI28_INTD_S 29 |
#define | NVIC_PRI28_INTC_S 21 |
#define | NVIC_PRI28_INTB_S 13 |
#define | NVIC_PRI28_INTA_S 5 |
#define | NVIC_PRI29_INTD_M 0xE0000000 |
#define | NVIC_PRI29_INTC_M 0x00E00000 |
#define | NVIC_PRI29_INTB_M 0x0000E000 |
#define | NVIC_PRI29_INTA_M 0x000000E0 |
#define | NVIC_PRI29_INTD_S 29 |
#define | NVIC_PRI29_INTC_S 21 |
#define | NVIC_PRI29_INTB_S 13 |
#define | NVIC_PRI29_INTA_S 5 |
#define | NVIC_PRI30_INTD_M 0xE0000000 |
#define | NVIC_PRI30_INTC_M 0x00E00000 |
#define | NVIC_PRI30_INTB_M 0x0000E000 |
#define | NVIC_PRI30_INTA_M 0x000000E0 |
#define | NVIC_PRI30_INTD_S 29 |
#define | NVIC_PRI30_INTC_S 21 |
#define | NVIC_PRI30_INTB_S 13 |
#define | NVIC_PRI30_INTA_S 5 |
#define | NVIC_PRI31_INTD_M 0xE0000000 |
#define | NVIC_PRI31_INTC_M 0x00E00000 |
#define | NVIC_PRI31_INTB_M 0x0000E000 |
#define | NVIC_PRI31_INTA_M 0x000000E0 |
#define | NVIC_PRI31_INTD_S 29 |
#define | NVIC_PRI31_INTC_S 21 |
#define | NVIC_PRI31_INTB_S 13 |
#define | NVIC_PRI31_INTA_S 5 |
#define | NVIC_PRI32_INTD_M 0xE0000000 |
#define | NVIC_PRI32_INTC_M 0x00E00000 |
#define | NVIC_PRI32_INTB_M 0x0000E000 |
#define | NVIC_PRI32_INTA_M 0x000000E0 |
#define | NVIC_PRI32_INTD_S 29 |
#define | NVIC_PRI32_INTC_S 21 |
#define | NVIC_PRI32_INTB_S 13 |
#define | NVIC_PRI32_INTA_S 5 |
#define | NVIC_PRI33_INTD_M 0xE0000000 |
#define | NVIC_PRI33_INTC_M 0x00E00000 |
#define | NVIC_PRI33_INTB_M 0x0000E000 |
#define | NVIC_PRI33_INTA_M 0x000000E0 |
#define | NVIC_PRI33_INTD_S 29 |
#define | NVIC_PRI33_INTC_S 21 |
#define | NVIC_PRI33_INTB_S 13 |
#define | NVIC_PRI33_INTA_S 5 |
#define | NVIC_PRI34_INTD_M 0xE0000000 |
#define | NVIC_PRI34_INTC_M 0x00E00000 |
#define | NVIC_PRI34_INTB_M 0x0000E000 |
#define | NVIC_PRI34_INTA_M 0x000000E0 |
#define | NVIC_PRI34_INTD_S 29 |
#define | NVIC_PRI34_INTC_S 21 |
#define | NVIC_PRI34_INTB_S 13 |
#define | NVIC_PRI34_INTA_S 5 |
#define | NVIC_CPUID_IMP_M 0xFF000000 |
#define | NVIC_CPUID_IMP_ARM 0x41000000 |
#define | NVIC_CPUID_VAR_M 0x00F00000 |
#define | NVIC_CPUID_CON_M 0x000F0000 |
#define | NVIC_CPUID_PARTNO_M 0x0000FFF0 |
#define | NVIC_CPUID_PARTNO_CM4 0x0000C240 |
#define | NVIC_CPUID_REV_M 0x0000000F |
#define | NVIC_INT_CTRL_NMI_SET 0x80000000 |
#define | NVIC_INT_CTRL_PEND_SV 0x10000000 |
#define | NVIC_INT_CTRL_UNPEND_SV 0x08000000 |
#define | NVIC_INT_CTRL_PENDSTSET 0x04000000 |
#define | NVIC_INT_CTRL_PENDSTCLR 0x02000000 |
#define | NVIC_INT_CTRL_ISR_PRE 0x00800000 |
#define | NVIC_INT_CTRL_ISR_PEND 0x00400000 |
#define | NVIC_INT_CTRL_VEC_PEN_M 0x000FF000 |
#define | NVIC_INT_CTRL_VEC_PEN_NMI 0x00002000 |
#define | NVIC_INT_CTRL_VEC_PEN_HARD 0x00003000 |
#define | NVIC_INT_CTRL_VEC_PEN_MEM 0x00004000 |
#define | NVIC_INT_CTRL_VEC_PEN_BUS 0x00005000 |
#define | NVIC_INT_CTRL_VEC_PEN_USG 0x00006000 |
#define | NVIC_INT_CTRL_VEC_PEN_SVC 0x0000B000 |
#define | NVIC_INT_CTRL_VEC_PEN_PNDSV 0x0000E000 |
#define | NVIC_INT_CTRL_VEC_PEN_TICK 0x0000F000 |
#define | NVIC_INT_CTRL_RET_BASE 0x00000800 |
#define | NVIC_INT_CTRL_VEC_ACT_M 0x000000FF |
#define | NVIC_INT_CTRL_VEC_ACT_S 0 |
#define | NVIC_VTABLE_OFFSET_M 0xFFFFFC00 |
#define | NVIC_VTABLE_OFFSET_S 10 |
#define | NVIC_APINT_VECTKEY_M 0xFFFF0000 |
#define | NVIC_APINT_VECTKEY 0x05FA0000 |
#define | NVIC_APINT_ENDIANESS 0x00008000 |
#define | NVIC_APINT_PRIGROUP_M 0x00000700 |
#define | NVIC_APINT_PRIGROUP_7_1 0x00000000 |
#define | NVIC_APINT_PRIGROUP_6_2 0x00000100 |
#define | NVIC_APINT_PRIGROUP_5_3 0x00000200 |
#define | NVIC_APINT_PRIGROUP_4_4 0x00000300 |
#define | NVIC_APINT_PRIGROUP_3_5 0x00000400 |
#define | NVIC_APINT_PRIGROUP_2_6 0x00000500 |
#define | NVIC_APINT_PRIGROUP_1_7 0x00000600 |
#define | NVIC_APINT_PRIGROUP_0_8 0x00000700 |
#define | NVIC_APINT_SYSRESETREQ 0x00000004 |
#define | NVIC_APINT_VECT_CLR_ACT 0x00000002 |
#define | NVIC_APINT_VECT_RESET 0x00000001 |
#define | NVIC_SYS_CTRL_SEVONPEND 0x00000010 |
#define | NVIC_SYS_CTRL_SLEEPDEEP 0x00000004 |
#define | NVIC_SYS_CTRL_SLEEPEXIT 0x00000002 |
#define | NVIC_CFG_CTRL_STKALIGN 0x00000200 |
#define | NVIC_CFG_CTRL_BFHFNMIGN 0x00000100 |
#define | NVIC_CFG_CTRL_DIV0 0x00000010 |
#define | NVIC_CFG_CTRL_UNALIGNED 0x00000008 |
#define | NVIC_CFG_CTRL_MAIN_PEND 0x00000002 |
#define | NVIC_CFG_CTRL_BASE_THR 0x00000001 |
#define | NVIC_SYS_PRI1_USAGE_M 0x00E00000 |
#define | NVIC_SYS_PRI1_BUS_M 0x0000E000 |
#define | NVIC_SYS_PRI1_MEM_M 0x000000E0 |
#define | NVIC_SYS_PRI1_USAGE_S 21 |
#define | NVIC_SYS_PRI1_BUS_S 13 |
#define | NVIC_SYS_PRI1_MEM_S 5 |
#define | NVIC_SYS_PRI2_SVC_M 0xE0000000 |
#define | NVIC_SYS_PRI2_SVC_S 29 |
#define | NVIC_SYS_PRI3_TICK_M 0xE0000000 |
#define | NVIC_SYS_PRI3_PENDSV_M 0x00E00000 |
#define | NVIC_SYS_PRI3_DEBUG_M 0x000000E0 |
#define | NVIC_SYS_PRI3_TICK_S 29 |
#define | NVIC_SYS_PRI3_PENDSV_S 21 |
#define | NVIC_SYS_PRI3_DEBUG_S 5 |
#define | NVIC_SYS_HND_CTRL_USAGE 0x00040000 |
#define | NVIC_SYS_HND_CTRL_BUS 0x00020000 |
#define | NVIC_SYS_HND_CTRL_MEM 0x00010000 |
#define | NVIC_SYS_HND_CTRL_SVC 0x00008000 |
#define | NVIC_SYS_HND_CTRL_BUSP 0x00004000 |
#define | NVIC_SYS_HND_CTRL_MEMP 0x00002000 |
#define | NVIC_SYS_HND_CTRL_USAGEP 0x00001000 |
#define | NVIC_SYS_HND_CTRL_TICK 0x00000800 |
#define | NVIC_SYS_HND_CTRL_PNDSV 0x00000400 |
#define | NVIC_SYS_HND_CTRL_MON 0x00000100 |
#define | NVIC_SYS_HND_CTRL_SVCA 0x00000080 |
#define | NVIC_SYS_HND_CTRL_USGA 0x00000008 |
#define | NVIC_SYS_HND_CTRL_BUSA 0x00000002 |
#define | NVIC_SYS_HND_CTRL_MEMA 0x00000001 |
#define | NVIC_FAULT_STAT_DIV0 0x02000000 |
#define | NVIC_FAULT_STAT_UNALIGN 0x01000000 |
#define | NVIC_FAULT_STAT_NOCP 0x00080000 |
#define | NVIC_FAULT_STAT_INVPC 0x00040000 |
#define | NVIC_FAULT_STAT_INVSTAT 0x00020000 |
#define | NVIC_FAULT_STAT_UNDEF 0x00010000 |
#define | NVIC_FAULT_STAT_BFARV 0x00008000 |
#define | NVIC_FAULT_STAT_BLSPERR 0x00002000 |
#define | NVIC_FAULT_STAT_BSTKE 0x00001000 |
#define | NVIC_FAULT_STAT_BUSTKE 0x00000800 |
#define | NVIC_FAULT_STAT_IMPRE 0x00000400 |
#define | NVIC_FAULT_STAT_PRECISE 0x00000200 |
#define | NVIC_FAULT_STAT_IBUS 0x00000100 |
#define | NVIC_FAULT_STAT_MMARV 0x00000080 |
#define | NVIC_FAULT_STAT_MLSPERR 0x00000020 |
#define | NVIC_FAULT_STAT_MSTKE 0x00000010 |
#define | NVIC_FAULT_STAT_MUSTKE 0x00000008 |
#define | NVIC_FAULT_STAT_DERR 0x00000002 |
#define | NVIC_FAULT_STAT_IERR 0x00000001 |
#define | NVIC_HFAULT_STAT_DBG 0x80000000 |
#define | NVIC_HFAULT_STAT_FORCED 0x40000000 |
#define | NVIC_HFAULT_STAT_VECT 0x00000002 |
#define | NVIC_DEBUG_STAT_EXTRNL 0x00000010 |
#define | NVIC_DEBUG_STAT_VCATCH 0x00000008 |
#define | NVIC_DEBUG_STAT_DWTTRAP 0x00000004 |
#define | NVIC_DEBUG_STAT_BKPT 0x00000002 |
#define | NVIC_DEBUG_STAT_HALTED 0x00000001 |
#define | NVIC_MM_ADDR_M 0xFFFFFFFF |
#define | NVIC_MM_ADDR_S 0 |
#define | NVIC_FAULT_ADDR_M 0xFFFFFFFF |
#define | NVIC_FAULT_ADDR_S 0 |
#define | NVIC_CPAC_CP11_M 0x00C00000 |
#define | NVIC_CPAC_CP11_DIS 0x00000000 |
#define | NVIC_CPAC_CP11_PRIV 0x00400000 |
#define | NVIC_CPAC_CP11_FULL 0x00C00000 |
#define | NVIC_CPAC_CP10_M 0x00300000 |
#define | NVIC_CPAC_CP10_DIS 0x00000000 |
#define | NVIC_CPAC_CP10_PRIV 0x00100000 |
#define | NVIC_CPAC_CP10_FULL 0x00300000 |
#define | NVIC_MPU_TYPE_IREGION_M 0x00FF0000 |
#define | NVIC_MPU_TYPE_DREGION_M 0x0000FF00 |
#define | NVIC_MPU_TYPE_SEPARATE 0x00000001 |
#define | NVIC_MPU_TYPE_IREGION_S 16 |
#define | NVIC_MPU_TYPE_DREGION_S 8 |
#define | NVIC_MPU_CTRL_PRIVDEFEN 0x00000004 |
#define | NVIC_MPU_CTRL_HFNMIENA 0x00000002 |
#define | NVIC_MPU_CTRL_ENABLE 0x00000001 |
#define | NVIC_MPU_NUMBER_M 0x00000007 |
#define | NVIC_MPU_NUMBER_S 0 |
#define | NVIC_MPU_BASE_ADDR_M 0xFFFFFFE0 |
#define | NVIC_MPU_BASE_VALID 0x00000010 |
#define | NVIC_MPU_BASE_REGION_M 0x00000007 |
#define | NVIC_MPU_BASE_ADDR_S 5 |
#define | NVIC_MPU_BASE_REGION_S 0 |
#define | NVIC_MPU_ATTR_XN 0x10000000 |
#define | NVIC_MPU_ATTR_AP_M 0x07000000 |
#define | NVIC_MPU_ATTR_TEX_M 0x00380000 |
#define | NVIC_MPU_ATTR_SHAREABLE 0x00040000 |
#define | NVIC_MPU_ATTR_CACHEABLE 0x00020000 |
#define | NVIC_MPU_ATTR_BUFFRABLE 0x00010000 |
#define | NVIC_MPU_ATTR_SRD_M 0x0000FF00 |
#define | NVIC_MPU_ATTR_SIZE_M 0x0000003E |
#define | NVIC_MPU_ATTR_ENABLE 0x00000001 |
#define | NVIC_MPU_BASE1_ADDR_M 0xFFFFFFE0 |
#define | NVIC_MPU_BASE1_VALID 0x00000010 |
#define | NVIC_MPU_BASE1_REGION_M 0x00000007 |
#define | NVIC_MPU_BASE1_ADDR_S 5 |
#define | NVIC_MPU_BASE1_REGION_S 0 |
#define | NVIC_MPU_ATTR1_XN 0x10000000 |
#define | NVIC_MPU_ATTR1_AP_M 0x07000000 |
#define | NVIC_MPU_ATTR1_TEX_M 0x00380000 |
#define | NVIC_MPU_ATTR1_SHAREABLE 0x00040000 |
#define | NVIC_MPU_ATTR1_CACHEABLE 0x00020000 |
#define | NVIC_MPU_ATTR1_BUFFRABLE 0x00010000 |
#define | NVIC_MPU_ATTR1_SRD_M 0x0000FF00 |
#define | NVIC_MPU_ATTR1_SIZE_M 0x0000003E |
#define | NVIC_MPU_ATTR1_ENABLE 0x00000001 |
#define | NVIC_MPU_BASE2_ADDR_M 0xFFFFFFE0 |
#define | NVIC_MPU_BASE2_VALID 0x00000010 |
#define | NVIC_MPU_BASE2_REGION_M 0x00000007 |
#define | NVIC_MPU_BASE2_ADDR_S 5 |
#define | NVIC_MPU_BASE2_REGION_S 0 |
#define | NVIC_MPU_ATTR2_XN 0x10000000 |
#define | NVIC_MPU_ATTR2_AP_M 0x07000000 |
#define | NVIC_MPU_ATTR2_TEX_M 0x00380000 |
#define | NVIC_MPU_ATTR2_SHAREABLE 0x00040000 |
#define | NVIC_MPU_ATTR2_CACHEABLE 0x00020000 |
#define | NVIC_MPU_ATTR2_BUFFRABLE 0x00010000 |
#define | NVIC_MPU_ATTR2_SRD_M 0x0000FF00 |
#define | NVIC_MPU_ATTR2_SIZE_M 0x0000003E |
#define | NVIC_MPU_ATTR2_ENABLE 0x00000001 |
#define | NVIC_MPU_BASE3_ADDR_M 0xFFFFFFE0 |
#define | NVIC_MPU_BASE3_VALID 0x00000010 |
#define | NVIC_MPU_BASE3_REGION_M 0x00000007 |
#define | NVIC_MPU_BASE3_ADDR_S 5 |
#define | NVIC_MPU_BASE3_REGION_S 0 |
#define | NVIC_MPU_ATTR3_XN 0x10000000 |
#define | NVIC_MPU_ATTR3_AP_M 0x07000000 |
#define | NVIC_MPU_ATTR3_TEX_M 0x00380000 |
#define | NVIC_MPU_ATTR3_SHAREABLE 0x00040000 |
#define | NVIC_MPU_ATTR3_CACHEABLE 0x00020000 |
#define | NVIC_MPU_ATTR3_BUFFRABLE 0x00010000 |
#define | NVIC_MPU_ATTR3_SRD_M 0x0000FF00 |
#define | NVIC_MPU_ATTR3_SIZE_M 0x0000003E |
#define | NVIC_MPU_ATTR3_ENABLE 0x00000001 |
#define | NVIC_DBG_CTRL_DBGKEY_M 0xFFFF0000 |
#define | NVIC_DBG_CTRL_DBGKEY 0xA05F0000 |
#define | NVIC_DBG_CTRL_S_RESET_ST 0x02000000 |
#define | NVIC_DBG_CTRL_S_RETIRE_ST 0x01000000 |
#define | NVIC_DBG_CTRL_S_LOCKUP 0x00080000 |
#define | NVIC_DBG_CTRL_S_SLEEP 0x00040000 |
#define | NVIC_DBG_CTRL_S_HALT 0x00020000 |
#define | NVIC_DBG_CTRL_S_REGRDY 0x00010000 |
#define | NVIC_DBG_CTRL_C_SNAPSTALL 0x00000020 |
#define | NVIC_DBG_CTRL_C_MASKINT 0x00000008 |
#define | NVIC_DBG_CTRL_C_STEP 0x00000004 |
#define | NVIC_DBG_CTRL_C_HALT 0x00000002 |
#define | NVIC_DBG_CTRL_C_DEBUGEN 0x00000001 |
#define | NVIC_DBG_XFER_REG_WNR 0x00010000 |
#define | NVIC_DBG_XFER_REG_SEL_M 0x0000001F |
#define | NVIC_DBG_XFER_REG_R0 0x00000000 |
#define | NVIC_DBG_XFER_REG_R1 0x00000001 |
#define | NVIC_DBG_XFER_REG_R2 0x00000002 |
#define | NVIC_DBG_XFER_REG_R3 0x00000003 |
#define | NVIC_DBG_XFER_REG_R4 0x00000004 |
#define | NVIC_DBG_XFER_REG_R5 0x00000005 |
#define | NVIC_DBG_XFER_REG_R6 0x00000006 |
#define | NVIC_DBG_XFER_REG_R7 0x00000007 |
#define | NVIC_DBG_XFER_REG_R8 0x00000008 |
#define | NVIC_DBG_XFER_REG_R9 0x00000009 |
#define | NVIC_DBG_XFER_REG_R10 0x0000000A |
#define | NVIC_DBG_XFER_REG_R11 0x0000000B |
#define | NVIC_DBG_XFER_REG_R12 0x0000000C |
#define | NVIC_DBG_XFER_REG_R13 0x0000000D |
#define | NVIC_DBG_XFER_REG_R14 0x0000000E |
#define | NVIC_DBG_XFER_REG_R15 0x0000000F |
#define | NVIC_DBG_XFER_REG_FLAGS 0x00000010 |
#define | NVIC_DBG_XFER_REG_MSP 0x00000011 |
#define | NVIC_DBG_XFER_REG_PSP 0x00000012 |
#define | NVIC_DBG_XFER_REG_DSP 0x00000013 |
#define | NVIC_DBG_XFER_REG_CFBP 0x00000014 |
#define | NVIC_DBG_DATA_M 0xFFFFFFFF |
#define | NVIC_DBG_DATA_S 0 |
#define | NVIC_DBG_INT_HARDERR 0x00000400 |
#define | NVIC_DBG_INT_INTERR 0x00000200 |
#define | NVIC_DBG_INT_BUSERR 0x00000100 |
#define | NVIC_DBG_INT_STATERR 0x00000080 |
#define | NVIC_DBG_INT_CHKERR 0x00000040 |
#define | NVIC_DBG_INT_NOCPERR 0x00000020 |
#define | NVIC_DBG_INT_MMERR 0x00000010 |
#define | NVIC_DBG_INT_RESET 0x00000008 |
#define | NVIC_DBG_INT_RSTPENDCLR 0x00000004 |
#define | NVIC_DBG_INT_RSTPENDING 0x00000002 |
#define | NVIC_DBG_INT_RSTVCATCH 0x00000001 |
#define | NVIC_SW_TRIG_INTID_M 0x000000FF |
#define | NVIC_SW_TRIG_INTID_S 0 |
#define | NVIC_FPCC_ASPEN 0x80000000 |
#define | NVIC_FPCC_LSPEN 0x40000000 |
#define | NVIC_FPCC_MONRDY 0x00000100 |
#define | NVIC_FPCC_BFRDY 0x00000040 |
#define | NVIC_FPCC_MMRDY 0x00000020 |
#define | NVIC_FPCC_HFRDY 0x00000010 |
#define | NVIC_FPCC_THREAD 0x00000008 |
#define | NVIC_FPCC_USER 0x00000002 |
#define | NVIC_FPCC_LSPACT 0x00000001 |
#define | NVIC_FPCA_ADDRESS_M 0xFFFFFFF8 |
#define | NVIC_FPCA_ADDRESS_S 3 |
#define | NVIC_FPDSC_AHP 0x04000000 |
#define | NVIC_FPDSC_DN 0x02000000 |
#define | NVIC_FPDSC_FZ 0x01000000 |
#define | NVIC_FPDSC_RMODE_M 0x00C00000 |
#define | NVIC_FPDSC_RMODE_RN 0x00000000 |
#define | NVIC_FPDSC_RMODE_RP 0x00400000 |
#define | NVIC_FPDSC_RMODE_RM 0x00800000 |
#define | NVIC_FPDSC_RMODE_RZ 0x00C00000 |
#define | SYSCTL_DID0_CLASS_BLIZZARD 0x00050000 |
#define ADC0_ACTSS_R (*((volatile uint32_t *)0x40038000)) |
Definition at line 1250 of file tm4c123fe6pm.h.
#define ADC0_CC_R (*((volatile uint32_t *)0x40038FC8)) |
Definition at line 1307 of file tm4c123fe6pm.h.
#define ADC0_CTL_R (*((volatile uint32_t *)0x40038038)) |
Definition at line 1263 of file tm4c123fe6pm.h.
#define ADC0_DCCMP0_R (*((volatile uint32_t *)0x40038E40)) |
Definition at line 1297 of file tm4c123fe6pm.h.
#define ADC0_DCCMP1_R (*((volatile uint32_t *)0x40038E44)) |
Definition at line 1298 of file tm4c123fe6pm.h.
#define ADC0_DCCMP2_R (*((volatile uint32_t *)0x40038E48)) |
Definition at line 1299 of file tm4c123fe6pm.h.
#define ADC0_DCCMP3_R (*((volatile uint32_t *)0x40038E4C)) |
Definition at line 1300 of file tm4c123fe6pm.h.
#define ADC0_DCCMP4_R (*((volatile uint32_t *)0x40038E50)) |
Definition at line 1301 of file tm4c123fe6pm.h.
#define ADC0_DCCMP5_R (*((volatile uint32_t *)0x40038E54)) |
Definition at line 1302 of file tm4c123fe6pm.h.
#define ADC0_DCCMP6_R (*((volatile uint32_t *)0x40038E58)) |
Definition at line 1303 of file tm4c123fe6pm.h.
#define ADC0_DCCMP7_R (*((volatile uint32_t *)0x40038E5C)) |
Definition at line 1304 of file tm4c123fe6pm.h.
#define ADC0_DCCTL0_R (*((volatile uint32_t *)0x40038E00)) |
Definition at line 1289 of file tm4c123fe6pm.h.
#define ADC0_DCCTL1_R (*((volatile uint32_t *)0x40038E04)) |
Definition at line 1290 of file tm4c123fe6pm.h.
#define ADC0_DCCTL2_R (*((volatile uint32_t *)0x40038E08)) |
Definition at line 1291 of file tm4c123fe6pm.h.
#define ADC0_DCCTL3_R (*((volatile uint32_t *)0x40038E0C)) |
Definition at line 1292 of file tm4c123fe6pm.h.
#define ADC0_DCCTL4_R (*((volatile uint32_t *)0x40038E10)) |
Definition at line 1293 of file tm4c123fe6pm.h.
#define ADC0_DCCTL5_R (*((volatile uint32_t *)0x40038E14)) |
Definition at line 1294 of file tm4c123fe6pm.h.
#define ADC0_DCCTL6_R (*((volatile uint32_t *)0x40038E18)) |
Definition at line 1295 of file tm4c123fe6pm.h.
#define ADC0_DCCTL7_R (*((volatile uint32_t *)0x40038E1C)) |
Definition at line 1296 of file tm4c123fe6pm.h.
#define ADC0_DCISC_R (*((volatile uint32_t *)0x40038034)) |
Definition at line 1262 of file tm4c123fe6pm.h.
#define ADC0_DCRIC_R (*((volatile uint32_t *)0x40038D00)) |
Definition at line 1288 of file tm4c123fe6pm.h.
#define ADC0_EMUX_R (*((volatile uint32_t *)0x40038014)) |
Definition at line 1255 of file tm4c123fe6pm.h.
#define ADC0_IM_R (*((volatile uint32_t *)0x40038008)) |
Definition at line 1252 of file tm4c123fe6pm.h.
#define ADC0_ISC_R (*((volatile uint32_t *)0x4003800C)) |
Definition at line 1253 of file tm4c123fe6pm.h.
#define ADC0_OSTAT_R (*((volatile uint32_t *)0x40038010)) |
Definition at line 1254 of file tm4c123fe6pm.h.
#define ADC0_PC_R (*((volatile uint32_t *)0x40038FC4)) |
Definition at line 1306 of file tm4c123fe6pm.h.
#define ADC0_PP_R (*((volatile uint32_t *)0x40038FC0)) |
Definition at line 1305 of file tm4c123fe6pm.h.
#define ADC0_PSSI_R (*((volatile uint32_t *)0x40038028)) |
Definition at line 1260 of file tm4c123fe6pm.h.
#define ADC0_RIS_R (*((volatile uint32_t *)0x40038004)) |
Definition at line 1251 of file tm4c123fe6pm.h.
#define ADC0_SAC_R (*((volatile uint32_t *)0x40038030)) |
Definition at line 1261 of file tm4c123fe6pm.h.
#define ADC0_SPC_R (*((volatile uint32_t *)0x40038024)) |
Definition at line 1259 of file tm4c123fe6pm.h.
#define ADC0_SSCTL0_R (*((volatile uint32_t *)0x40038044)) |
Definition at line 1265 of file tm4c123fe6pm.h.
#define ADC0_SSCTL1_R (*((volatile uint32_t *)0x40038064)) |
Definition at line 1271 of file tm4c123fe6pm.h.
#define ADC0_SSCTL2_R (*((volatile uint32_t *)0x40038084)) |
Definition at line 1277 of file tm4c123fe6pm.h.
#define ADC0_SSCTL3_R (*((volatile uint32_t *)0x400380A4)) |
Definition at line 1283 of file tm4c123fe6pm.h.
#define ADC0_SSDC0_R (*((volatile uint32_t *)0x40038054)) |
Definition at line 1269 of file tm4c123fe6pm.h.
#define ADC0_SSDC1_R (*((volatile uint32_t *)0x40038074)) |
Definition at line 1275 of file tm4c123fe6pm.h.
#define ADC0_SSDC2_R (*((volatile uint32_t *)0x40038094)) |
Definition at line 1281 of file tm4c123fe6pm.h.
#define ADC0_SSDC3_R (*((volatile uint32_t *)0x400380B4)) |
Definition at line 1287 of file tm4c123fe6pm.h.
#define ADC0_SSFIFO0_R (*((volatile uint32_t *)0x40038048)) |
Definition at line 1266 of file tm4c123fe6pm.h.
#define ADC0_SSFIFO1_R (*((volatile uint32_t *)0x40038068)) |
Definition at line 1272 of file tm4c123fe6pm.h.
#define ADC0_SSFIFO2_R (*((volatile uint32_t *)0x40038088)) |
Definition at line 1278 of file tm4c123fe6pm.h.
#define ADC0_SSFIFO3_R (*((volatile uint32_t *)0x400380A8)) |
Definition at line 1284 of file tm4c123fe6pm.h.
#define ADC0_SSFSTAT0_R (*((volatile uint32_t *)0x4003804C)) |
Definition at line 1267 of file tm4c123fe6pm.h.
#define ADC0_SSFSTAT1_R (*((volatile uint32_t *)0x4003806C)) |
Definition at line 1273 of file tm4c123fe6pm.h.
#define ADC0_SSFSTAT2_R (*((volatile uint32_t *)0x4003808C)) |
Definition at line 1279 of file tm4c123fe6pm.h.
#define ADC0_SSFSTAT3_R (*((volatile uint32_t *)0x400380AC)) |
Definition at line 1285 of file tm4c123fe6pm.h.
#define ADC0_SSMUX0_R (*((volatile uint32_t *)0x40038040)) |
Definition at line 1264 of file tm4c123fe6pm.h.
#define ADC0_SSMUX1_R (*((volatile uint32_t *)0x40038060)) |
Definition at line 1270 of file tm4c123fe6pm.h.
#define ADC0_SSMUX2_R (*((volatile uint32_t *)0x40038080)) |
Definition at line 1276 of file tm4c123fe6pm.h.
#define ADC0_SSMUX3_R (*((volatile uint32_t *)0x400380A0)) |
Definition at line 1282 of file tm4c123fe6pm.h.
#define ADC0_SSOP0_R (*((volatile uint32_t *)0x40038050)) |
Definition at line 1268 of file tm4c123fe6pm.h.
#define ADC0_SSOP1_R (*((volatile uint32_t *)0x40038070)) |
Definition at line 1274 of file tm4c123fe6pm.h.
#define ADC0_SSOP2_R (*((volatile uint32_t *)0x40038090)) |
Definition at line 1280 of file tm4c123fe6pm.h.
#define ADC0_SSOP3_R (*((volatile uint32_t *)0x400380B0)) |
Definition at line 1286 of file tm4c123fe6pm.h.
#define ADC0_SSPRI_R (*((volatile uint32_t *)0x40038020)) |
Definition at line 1258 of file tm4c123fe6pm.h.
#define ADC0_TSSEL_R (*((volatile uint32_t *)0x4003801C)) |
Definition at line 1257 of file tm4c123fe6pm.h.
#define ADC0_USTAT_R (*((volatile uint32_t *)0x40038018)) |
Definition at line 1256 of file tm4c123fe6pm.h.
#define ADC1_ACTSS_R (*((volatile uint32_t *)0x40039000)) |
Definition at line 1314 of file tm4c123fe6pm.h.
#define ADC1_CC_R (*((volatile uint32_t *)0x40039FC8)) |
Definition at line 1371 of file tm4c123fe6pm.h.
#define ADC1_CTL_R (*((volatile uint32_t *)0x40039038)) |
Definition at line 1327 of file tm4c123fe6pm.h.
#define ADC1_DCCMP0_R (*((volatile uint32_t *)0x40039E40)) |
Definition at line 1361 of file tm4c123fe6pm.h.
#define ADC1_DCCMP1_R (*((volatile uint32_t *)0x40039E44)) |
Definition at line 1362 of file tm4c123fe6pm.h.
#define ADC1_DCCMP2_R (*((volatile uint32_t *)0x40039E48)) |
Definition at line 1363 of file tm4c123fe6pm.h.
#define ADC1_DCCMP3_R (*((volatile uint32_t *)0x40039E4C)) |
Definition at line 1364 of file tm4c123fe6pm.h.
#define ADC1_DCCMP4_R (*((volatile uint32_t *)0x40039E50)) |
Definition at line 1365 of file tm4c123fe6pm.h.
#define ADC1_DCCMP5_R (*((volatile uint32_t *)0x40039E54)) |
Definition at line 1366 of file tm4c123fe6pm.h.
#define ADC1_DCCMP6_R (*((volatile uint32_t *)0x40039E58)) |
Definition at line 1367 of file tm4c123fe6pm.h.
#define ADC1_DCCMP7_R (*((volatile uint32_t *)0x40039E5C)) |
Definition at line 1368 of file tm4c123fe6pm.h.
#define ADC1_DCCTL0_R (*((volatile uint32_t *)0x40039E00)) |
Definition at line 1353 of file tm4c123fe6pm.h.
#define ADC1_DCCTL1_R (*((volatile uint32_t *)0x40039E04)) |
Definition at line 1354 of file tm4c123fe6pm.h.
#define ADC1_DCCTL2_R (*((volatile uint32_t *)0x40039E08)) |
Definition at line 1355 of file tm4c123fe6pm.h.
#define ADC1_DCCTL3_R (*((volatile uint32_t *)0x40039E0C)) |
Definition at line 1356 of file tm4c123fe6pm.h.
#define ADC1_DCCTL4_R (*((volatile uint32_t *)0x40039E10)) |
Definition at line 1357 of file tm4c123fe6pm.h.
#define ADC1_DCCTL5_R (*((volatile uint32_t *)0x40039E14)) |
Definition at line 1358 of file tm4c123fe6pm.h.
#define ADC1_DCCTL6_R (*((volatile uint32_t *)0x40039E18)) |
Definition at line 1359 of file tm4c123fe6pm.h.
#define ADC1_DCCTL7_R (*((volatile uint32_t *)0x40039E1C)) |
Definition at line 1360 of file tm4c123fe6pm.h.
#define ADC1_DCISC_R (*((volatile uint32_t *)0x40039034)) |
Definition at line 1326 of file tm4c123fe6pm.h.
#define ADC1_DCRIC_R (*((volatile uint32_t *)0x40039D00)) |
Definition at line 1352 of file tm4c123fe6pm.h.
#define ADC1_EMUX_R (*((volatile uint32_t *)0x40039014)) |
Definition at line 1319 of file tm4c123fe6pm.h.
#define ADC1_IM_R (*((volatile uint32_t *)0x40039008)) |
Definition at line 1316 of file tm4c123fe6pm.h.
#define ADC1_ISC_R (*((volatile uint32_t *)0x4003900C)) |
Definition at line 1317 of file tm4c123fe6pm.h.
#define ADC1_OSTAT_R (*((volatile uint32_t *)0x40039010)) |
Definition at line 1318 of file tm4c123fe6pm.h.
#define ADC1_PC_R (*((volatile uint32_t *)0x40039FC4)) |
Definition at line 1370 of file tm4c123fe6pm.h.
#define ADC1_PP_R (*((volatile uint32_t *)0x40039FC0)) |
Definition at line 1369 of file tm4c123fe6pm.h.
#define ADC1_PSSI_R (*((volatile uint32_t *)0x40039028)) |
Definition at line 1324 of file tm4c123fe6pm.h.
#define ADC1_RIS_R (*((volatile uint32_t *)0x40039004)) |
Definition at line 1315 of file tm4c123fe6pm.h.
#define ADC1_SAC_R (*((volatile uint32_t *)0x40039030)) |
Definition at line 1325 of file tm4c123fe6pm.h.
#define ADC1_SPC_R (*((volatile uint32_t *)0x40039024)) |
Definition at line 1323 of file tm4c123fe6pm.h.
#define ADC1_SSCTL0_R (*((volatile uint32_t *)0x40039044)) |
Definition at line 1329 of file tm4c123fe6pm.h.
#define ADC1_SSCTL1_R (*((volatile uint32_t *)0x40039064)) |
Definition at line 1335 of file tm4c123fe6pm.h.
#define ADC1_SSCTL2_R (*((volatile uint32_t *)0x40039084)) |
Definition at line 1341 of file tm4c123fe6pm.h.
#define ADC1_SSCTL3_R (*((volatile uint32_t *)0x400390A4)) |
Definition at line 1347 of file tm4c123fe6pm.h.
#define ADC1_SSDC0_R (*((volatile uint32_t *)0x40039054)) |
Definition at line 1333 of file tm4c123fe6pm.h.
#define ADC1_SSDC1_R (*((volatile uint32_t *)0x40039074)) |
Definition at line 1339 of file tm4c123fe6pm.h.
#define ADC1_SSDC2_R (*((volatile uint32_t *)0x40039094)) |
Definition at line 1345 of file tm4c123fe6pm.h.
#define ADC1_SSDC3_R (*((volatile uint32_t *)0x400390B4)) |
Definition at line 1351 of file tm4c123fe6pm.h.
#define ADC1_SSFIFO0_R (*((volatile uint32_t *)0x40039048)) |
Definition at line 1330 of file tm4c123fe6pm.h.
#define ADC1_SSFIFO1_R (*((volatile uint32_t *)0x40039068)) |
Definition at line 1336 of file tm4c123fe6pm.h.
#define ADC1_SSFIFO2_R (*((volatile uint32_t *)0x40039088)) |
Definition at line 1342 of file tm4c123fe6pm.h.
#define ADC1_SSFIFO3_R (*((volatile uint32_t *)0x400390A8)) |
Definition at line 1348 of file tm4c123fe6pm.h.
#define ADC1_SSFSTAT0_R (*((volatile uint32_t *)0x4003904C)) |
Definition at line 1331 of file tm4c123fe6pm.h.
#define ADC1_SSFSTAT1_R (*((volatile uint32_t *)0x4003906C)) |
Definition at line 1337 of file tm4c123fe6pm.h.
#define ADC1_SSFSTAT2_R (*((volatile uint32_t *)0x4003908C)) |
Definition at line 1343 of file tm4c123fe6pm.h.
#define ADC1_SSFSTAT3_R (*((volatile uint32_t *)0x400390AC)) |
Definition at line 1349 of file tm4c123fe6pm.h.
#define ADC1_SSMUX0_R (*((volatile uint32_t *)0x40039040)) |
Definition at line 1328 of file tm4c123fe6pm.h.
#define ADC1_SSMUX1_R (*((volatile uint32_t *)0x40039060)) |
Definition at line 1334 of file tm4c123fe6pm.h.
#define ADC1_SSMUX2_R (*((volatile uint32_t *)0x40039080)) |
Definition at line 1340 of file tm4c123fe6pm.h.
#define ADC1_SSMUX3_R (*((volatile uint32_t *)0x400390A0)) |
Definition at line 1346 of file tm4c123fe6pm.h.
#define ADC1_SSOP0_R (*((volatile uint32_t *)0x40039050)) |
Definition at line 1332 of file tm4c123fe6pm.h.
#define ADC1_SSOP1_R (*((volatile uint32_t *)0x40039070)) |
Definition at line 1338 of file tm4c123fe6pm.h.
#define ADC1_SSOP2_R (*((volatile uint32_t *)0x40039090)) |
Definition at line 1344 of file tm4c123fe6pm.h.
#define ADC1_SSOP3_R (*((volatile uint32_t *)0x400390B0)) |
Definition at line 1350 of file tm4c123fe6pm.h.
#define ADC1_SSPRI_R (*((volatile uint32_t *)0x40039020)) |
Definition at line 1322 of file tm4c123fe6pm.h.
#define ADC1_TSSEL_R (*((volatile uint32_t *)0x4003901C)) |
Definition at line 1321 of file tm4c123fe6pm.h.
#define ADC1_USTAT_R (*((volatile uint32_t *)0x40039018)) |
Definition at line 1320 of file tm4c123fe6pm.h.
#define ADC_ACTSS_ASEN0 0x00000001 |
Definition at line 5421 of file tm4c123fe6pm.h.
#define ADC_ACTSS_ASEN1 0x00000002 |
Definition at line 5420 of file tm4c123fe6pm.h.
#define ADC_ACTSS_ASEN2 0x00000004 |
Definition at line 5419 of file tm4c123fe6pm.h.
#define ADC_ACTSS_ASEN3 0x00000008 |
Definition at line 5418 of file tm4c123fe6pm.h.
#define ADC_ACTSS_BUSY 0x00010000 |
Definition at line 5417 of file tm4c123fe6pm.h.
#define ADC_CC_CS_M 0x0000000F |
Definition at line 6383 of file tm4c123fe6pm.h.
#define ADC_CC_CS_PIOSC 0x00000001 |
Definition at line 6385 of file tm4c123fe6pm.h.
#define ADC_CC_CS_SYSPLL 0x00000000 |
Definition at line 6384 of file tm4c123fe6pm.h.
#define ADC_CTL_DITHER 0x00000040 |
Definition at line 5657 of file tm4c123fe6pm.h.
#define ADC_CTL_VREF_INTERNAL 0x00000000 |
Definition at line 5659 of file tm4c123fe6pm.h.
#define ADC_CTL_VREF_M 0x00000001 |
Definition at line 5658 of file tm4c123fe6pm.h.
#define ADC_DCCMP0_COMP0_M 0x00000FFF |
Definition at line 6273 of file tm4c123fe6pm.h.
#define ADC_DCCMP0_COMP0_S 0 |
Definition at line 6275 of file tm4c123fe6pm.h.
#define ADC_DCCMP0_COMP1_M 0x0FFF0000 |
Definition at line 6272 of file tm4c123fe6pm.h.
#define ADC_DCCMP0_COMP1_S 16 |
Definition at line 6274 of file tm4c123fe6pm.h.
#define ADC_DCCMP1_COMP0_M 0x00000FFF |
Definition at line 6283 of file tm4c123fe6pm.h.
#define ADC_DCCMP1_COMP0_S 0 |
Definition at line 6285 of file tm4c123fe6pm.h.
#define ADC_DCCMP1_COMP1_M 0x0FFF0000 |
Definition at line 6282 of file tm4c123fe6pm.h.
#define ADC_DCCMP1_COMP1_S 16 |
Definition at line 6284 of file tm4c123fe6pm.h.
#define ADC_DCCMP2_COMP0_M 0x00000FFF |
Definition at line 6293 of file tm4c123fe6pm.h.
#define ADC_DCCMP2_COMP0_S 0 |
Definition at line 6295 of file tm4c123fe6pm.h.
#define ADC_DCCMP2_COMP1_M 0x0FFF0000 |
Definition at line 6292 of file tm4c123fe6pm.h.
#define ADC_DCCMP2_COMP1_S 16 |
Definition at line 6294 of file tm4c123fe6pm.h.
#define ADC_DCCMP3_COMP0_M 0x00000FFF |
Definition at line 6303 of file tm4c123fe6pm.h.
#define ADC_DCCMP3_COMP0_S 0 |
Definition at line 6305 of file tm4c123fe6pm.h.
#define ADC_DCCMP3_COMP1_M 0x0FFF0000 |
Definition at line 6302 of file tm4c123fe6pm.h.
#define ADC_DCCMP3_COMP1_S 16 |
Definition at line 6304 of file tm4c123fe6pm.h.
#define ADC_DCCMP4_COMP0_M 0x00000FFF |
Definition at line 6313 of file tm4c123fe6pm.h.
#define ADC_DCCMP4_COMP0_S 0 |
Definition at line 6315 of file tm4c123fe6pm.h.
#define ADC_DCCMP4_COMP1_M 0x0FFF0000 |
Definition at line 6312 of file tm4c123fe6pm.h.
#define ADC_DCCMP4_COMP1_S 16 |
Definition at line 6314 of file tm4c123fe6pm.h.
#define ADC_DCCMP5_COMP0_M 0x00000FFF |
Definition at line 6323 of file tm4c123fe6pm.h.
#define ADC_DCCMP5_COMP0_S 0 |
Definition at line 6325 of file tm4c123fe6pm.h.
#define ADC_DCCMP5_COMP1_M 0x0FFF0000 |
Definition at line 6322 of file tm4c123fe6pm.h.
#define ADC_DCCMP5_COMP1_S 16 |
Definition at line 6324 of file tm4c123fe6pm.h.
#define ADC_DCCMP6_COMP0_M 0x00000FFF |
Definition at line 6333 of file tm4c123fe6pm.h.
#define ADC_DCCMP6_COMP0_S 0 |
Definition at line 6335 of file tm4c123fe6pm.h.
#define ADC_DCCMP6_COMP1_M 0x0FFF0000 |
Definition at line 6332 of file tm4c123fe6pm.h.
#define ADC_DCCMP6_COMP1_S 16 |
Definition at line 6334 of file tm4c123fe6pm.h.
#define ADC_DCCMP7_COMP0_M 0x00000FFF |
Definition at line 6343 of file tm4c123fe6pm.h.
#define ADC_DCCMP7_COMP0_S 0 |
Definition at line 6345 of file tm4c123fe6pm.h.
#define ADC_DCCMP7_COMP1_M 0x0FFF0000 |
Definition at line 6342 of file tm4c123fe6pm.h.
#define ADC_DCCMP7_COMP1_S 16 |
Definition at line 6344 of file tm4c123fe6pm.h.
#define ADC_DCCTL0_CIC_HIGH 0x0000000C |
Definition at line 6078 of file tm4c123fe6pm.h.
#define ADC_DCCTL0_CIC_LOW 0x00000000 |
Definition at line 6076 of file tm4c123fe6pm.h.
#define ADC_DCCTL0_CIC_M 0x0000000C |
Definition at line 6075 of file tm4c123fe6pm.h.
#define ADC_DCCTL0_CIC_MID 0x00000004 |
Definition at line 6077 of file tm4c123fe6pm.h.
#define ADC_DCCTL0_CIE 0x00000010 |
Definition at line 6074 of file tm4c123fe6pm.h.
#define ADC_DCCTL0_CIM_ALWAYS 0x00000000 |
Definition at line 6080 of file tm4c123fe6pm.h.
#define ADC_DCCTL0_CIM_HALWAYS 0x00000002 |
Definition at line 6082 of file tm4c123fe6pm.h.
#define ADC_DCCTL0_CIM_HONCE 0x00000003 |
Definition at line 6083 of file tm4c123fe6pm.h.
#define ADC_DCCTL0_CIM_M 0x00000003 |
Definition at line 6079 of file tm4c123fe6pm.h.
#define ADC_DCCTL0_CIM_ONCE 0x00000001 |
Definition at line 6081 of file tm4c123fe6pm.h.
#define ADC_DCCTL0_CTC_HIGH 0x00000C00 |
Definition at line 6068 of file tm4c123fe6pm.h.
#define ADC_DCCTL0_CTC_LOW 0x00000000 |
Definition at line 6066 of file tm4c123fe6pm.h.
#define ADC_DCCTL0_CTC_M 0x00000C00 |
Definition at line 6065 of file tm4c123fe6pm.h.
#define ADC_DCCTL0_CTC_MID 0x00000400 |
Definition at line 6067 of file tm4c123fe6pm.h.
#define ADC_DCCTL0_CTE 0x00001000 |
Definition at line 6064 of file tm4c123fe6pm.h.
#define ADC_DCCTL0_CTM_ALWAYS 0x00000000 |
Definition at line 6070 of file tm4c123fe6pm.h.
#define ADC_DCCTL0_CTM_HALWAYS 0x00000200 |
Definition at line 6072 of file tm4c123fe6pm.h.
#define ADC_DCCTL0_CTM_HONCE 0x00000300 |
Definition at line 6073 of file tm4c123fe6pm.h.
#define ADC_DCCTL0_CTM_M 0x00000300 |
Definition at line 6069 of file tm4c123fe6pm.h.
#define ADC_DCCTL0_CTM_ONCE 0x00000100 |
Definition at line 6071 of file tm4c123fe6pm.h.
#define ADC_DCCTL1_CIC_HIGH 0x0000000C |
Definition at line 6104 of file tm4c123fe6pm.h.
#define ADC_DCCTL1_CIC_LOW 0x00000000 |
Definition at line 6102 of file tm4c123fe6pm.h.
#define ADC_DCCTL1_CIC_M 0x0000000C |
Definition at line 6101 of file tm4c123fe6pm.h.
#define ADC_DCCTL1_CIC_MID 0x00000004 |
Definition at line 6103 of file tm4c123fe6pm.h.
#define ADC_DCCTL1_CIE 0x00000010 |
Definition at line 6100 of file tm4c123fe6pm.h.
#define ADC_DCCTL1_CIM_ALWAYS 0x00000000 |
Definition at line 6106 of file tm4c123fe6pm.h.
#define ADC_DCCTL1_CIM_HALWAYS 0x00000002 |
Definition at line 6108 of file tm4c123fe6pm.h.
#define ADC_DCCTL1_CIM_HONCE 0x00000003 |
Definition at line 6109 of file tm4c123fe6pm.h.
#define ADC_DCCTL1_CIM_M 0x00000003 |
Definition at line 6105 of file tm4c123fe6pm.h.
#define ADC_DCCTL1_CIM_ONCE 0x00000001 |
Definition at line 6107 of file tm4c123fe6pm.h.
#define ADC_DCCTL1_CTC_HIGH 0x00000C00 |
Definition at line 6094 of file tm4c123fe6pm.h.
#define ADC_DCCTL1_CTC_LOW 0x00000000 |
Definition at line 6092 of file tm4c123fe6pm.h.
#define ADC_DCCTL1_CTC_M 0x00000C00 |
Definition at line 6091 of file tm4c123fe6pm.h.
#define ADC_DCCTL1_CTC_MID 0x00000400 |
Definition at line 6093 of file tm4c123fe6pm.h.
#define ADC_DCCTL1_CTE 0x00001000 |
Definition at line 6090 of file tm4c123fe6pm.h.
#define ADC_DCCTL1_CTM_ALWAYS 0x00000000 |
Definition at line 6096 of file tm4c123fe6pm.h.
#define ADC_DCCTL1_CTM_HALWAYS 0x00000200 |
Definition at line 6098 of file tm4c123fe6pm.h.
#define ADC_DCCTL1_CTM_HONCE 0x00000300 |
Definition at line 6099 of file tm4c123fe6pm.h.
#define ADC_DCCTL1_CTM_M 0x00000300 |
Definition at line 6095 of file tm4c123fe6pm.h.
#define ADC_DCCTL1_CTM_ONCE 0x00000100 |
Definition at line 6097 of file tm4c123fe6pm.h.
#define ADC_DCCTL2_CIC_HIGH 0x0000000C |
Definition at line 6130 of file tm4c123fe6pm.h.
#define ADC_DCCTL2_CIC_LOW 0x00000000 |
Definition at line 6128 of file tm4c123fe6pm.h.
#define ADC_DCCTL2_CIC_M 0x0000000C |
Definition at line 6127 of file tm4c123fe6pm.h.
#define ADC_DCCTL2_CIC_MID 0x00000004 |
Definition at line 6129 of file tm4c123fe6pm.h.
#define ADC_DCCTL2_CIE 0x00000010 |
Definition at line 6126 of file tm4c123fe6pm.h.
#define ADC_DCCTL2_CIM_ALWAYS 0x00000000 |
Definition at line 6132 of file tm4c123fe6pm.h.
#define ADC_DCCTL2_CIM_HALWAYS 0x00000002 |
Definition at line 6134 of file tm4c123fe6pm.h.
#define ADC_DCCTL2_CIM_HONCE 0x00000003 |
Definition at line 6135 of file tm4c123fe6pm.h.
#define ADC_DCCTL2_CIM_M 0x00000003 |
Definition at line 6131 of file tm4c123fe6pm.h.
#define ADC_DCCTL2_CIM_ONCE 0x00000001 |
Definition at line 6133 of file tm4c123fe6pm.h.
#define ADC_DCCTL2_CTC_HIGH 0x00000C00 |
Definition at line 6120 of file tm4c123fe6pm.h.
#define ADC_DCCTL2_CTC_LOW 0x00000000 |
Definition at line 6118 of file tm4c123fe6pm.h.
#define ADC_DCCTL2_CTC_M 0x00000C00 |
Definition at line 6117 of file tm4c123fe6pm.h.
#define ADC_DCCTL2_CTC_MID 0x00000400 |
Definition at line 6119 of file tm4c123fe6pm.h.
#define ADC_DCCTL2_CTE 0x00001000 |
Definition at line 6116 of file tm4c123fe6pm.h.
#define ADC_DCCTL2_CTM_ALWAYS 0x00000000 |
Definition at line 6122 of file tm4c123fe6pm.h.
#define ADC_DCCTL2_CTM_HALWAYS 0x00000200 |
Definition at line 6124 of file tm4c123fe6pm.h.
#define ADC_DCCTL2_CTM_HONCE 0x00000300 |
Definition at line 6125 of file tm4c123fe6pm.h.
#define ADC_DCCTL2_CTM_M 0x00000300 |
Definition at line 6121 of file tm4c123fe6pm.h.
#define ADC_DCCTL2_CTM_ONCE 0x00000100 |
Definition at line 6123 of file tm4c123fe6pm.h.
#define ADC_DCCTL3_CIC_HIGH 0x0000000C |
Definition at line 6156 of file tm4c123fe6pm.h.
#define ADC_DCCTL3_CIC_LOW 0x00000000 |
Definition at line 6154 of file tm4c123fe6pm.h.
#define ADC_DCCTL3_CIC_M 0x0000000C |
Definition at line 6153 of file tm4c123fe6pm.h.
#define ADC_DCCTL3_CIC_MID 0x00000004 |
Definition at line 6155 of file tm4c123fe6pm.h.
#define ADC_DCCTL3_CIE 0x00000010 |
Definition at line 6152 of file tm4c123fe6pm.h.
#define ADC_DCCTL3_CIM_ALWAYS 0x00000000 |
Definition at line 6158 of file tm4c123fe6pm.h.
#define ADC_DCCTL3_CIM_HALWAYS 0x00000002 |
Definition at line 6160 of file tm4c123fe6pm.h.
#define ADC_DCCTL3_CIM_HONCE 0x00000003 |
Definition at line 6161 of file tm4c123fe6pm.h.
#define ADC_DCCTL3_CIM_M 0x00000003 |
Definition at line 6157 of file tm4c123fe6pm.h.
#define ADC_DCCTL3_CIM_ONCE 0x00000001 |
Definition at line 6159 of file tm4c123fe6pm.h.
#define ADC_DCCTL3_CTC_HIGH 0x00000C00 |
Definition at line 6146 of file tm4c123fe6pm.h.
#define ADC_DCCTL3_CTC_LOW 0x00000000 |
Definition at line 6144 of file tm4c123fe6pm.h.
#define ADC_DCCTL3_CTC_M 0x00000C00 |
Definition at line 6143 of file tm4c123fe6pm.h.
#define ADC_DCCTL3_CTC_MID 0x00000400 |
Definition at line 6145 of file tm4c123fe6pm.h.
#define ADC_DCCTL3_CTE 0x00001000 |
Definition at line 6142 of file tm4c123fe6pm.h.
#define ADC_DCCTL3_CTM_ALWAYS 0x00000000 |
Definition at line 6148 of file tm4c123fe6pm.h.
#define ADC_DCCTL3_CTM_HALWAYS 0x00000200 |
Definition at line 6150 of file tm4c123fe6pm.h.
#define ADC_DCCTL3_CTM_HONCE 0x00000300 |
Definition at line 6151 of file tm4c123fe6pm.h.
#define ADC_DCCTL3_CTM_M 0x00000300 |
Definition at line 6147 of file tm4c123fe6pm.h.
#define ADC_DCCTL3_CTM_ONCE 0x00000100 |
Definition at line 6149 of file tm4c123fe6pm.h.
#define ADC_DCCTL4_CIC_HIGH 0x0000000C |
Definition at line 6182 of file tm4c123fe6pm.h.
#define ADC_DCCTL4_CIC_LOW 0x00000000 |
Definition at line 6180 of file tm4c123fe6pm.h.
#define ADC_DCCTL4_CIC_M 0x0000000C |
Definition at line 6179 of file tm4c123fe6pm.h.
#define ADC_DCCTL4_CIC_MID 0x00000004 |
Definition at line 6181 of file tm4c123fe6pm.h.
#define ADC_DCCTL4_CIE 0x00000010 |
Definition at line 6178 of file tm4c123fe6pm.h.
#define ADC_DCCTL4_CIM_ALWAYS 0x00000000 |
Definition at line 6184 of file tm4c123fe6pm.h.
#define ADC_DCCTL4_CIM_HALWAYS 0x00000002 |
Definition at line 6186 of file tm4c123fe6pm.h.
#define ADC_DCCTL4_CIM_HONCE 0x00000003 |
Definition at line 6187 of file tm4c123fe6pm.h.
#define ADC_DCCTL4_CIM_M 0x00000003 |
Definition at line 6183 of file tm4c123fe6pm.h.
#define ADC_DCCTL4_CIM_ONCE 0x00000001 |
Definition at line 6185 of file tm4c123fe6pm.h.
#define ADC_DCCTL4_CTC_HIGH 0x00000C00 |
Definition at line 6172 of file tm4c123fe6pm.h.
#define ADC_DCCTL4_CTC_LOW 0x00000000 |
Definition at line 6170 of file tm4c123fe6pm.h.
#define ADC_DCCTL4_CTC_M 0x00000C00 |
Definition at line 6169 of file tm4c123fe6pm.h.
#define ADC_DCCTL4_CTC_MID 0x00000400 |
Definition at line 6171 of file tm4c123fe6pm.h.
#define ADC_DCCTL4_CTE 0x00001000 |
Definition at line 6168 of file tm4c123fe6pm.h.
#define ADC_DCCTL4_CTM_ALWAYS 0x00000000 |
Definition at line 6174 of file tm4c123fe6pm.h.
#define ADC_DCCTL4_CTM_HALWAYS 0x00000200 |
Definition at line 6176 of file tm4c123fe6pm.h.
#define ADC_DCCTL4_CTM_HONCE 0x00000300 |
Definition at line 6177 of file tm4c123fe6pm.h.
#define ADC_DCCTL4_CTM_M 0x00000300 |
Definition at line 6173 of file tm4c123fe6pm.h.
#define ADC_DCCTL4_CTM_ONCE 0x00000100 |
Definition at line 6175 of file tm4c123fe6pm.h.
#define ADC_DCCTL5_CIC_HIGH 0x0000000C |
Definition at line 6208 of file tm4c123fe6pm.h.
#define ADC_DCCTL5_CIC_LOW 0x00000000 |
Definition at line 6206 of file tm4c123fe6pm.h.
#define ADC_DCCTL5_CIC_M 0x0000000C |
Definition at line 6205 of file tm4c123fe6pm.h.
#define ADC_DCCTL5_CIC_MID 0x00000004 |
Definition at line 6207 of file tm4c123fe6pm.h.
#define ADC_DCCTL5_CIE 0x00000010 |
Definition at line 6204 of file tm4c123fe6pm.h.
#define ADC_DCCTL5_CIM_ALWAYS 0x00000000 |
Definition at line 6210 of file tm4c123fe6pm.h.
#define ADC_DCCTL5_CIM_HALWAYS 0x00000002 |
Definition at line 6212 of file tm4c123fe6pm.h.
#define ADC_DCCTL5_CIM_HONCE 0x00000003 |
Definition at line 6213 of file tm4c123fe6pm.h.
#define ADC_DCCTL5_CIM_M 0x00000003 |
Definition at line 6209 of file tm4c123fe6pm.h.
#define ADC_DCCTL5_CIM_ONCE 0x00000001 |
Definition at line 6211 of file tm4c123fe6pm.h.
#define ADC_DCCTL5_CTC_HIGH 0x00000C00 |
Definition at line 6198 of file tm4c123fe6pm.h.
#define ADC_DCCTL5_CTC_LOW 0x00000000 |
Definition at line 6196 of file tm4c123fe6pm.h.
#define ADC_DCCTL5_CTC_M 0x00000C00 |
Definition at line 6195 of file tm4c123fe6pm.h.
#define ADC_DCCTL5_CTC_MID 0x00000400 |
Definition at line 6197 of file tm4c123fe6pm.h.
#define ADC_DCCTL5_CTE 0x00001000 |
Definition at line 6194 of file tm4c123fe6pm.h.
#define ADC_DCCTL5_CTM_ALWAYS 0x00000000 |
Definition at line 6200 of file tm4c123fe6pm.h.
#define ADC_DCCTL5_CTM_HALWAYS 0x00000200 |
Definition at line 6202 of file tm4c123fe6pm.h.
#define ADC_DCCTL5_CTM_HONCE 0x00000300 |
Definition at line 6203 of file tm4c123fe6pm.h.
#define ADC_DCCTL5_CTM_M 0x00000300 |
Definition at line 6199 of file tm4c123fe6pm.h.
#define ADC_DCCTL5_CTM_ONCE 0x00000100 |
Definition at line 6201 of file tm4c123fe6pm.h.
#define ADC_DCCTL6_CIC_HIGH 0x0000000C |
Definition at line 6234 of file tm4c123fe6pm.h.
#define ADC_DCCTL6_CIC_LOW 0x00000000 |
Definition at line 6232 of file tm4c123fe6pm.h.
#define ADC_DCCTL6_CIC_M 0x0000000C |
Definition at line 6231 of file tm4c123fe6pm.h.
#define ADC_DCCTL6_CIC_MID 0x00000004 |
Definition at line 6233 of file tm4c123fe6pm.h.
#define ADC_DCCTL6_CIE 0x00000010 |
Definition at line 6230 of file tm4c123fe6pm.h.
#define ADC_DCCTL6_CIM_ALWAYS 0x00000000 |
Definition at line 6236 of file tm4c123fe6pm.h.
#define ADC_DCCTL6_CIM_HALWAYS 0x00000002 |
Definition at line 6238 of file tm4c123fe6pm.h.
#define ADC_DCCTL6_CIM_HONCE 0x00000003 |
Definition at line 6239 of file tm4c123fe6pm.h.
#define ADC_DCCTL6_CIM_M 0x00000003 |
Definition at line 6235 of file tm4c123fe6pm.h.
#define ADC_DCCTL6_CIM_ONCE 0x00000001 |
Definition at line 6237 of file tm4c123fe6pm.h.
#define ADC_DCCTL6_CTC_HIGH 0x00000C00 |
Definition at line 6224 of file tm4c123fe6pm.h.
#define ADC_DCCTL6_CTC_LOW 0x00000000 |
Definition at line 6222 of file tm4c123fe6pm.h.
#define ADC_DCCTL6_CTC_M 0x00000C00 |
Definition at line 6221 of file tm4c123fe6pm.h.
#define ADC_DCCTL6_CTC_MID 0x00000400 |
Definition at line 6223 of file tm4c123fe6pm.h.
#define ADC_DCCTL6_CTE 0x00001000 |
Definition at line 6220 of file tm4c123fe6pm.h.
#define ADC_DCCTL6_CTM_ALWAYS 0x00000000 |
Definition at line 6226 of file tm4c123fe6pm.h.
#define ADC_DCCTL6_CTM_HALWAYS 0x00000200 |
Definition at line 6228 of file tm4c123fe6pm.h.
#define ADC_DCCTL6_CTM_HONCE 0x00000300 |
Definition at line 6229 of file tm4c123fe6pm.h.
#define ADC_DCCTL6_CTM_M 0x00000300 |
Definition at line 6225 of file tm4c123fe6pm.h.
#define ADC_DCCTL6_CTM_ONCE 0x00000100 |
Definition at line 6227 of file tm4c123fe6pm.h.
#define ADC_DCCTL7_CIC_HIGH 0x0000000C |
Definition at line 6260 of file tm4c123fe6pm.h.
#define ADC_DCCTL7_CIC_LOW 0x00000000 |
Definition at line 6258 of file tm4c123fe6pm.h.
#define ADC_DCCTL7_CIC_M 0x0000000C |
Definition at line 6257 of file tm4c123fe6pm.h.
#define ADC_DCCTL7_CIC_MID 0x00000004 |
Definition at line 6259 of file tm4c123fe6pm.h.
#define ADC_DCCTL7_CIE 0x00000010 |
Definition at line 6256 of file tm4c123fe6pm.h.
#define ADC_DCCTL7_CIM_ALWAYS 0x00000000 |
Definition at line 6262 of file tm4c123fe6pm.h.
#define ADC_DCCTL7_CIM_HALWAYS 0x00000002 |
Definition at line 6264 of file tm4c123fe6pm.h.
#define ADC_DCCTL7_CIM_HONCE 0x00000003 |
Definition at line 6265 of file tm4c123fe6pm.h.
#define ADC_DCCTL7_CIM_M 0x00000003 |
Definition at line 6261 of file tm4c123fe6pm.h.
#define ADC_DCCTL7_CIM_ONCE 0x00000001 |
Definition at line 6263 of file tm4c123fe6pm.h.
#define ADC_DCCTL7_CTC_HIGH 0x00000C00 |
Definition at line 6250 of file tm4c123fe6pm.h.
#define ADC_DCCTL7_CTC_LOW 0x00000000 |
Definition at line 6248 of file tm4c123fe6pm.h.
#define ADC_DCCTL7_CTC_M 0x00000C00 |
Definition at line 6247 of file tm4c123fe6pm.h.
#define ADC_DCCTL7_CTC_MID 0x00000400 |
Definition at line 6249 of file tm4c123fe6pm.h.
#define ADC_DCCTL7_CTE 0x00001000 |
Definition at line 6246 of file tm4c123fe6pm.h.
#define ADC_DCCTL7_CTM_ALWAYS 0x00000000 |
Definition at line 6252 of file tm4c123fe6pm.h.
#define ADC_DCCTL7_CTM_HALWAYS 0x00000200 |
Definition at line 6254 of file tm4c123fe6pm.h.
#define ADC_DCCTL7_CTM_HONCE 0x00000300 |
Definition at line 6255 of file tm4c123fe6pm.h.
#define ADC_DCCTL7_CTM_M 0x00000300 |
Definition at line 6251 of file tm4c123fe6pm.h.
#define ADC_DCCTL7_CTM_ONCE 0x00000100 |
Definition at line 6253 of file tm4c123fe6pm.h.
#define ADC_DCISC_DCINT0 0x00000001 |
Definition at line 5649 of file tm4c123fe6pm.h.
#define ADC_DCISC_DCINT1 0x00000002 |
Definition at line 5647 of file tm4c123fe6pm.h.
#define ADC_DCISC_DCINT2 0x00000004 |
Definition at line 5645 of file tm4c123fe6pm.h.
#define ADC_DCISC_DCINT3 0x00000008 |
Definition at line 5643 of file tm4c123fe6pm.h.
#define ADC_DCISC_DCINT4 0x00000010 |
Definition at line 5641 of file tm4c123fe6pm.h.
#define ADC_DCISC_DCINT5 0x00000020 |
Definition at line 5639 of file tm4c123fe6pm.h.
#define ADC_DCISC_DCINT6 0x00000040 |
Definition at line 5637 of file tm4c123fe6pm.h.
#define ADC_DCISC_DCINT7 0x00000080 |
Definition at line 5635 of file tm4c123fe6pm.h.
#define ADC_DCRIC_DCINT0 0x00000001 |
Definition at line 6057 of file tm4c123fe6pm.h.
#define ADC_DCRIC_DCINT1 0x00000002 |
Definition at line 6056 of file tm4c123fe6pm.h.
#define ADC_DCRIC_DCINT2 0x00000004 |
Definition at line 6055 of file tm4c123fe6pm.h.
#define ADC_DCRIC_DCINT3 0x00000008 |
Definition at line 6054 of file tm4c123fe6pm.h.
#define ADC_DCRIC_DCINT4 0x00000010 |
Definition at line 6053 of file tm4c123fe6pm.h.
#define ADC_DCRIC_DCINT5 0x00000020 |
Definition at line 6052 of file tm4c123fe6pm.h.
#define ADC_DCRIC_DCINT6 0x00000040 |
Definition at line 6051 of file tm4c123fe6pm.h.
#define ADC_DCRIC_DCINT7 0x00000080 |
Definition at line 6050 of file tm4c123fe6pm.h.
#define ADC_DCRIC_DCTRIG0 0x00010000 |
Definition at line 6049 of file tm4c123fe6pm.h.
#define ADC_DCRIC_DCTRIG1 0x00020000 |
Definition at line 6048 of file tm4c123fe6pm.h.
#define ADC_DCRIC_DCTRIG2 0x00040000 |
Definition at line 6047 of file tm4c123fe6pm.h.
#define ADC_DCRIC_DCTRIG3 0x00080000 |
Definition at line 6046 of file tm4c123fe6pm.h.
#define ADC_DCRIC_DCTRIG4 0x00100000 |
Definition at line 6045 of file tm4c123fe6pm.h.
#define ADC_DCRIC_DCTRIG5 0x00200000 |
Definition at line 6044 of file tm4c123fe6pm.h.
#define ADC_DCRIC_DCTRIG6 0x00400000 |
Definition at line 6043 of file tm4c123fe6pm.h.
#define ADC_DCRIC_DCTRIG7 0x00800000 |
Definition at line 6042 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM0_ALWAYS 0x0000000F |
Definition at line 5529 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM0_COMP0 0x00000001 |
Definition at line 5521 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM0_COMP1 0x00000002 |
Definition at line 5522 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM0_EXTERNAL 0x00000004 |
Definition at line 5523 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM0_M 0x0000000F |
Definition at line 5519 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM0_PROCESSOR 0x00000000 |
Definition at line 5520 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM0_PWM0 0x00000006 |
Definition at line 5525 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM0_PWM1 0x00000007 |
Definition at line 5526 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM0_PWM2 0x00000008 |
Definition at line 5527 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM0_PWM3 0x00000009 |
Definition at line 5528 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM0_TIMER 0x00000005 |
Definition at line 5524 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM1_ALWAYS 0x000000F0 |
Definition at line 5518 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM1_COMP0 0x00000010 |
Definition at line 5510 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM1_COMP1 0x00000020 |
Definition at line 5511 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM1_EXTERNAL 0x00000040 |
Definition at line 5512 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM1_M 0x000000F0 |
Definition at line 5508 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM1_PROCESSOR 0x00000000 |
Definition at line 5509 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM1_PWM0 0x00000060 |
Definition at line 5514 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM1_PWM1 0x00000070 |
Definition at line 5515 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM1_PWM2 0x00000080 |
Definition at line 5516 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM1_PWM3 0x00000090 |
Definition at line 5517 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM1_TIMER 0x00000050 |
Definition at line 5513 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM2_ALWAYS 0x00000F00 |
Definition at line 5507 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM2_COMP0 0x00000100 |
Definition at line 5499 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM2_COMP1 0x00000200 |
Definition at line 5500 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM2_EXTERNAL 0x00000400 |
Definition at line 5501 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM2_M 0x00000F00 |
Definition at line 5497 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM2_PROCESSOR 0x00000000 |
Definition at line 5498 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM2_PWM0 0x00000600 |
Definition at line 5503 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM2_PWM1 0x00000700 |
Definition at line 5504 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM2_PWM2 0x00000800 |
Definition at line 5505 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM2_PWM3 0x00000900 |
Definition at line 5506 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM2_TIMER 0x00000500 |
Definition at line 5502 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM3_ALWAYS 0x0000F000 |
Definition at line 5496 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM3_COMP0 0x00001000 |
Definition at line 5488 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM3_COMP1 0x00002000 |
Definition at line 5489 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM3_EXTERNAL 0x00004000 |
Definition at line 5490 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM3_M 0x0000F000 |
Definition at line 5486 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM3_PROCESSOR 0x00000000 |
Definition at line 5487 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM3_PWM0 0x00006000 |
Definition at line 5492 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM3_PWM1 0x00007000 |
Definition at line 5493 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM3_PWM2 0x00008000 |
Definition at line 5494 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM3_PWM3 0x00009000 |
Definition at line 5495 of file tm4c123fe6pm.h.
#define ADC_EMUX_EM3_TIMER 0x00005000 |
Definition at line 5491 of file tm4c123fe6pm.h.
#define ADC_IM_DCONSS0 0x00010000 |
Definition at line 5446 of file tm4c123fe6pm.h.
#define ADC_IM_DCONSS1 0x00020000 |
Definition at line 5444 of file tm4c123fe6pm.h.
#define ADC_IM_DCONSS2 0x00040000 |
Definition at line 5442 of file tm4c123fe6pm.h.
#define ADC_IM_DCONSS3 0x00080000 |
Definition at line 5440 of file tm4c123fe6pm.h.
#define ADC_IM_MASK0 0x00000001 |
Definition at line 5451 of file tm4c123fe6pm.h.
#define ADC_IM_MASK1 0x00000002 |
Definition at line 5450 of file tm4c123fe6pm.h.
#define ADC_IM_MASK2 0x00000004 |
Definition at line 5449 of file tm4c123fe6pm.h.
#define ADC_IM_MASK3 0x00000008 |
Definition at line 5448 of file tm4c123fe6pm.h.
#define ADC_ISC_DCINSS0 0x00010000 |
Definition at line 5464 of file tm4c123fe6pm.h.
#define ADC_ISC_DCINSS1 0x00020000 |
Definition at line 5462 of file tm4c123fe6pm.h.
#define ADC_ISC_DCINSS2 0x00040000 |
Definition at line 5460 of file tm4c123fe6pm.h.
#define ADC_ISC_DCINSS3 0x00080000 |
Definition at line 5458 of file tm4c123fe6pm.h.
#define ADC_ISC_IN0 0x00000001 |
Definition at line 5469 of file tm4c123fe6pm.h.
#define ADC_ISC_IN1 0x00000002 |
Definition at line 5468 of file tm4c123fe6pm.h.
#define ADC_ISC_IN2 0x00000004 |
Definition at line 5467 of file tm4c123fe6pm.h.
#define ADC_ISC_IN3 0x00000008 |
Definition at line 5466 of file tm4c123fe6pm.h.
#define ADC_OSTAT_OV0 0x00000001 |
Definition at line 5479 of file tm4c123fe6pm.h.
#define ADC_OSTAT_OV1 0x00000002 |
Definition at line 5478 of file tm4c123fe6pm.h.
#define ADC_OSTAT_OV2 0x00000004 |
Definition at line 5477 of file tm4c123fe6pm.h.
#define ADC_OSTAT_OV3 0x00000008 |
Definition at line 5476 of file tm4c123fe6pm.h.
#define ADC_PC_SR_125K 0x00000001 |
Definition at line 6373 of file tm4c123fe6pm.h.
#define ADC_PC_SR_1M 0x00000007 |
Definition at line 6376 of file tm4c123fe6pm.h.
#define ADC_PC_SR_250K 0x00000003 |
Definition at line 6374 of file tm4c123fe6pm.h.
#define ADC_PC_SR_500K 0x00000005 |
Definition at line 6375 of file tm4c123fe6pm.h.
#define ADC_PC_SR_M 0x0000000F |
Definition at line 6372 of file tm4c123fe6pm.h.
#define ADC_PP_CH_M 0x000003F0 |
Definition at line 6357 of file tm4c123fe6pm.h.
#define ADC_PP_CH_S 4 |
Definition at line 6365 of file tm4c123fe6pm.h.
#define ADC_PP_DC_M 0x0000FC00 |
Definition at line 6356 of file tm4c123fe6pm.h.
#define ADC_PP_DC_S 10 |
Definition at line 6364 of file tm4c123fe6pm.h.
#define ADC_PP_MSR_125K 0x00000001 |
Definition at line 6359 of file tm4c123fe6pm.h.
#define ADC_PP_MSR_1M 0x00000007 |
Definition at line 6362 of file tm4c123fe6pm.h.
#define ADC_PP_MSR_250K 0x00000003 |
Definition at line 6360 of file tm4c123fe6pm.h.
#define ADC_PP_MSR_500K 0x00000005 |
Definition at line 6361 of file tm4c123fe6pm.h.
#define ADC_PP_MSR_M 0x0000000F |
Definition at line 6358 of file tm4c123fe6pm.h.
#define ADC_PP_RSL_M 0x007C0000 |
Definition at line 6353 of file tm4c123fe6pm.h.
#define ADC_PP_RSL_S 18 |
Definition at line 6363 of file tm4c123fe6pm.h.
#define ADC_PP_TS 0x00800000 |
Definition at line 6352 of file tm4c123fe6pm.h.
#define ADC_PP_TYPE_M 0x00030000 |
Definition at line 6354 of file tm4c123fe6pm.h.
#define ADC_PP_TYPE_SAR 0x00000000 |
Definition at line 6355 of file tm4c123fe6pm.h.
#define ADC_PSSI_GSYNC 0x80000000 |
Definition at line 5609 of file tm4c123fe6pm.h.
#define ADC_PSSI_SS0 0x00000001 |
Definition at line 5614 of file tm4c123fe6pm.h.
#define ADC_PSSI_SS1 0x00000002 |
Definition at line 5613 of file tm4c123fe6pm.h.
#define ADC_PSSI_SS2 0x00000004 |
Definition at line 5612 of file tm4c123fe6pm.h.
#define ADC_PSSI_SS3 0x00000008 |
Definition at line 5611 of file tm4c123fe6pm.h.
#define ADC_PSSI_SYNCWAIT 0x08000000 |
Definition at line 5610 of file tm4c123fe6pm.h.
#define ADC_RIS_INR0 0x00000001 |
Definition at line 5433 of file tm4c123fe6pm.h.
#define ADC_RIS_INR1 0x00000002 |
Definition at line 5432 of file tm4c123fe6pm.h.
#define ADC_RIS_INR2 0x00000004 |
Definition at line 5431 of file tm4c123fe6pm.h.
#define ADC_RIS_INR3 0x00000008 |
Definition at line 5430 of file tm4c123fe6pm.h.
#define ADC_RIS_INRDC 0x00010000 |
Definition at line 5428 of file tm4c123fe6pm.h.
#define ADC_SAC_AVG_16X 0x00000004 |
Definition at line 5626 of file tm4c123fe6pm.h.
#define ADC_SAC_AVG_2X 0x00000001 |
Definition at line 5623 of file tm4c123fe6pm.h.
#define ADC_SAC_AVG_32X 0x00000005 |
Definition at line 5627 of file tm4c123fe6pm.h.
#define ADC_SAC_AVG_4X 0x00000002 |
Definition at line 5624 of file tm4c123fe6pm.h.
#define ADC_SAC_AVG_64X 0x00000006 |
Definition at line 5628 of file tm4c123fe6pm.h.
#define ADC_SAC_AVG_8X 0x00000003 |
Definition at line 5625 of file tm4c123fe6pm.h.
#define ADC_SAC_AVG_M 0x00000007 |
Definition at line 5621 of file tm4c123fe6pm.h.
#define ADC_SAC_AVG_OFF 0x00000000 |
Definition at line 5622 of file tm4c123fe6pm.h.
#define ADC_SPC_PHASE_0 0x00000000 |
Definition at line 5587 of file tm4c123fe6pm.h.
#define ADC_SPC_PHASE_112_5 0x00000005 |
Definition at line 5592 of file tm4c123fe6pm.h.
#define ADC_SPC_PHASE_135 0x00000006 |
Definition at line 5593 of file tm4c123fe6pm.h.
#define ADC_SPC_PHASE_157_5 0x00000007 |
Definition at line 5594 of file tm4c123fe6pm.h.
#define ADC_SPC_PHASE_180 0x00000008 |
Definition at line 5595 of file tm4c123fe6pm.h.
#define ADC_SPC_PHASE_202_5 0x00000009 |
Definition at line 5596 of file tm4c123fe6pm.h.
#define ADC_SPC_PHASE_225 0x0000000A |
Definition at line 5597 of file tm4c123fe6pm.h.
#define ADC_SPC_PHASE_22_5 0x00000001 |
Definition at line 5588 of file tm4c123fe6pm.h.
#define ADC_SPC_PHASE_247_5 0x0000000B |
Definition at line 5598 of file tm4c123fe6pm.h.
#define ADC_SPC_PHASE_270 0x0000000C |
Definition at line 5599 of file tm4c123fe6pm.h.
#define ADC_SPC_PHASE_292_5 0x0000000D |
Definition at line 5600 of file tm4c123fe6pm.h.
#define ADC_SPC_PHASE_315 0x0000000E |
Definition at line 5601 of file tm4c123fe6pm.h.
#define ADC_SPC_PHASE_337_5 0x0000000F |
Definition at line 5602 of file tm4c123fe6pm.h.
#define ADC_SPC_PHASE_45 0x00000002 |
Definition at line 5589 of file tm4c123fe6pm.h.
#define ADC_SPC_PHASE_67_5 0x00000003 |
Definition at line 5590 of file tm4c123fe6pm.h.
#define ADC_SPC_PHASE_90 0x00000004 |
Definition at line 5591 of file tm4c123fe6pm.h.
#define ADC_SPC_PHASE_M 0x0000000F |
Definition at line 5586 of file tm4c123fe6pm.h.
#define ADC_SSCTL0_D0 0x00000001 |
Definition at line 5727 of file tm4c123fe6pm.h.
#define ADC_SSCTL0_D1 0x00000010 |
Definition at line 5722 of file tm4c123fe6pm.h.
#define ADC_SSCTL0_D2 0x00000100 |
Definition at line 5717 of file tm4c123fe6pm.h.
#define ADC_SSCTL0_D3 0x00001000 |
Definition at line 5712 of file tm4c123fe6pm.h.
#define ADC_SSCTL0_D4 0x00010000 |
Definition at line 5707 of file tm4c123fe6pm.h.
#define ADC_SSCTL0_D5 0x00100000 |
Definition at line 5702 of file tm4c123fe6pm.h.
#define ADC_SSCTL0_D6 0x01000000 |
Definition at line 5697 of file tm4c123fe6pm.h.
#define ADC_SSCTL0_D7 0x10000000 |
Definition at line 5692 of file tm4c123fe6pm.h.
#define ADC_SSCTL0_END0 0x00000002 |
Definition at line 5726 of file tm4c123fe6pm.h.
#define ADC_SSCTL0_END1 0x00000020 |
Definition at line 5721 of file tm4c123fe6pm.h.
#define ADC_SSCTL0_END2 0x00000200 |
Definition at line 5716 of file tm4c123fe6pm.h.
#define ADC_SSCTL0_END3 0x00002000 |
Definition at line 5711 of file tm4c123fe6pm.h.
#define ADC_SSCTL0_END4 0x00020000 |
Definition at line 5706 of file tm4c123fe6pm.h.
#define ADC_SSCTL0_END5 0x00200000 |
Definition at line 5701 of file tm4c123fe6pm.h.
#define ADC_SSCTL0_END6 0x02000000 |
Definition at line 5696 of file tm4c123fe6pm.h.
#define ADC_SSCTL0_END7 0x20000000 |
Definition at line 5691 of file tm4c123fe6pm.h.
#define ADC_SSCTL0_IE0 0x00000004 |
Definition at line 5725 of file tm4c123fe6pm.h.
#define ADC_SSCTL0_IE1 0x00000040 |
Definition at line 5720 of file tm4c123fe6pm.h.
#define ADC_SSCTL0_IE2 0x00000400 |
Definition at line 5715 of file tm4c123fe6pm.h.
#define ADC_SSCTL0_IE3 0x00004000 |
Definition at line 5710 of file tm4c123fe6pm.h.
#define ADC_SSCTL0_IE4 0x00040000 |
Definition at line 5705 of file tm4c123fe6pm.h.
#define ADC_SSCTL0_IE5 0x00400000 |
Definition at line 5700 of file tm4c123fe6pm.h.
#define ADC_SSCTL0_IE6 0x04000000 |
Definition at line 5695 of file tm4c123fe6pm.h.
#define ADC_SSCTL0_IE7 0x40000000 |
Definition at line 5690 of file tm4c123fe6pm.h.
#define ADC_SSCTL0_TS0 0x00000008 |
Definition at line 5724 of file tm4c123fe6pm.h.
#define ADC_SSCTL0_TS1 0x00000080 |
Definition at line 5719 of file tm4c123fe6pm.h.
#define ADC_SSCTL0_TS2 0x00000800 |
Definition at line 5714 of file tm4c123fe6pm.h.
#define ADC_SSCTL0_TS3 0x00008000 |
Definition at line 5709 of file tm4c123fe6pm.h.
#define ADC_SSCTL0_TS4 0x00080000 |
Definition at line 5704 of file tm4c123fe6pm.h.
#define ADC_SSCTL0_TS5 0x00800000 |
Definition at line 5699 of file tm4c123fe6pm.h.
#define ADC_SSCTL0_TS6 0x08000000 |
Definition at line 5694 of file tm4c123fe6pm.h.
#define ADC_SSCTL0_TS7 0x80000000 |
Definition at line 5689 of file tm4c123fe6pm.h.
#define ADC_SSCTL1_D0 0x00000001 |
Definition at line 5838 of file tm4c123fe6pm.h.
#define ADC_SSCTL1_D1 0x00000010 |
Definition at line 5833 of file tm4c123fe6pm.h.
#define ADC_SSCTL1_D2 0x00000100 |
Definition at line 5828 of file tm4c123fe6pm.h.
#define ADC_SSCTL1_D3 0x00001000 |
Definition at line 5823 of file tm4c123fe6pm.h.
#define ADC_SSCTL1_END0 0x00000002 |
Definition at line 5837 of file tm4c123fe6pm.h.
#define ADC_SSCTL1_END1 0x00000020 |
Definition at line 5832 of file tm4c123fe6pm.h.
#define ADC_SSCTL1_END2 0x00000200 |
Definition at line 5827 of file tm4c123fe6pm.h.
#define ADC_SSCTL1_END3 0x00002000 |
Definition at line 5822 of file tm4c123fe6pm.h.
#define ADC_SSCTL1_IE0 0x00000004 |
Definition at line 5836 of file tm4c123fe6pm.h.
#define ADC_SSCTL1_IE1 0x00000040 |
Definition at line 5831 of file tm4c123fe6pm.h.
#define ADC_SSCTL1_IE2 0x00000400 |
Definition at line 5826 of file tm4c123fe6pm.h.
#define ADC_SSCTL1_IE3 0x00004000 |
Definition at line 5821 of file tm4c123fe6pm.h.
#define ADC_SSCTL1_TS0 0x00000008 |
Definition at line 5835 of file tm4c123fe6pm.h.
#define ADC_SSCTL1_TS1 0x00000080 |
Definition at line 5830 of file tm4c123fe6pm.h.
#define ADC_SSCTL1_TS2 0x00000800 |
Definition at line 5825 of file tm4c123fe6pm.h.
#define ADC_SSCTL1_TS3 0x00008000 |
Definition at line 5820 of file tm4c123fe6pm.h.
#define ADC_SSCTL2_D0 0x00000001 |
Definition at line 5929 of file tm4c123fe6pm.h.
#define ADC_SSCTL2_D1 0x00000010 |
Definition at line 5924 of file tm4c123fe6pm.h.
#define ADC_SSCTL2_D2 0x00000100 |
Definition at line 5919 of file tm4c123fe6pm.h.
#define ADC_SSCTL2_D3 0x00001000 |
Definition at line 5914 of file tm4c123fe6pm.h.
#define ADC_SSCTL2_END0 0x00000002 |
Definition at line 5928 of file tm4c123fe6pm.h.
#define ADC_SSCTL2_END1 0x00000020 |
Definition at line 5923 of file tm4c123fe6pm.h.
#define ADC_SSCTL2_END2 0x00000200 |
Definition at line 5918 of file tm4c123fe6pm.h.
#define ADC_SSCTL2_END3 0x00002000 |
Definition at line 5913 of file tm4c123fe6pm.h.
#define ADC_SSCTL2_IE0 0x00000004 |
Definition at line 5927 of file tm4c123fe6pm.h.
#define ADC_SSCTL2_IE1 0x00000040 |
Definition at line 5922 of file tm4c123fe6pm.h.
#define ADC_SSCTL2_IE2 0x00000400 |
Definition at line 5917 of file tm4c123fe6pm.h.
#define ADC_SSCTL2_IE3 0x00004000 |
Definition at line 5912 of file tm4c123fe6pm.h.
#define ADC_SSCTL2_TS0 0x00000008 |
Definition at line 5926 of file tm4c123fe6pm.h.
#define ADC_SSCTL2_TS1 0x00000080 |
Definition at line 5921 of file tm4c123fe6pm.h.
#define ADC_SSCTL2_TS2 0x00000800 |
Definition at line 5916 of file tm4c123fe6pm.h.
#define ADC_SSCTL2_TS3 0x00008000 |
Definition at line 5911 of file tm4c123fe6pm.h.
#define ADC_SSCTL3_D0 0x00000001 |
Definition at line 5999 of file tm4c123fe6pm.h.
#define ADC_SSCTL3_END0 0x00000002 |
Definition at line 5998 of file tm4c123fe6pm.h.
#define ADC_SSCTL3_IE0 0x00000004 |
Definition at line 5997 of file tm4c123fe6pm.h.
#define ADC_SSCTL3_TS0 0x00000008 |
Definition at line 5996 of file tm4c123fe6pm.h.
#define ADC_SSDC0_S0DCSEL_M 0x0000000F |
Definition at line 5791 of file tm4c123fe6pm.h.
#define ADC_SSDC0_S0DCSEL_S 0 |
Definition at line 5799 of file tm4c123fe6pm.h.
#define ADC_SSDC0_S1DCSEL_M 0x000000F0 |
Definition at line 5789 of file tm4c123fe6pm.h.
#define ADC_SSDC0_S1DCSEL_S 4 |
Definition at line 5798 of file tm4c123fe6pm.h.
#define ADC_SSDC0_S2DCSEL_M 0x00000F00 |
Definition at line 5787 of file tm4c123fe6pm.h.
#define ADC_SSDC0_S2DCSEL_S 8 |
Definition at line 5797 of file tm4c123fe6pm.h.
#define ADC_SSDC0_S3DCSEL_M 0x0000F000 |
Definition at line 5785 of file tm4c123fe6pm.h.
#define ADC_SSDC0_S3DCSEL_S 12 |
Definition at line 5796 of file tm4c123fe6pm.h.
#define ADC_SSDC0_S4DCSEL_M 0x000F0000 |
Definition at line 5783 of file tm4c123fe6pm.h.
#define ADC_SSDC0_S4DCSEL_S 16 |
Definition at line 5795 of file tm4c123fe6pm.h.
#define ADC_SSDC0_S5DCSEL_M 0x00F00000 |
Definition at line 5781 of file tm4c123fe6pm.h.
#define ADC_SSDC0_S5DCSEL_S 20 |
Definition at line 5794 of file tm4c123fe6pm.h.
#define ADC_SSDC0_S6DCSEL_M 0x0F000000 |
Definition at line 5779 of file tm4c123fe6pm.h.
#define ADC_SSDC0_S6DCSEL_S 24 |
Definition at line 5793 of file tm4c123fe6pm.h.
#define ADC_SSDC0_S7DCSEL_M 0xF0000000 |
Definition at line 5777 of file tm4c123fe6pm.h.
#define ADC_SSDC1_S0DCSEL_M 0x0000000F |
Definition at line 5886 of file tm4c123fe6pm.h.
#define ADC_SSDC1_S0DCSEL_S 0 |
Definition at line 5890 of file tm4c123fe6pm.h.
#define ADC_SSDC1_S1DCSEL_M 0x000000F0 |
Definition at line 5884 of file tm4c123fe6pm.h.
#define ADC_SSDC1_S1DCSEL_S 4 |
Definition at line 5889 of file tm4c123fe6pm.h.
#define ADC_SSDC1_S2DCSEL_M 0x00000F00 |
Definition at line 5882 of file tm4c123fe6pm.h.
#define ADC_SSDC1_S2DCSEL_S 8 |
Definition at line 5888 of file tm4c123fe6pm.h.
#define ADC_SSDC1_S3DCSEL_M 0x0000F000 |
Definition at line 5880 of file tm4c123fe6pm.h.
#define ADC_SSDC2_S0DCSEL_M 0x0000000F |
Definition at line 5977 of file tm4c123fe6pm.h.
#define ADC_SSDC2_S0DCSEL_S 0 |
Definition at line 5981 of file tm4c123fe6pm.h.
#define ADC_SSDC2_S1DCSEL_M 0x000000F0 |
Definition at line 5975 of file tm4c123fe6pm.h.
#define ADC_SSDC2_S1DCSEL_S 4 |
Definition at line 5980 of file tm4c123fe6pm.h.
#define ADC_SSDC2_S2DCSEL_M 0x00000F00 |
Definition at line 5973 of file tm4c123fe6pm.h.
#define ADC_SSDC2_S2DCSEL_S 8 |
Definition at line 5979 of file tm4c123fe6pm.h.
#define ADC_SSDC2_S3DCSEL_M 0x0000F000 |
Definition at line 5971 of file tm4c123fe6pm.h.
#define ADC_SSDC3_S0DCSEL_M 0x0000000F |
Definition at line 6034 of file tm4c123fe6pm.h.
#define ADC_SSFIFO0_DATA_M 0x00000FFF |
Definition at line 5735 of file tm4c123fe6pm.h.
#define ADC_SSFIFO0_DATA_S 0 |
Definition at line 5736 of file tm4c123fe6pm.h.
#define ADC_SSFIFO1_DATA_M 0x00000FFF |
Definition at line 5846 of file tm4c123fe6pm.h.
#define ADC_SSFIFO1_DATA_S 0 |
Definition at line 5847 of file tm4c123fe6pm.h.
#define ADC_SSFIFO2_DATA_M 0x00000FFF |
Definition at line 5937 of file tm4c123fe6pm.h.
#define ADC_SSFIFO2_DATA_S 0 |
Definition at line 5938 of file tm4c123fe6pm.h.
#define ADC_SSFIFO3_DATA_M 0x00000FFF |
Definition at line 6006 of file tm4c123fe6pm.h.
#define ADC_SSFIFO3_DATA_S 0 |
Definition at line 6007 of file tm4c123fe6pm.h.
#define ADC_SSFSTAT0_EMPTY 0x00000100 |
Definition at line 5744 of file tm4c123fe6pm.h.
#define ADC_SSFSTAT0_FULL 0x00001000 |
Definition at line 5743 of file tm4c123fe6pm.h.
#define ADC_SSFSTAT0_HPTR_M 0x000000F0 |
Definition at line 5745 of file tm4c123fe6pm.h.
#define ADC_SSFSTAT0_HPTR_S 4 |
Definition at line 5747 of file tm4c123fe6pm.h.
#define ADC_SSFSTAT0_TPTR_M 0x0000000F |
Definition at line 5746 of file tm4c123fe6pm.h.
#define ADC_SSFSTAT0_TPTR_S 0 |
Definition at line 5748 of file tm4c123fe6pm.h.
#define ADC_SSFSTAT1_EMPTY 0x00000100 |
Definition at line 5855 of file tm4c123fe6pm.h.
#define ADC_SSFSTAT1_FULL 0x00001000 |
Definition at line 5854 of file tm4c123fe6pm.h.
#define ADC_SSFSTAT1_HPTR_M 0x000000F0 |
Definition at line 5856 of file tm4c123fe6pm.h.
#define ADC_SSFSTAT1_HPTR_S 4 |
Definition at line 5858 of file tm4c123fe6pm.h.
#define ADC_SSFSTAT1_TPTR_M 0x0000000F |
Definition at line 5857 of file tm4c123fe6pm.h.
#define ADC_SSFSTAT1_TPTR_S 0 |
Definition at line 5859 of file tm4c123fe6pm.h.
#define ADC_SSFSTAT2_EMPTY 0x00000100 |
Definition at line 5946 of file tm4c123fe6pm.h.
#define ADC_SSFSTAT2_FULL 0x00001000 |
Definition at line 5945 of file tm4c123fe6pm.h.
#define ADC_SSFSTAT2_HPTR_M 0x000000F0 |
Definition at line 5947 of file tm4c123fe6pm.h.
#define ADC_SSFSTAT2_HPTR_S 4 |
Definition at line 5949 of file tm4c123fe6pm.h.
#define ADC_SSFSTAT2_TPTR_M 0x0000000F |
Definition at line 5948 of file tm4c123fe6pm.h.
#define ADC_SSFSTAT2_TPTR_S 0 |
Definition at line 5950 of file tm4c123fe6pm.h.
#define ADC_SSFSTAT3_EMPTY 0x00000100 |
Definition at line 6015 of file tm4c123fe6pm.h.
#define ADC_SSFSTAT3_FULL 0x00001000 |
Definition at line 6014 of file tm4c123fe6pm.h.
#define ADC_SSFSTAT3_HPTR_M 0x000000F0 |
Definition at line 6016 of file tm4c123fe6pm.h.
#define ADC_SSFSTAT3_HPTR_S 4 |
Definition at line 6018 of file tm4c123fe6pm.h.
#define ADC_SSFSTAT3_TPTR_M 0x0000000F |
Definition at line 6017 of file tm4c123fe6pm.h.
#define ADC_SSFSTAT3_TPTR_S 0 |
Definition at line 6019 of file tm4c123fe6pm.h.
#define ADC_SSMUX0_MUX0_M 0x0000000F |
Definition at line 5674 of file tm4c123fe6pm.h.
#define ADC_SSMUX0_MUX0_S 0 |
Definition at line 5682 of file tm4c123fe6pm.h.
#define ADC_SSMUX0_MUX1_M 0x000000F0 |
Definition at line 5673 of file tm4c123fe6pm.h.
#define ADC_SSMUX0_MUX1_S 4 |
Definition at line 5681 of file tm4c123fe6pm.h.
#define ADC_SSMUX0_MUX2_M 0x00000F00 |
Definition at line 5672 of file tm4c123fe6pm.h.
#define ADC_SSMUX0_MUX2_S 8 |
Definition at line 5680 of file tm4c123fe6pm.h.
#define ADC_SSMUX0_MUX3_M 0x0000F000 |
Definition at line 5671 of file tm4c123fe6pm.h.
#define ADC_SSMUX0_MUX3_S 12 |
Definition at line 5679 of file tm4c123fe6pm.h.
#define ADC_SSMUX0_MUX4_M 0x000F0000 |
Definition at line 5670 of file tm4c123fe6pm.h.
#define ADC_SSMUX0_MUX4_S 16 |
Definition at line 5678 of file tm4c123fe6pm.h.
#define ADC_SSMUX0_MUX5_M 0x00F00000 |
Definition at line 5669 of file tm4c123fe6pm.h.
#define ADC_SSMUX0_MUX5_S 20 |
Definition at line 5677 of file tm4c123fe6pm.h.
#define ADC_SSMUX0_MUX6_M 0x0F000000 |
Definition at line 5668 of file tm4c123fe6pm.h.
#define ADC_SSMUX0_MUX6_S 24 |
Definition at line 5676 of file tm4c123fe6pm.h.
#define ADC_SSMUX0_MUX7_M 0xF0000000 |
Definition at line 5667 of file tm4c123fe6pm.h.
#define ADC_SSMUX0_MUX7_S 28 |
Definition at line 5675 of file tm4c123fe6pm.h.
#define ADC_SSMUX1_MUX0_M 0x0000000F |
Definition at line 5809 of file tm4c123fe6pm.h.
#define ADC_SSMUX1_MUX0_S 0 |
Definition at line 5813 of file tm4c123fe6pm.h.
#define ADC_SSMUX1_MUX1_M 0x000000F0 |
Definition at line 5808 of file tm4c123fe6pm.h.
#define ADC_SSMUX1_MUX1_S 4 |
Definition at line 5812 of file tm4c123fe6pm.h.
#define ADC_SSMUX1_MUX2_M 0x00000F00 |
Definition at line 5807 of file tm4c123fe6pm.h.
#define ADC_SSMUX1_MUX2_S 8 |
Definition at line 5811 of file tm4c123fe6pm.h.
#define ADC_SSMUX1_MUX3_M 0x0000F000 |
Definition at line 5806 of file tm4c123fe6pm.h.
#define ADC_SSMUX1_MUX3_S 12 |
Definition at line 5810 of file tm4c123fe6pm.h.
#define ADC_SSMUX2_MUX0_M 0x0000000F |
Definition at line 5900 of file tm4c123fe6pm.h.
#define ADC_SSMUX2_MUX0_S 0 |
Definition at line 5904 of file tm4c123fe6pm.h.
#define ADC_SSMUX2_MUX1_M 0x000000F0 |
Definition at line 5899 of file tm4c123fe6pm.h.
#define ADC_SSMUX2_MUX1_S 4 |
Definition at line 5903 of file tm4c123fe6pm.h.
#define ADC_SSMUX2_MUX2_M 0x00000F00 |
Definition at line 5898 of file tm4c123fe6pm.h.
#define ADC_SSMUX2_MUX2_S 8 |
Definition at line 5902 of file tm4c123fe6pm.h.
#define ADC_SSMUX2_MUX3_M 0x0000F000 |
Definition at line 5897 of file tm4c123fe6pm.h.
#define ADC_SSMUX2_MUX3_S 12 |
Definition at line 5901 of file tm4c123fe6pm.h.
#define ADC_SSMUX3_MUX0_M 0x0000000F |
Definition at line 5988 of file tm4c123fe6pm.h.
#define ADC_SSMUX3_MUX0_S 0 |
Definition at line 5989 of file tm4c123fe6pm.h.
#define ADC_SSOP0_S0DCOP 0x00000001 |
Definition at line 5769 of file tm4c123fe6pm.h.
#define ADC_SSOP0_S1DCOP 0x00000010 |
Definition at line 5767 of file tm4c123fe6pm.h.
#define ADC_SSOP0_S2DCOP 0x00000100 |
Definition at line 5765 of file tm4c123fe6pm.h.
#define ADC_SSOP0_S3DCOP 0x00001000 |
Definition at line 5763 of file tm4c123fe6pm.h.
#define ADC_SSOP0_S4DCOP 0x00010000 |
Definition at line 5761 of file tm4c123fe6pm.h.
#define ADC_SSOP0_S5DCOP 0x00100000 |
Definition at line 5759 of file tm4c123fe6pm.h.
#define ADC_SSOP0_S6DCOP 0x01000000 |
Definition at line 5757 of file tm4c123fe6pm.h.
#define ADC_SSOP0_S7DCOP 0x10000000 |
Definition at line 5755 of file tm4c123fe6pm.h.
#define ADC_SSOP1_S0DCOP 0x00000001 |
Definition at line 5872 of file tm4c123fe6pm.h.
#define ADC_SSOP1_S1DCOP 0x00000010 |
Definition at line 5870 of file tm4c123fe6pm.h.
#define ADC_SSOP1_S2DCOP 0x00000100 |
Definition at line 5868 of file tm4c123fe6pm.h.
#define ADC_SSOP1_S3DCOP 0x00001000 |
Definition at line 5866 of file tm4c123fe6pm.h.
#define ADC_SSOP2_S0DCOP 0x00000001 |
Definition at line 5963 of file tm4c123fe6pm.h.
#define ADC_SSOP2_S1DCOP 0x00000010 |
Definition at line 5961 of file tm4c123fe6pm.h.
#define ADC_SSOP2_S2DCOP 0x00000100 |
Definition at line 5959 of file tm4c123fe6pm.h.
#define ADC_SSOP2_S3DCOP 0x00001000 |
Definition at line 5957 of file tm4c123fe6pm.h.
#define ADC_SSOP3_S0DCOP 0x00000001 |
Definition at line 6026 of file tm4c123fe6pm.h.
#define ADC_SSPRI_SS0_M 0x00000003 |
Definition at line 5579 of file tm4c123fe6pm.h.
#define ADC_SSPRI_SS1_M 0x00000030 |
Definition at line 5578 of file tm4c123fe6pm.h.
#define ADC_SSPRI_SS2_M 0x00000300 |
Definition at line 5577 of file tm4c123fe6pm.h.
#define ADC_SSPRI_SS3_M 0x00003000 |
Definition at line 5576 of file tm4c123fe6pm.h.
#define ADC_TSSEL_PS0_0 0x00000000 |
Definition at line 5566 of file tm4c123fe6pm.h.
#define ADC_TSSEL_PS0_1 0x00000010 |
Definition at line 5568 of file tm4c123fe6pm.h.
#define ADC_TSSEL_PS0_M 0x00000030 |
Definition at line 5564 of file tm4c123fe6pm.h.
#define ADC_TSSEL_PS1_0 0x00000000 |
Definition at line 5560 of file tm4c123fe6pm.h.
#define ADC_TSSEL_PS1_1 0x00001000 |
Definition at line 5562 of file tm4c123fe6pm.h.
#define ADC_TSSEL_PS1_M 0x00003000 |
Definition at line 5558 of file tm4c123fe6pm.h.
#define ADC_TSSEL_PS2_0 0x00000000 |
Definition at line 5554 of file tm4c123fe6pm.h.
#define ADC_TSSEL_PS2_1 0x00100000 |
Definition at line 5556 of file tm4c123fe6pm.h.
#define ADC_TSSEL_PS2_M 0x00300000 |
Definition at line 5552 of file tm4c123fe6pm.h.
#define ADC_TSSEL_PS3_0 0x00000000 |
Definition at line 5548 of file tm4c123fe6pm.h.
#define ADC_TSSEL_PS3_1 0x10000000 |
Definition at line 5550 of file tm4c123fe6pm.h.
#define ADC_TSSEL_PS3_M 0x30000000 |
Definition at line 5546 of file tm4c123fe6pm.h.
#define ADC_USTAT_UV0 0x00000001 |
Definition at line 5539 of file tm4c123fe6pm.h.
#define ADC_USTAT_UV1 0x00000002 |
Definition at line 5538 of file tm4c123fe6pm.h.
#define ADC_USTAT_UV2 0x00000004 |
Definition at line 5537 of file tm4c123fe6pm.h.
#define ADC_USTAT_UV3 0x00000008 |
Definition at line 5536 of file tm4c123fe6pm.h.
#define CAN0_BIT_R (*((volatile uint32_t *)0x4004000C)) |
Definition at line 1396 of file tm4c123fe6pm.h.
#define CAN0_BRPE_R (*((volatile uint32_t *)0x40040018)) |
Definition at line 1399 of file tm4c123fe6pm.h.
#define CAN0_CTL_R (*((volatile uint32_t *)0x40040000)) |
Definition at line 1393 of file tm4c123fe6pm.h.
#define CAN0_ERR_R (*((volatile uint32_t *)0x40040008)) |
Definition at line 1395 of file tm4c123fe6pm.h.
#define CAN0_IF1ARB1_R (*((volatile uint32_t *)0x40040030)) |
Definition at line 1404 of file tm4c123fe6pm.h.
#define CAN0_IF1ARB2_R (*((volatile uint32_t *)0x40040034)) |
Definition at line 1405 of file tm4c123fe6pm.h.
#define CAN0_IF1CMSK_R (*((volatile uint32_t *)0x40040024)) |
Definition at line 1401 of file tm4c123fe6pm.h.
#define CAN0_IF1CRQ_R (*((volatile uint32_t *)0x40040020)) |
Definition at line 1400 of file tm4c123fe6pm.h.
#define CAN0_IF1DA1_R (*((volatile uint32_t *)0x4004003C)) |
Definition at line 1407 of file tm4c123fe6pm.h.
#define CAN0_IF1DA2_R (*((volatile uint32_t *)0x40040040)) |
Definition at line 1408 of file tm4c123fe6pm.h.
#define CAN0_IF1DB1_R (*((volatile uint32_t *)0x40040044)) |
Definition at line 1409 of file tm4c123fe6pm.h.
#define CAN0_IF1DB2_R (*((volatile uint32_t *)0x40040048)) |
Definition at line 1410 of file tm4c123fe6pm.h.
#define CAN0_IF1MCTL_R (*((volatile uint32_t *)0x40040038)) |
Definition at line 1406 of file tm4c123fe6pm.h.
#define CAN0_IF1MSK1_R (*((volatile uint32_t *)0x40040028)) |
Definition at line 1402 of file tm4c123fe6pm.h.
#define CAN0_IF1MSK2_R (*((volatile uint32_t *)0x4004002C)) |
Definition at line 1403 of file tm4c123fe6pm.h.
#define CAN0_IF2ARB1_R (*((volatile uint32_t *)0x40040090)) |
Definition at line 1415 of file tm4c123fe6pm.h.
#define CAN0_IF2ARB2_R (*((volatile uint32_t *)0x40040094)) |
Definition at line 1416 of file tm4c123fe6pm.h.
#define CAN0_IF2CMSK_R (*((volatile uint32_t *)0x40040084)) |
Definition at line 1412 of file tm4c123fe6pm.h.
#define CAN0_IF2CRQ_R (*((volatile uint32_t *)0x40040080)) |
Definition at line 1411 of file tm4c123fe6pm.h.
#define CAN0_IF2DA1_R (*((volatile uint32_t *)0x4004009C)) |
Definition at line 1418 of file tm4c123fe6pm.h.
#define CAN0_IF2DA2_R (*((volatile uint32_t *)0x400400A0)) |
Definition at line 1419 of file tm4c123fe6pm.h.
#define CAN0_IF2DB1_R (*((volatile uint32_t *)0x400400A4)) |
Definition at line 1420 of file tm4c123fe6pm.h.
#define CAN0_IF2DB2_R (*((volatile uint32_t *)0x400400A8)) |
Definition at line 1421 of file tm4c123fe6pm.h.
#define CAN0_IF2MCTL_R (*((volatile uint32_t *)0x40040098)) |
Definition at line 1417 of file tm4c123fe6pm.h.
#define CAN0_IF2MSK1_R (*((volatile uint32_t *)0x40040088)) |
Definition at line 1413 of file tm4c123fe6pm.h.
#define CAN0_IF2MSK2_R (*((volatile uint32_t *)0x4004008C)) |
Definition at line 1414 of file tm4c123fe6pm.h.
#define CAN0_INT_R (*((volatile uint32_t *)0x40040010)) |
Definition at line 1397 of file tm4c123fe6pm.h.
#define CAN0_MSG1INT_R (*((volatile uint32_t *)0x40040140)) |
Definition at line 1426 of file tm4c123fe6pm.h.
#define CAN0_MSG1VAL_R (*((volatile uint32_t *)0x40040160)) |
Definition at line 1428 of file tm4c123fe6pm.h.
#define CAN0_MSG2INT_R (*((volatile uint32_t *)0x40040144)) |
Definition at line 1427 of file tm4c123fe6pm.h.
#define CAN0_MSG2VAL_R (*((volatile uint32_t *)0x40040164)) |
Definition at line 1429 of file tm4c123fe6pm.h.
#define CAN0_NWDA1_R (*((volatile uint32_t *)0x40040120)) |
Definition at line 1424 of file tm4c123fe6pm.h.
#define CAN0_NWDA2_R (*((volatile uint32_t *)0x40040124)) |
Definition at line 1425 of file tm4c123fe6pm.h.
#define CAN0_STS_R (*((volatile uint32_t *)0x40040004)) |
Definition at line 1394 of file tm4c123fe6pm.h.
#define CAN0_TST_R (*((volatile uint32_t *)0x40040014)) |
Definition at line 1398 of file tm4c123fe6pm.h.
#define CAN0_TXRQ1_R (*((volatile uint32_t *)0x40040100)) |
Definition at line 1422 of file tm4c123fe6pm.h.
#define CAN0_TXRQ2_R (*((volatile uint32_t *)0x40040104)) |
Definition at line 1423 of file tm4c123fe6pm.h.
#define CAN1_BIT_R (*((volatile uint32_t *)0x4004100C)) |
Definition at line 1439 of file tm4c123fe6pm.h.
#define CAN1_BRPE_R (*((volatile uint32_t *)0x40041018)) |
Definition at line 1442 of file tm4c123fe6pm.h.
#define CAN1_CTL_R (*((volatile uint32_t *)0x40041000)) |
Definition at line 1436 of file tm4c123fe6pm.h.
#define CAN1_ERR_R (*((volatile uint32_t *)0x40041008)) |
Definition at line 1438 of file tm4c123fe6pm.h.
#define CAN1_IF1ARB1_R (*((volatile uint32_t *)0x40041030)) |
Definition at line 1447 of file tm4c123fe6pm.h.
#define CAN1_IF1ARB2_R (*((volatile uint32_t *)0x40041034)) |
Definition at line 1448 of file tm4c123fe6pm.h.
#define CAN1_IF1CMSK_R (*((volatile uint32_t *)0x40041024)) |
Definition at line 1444 of file tm4c123fe6pm.h.
#define CAN1_IF1CRQ_R (*((volatile uint32_t *)0x40041020)) |
Definition at line 1443 of file tm4c123fe6pm.h.
#define CAN1_IF1DA1_R (*((volatile uint32_t *)0x4004103C)) |
Definition at line 1450 of file tm4c123fe6pm.h.
#define CAN1_IF1DA2_R (*((volatile uint32_t *)0x40041040)) |
Definition at line 1451 of file tm4c123fe6pm.h.
#define CAN1_IF1DB1_R (*((volatile uint32_t *)0x40041044)) |
Definition at line 1452 of file tm4c123fe6pm.h.
#define CAN1_IF1DB2_R (*((volatile uint32_t *)0x40041048)) |
Definition at line 1453 of file tm4c123fe6pm.h.
#define CAN1_IF1MCTL_R (*((volatile uint32_t *)0x40041038)) |
Definition at line 1449 of file tm4c123fe6pm.h.
#define CAN1_IF1MSK1_R (*((volatile uint32_t *)0x40041028)) |
Definition at line 1445 of file tm4c123fe6pm.h.
#define CAN1_IF1MSK2_R (*((volatile uint32_t *)0x4004102C)) |
Definition at line 1446 of file tm4c123fe6pm.h.
#define CAN1_IF2ARB1_R (*((volatile uint32_t *)0x40041090)) |
Definition at line 1458 of file tm4c123fe6pm.h.
#define CAN1_IF2ARB2_R (*((volatile uint32_t *)0x40041094)) |
Definition at line 1459 of file tm4c123fe6pm.h.
#define CAN1_IF2CMSK_R (*((volatile uint32_t *)0x40041084)) |
Definition at line 1455 of file tm4c123fe6pm.h.
#define CAN1_IF2CRQ_R (*((volatile uint32_t *)0x40041080)) |
Definition at line 1454 of file tm4c123fe6pm.h.
#define CAN1_IF2DA1_R (*((volatile uint32_t *)0x4004109C)) |
Definition at line 1461 of file tm4c123fe6pm.h.
#define CAN1_IF2DA2_R (*((volatile uint32_t *)0x400410A0)) |
Definition at line 1462 of file tm4c123fe6pm.h.
#define CAN1_IF2DB1_R (*((volatile uint32_t *)0x400410A4)) |
Definition at line 1463 of file tm4c123fe6pm.h.
#define CAN1_IF2DB2_R (*((volatile uint32_t *)0x400410A8)) |
Definition at line 1464 of file tm4c123fe6pm.h.
#define CAN1_IF2MCTL_R (*((volatile uint32_t *)0x40041098)) |
Definition at line 1460 of file tm4c123fe6pm.h.
#define CAN1_IF2MSK1_R (*((volatile uint32_t *)0x40041088)) |
Definition at line 1456 of file tm4c123fe6pm.h.
#define CAN1_IF2MSK2_R (*((volatile uint32_t *)0x4004108C)) |
Definition at line 1457 of file tm4c123fe6pm.h.
#define CAN1_INT_R (*((volatile uint32_t *)0x40041010)) |
Definition at line 1440 of file tm4c123fe6pm.h.
#define CAN1_MSG1INT_R (*((volatile uint32_t *)0x40041140)) |
Definition at line 1469 of file tm4c123fe6pm.h.
#define CAN1_MSG1VAL_R (*((volatile uint32_t *)0x40041160)) |
Definition at line 1471 of file tm4c123fe6pm.h.
#define CAN1_MSG2INT_R (*((volatile uint32_t *)0x40041144)) |
Definition at line 1470 of file tm4c123fe6pm.h.
#define CAN1_MSG2VAL_R (*((volatile uint32_t *)0x40041164)) |
Definition at line 1472 of file tm4c123fe6pm.h.
#define CAN1_NWDA1_R (*((volatile uint32_t *)0x40041120)) |
Definition at line 1467 of file tm4c123fe6pm.h.
#define CAN1_NWDA2_R (*((volatile uint32_t *)0x40041124)) |
Definition at line 1468 of file tm4c123fe6pm.h.
#define CAN1_STS_R (*((volatile uint32_t *)0x40041004)) |
Definition at line 1437 of file tm4c123fe6pm.h.
#define CAN1_TST_R (*((volatile uint32_t *)0x40041014)) |
Definition at line 1441 of file tm4c123fe6pm.h.
#define CAN1_TXRQ1_R (*((volatile uint32_t *)0x40041100)) |
Definition at line 1465 of file tm4c123fe6pm.h.
#define CAN1_TXRQ2_R (*((volatile uint32_t *)0x40041104)) |
Definition at line 1466 of file tm4c123fe6pm.h.
#define CAN_BIT_BRP_M 0x0000003F |
Definition at line 6549 of file tm4c123fe6pm.h.
#define CAN_BIT_BRP_S 0 |
Definition at line 6553 of file tm4c123fe6pm.h.
#define CAN_BIT_SJW_M 0x000000C0 |
Definition at line 6548 of file tm4c123fe6pm.h.
#define CAN_BIT_SJW_S 6 |
Definition at line 6552 of file tm4c123fe6pm.h.
#define CAN_BIT_TSEG1_M 0x00000F00 |
Definition at line 6547 of file tm4c123fe6pm.h.
#define CAN_BIT_TSEG1_S 8 |
Definition at line 6551 of file tm4c123fe6pm.h.
#define CAN_BIT_TSEG2_M 0x00007000 |
Definition at line 6546 of file tm4c123fe6pm.h.
#define CAN_BIT_TSEG2_S 12 |
Definition at line 6550 of file tm4c123fe6pm.h.
#define CAN_BRPE_BRPE_M 0x0000000F |
Definition at line 6584 of file tm4c123fe6pm.h.
#define CAN_BRPE_BRPE_S 0 |
Definition at line 6585 of file tm4c123fe6pm.h.
#define CAN_CTL_CCE 0x00000040 |
Definition at line 6502 of file tm4c123fe6pm.h.
#define CAN_CTL_DAR 0x00000020 |
Definition at line 6503 of file tm4c123fe6pm.h.
#define CAN_CTL_EIE 0x00000008 |
Definition at line 6504 of file tm4c123fe6pm.h.
#define CAN_CTL_IE 0x00000002 |
Definition at line 6506 of file tm4c123fe6pm.h.
#define CAN_CTL_INIT 0x00000001 |
Definition at line 6507 of file tm4c123fe6pm.h.
#define CAN_CTL_SIE 0x00000004 |
Definition at line 6505 of file tm4c123fe6pm.h.
#define CAN_CTL_TEST 0x00000080 |
Definition at line 6501 of file tm4c123fe6pm.h.
#define CAN_ERR_REC_M 0x00007F00 |
Definition at line 6536 of file tm4c123fe6pm.h.
#define CAN_ERR_REC_S 8 |
Definition at line 6538 of file tm4c123fe6pm.h.
#define CAN_ERR_RP 0x00008000 |
Definition at line 6535 of file tm4c123fe6pm.h.
#define CAN_ERR_TEC_M 0x000000FF |
Definition at line 6537 of file tm4c123fe6pm.h.
#define CAN_ERR_TEC_S 0 |
Definition at line 6539 of file tm4c123fe6pm.h.
#define CAN_IF1ARB1_ID_M 0x0000FFFF |
Definition at line 6634 of file tm4c123fe6pm.h.
#define CAN_IF1ARB1_ID_S 0 |
Definition at line 6635 of file tm4c123fe6pm.h.
#define CAN_IF1ARB2_DIR 0x00002000 |
Definition at line 6644 of file tm4c123fe6pm.h.
#define CAN_IF1ARB2_ID_M 0x00001FFF |
Definition at line 6645 of file tm4c123fe6pm.h.
#define CAN_IF1ARB2_ID_S 0 |
Definition at line 6646 of file tm4c123fe6pm.h.
#define CAN_IF1ARB2_MSGVAL 0x00008000 |
Definition at line 6642 of file tm4c123fe6pm.h.
#define CAN_IF1ARB2_XTD 0x00004000 |
Definition at line 6643 of file tm4c123fe6pm.h.
#define CAN_IF1CMSK_ARB 0x00000020 |
Definition at line 6603 of file tm4c123fe6pm.h.
#define CAN_IF1CMSK_CLRINTPND 0x00000008 |
Definition at line 6605 of file tm4c123fe6pm.h.
#define CAN_IF1CMSK_CONTROL 0x00000010 |
Definition at line 6604 of file tm4c123fe6pm.h.
#define CAN_IF1CMSK_DATAA 0x00000002 |
Definition at line 6608 of file tm4c123fe6pm.h.
#define CAN_IF1CMSK_DATAB 0x00000001 |
Definition at line 6609 of file tm4c123fe6pm.h.
#define CAN_IF1CMSK_MASK 0x00000040 |
Definition at line 6602 of file tm4c123fe6pm.h.
#define CAN_IF1CMSK_NEWDAT 0x00000004 |
Definition at line 6606 of file tm4c123fe6pm.h.
#define CAN_IF1CMSK_TXRQST 0x00000004 |
Definition at line 6607 of file tm4c123fe6pm.h.
#define CAN_IF1CMSK_WRNRD 0x00000080 |
Definition at line 6601 of file tm4c123fe6pm.h.
#define CAN_IF1CRQ_BUSY 0x00008000 |
Definition at line 6592 of file tm4c123fe6pm.h.
#define CAN_IF1CRQ_MNUM_M 0x0000003F |
Definition at line 6593 of file tm4c123fe6pm.h.
#define CAN_IF1CRQ_MNUM_S 0 |
Definition at line 6594 of file tm4c123fe6pm.h.
#define CAN_IF1DA1_DATA_M 0x0000FFFF |
Definition at line 6670 of file tm4c123fe6pm.h.
#define CAN_IF1DA1_DATA_S 0 |
Definition at line 6671 of file tm4c123fe6pm.h.
#define CAN_IF1DA2_DATA_M 0x0000FFFF |
Definition at line 6678 of file tm4c123fe6pm.h.
#define CAN_IF1DA2_DATA_S 0 |
Definition at line 6679 of file tm4c123fe6pm.h.
#define CAN_IF1DB1_DATA_M 0x0000FFFF |
Definition at line 6686 of file tm4c123fe6pm.h.
#define CAN_IF1DB1_DATA_S 0 |
Definition at line 6687 of file tm4c123fe6pm.h.
#define CAN_IF1DB2_DATA_M 0x0000FFFF |
Definition at line 6694 of file tm4c123fe6pm.h.
#define CAN_IF1DB2_DATA_S 0 |
Definition at line 6695 of file tm4c123fe6pm.h.
#define CAN_IF1MCTL_DLC_M 0x0000000F |
Definition at line 6662 of file tm4c123fe6pm.h.
#define CAN_IF1MCTL_DLC_S 0 |
Definition at line 6663 of file tm4c123fe6pm.h.
#define CAN_IF1MCTL_EOB 0x00000080 |
Definition at line 6661 of file tm4c123fe6pm.h.
#define CAN_IF1MCTL_INTPND 0x00002000 |
Definition at line 6655 of file tm4c123fe6pm.h.
#define CAN_IF1MCTL_MSGLST 0x00004000 |
Definition at line 6654 of file tm4c123fe6pm.h.
#define CAN_IF1MCTL_NEWDAT 0x00008000 |
Definition at line 6653 of file tm4c123fe6pm.h.
#define CAN_IF1MCTL_RMTEN 0x00000200 |
Definition at line 6659 of file tm4c123fe6pm.h.
#define CAN_IF1MCTL_RXIE 0x00000400 |
Definition at line 6658 of file tm4c123fe6pm.h.
#define CAN_IF1MCTL_TXIE 0x00000800 |
Definition at line 6657 of file tm4c123fe6pm.h.
#define CAN_IF1MCTL_TXRQST 0x00000100 |
Definition at line 6660 of file tm4c123fe6pm.h.
#define CAN_IF1MCTL_UMASK 0x00001000 |
Definition at line 6656 of file tm4c123fe6pm.h.
#define CAN_IF1MSK1_IDMSK_M 0x0000FFFF |
Definition at line 6616 of file tm4c123fe6pm.h.
#define CAN_IF1MSK1_IDMSK_S 0 |
Definition at line 6617 of file tm4c123fe6pm.h.
#define CAN_IF1MSK2_IDMSK_M 0x00001FFF |
Definition at line 6626 of file tm4c123fe6pm.h.
#define CAN_IF1MSK2_IDMSK_S 0 |
Definition at line 6627 of file tm4c123fe6pm.h.
#define CAN_IF1MSK2_MDIR 0x00004000 |
Definition at line 6625 of file tm4c123fe6pm.h.
#define CAN_IF1MSK2_MXTD 0x00008000 |
Definition at line 6624 of file tm4c123fe6pm.h.
#define CAN_IF2ARB1_ID_M 0x0000FFFF |
Definition at line 6744 of file tm4c123fe6pm.h.
#define CAN_IF2ARB1_ID_S 0 |
Definition at line 6745 of file tm4c123fe6pm.h.
#define CAN_IF2ARB2_DIR 0x00002000 |
Definition at line 6754 of file tm4c123fe6pm.h.
#define CAN_IF2ARB2_ID_M 0x00001FFF |
Definition at line 6755 of file tm4c123fe6pm.h.
#define CAN_IF2ARB2_ID_S 0 |
Definition at line 6756 of file tm4c123fe6pm.h.
#define CAN_IF2ARB2_MSGVAL 0x00008000 |
Definition at line 6752 of file tm4c123fe6pm.h.
#define CAN_IF2ARB2_XTD 0x00004000 |
Definition at line 6753 of file tm4c123fe6pm.h.
#define CAN_IF2CMSK_ARB 0x00000020 |
Definition at line 6713 of file tm4c123fe6pm.h.
#define CAN_IF2CMSK_CLRINTPND 0x00000008 |
Definition at line 6715 of file tm4c123fe6pm.h.
#define CAN_IF2CMSK_CONTROL 0x00000010 |
Definition at line 6714 of file tm4c123fe6pm.h.
#define CAN_IF2CMSK_DATAA 0x00000002 |
Definition at line 6718 of file tm4c123fe6pm.h.
#define CAN_IF2CMSK_DATAB 0x00000001 |
Definition at line 6719 of file tm4c123fe6pm.h.
#define CAN_IF2CMSK_MASK 0x00000040 |
Definition at line 6712 of file tm4c123fe6pm.h.
#define CAN_IF2CMSK_NEWDAT 0x00000004 |
Definition at line 6716 of file tm4c123fe6pm.h.
#define CAN_IF2CMSK_TXRQST 0x00000004 |
Definition at line 6717 of file tm4c123fe6pm.h.
#define CAN_IF2CMSK_WRNRD 0x00000080 |
Definition at line 6711 of file tm4c123fe6pm.h.
#define CAN_IF2CRQ_BUSY 0x00008000 |
Definition at line 6702 of file tm4c123fe6pm.h.
#define CAN_IF2CRQ_MNUM_M 0x0000003F |
Definition at line 6703 of file tm4c123fe6pm.h.
#define CAN_IF2CRQ_MNUM_S 0 |
Definition at line 6704 of file tm4c123fe6pm.h.
#define CAN_IF2DA1_DATA_M 0x0000FFFF |
Definition at line 6780 of file tm4c123fe6pm.h.
#define CAN_IF2DA1_DATA_S 0 |
Definition at line 6781 of file tm4c123fe6pm.h.
#define CAN_IF2DA2_DATA_M 0x0000FFFF |
Definition at line 6788 of file tm4c123fe6pm.h.
#define CAN_IF2DA2_DATA_S 0 |
Definition at line 6789 of file tm4c123fe6pm.h.
#define CAN_IF2DB1_DATA_M 0x0000FFFF |
Definition at line 6796 of file tm4c123fe6pm.h.
#define CAN_IF2DB1_DATA_S 0 |
Definition at line 6797 of file tm4c123fe6pm.h.
#define CAN_IF2DB2_DATA_M 0x0000FFFF |
Definition at line 6804 of file tm4c123fe6pm.h.
#define CAN_IF2DB2_DATA_S 0 |
Definition at line 6805 of file tm4c123fe6pm.h.
#define CAN_IF2MCTL_DLC_M 0x0000000F |
Definition at line 6772 of file tm4c123fe6pm.h.
#define CAN_IF2MCTL_DLC_S 0 |
Definition at line 6773 of file tm4c123fe6pm.h.
#define CAN_IF2MCTL_EOB 0x00000080 |
Definition at line 6771 of file tm4c123fe6pm.h.
#define CAN_IF2MCTL_INTPND 0x00002000 |
Definition at line 6765 of file tm4c123fe6pm.h.
#define CAN_IF2MCTL_MSGLST 0x00004000 |
Definition at line 6764 of file tm4c123fe6pm.h.
#define CAN_IF2MCTL_NEWDAT 0x00008000 |
Definition at line 6763 of file tm4c123fe6pm.h.
#define CAN_IF2MCTL_RMTEN 0x00000200 |
Definition at line 6769 of file tm4c123fe6pm.h.
#define CAN_IF2MCTL_RXIE 0x00000400 |
Definition at line 6768 of file tm4c123fe6pm.h.
#define CAN_IF2MCTL_TXIE 0x00000800 |
Definition at line 6767 of file tm4c123fe6pm.h.
#define CAN_IF2MCTL_TXRQST 0x00000100 |
Definition at line 6770 of file tm4c123fe6pm.h.
#define CAN_IF2MCTL_UMASK 0x00001000 |
Definition at line 6766 of file tm4c123fe6pm.h.
#define CAN_IF2MSK1_IDMSK_M 0x0000FFFF |
Definition at line 6726 of file tm4c123fe6pm.h.
#define CAN_IF2MSK1_IDMSK_S 0 |
Definition at line 6727 of file tm4c123fe6pm.h.
#define CAN_IF2MSK2_IDMSK_M 0x00001FFF |
Definition at line 6736 of file tm4c123fe6pm.h.
#define CAN_IF2MSK2_IDMSK_S 0 |
Definition at line 6737 of file tm4c123fe6pm.h.
#define CAN_IF2MSK2_MDIR 0x00004000 |
Definition at line 6735 of file tm4c123fe6pm.h.
#define CAN_IF2MSK2_MXTD 0x00008000 |
Definition at line 6734 of file tm4c123fe6pm.h.
#define CAN_INT_INTID_M 0x0000FFFF |
Definition at line 6560 of file tm4c123fe6pm.h.
#define CAN_INT_INTID_NONE 0x00000000 |
Definition at line 6561 of file tm4c123fe6pm.h.
#define CAN_INT_INTID_STATUS 0x00008000 |
Definition at line 6562 of file tm4c123fe6pm.h.
#define CAN_MSG1INT_INTPND_M 0x0000FFFF |
Definition at line 6844 of file tm4c123fe6pm.h.
#define CAN_MSG1INT_INTPND_S 0 |
Definition at line 6845 of file tm4c123fe6pm.h.
#define CAN_MSG1VAL_MSGVAL_M 0x0000FFFF |
Definition at line 6860 of file tm4c123fe6pm.h.
#define CAN_MSG1VAL_MSGVAL_S 0 |
Definition at line 6861 of file tm4c123fe6pm.h.
#define CAN_MSG2INT_INTPND_M 0x0000FFFF |
Definition at line 6852 of file tm4c123fe6pm.h.
#define CAN_MSG2INT_INTPND_S 0 |
Definition at line 6853 of file tm4c123fe6pm.h.
#define CAN_MSG2VAL_MSGVAL_M 0x0000FFFF |
Definition at line 6868 of file tm4c123fe6pm.h.
#define CAN_MSG2VAL_MSGVAL_S 0 |
Definition at line 6869 of file tm4c123fe6pm.h.
#define CAN_NWDA1_NEWDAT_M 0x0000FFFF |
Definition at line 6828 of file tm4c123fe6pm.h.
#define CAN_NWDA1_NEWDAT_S 0 |
Definition at line 6829 of file tm4c123fe6pm.h.
#define CAN_NWDA2_NEWDAT_M 0x0000FFFF |
Definition at line 6836 of file tm4c123fe6pm.h.
#define CAN_NWDA2_NEWDAT_S 0 |
Definition at line 6837 of file tm4c123fe6pm.h.
#define CAN_STS_BOFF 0x00000080 |
Definition at line 6514 of file tm4c123fe6pm.h.
#define CAN_STS_EPASS 0x00000020 |
Definition at line 6516 of file tm4c123fe6pm.h.
#define CAN_STS_EWARN 0x00000040 |
Definition at line 6515 of file tm4c123fe6pm.h.
#define CAN_STS_LEC_ACK 0x00000003 |
Definition at line 6524 of file tm4c123fe6pm.h.
#define CAN_STS_LEC_BIT0 0x00000005 |
Definition at line 6526 of file tm4c123fe6pm.h.
#define CAN_STS_LEC_BIT1 0x00000004 |
Definition at line 6525 of file tm4c123fe6pm.h.
#define CAN_STS_LEC_CRC 0x00000006 |
Definition at line 6527 of file tm4c123fe6pm.h.
#define CAN_STS_LEC_FORM 0x00000002 |
Definition at line 6523 of file tm4c123fe6pm.h.
#define CAN_STS_LEC_M 0x00000007 |
Definition at line 6520 of file tm4c123fe6pm.h.
#define CAN_STS_LEC_NOEVENT 0x00000007 |
Definition at line 6528 of file tm4c123fe6pm.h.
#define CAN_STS_LEC_NONE 0x00000000 |
Definition at line 6521 of file tm4c123fe6pm.h.
#define CAN_STS_LEC_STUFF 0x00000001 |
Definition at line 6522 of file tm4c123fe6pm.h.
#define CAN_STS_RXOK 0x00000010 |
Definition at line 6517 of file tm4c123fe6pm.h.
#define CAN_STS_TXOK 0x00000008 |
Definition at line 6518 of file tm4c123fe6pm.h.
#define CAN_TST_BASIC 0x00000004 |
Definition at line 6577 of file tm4c123fe6pm.h.
#define CAN_TST_LBACK 0x00000010 |
Definition at line 6575 of file tm4c123fe6pm.h.
#define CAN_TST_RX 0x00000080 |
Definition at line 6569 of file tm4c123fe6pm.h.
#define CAN_TST_SILENT 0x00000008 |
Definition at line 6576 of file tm4c123fe6pm.h.
#define CAN_TST_TX_CANCTL 0x00000000 |
Definition at line 6571 of file tm4c123fe6pm.h.
#define CAN_TST_TX_DOMINANT 0x00000040 |
Definition at line 6573 of file tm4c123fe6pm.h.
#define CAN_TST_TX_M 0x00000060 |
Definition at line 6570 of file tm4c123fe6pm.h.
#define CAN_TST_TX_RECESSIVE 0x00000060 |
Definition at line 6574 of file tm4c123fe6pm.h.
#define CAN_TST_TX_SAMPLE 0x00000020 |
Definition at line 6572 of file tm4c123fe6pm.h.
#define CAN_TXRQ1_TXRQST_M 0x0000FFFF |
Definition at line 6812 of file tm4c123fe6pm.h.
#define CAN_TXRQ1_TXRQST_S 0 |
Definition at line 6813 of file tm4c123fe6pm.h.
#define CAN_TXRQ2_TXRQST_M 0x0000FFFF |
Definition at line 6820 of file tm4c123fe6pm.h.
#define CAN_TXRQ2_TXRQST_S 0 |
Definition at line 6821 of file tm4c123fe6pm.h.
#define COMP_ACCTL0_ASRCP_M 0x00000600 |
Definition at line 6437 of file tm4c123fe6pm.h.
#define COMP_ACCTL0_ASRCP_PIN 0x00000000 |
Definition at line 6438 of file tm4c123fe6pm.h.
#define COMP_ACCTL0_ASRCP_PIN0 0x00000200 |
Definition at line 6439 of file tm4c123fe6pm.h.
#define COMP_ACCTL0_ASRCP_REF 0x00000400 |
Definition at line 6440 of file tm4c123fe6pm.h.
#define COMP_ACCTL0_CINV 0x00000002 |
Definition at line 6453 of file tm4c123fe6pm.h.
#define COMP_ACCTL0_ISEN_BOTH 0x0000000C |
Definition at line 6452 of file tm4c123fe6pm.h.
#define COMP_ACCTL0_ISEN_FALL 0x00000004 |
Definition at line 6450 of file tm4c123fe6pm.h.
#define COMP_ACCTL0_ISEN_LEVEL 0x00000000 |
Definition at line 6449 of file tm4c123fe6pm.h.
#define COMP_ACCTL0_ISEN_M 0x0000000C |
Definition at line 6448 of file tm4c123fe6pm.h.
#define COMP_ACCTL0_ISEN_RISE 0x00000008 |
Definition at line 6451 of file tm4c123fe6pm.h.
#define COMP_ACCTL0_ISLVAL 0x00000010 |
Definition at line 6447 of file tm4c123fe6pm.h.
#define COMP_ACCTL0_R (*((volatile uint32_t *)0x4003C024)) |
Definition at line 1383 of file tm4c123fe6pm.h.
#define COMP_ACCTL0_TOEN 0x00000800 |
Definition at line 6436 of file tm4c123fe6pm.h.
#define COMP_ACCTL0_TSEN_BOTH 0x00000060 |
Definition at line 6446 of file tm4c123fe6pm.h.
#define COMP_ACCTL0_TSEN_FALL 0x00000020 |
Definition at line 6444 of file tm4c123fe6pm.h.
#define COMP_ACCTL0_TSEN_LEVEL 0x00000000 |
Definition at line 6443 of file tm4c123fe6pm.h.
#define COMP_ACCTL0_TSEN_M 0x00000060 |
Definition at line 6442 of file tm4c123fe6pm.h.
#define COMP_ACCTL0_TSEN_RISE 0x00000040 |
Definition at line 6445 of file tm4c123fe6pm.h.
#define COMP_ACCTL0_TSLVAL 0x00000080 |
Definition at line 6441 of file tm4c123fe6pm.h.
#define COMP_ACCTL1_ASRCP_M 0x00000600 |
Definition at line 6468 of file tm4c123fe6pm.h.
#define COMP_ACCTL1_ASRCP_PIN 0x00000000 |
Definition at line 6469 of file tm4c123fe6pm.h.
#define COMP_ACCTL1_ASRCP_PIN0 0x00000200 |
Definition at line 6470 of file tm4c123fe6pm.h.
#define COMP_ACCTL1_ASRCP_REF 0x00000400 |
Definition at line 6471 of file tm4c123fe6pm.h.
#define COMP_ACCTL1_CINV 0x00000002 |
Definition at line 6484 of file tm4c123fe6pm.h.
#define COMP_ACCTL1_ISEN_BOTH 0x0000000C |
Definition at line 6483 of file tm4c123fe6pm.h.
#define COMP_ACCTL1_ISEN_FALL 0x00000004 |
Definition at line 6481 of file tm4c123fe6pm.h.
#define COMP_ACCTL1_ISEN_LEVEL 0x00000000 |
Definition at line 6480 of file tm4c123fe6pm.h.
#define COMP_ACCTL1_ISEN_M 0x0000000C |
Definition at line 6479 of file tm4c123fe6pm.h.
#define COMP_ACCTL1_ISEN_RISE 0x00000008 |
Definition at line 6482 of file tm4c123fe6pm.h.
#define COMP_ACCTL1_ISLVAL 0x00000010 |
Definition at line 6478 of file tm4c123fe6pm.h.
#define COMP_ACCTL1_R (*((volatile uint32_t *)0x4003C044)) |
Definition at line 1385 of file tm4c123fe6pm.h.
#define COMP_ACCTL1_TOEN 0x00000800 |
Definition at line 6467 of file tm4c123fe6pm.h.
#define COMP_ACCTL1_TSEN_BOTH 0x00000060 |
Definition at line 6477 of file tm4c123fe6pm.h.
#define COMP_ACCTL1_TSEN_FALL 0x00000020 |
Definition at line 6475 of file tm4c123fe6pm.h.
#define COMP_ACCTL1_TSEN_LEVEL 0x00000000 |
Definition at line 6474 of file tm4c123fe6pm.h.
#define COMP_ACCTL1_TSEN_M 0x00000060 |
Definition at line 6473 of file tm4c123fe6pm.h.
#define COMP_ACCTL1_TSEN_RISE 0x00000040 |
Definition at line 6476 of file tm4c123fe6pm.h.
#define COMP_ACCTL1_TSLVAL 0x00000080 |
Definition at line 6472 of file tm4c123fe6pm.h.
#define COMP_ACINTEN_IN0 0x00000001 |
Definition at line 6411 of file tm4c123fe6pm.h.
#define COMP_ACINTEN_IN1 0x00000002 |
Definition at line 6410 of file tm4c123fe6pm.h.
#define COMP_ACINTEN_R (*((volatile uint32_t *)0x4003C008)) |
Definition at line 1380 of file tm4c123fe6pm.h.
#define COMP_ACMIS_IN0 0x00000001 |
Definition at line 6394 of file tm4c123fe6pm.h.
#define COMP_ACMIS_IN1 0x00000002 |
Definition at line 6392 of file tm4c123fe6pm.h.
#define COMP_ACMIS_R (*((volatile uint32_t *)0x4003C000)) |
Definition at line 1378 of file tm4c123fe6pm.h.
#define COMP_ACREFCTL_EN 0x00000200 |
Definition at line 6419 of file tm4c123fe6pm.h.
#define COMP_ACREFCTL_R (*((volatile uint32_t *)0x4003C010)) |
Definition at line 1381 of file tm4c123fe6pm.h.
#define COMP_ACREFCTL_RNG 0x00000100 |
Definition at line 6420 of file tm4c123fe6pm.h.
#define COMP_ACREFCTL_VREF_M 0x0000000F |
Definition at line 6421 of file tm4c123fe6pm.h.
#define COMP_ACREFCTL_VREF_S 0 |
Definition at line 6422 of file tm4c123fe6pm.h.
#define COMP_ACRIS_IN0 0x00000001 |
Definition at line 6403 of file tm4c123fe6pm.h.
#define COMP_ACRIS_IN1 0x00000002 |
Definition at line 6402 of file tm4c123fe6pm.h.
#define COMP_ACRIS_R (*((volatile uint32_t *)0x4003C004)) |
Definition at line 1379 of file tm4c123fe6pm.h.
#define COMP_ACSTAT0_OVAL 0x00000002 |
Definition at line 6429 of file tm4c123fe6pm.h.
#define COMP_ACSTAT0_R (*((volatile uint32_t *)0x4003C020)) |
Definition at line 1382 of file tm4c123fe6pm.h.
#define COMP_ACSTAT1_OVAL 0x00000002 |
Definition at line 6460 of file tm4c123fe6pm.h.
#define COMP_ACSTAT1_R (*((volatile uint32_t *)0x4003C040)) |
Definition at line 1384 of file tm4c123fe6pm.h.
#define COMP_PP_C0O 0x00010000 |
Definition at line 6492 of file tm4c123fe6pm.h.
#define COMP_PP_C1O 0x00020000 |
Definition at line 6491 of file tm4c123fe6pm.h.
#define COMP_PP_CMP0 0x00000001 |
Definition at line 6494 of file tm4c123fe6pm.h.
#define COMP_PP_CMP1 0x00000002 |
Definition at line 6493 of file tm4c123fe6pm.h.
#define COMP_PP_R (*((volatile uint32_t *)0x4003CFC0)) |
Definition at line 1386 of file tm4c123fe6pm.h.
#define EEPROM_EEBLOCK_BLOCK_M 0x0000FFFF |
Definition at line 8959 of file tm4c123fe6pm.h.
#define EEPROM_EEBLOCK_BLOCK_S 0 |
Definition at line 8960 of file tm4c123fe6pm.h.
#define EEPROM_EEBLOCK_R (*((volatile uint32_t *)0x400AF004)) |
Definition at line 2023 of file tm4c123fe6pm.h.
#define EEPROM_EEDBGME_KEY_M 0xFFFF0000 |
Definition at line 9083 of file tm4c123fe6pm.h.
#define EEPROM_EEDBGME_KEY_S 16 |
Definition at line 9085 of file tm4c123fe6pm.h.
#define EEPROM_EEDBGME_ME 0x00000001 |
Definition at line 9084 of file tm4c123fe6pm.h.
#define EEPROM_EEDBGME_R (*((volatile uint32_t *)0x400AF080)) |
Definition at line 2036 of file tm4c123fe6pm.h.
#define EEPROM_EEDONE_NOPERM 0x00000010 |
Definition at line 8999 of file tm4c123fe6pm.h.
#define EEPROM_EEDONE_R (*((volatile uint32_t *)0x400AF018)) |
Definition at line 2027 of file tm4c123fe6pm.h.
#define EEPROM_EEDONE_WKCOPY 0x00000008 |
Definition at line 9000 of file tm4c123fe6pm.h.
#define EEPROM_EEDONE_WKERASE 0x00000004 |
Definition at line 9001 of file tm4c123fe6pm.h.
#define EEPROM_EEDONE_WORKING 0x00000001 |
Definition at line 9002 of file tm4c123fe6pm.h.
#define EEPROM_EEDONE_WRBUSY 0x00000020 |
Definition at line 8998 of file tm4c123fe6pm.h.
#define EEPROM_EEHIDE_HN_M 0xFFFFFFFE |
Definition at line 9076 of file tm4c123fe6pm.h.
#define EEPROM_EEHIDE_R (*((volatile uint32_t *)0x400AF050)) |
Definition at line 2035 of file tm4c123fe6pm.h.
#define EEPROM_EEINT_INT 0x00000001 |
Definition at line 9069 of file tm4c123fe6pm.h.
#define EEPROM_EEINT_R (*((volatile uint32_t *)0x400AF040)) |
Definition at line 2034 of file tm4c123fe6pm.h.
#define EEPROM_EEOFFSET_OFFSET_M 0x0000000F |
Definition at line 8968 of file tm4c123fe6pm.h.
#define EEPROM_EEOFFSET_OFFSET_S 0 |
Definition at line 8970 of file tm4c123fe6pm.h.
#define EEPROM_EEOFFSET_R (*((volatile uint32_t *)0x400AF008)) |
Definition at line 2024 of file tm4c123fe6pm.h.
#define EEPROM_EEPASS0_PASS_M 0xFFFFFFFF |
Definition at line 9045 of file tm4c123fe6pm.h.
#define EEPROM_EEPASS0_PASS_S 0 |
Definition at line 9046 of file tm4c123fe6pm.h.
#define EEPROM_EEPASS0_R (*((volatile uint32_t *)0x400AF034)) |
Definition at line 2031 of file tm4c123fe6pm.h.
#define EEPROM_EEPASS1_PASS_M 0xFFFFFFFF |
Definition at line 9053 of file tm4c123fe6pm.h.
#define EEPROM_EEPASS1_PASS_S 0 |
Definition at line 9054 of file tm4c123fe6pm.h.
#define EEPROM_EEPASS1_R (*((volatile uint32_t *)0x400AF038)) |
Definition at line 2032 of file tm4c123fe6pm.h.
#define EEPROM_EEPASS2_PASS_M 0xFFFFFFFF |
Definition at line 9061 of file tm4c123fe6pm.h.
#define EEPROM_EEPASS2_PASS_S 0 |
Definition at line 9062 of file tm4c123fe6pm.h.
#define EEPROM_EEPASS2_R (*((volatile uint32_t *)0x400AF03C)) |
Definition at line 2033 of file tm4c123fe6pm.h.
#define EEPROM_EEPROT_ACC 0x00000008 |
Definition at line 9026 of file tm4c123fe6pm.h.
#define EEPROM_EEPROT_PROT_M 0x00000007 |
Definition at line 9027 of file tm4c123fe6pm.h.
#define EEPROM_EEPROT_PROT_RONPW 0x00000002 |
Definition at line 9036 of file tm4c123fe6pm.h.
#define EEPROM_EEPROT_PROT_RWNPW 0x00000000 |
Definition at line 9028 of file tm4c123fe6pm.h.
#define EEPROM_EEPROT_PROT_RWPW 0x00000001 |
Definition at line 9033 of file tm4c123fe6pm.h.
#define EEPROM_EEPROT_R (*((volatile uint32_t *)0x400AF030)) |
Definition at line 2030 of file tm4c123fe6pm.h.
#define EEPROM_EERDWR_R (*((volatile uint32_t *)0x400AF010)) |
Definition at line 2025 of file tm4c123fe6pm.h.
#define EEPROM_EERDWR_VALUE_M 0xFFFFFFFF |
Definition at line 8978 of file tm4c123fe6pm.h.
#define EEPROM_EERDWR_VALUE_S 0 |
Definition at line 8979 of file tm4c123fe6pm.h.
#define EEPROM_EERDWRINC_R (*((volatile uint32_t *)0x400AF014)) |
Definition at line 2026 of file tm4c123fe6pm.h.
#define EEPROM_EERDWRINC_VALUE_M 0xFFFFFFFF |
Definition at line 8987 of file tm4c123fe6pm.h.
#define EEPROM_EERDWRINC_VALUE_S 0 |
Definition at line 8990 of file tm4c123fe6pm.h.
#define EEPROM_EESIZE_BLKCNT_M 0x07FF0000 |
Definition at line 8949 of file tm4c123fe6pm.h.
#define EEPROM_EESIZE_BLKCNT_S 16 |
Definition at line 8951 of file tm4c123fe6pm.h.
#define EEPROM_EESIZE_R (*((volatile uint32_t *)0x400AF000)) |
Definition at line 2022 of file tm4c123fe6pm.h.
#define EEPROM_EESIZE_WORDCNT_M 0x0000FFFF |
Definition at line 8950 of file tm4c123fe6pm.h.
#define EEPROM_EESIZE_WORDCNT_S 0 |
Definition at line 8952 of file tm4c123fe6pm.h.
#define EEPROM_EESUPP_ERETRY 0x00000004 |
Definition at line 9010 of file tm4c123fe6pm.h.
#define EEPROM_EESUPP_PRETRY 0x00000008 |
Definition at line 9009 of file tm4c123fe6pm.h.
#define EEPROM_EESUPP_R (*((volatile uint32_t *)0x400AF01C)) |
Definition at line 2028 of file tm4c123fe6pm.h.
#define EEPROM_EEUNLOCK_R (*((volatile uint32_t *)0x400AF020)) |
Definition at line 2029 of file tm4c123fe6pm.h.
#define EEPROM_EEUNLOCK_UNLOCK_M 0xFFFFFFFF |
Definition at line 9018 of file tm4c123fe6pm.h.
#define EEPROM_PP_R (*((volatile uint32_t *)0x400AFFC0)) |
Definition at line 2037 of file tm4c123fe6pm.h.
#define EEPROM_PP_SIZE_M 0x0000001F |
Definition at line 9092 of file tm4c123fe6pm.h.
#define EEPROM_PP_SIZE_S 0 |
Definition at line 9093 of file tm4c123fe6pm.h.
#define FLASH_BOOTCFG_DBG0 0x00000001 |
Definition at line 9327 of file tm4c123fe6pm.h.
#define FLASH_BOOTCFG_DBG1 0x00000002 |
Definition at line 9326 of file tm4c123fe6pm.h.
#define FLASH_BOOTCFG_EN 0x00000100 |
Definition at line 9324 of file tm4c123fe6pm.h.
#define FLASH_BOOTCFG_KEY 0x00000010 |
Definition at line 9325 of file tm4c123fe6pm.h.
#define FLASH_BOOTCFG_NW 0x80000000 |
Definition at line 9304 of file tm4c123fe6pm.h.
#define FLASH_BOOTCFG_PIN_0 0x00000000 |
Definition at line 9315 of file tm4c123fe6pm.h.
#define FLASH_BOOTCFG_PIN_1 0x00000400 |
Definition at line 9316 of file tm4c123fe6pm.h.
#define FLASH_BOOTCFG_PIN_2 0x00000800 |
Definition at line 9317 of file tm4c123fe6pm.h.
#define FLASH_BOOTCFG_PIN_3 0x00000C00 |
Definition at line 9318 of file tm4c123fe6pm.h.
#define FLASH_BOOTCFG_PIN_4 0x00001000 |
Definition at line 9319 of file tm4c123fe6pm.h.
#define FLASH_BOOTCFG_PIN_5 0x00001400 |
Definition at line 9320 of file tm4c123fe6pm.h.
#define FLASH_BOOTCFG_PIN_6 0x00001800 |
Definition at line 9321 of file tm4c123fe6pm.h.
#define FLASH_BOOTCFG_PIN_7 0x00001C00 |
Definition at line 9322 of file tm4c123fe6pm.h.
#define FLASH_BOOTCFG_PIN_M 0x00001C00 |
Definition at line 9314 of file tm4c123fe6pm.h.
#define FLASH_BOOTCFG_POL 0x00000200 |
Definition at line 9323 of file tm4c123fe6pm.h.
#define FLASH_BOOTCFG_PORT_A 0x00000000 |
Definition at line 9306 of file tm4c123fe6pm.h.
#define FLASH_BOOTCFG_PORT_B 0x00002000 |
Definition at line 9307 of file tm4c123fe6pm.h.
#define FLASH_BOOTCFG_PORT_C 0x00004000 |
Definition at line 9308 of file tm4c123fe6pm.h.
#define FLASH_BOOTCFG_PORT_D 0x00006000 |
Definition at line 9309 of file tm4c123fe6pm.h.
#define FLASH_BOOTCFG_PORT_E 0x00008000 |
Definition at line 9310 of file tm4c123fe6pm.h.
#define FLASH_BOOTCFG_PORT_F 0x0000A000 |
Definition at line 9311 of file tm4c123fe6pm.h.
#define FLASH_BOOTCFG_PORT_G 0x0000C000 |
Definition at line 9312 of file tm4c123fe6pm.h.
#define FLASH_BOOTCFG_PORT_H 0x0000E000 |
Definition at line 9313 of file tm4c123fe6pm.h.
#define FLASH_BOOTCFG_PORT_M 0x0000E000 |
Definition at line 9305 of file tm4c123fe6pm.h.
#define FLASH_BOOTCFG_R (*((volatile uint32_t *)0x400FE1D0)) |
Definition at line 2125 of file tm4c123fe6pm.h.
#define FLASH_FCIM_AMASK 0x00000001 |
Definition at line 9226 of file tm4c123fe6pm.h.
#define FLASH_FCIM_EMASK 0x00000004 |
Definition at line 9224 of file tm4c123fe6pm.h.
#define FLASH_FCIM_ERMASK 0x00000800 |
Definition at line 9221 of file tm4c123fe6pm.h.
#define FLASH_FCIM_INVDMASK 0x00000400 |
Definition at line 9222 of file tm4c123fe6pm.h.
#define FLASH_FCIM_PMASK 0x00000002 |
Definition at line 9225 of file tm4c123fe6pm.h.
#define FLASH_FCIM_PROGMASK 0x00002000 |
Definition at line 9220 of file tm4c123fe6pm.h.
#define FLASH_FCIM_R (*((volatile uint32_t *)0x400FD010)) |
Definition at line 2116 of file tm4c123fe6pm.h.
#define FLASH_FCIM_VOLTMASK 0x00000200 |
Definition at line 9223 of file tm4c123fe6pm.h.
#define FLASH_FCMISC_AMISC 0x00000001 |
Definition at line 9245 of file tm4c123fe6pm.h.
#define FLASH_FCMISC_EMISC 0x00000004 |
Definition at line 9241 of file tm4c123fe6pm.h.
#define FLASH_FCMISC_ERMISC 0x00000800 |
Definition at line 9235 of file tm4c123fe6pm.h.
#define FLASH_FCMISC_INVDMISC 0x00000400 |
Definition at line 9237 of file tm4c123fe6pm.h.
#define FLASH_FCMISC_PMISC 0x00000002 |
Definition at line 9243 of file tm4c123fe6pm.h.
#define FLASH_FCMISC_PROGMISC 0x00002000 |
Definition at line 9233 of file tm4c123fe6pm.h.
#define FLASH_FCMISC_R (*((volatile uint32_t *)0x400FD014)) |
Definition at line 2117 of file tm4c123fe6pm.h.
#define FLASH_FCMISC_VOLTMISC 0x00000200 |
Definition at line 9239 of file tm4c123fe6pm.h.
#define FLASH_FCRIS_ARIS 0x00000001 |
Definition at line 9213 of file tm4c123fe6pm.h.
#define FLASH_FCRIS_ERIS 0x00000004 |
Definition at line 9211 of file tm4c123fe6pm.h.
#define FLASH_FCRIS_ERRIS 0x00000800 |
Definition at line 9205 of file tm4c123fe6pm.h.
#define FLASH_FCRIS_INVDRIS 0x00000400 |
Definition at line 9207 of file tm4c123fe6pm.h.
#define FLASH_FCRIS_PRIS 0x00000002 |
Definition at line 9212 of file tm4c123fe6pm.h.
#define FLASH_FCRIS_PROGRIS 0x00002000 |
Definition at line 9203 of file tm4c123fe6pm.h.
#define FLASH_FCRIS_R (*((volatile uint32_t *)0x400FD00C)) |
Definition at line 2115 of file tm4c123fe6pm.h.
#define FLASH_FCRIS_VOLTRIS 0x00000200 |
Definition at line 9209 of file tm4c123fe6pm.h.
#define FLASH_FMA_OFFSET_M 0x0001FFFF |
Definition at line 9176 of file tm4c123fe6pm.h.
#define FLASH_FMA_OFFSET_S 0 |
Definition at line 9177 of file tm4c123fe6pm.h.
#define FLASH_FMA_R (*((volatile uint32_t *)0x400FD000)) |
Definition at line 2112 of file tm4c123fe6pm.h.
#define FLASH_FMC2_R (*((volatile uint32_t *)0x400FD020)) |
Definition at line 2118 of file tm4c123fe6pm.h.
#define FLASH_FMC2_WRBUF 0x00000001 |
Definition at line 9253 of file tm4c123fe6pm.h.
#define FLASH_FMC_COMT 0x00000008 |
Definition at line 9193 of file tm4c123fe6pm.h.
#define FLASH_FMC_ERASE 0x00000002 |
Definition at line 9195 of file tm4c123fe6pm.h.
#define FLASH_FMC_MERASE 0x00000004 |
Definition at line 9194 of file tm4c123fe6pm.h.
#define FLASH_FMC_R (*((volatile uint32_t *)0x400FD008)) |
Definition at line 2114 of file tm4c123fe6pm.h.
#define FLASH_FMC_WRITE 0x00000001 |
Definition at line 9196 of file tm4c123fe6pm.h.
#define FLASH_FMC_WRKEY 0xA4420000 |
Definition at line 9192 of file tm4c123fe6pm.h.
#define FLASH_FMD_DATA_M 0xFFFFFFFF |
Definition at line 9184 of file tm4c123fe6pm.h.
#define FLASH_FMD_DATA_S 0 |
Definition at line 9185 of file tm4c123fe6pm.h.
#define FLASH_FMD_R (*((volatile uint32_t *)0x400FD004)) |
Definition at line 2113 of file tm4c123fe6pm.h.
#define FLASH_FMPPE0_R (*((volatile uint32_t *)0x400FE400)) |
Definition at line 2132 of file tm4c123fe6pm.h.
#define FLASH_FMPPE1_R (*((volatile uint32_t *)0x400FE404)) |
Definition at line 2133 of file tm4c123fe6pm.h.
#define FLASH_FMPRE0_R (*((volatile uint32_t *)0x400FE200)) |
Definition at line 2130 of file tm4c123fe6pm.h.
#define FLASH_FMPRE1_R (*((volatile uint32_t *)0x400FE204)) |
Definition at line 2131 of file tm4c123fe6pm.h.
#define FLASH_FSIZE_R (*((volatile uint32_t *)0x400FDFC0)) |
Definition at line 2121 of file tm4c123fe6pm.h.
#define FLASH_FSIZE_SIZE_128KB 0x0000003F |
Definition at line 9275 of file tm4c123fe6pm.h.
#define FLASH_FSIZE_SIZE_M 0x0000FFFF |
Definition at line 9274 of file tm4c123fe6pm.h.
#define FLASH_FWBN_DATA_M 0xFFFFFFFF |
Definition at line 9267 of file tm4c123fe6pm.h.
#define FLASH_FWBN_R (*((volatile uint32_t *)0x400FD100)) |
Definition at line 2120 of file tm4c123fe6pm.h.
#define FLASH_FWBVAL_FWB_M 0xFFFFFFFF |
Definition at line 9260 of file tm4c123fe6pm.h.
#define FLASH_FWBVAL_R (*((volatile uint32_t *)0x400FD030)) |
Definition at line 2119 of file tm4c123fe6pm.h.
#define FLASH_RMCTL_BA 0x00000001 |
Definition at line 9297 of file tm4c123fe6pm.h.
#define FLASH_RMCTL_R (*((volatile uint32_t *)0x400FE0F0)) |
Definition at line 2124 of file tm4c123fe6pm.h.
#define FLASH_ROMSWMAP_R (*((volatile uint32_t *)0x400FDFCC)) |
Definition at line 2123 of file tm4c123fe6pm.h.
#define FLASH_ROMSWMAP_SAFERTOS 0x00000001 |
Definition at line 9290 of file tm4c123fe6pm.h.
#define FLASH_SSIZE_R (*((volatile uint32_t *)0x400FDFC4)) |
Definition at line 2122 of file tm4c123fe6pm.h.
#define FLASH_SSIZE_SIZE_32KB 0x0000007F |
Definition at line 9283 of file tm4c123fe6pm.h.
#define FLASH_SSIZE_SIZE_M 0x0000FFFF |
Definition at line 9282 of file tm4c123fe6pm.h.
#define FLASH_USERREG0_DATA_M 0xFFFFFFFF |
Definition at line 9334 of file tm4c123fe6pm.h.
#define FLASH_USERREG0_DATA_S 0 |
Definition at line 9335 of file tm4c123fe6pm.h.
#define FLASH_USERREG0_R (*((volatile uint32_t *)0x400FE1E0)) |
Definition at line 2126 of file tm4c123fe6pm.h.
#define FLASH_USERREG1_DATA_M 0xFFFFFFFF |
Definition at line 9342 of file tm4c123fe6pm.h.
#define FLASH_USERREG1_DATA_S 0 |
Definition at line 9343 of file tm4c123fe6pm.h.
#define FLASH_USERREG1_R (*((volatile uint32_t *)0x400FE1E4)) |
Definition at line 2127 of file tm4c123fe6pm.h.
#define FLASH_USERREG2_DATA_M 0xFFFFFFFF |
Definition at line 9350 of file tm4c123fe6pm.h.
#define FLASH_USERREG2_DATA_S 0 |
Definition at line 9351 of file tm4c123fe6pm.h.
#define FLASH_USERREG2_R (*((volatile uint32_t *)0x400FE1E8)) |
Definition at line 2128 of file tm4c123fe6pm.h.
#define FLASH_USERREG3_DATA_M 0xFFFFFFFF |
Definition at line 9358 of file tm4c123fe6pm.h.
#define FLASH_USERREG3_DATA_S 0 |
Definition at line 9359 of file tm4c123fe6pm.h.
#define FLASH_USERREG3_R (*((volatile uint32_t *)0x400FE1EC)) |
Definition at line 2129 of file tm4c123fe6pm.h.
#define GPIO_ICR_GPIO_M 0x000000FF |
Definition at line 2515 of file tm4c123fe6pm.h.
#define GPIO_ICR_GPIO_S 0 |
Definition at line 2516 of file tm4c123fe6pm.h.
#define GPIO_IM_GPIO_M 0x000000FF |
Definition at line 2491 of file tm4c123fe6pm.h.
#define GPIO_IM_GPIO_S 0 |
Definition at line 2492 of file tm4c123fe6pm.h.
#define GPIO_LOCK_KEY 0x4C4F434B |
Definition at line 2528 of file tm4c123fe6pm.h.
#define GPIO_LOCK_LOCKED 0x00000001 |
Definition at line 2526 of file tm4c123fe6pm.h.
#define GPIO_LOCK_M 0xFFFFFFFF |
Definition at line 2523 of file tm4c123fe6pm.h.
#define GPIO_LOCK_UNLOCKED 0x00000000 |
Definition at line 2524 of file tm4c123fe6pm.h.
#define GPIO_MIS_GPIO_M 0x000000FF |
Definition at line 2507 of file tm4c123fe6pm.h.
#define GPIO_MIS_GPIO_S 0 |
Definition at line 2508 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PA0_CAN1RX 0x00000008 |
Definition at line 2555 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PA0_M 0x0000000F |
Definition at line 2553 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PA0_U0RX 0x00000001 |
Definition at line 2554 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PA1_CAN1TX 0x00000080 |
Definition at line 2552 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PA1_M 0x000000F0 |
Definition at line 2550 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PA1_U0TX 0x00000010 |
Definition at line 2551 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PA2_M 0x00000F00 |
Definition at line 2548 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PA2_SSI0CLK 0x00000200 |
Definition at line 2549 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PA3_M 0x0000F000 |
Definition at line 2546 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PA3_SSI0FSS 0x00002000 |
Definition at line 2547 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PA4_M 0x000F0000 |
Definition at line 2544 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PA4_SSI0RX 0x00020000 |
Definition at line 2545 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PA5_M 0x00F00000 |
Definition at line 2542 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PA5_SSI0TX 0x00200000 |
Definition at line 2543 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PA6_I2C1SCL 0x03000000 |
Definition at line 2540 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PA6_M 0x0F000000 |
Definition at line 2539 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PA6_M1PWM2 0x05000000 |
Definition at line 2541 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PA7_I2C1SDA 0x30000000 |
Definition at line 2537 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PA7_M 0xF0000000 |
Definition at line 2536 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PA7_M1PWM3 0x50000000 |
Definition at line 2538 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PB0_M 0x0000000F |
Definition at line 2593 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PB0_T2CCP0 0x00000007 |
Definition at line 2596 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PB0_U1RX 0x00000001 |
Definition at line 2595 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PB0_USB0ID 0x00000000 |
Definition at line 2594 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PB1_M 0x000000F0 |
Definition at line 2589 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PB1_T2CCP1 0x00000070 |
Definition at line 2592 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PB1_U1TX 0x00000010 |
Definition at line 2591 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PB1_USB0VBUS 0x00000000 |
Definition at line 2590 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PB2_I2C0SCL 0x00000300 |
Definition at line 2587 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PB2_M 0x00000F00 |
Definition at line 2586 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PB2_T3CCP0 0x00000700 |
Definition at line 2588 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PB3_I2C0SDA 0x00003000 |
Definition at line 2584 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PB3_M 0x0000F000 |
Definition at line 2583 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PB3_T3CCP1 0x00007000 |
Definition at line 2585 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PB4_CAN0RX 0x00080000 |
Definition at line 2582 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PB4_M 0x000F0000 |
Definition at line 2578 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PB4_M0PWM2 0x00040000 |
Definition at line 2580 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PB4_SSI2CLK 0x00020000 |
Definition at line 2579 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PB4_T1CCP0 0x00070000 |
Definition at line 2581 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PB5_CAN0TX 0x00800000 |
Definition at line 2577 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PB5_M 0x00F00000 |
Definition at line 2573 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PB5_M0PWM3 0x00400000 |
Definition at line 2575 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PB5_SSI2FSS 0x00200000 |
Definition at line 2574 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PB5_T1CCP1 0x00700000 |
Definition at line 2576 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PB6_I2C5SCL 0x03000000 |
Definition at line 2570 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PB6_M 0x0F000000 |
Definition at line 2568 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PB6_M0PWM0 0x04000000 |
Definition at line 2571 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PB6_SSI2RX 0x02000000 |
Definition at line 2569 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PB6_T0CCP0 0x07000000 |
Definition at line 2572 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PB7_I2C5SDA 0x30000000 |
Definition at line 2565 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PB7_M 0xF0000000 |
Definition at line 2563 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PB7_M0PWM1 0x40000000 |
Definition at line 2566 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PB7_SSI2TX 0x20000000 |
Definition at line 2564 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PB7_T0CCP1 0x70000000 |
Definition at line 2567 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PC0_M 0x0000000F |
Definition at line 2636 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PC0_T4CCP0 0x00000007 |
Definition at line 2638 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PC0_TCK 0x00000001 |
Definition at line 2637 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PC1_M 0x000000F0 |
Definition at line 2633 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PC1_T4CCP1 0x00000070 |
Definition at line 2635 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PC1_TMS 0x00000010 |
Definition at line 2634 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PC2_M 0x00000F00 |
Definition at line 2630 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PC2_T5CCP0 0x00000700 |
Definition at line 2632 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PC2_TDI 0x00000100 |
Definition at line 2631 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PC3_M 0x0000F000 |
Definition at line 2627 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PC3_T5CCP1 0x00007000 |
Definition at line 2629 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PC3_TDO 0x00001000 |
Definition at line 2628 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PC4_IDX1 0x00060000 |
Definition at line 2624 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PC4_M 0x000F0000 |
Definition at line 2620 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PC4_M0PWM6 0x00040000 |
Definition at line 2623 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PC4_U1RTS 0x00080000 |
Definition at line 2626 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PC4_U1RX 0x00020000 |
Definition at line 2622 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PC4_U4RX 0x00010000 |
Definition at line 2621 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PC4_WT0CCP0 0x00070000 |
Definition at line 2625 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PC5_M 0x00F00000 |
Definition at line 2613 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PC5_M0PWM7 0x00400000 |
Definition at line 2616 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PC5_PHA1 0x00600000 |
Definition at line 2617 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PC5_U1CTS 0x00800000 |
Definition at line 2619 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PC5_U1TX 0x00200000 |
Definition at line 2615 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PC5_U4TX 0x00100000 |
Definition at line 2614 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PC5_WT0CCP1 0x00700000 |
Definition at line 2618 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PC6_M 0x0F000000 |
Definition at line 2608 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PC6_PHB1 0x06000000 |
Definition at line 2610 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PC6_U3RX 0x01000000 |
Definition at line 2609 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PC6_USB0EPEN 0x08000000 |
Definition at line 2612 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PC6_WT1CCP0 0x07000000 |
Definition at line 2611 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PC7_M 0xF0000000 |
Definition at line 2604 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PC7_U3TX 0x10000000 |
Definition at line 2605 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PC7_USB0PFLT 0x80000000 |
Definition at line 2607 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PC7_WT1CCP1 0x70000000 |
Definition at line 2606 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD0_AIN7 0x00000000 |
Definition at line 2688 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD0_I2C3SCL 0x00000003 |
Definition at line 2691 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD0_M 0x0000000F |
Definition at line 2687 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD0_M0PWM6 0x00000004 |
Definition at line 2692 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD0_M1PWM0 0x00000005 |
Definition at line 2693 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD0_SSI1CLK 0x00000002 |
Definition at line 2690 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD0_SSI3CLK 0x00000001 |
Definition at line 2689 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD0_WT2CCP0 0x00000007 |
Definition at line 2694 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD1_AIN6 0x00000000 |
Definition at line 2680 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD1_I2C3SDA 0x00000030 |
Definition at line 2683 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD1_M 0x000000F0 |
Definition at line 2679 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD1_M0PWM7 0x00000040 |
Definition at line 2684 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD1_M1PWM1 0x00000050 |
Definition at line 2685 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD1_SSI1FSS 0x00000020 |
Definition at line 2682 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD1_SSI3FSS 0x00000010 |
Definition at line 2681 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD1_WT2CCP1 0x00000070 |
Definition at line 2686 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD2_AIN5 0x00000000 |
Definition at line 2673 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD2_M 0x00000F00 |
Definition at line 2672 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD2_M0FAULT0 0x00000400 |
Definition at line 2676 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD2_SSI1RX 0x00000200 |
Definition at line 2675 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD2_SSI3RX 0x00000100 |
Definition at line 2674 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD2_USB0EPEN 0x00000800 |
Definition at line 2678 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD2_WT3CCP0 0x00000700 |
Definition at line 2677 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD3_AIN4 0x00000000 |
Definition at line 2666 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD3_IDX0 0x00006000 |
Definition at line 2669 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD3_M 0x0000F000 |
Definition at line 2665 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD3_SSI1TX 0x00002000 |
Definition at line 2668 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD3_SSI3TX 0x00001000 |
Definition at line 2667 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD3_USB0PFLT 0x00008000 |
Definition at line 2671 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD3_WT3CCP1 0x00007000 |
Definition at line 2670 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD4_M 0x000F0000 |
Definition at line 2661 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD4_U6RX 0x00010000 |
Definition at line 2663 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD4_USB0DM 0x00000000 |
Definition at line 2662 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD4_WT4CCP0 0x00070000 |
Definition at line 2664 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD5_M 0x00F00000 |
Definition at line 2657 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD5_U6TX 0x00100000 |
Definition at line 2659 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD5_USB0DP 0x00000000 |
Definition at line 2658 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD5_WT4CCP1 0x00700000 |
Definition at line 2660 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD6_M 0x0F000000 |
Definition at line 2652 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD6_M0FAULT0 0x04000000 |
Definition at line 2654 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD6_PHA0 0x06000000 |
Definition at line 2655 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD6_U2RX 0x01000000 |
Definition at line 2653 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD6_WT5CCP0 0x07000000 |
Definition at line 2656 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD7_M 0xF0000000 |
Definition at line 2646 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD7_M0FAULT1 0x40000000 |
Definition at line 2648 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD7_NMI 0x80000000 |
Definition at line 2651 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD7_PHB0 0x60000000 |
Definition at line 2649 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD7_U2TX 0x10000000 |
Definition at line 2647 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PD7_WT5CCP1 0x70000000 |
Definition at line 2650 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PE0_AIN3 0x00000000 |
Definition at line 2724 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PE0_M 0x0000000F |
Definition at line 2723 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PE0_U7RX 0x00000001 |
Definition at line 2725 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PE1_AIN2 0x00000000 |
Definition at line 2721 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PE1_M 0x000000F0 |
Definition at line 2720 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PE1_U7TX 0x00000010 |
Definition at line 2722 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PE2_AIN1 0x00000000 |
Definition at line 2719 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PE2_M 0x00000F00 |
Definition at line 2718 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PE3_AIN0 0x00000000 |
Definition at line 2717 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PE3_M 0x0000F000 |
Definition at line 2716 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PE4_AIN9 0x00000000 |
Definition at line 2710 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PE4_CAN0RX 0x00080000 |
Definition at line 2715 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PE4_I2C2SCL 0x00030000 |
Definition at line 2712 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PE4_M 0x000F0000 |
Definition at line 2709 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PE4_M0PWM4 0x00040000 |
Definition at line 2713 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PE4_M1PWM2 0x00050000 |
Definition at line 2714 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PE4_U5RX 0x00010000 |
Definition at line 2711 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PE5_AIN8 0x00000000 |
Definition at line 2703 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PE5_CAN0TX 0x00800000 |
Definition at line 2708 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PE5_I2C2SDA 0x00300000 |
Definition at line 2705 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PE5_M 0x00F00000 |
Definition at line 2702 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PE5_M0PWM5 0x00400000 |
Definition at line 2706 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PE5_M1PWM3 0x00500000 |
Definition at line 2707 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PE5_U5TX 0x00100000 |
Definition at line 2704 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PF0_C0O 0x00000009 |
Definition at line 2768 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PF0_CAN0RX 0x00000003 |
Definition at line 2763 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PF0_M 0x0000000F |
Definition at line 2760 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PF0_M1PWM4 0x00000005 |
Definition at line 2764 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PF0_NMI 0x00000008 |
Definition at line 2767 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PF0_PHA0 0x00000006 |
Definition at line 2765 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PF0_SSI1RX 0x00000002 |
Definition at line 2762 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PF0_T0CCP0 0x00000007 |
Definition at line 2766 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PF0_U1RTS 0x00000001 |
Definition at line 2761 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PF1_C1O 0x00000090 |
Definition at line 2758 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PF1_M 0x000000F0 |
Definition at line 2752 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PF1_M1PWM5 0x00000050 |
Definition at line 2755 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PF1_PHB0 0x00000060 |
Definition at line 2756 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PF1_SSI1TX 0x00000020 |
Definition at line 2754 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PF1_T0CCP1 0x00000070 |
Definition at line 2757 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PF1_TRD1 0x000000E0 |
Definition at line 2759 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PF1_U1CTS 0x00000010 |
Definition at line 2753 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PF2_M 0x00000F00 |
Definition at line 2746 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PF2_M0FAULT0 0x00000400 |
Definition at line 2748 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PF2_M1PWM6 0x00000500 |
Definition at line 2749 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PF2_SSI1CLK 0x00000200 |
Definition at line 2747 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PF2_T1CCP0 0x00000700 |
Definition at line 2750 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PF2_TRD0 0x00000E00 |
Definition at line 2751 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PF3_CAN0TX 0x00003000 |
Definition at line 2741 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PF3_M 0x0000F000 |
Definition at line 2739 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PF3_M0FAULT1 0x00004000 |
Definition at line 2742 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PF3_M1PWM7 0x00005000 |
Definition at line 2743 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PF3_SSI1FSS 0x00002000 |
Definition at line 2740 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PF3_T1CCP1 0x00007000 |
Definition at line 2744 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PF3_TRCLK 0x0000E000 |
Definition at line 2745 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PF4_IDX0 0x00060000 |
Definition at line 2736 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PF4_M 0x000F0000 |
Definition at line 2733 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PF4_M0FAULT2 0x00040000 |
Definition at line 2734 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PF4_M1FAULT0 0x00050000 |
Definition at line 2735 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PF4_T2CCP0 0x00070000 |
Definition at line 2737 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PF4_USB0EPEN 0x00080000 |
Definition at line 2738 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PG0_I2C3SCL 0x00000003 |
Definition at line 2809 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PG0_M 0x0000000F |
Definition at line 2808 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PG0_M1FAULT1 0x00000005 |
Definition at line 2810 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PG0_PHA1 0x00000006 |
Definition at line 2811 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PG0_T4CCP0 0x00000007 |
Definition at line 2812 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PG1_I2C3SDA 0x00000030 |
Definition at line 2804 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PG1_M 0x000000F0 |
Definition at line 2803 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PG1_M1FAULT2 0x00000050 |
Definition at line 2805 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PG1_PHB1 0x00000060 |
Definition at line 2806 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PG1_T4CCP1 0x00000070 |
Definition at line 2807 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PG2_I2C4SCL 0x00000300 |
Definition at line 2799 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PG2_M 0x00000F00 |
Definition at line 2798 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PG2_M0FAULT1 0x00000400 |
Definition at line 2800 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PG2_M1PWM0 0x00000500 |
Definition at line 2801 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PG2_T5CCP0 0x00000700 |
Definition at line 2802 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PG3_I2C4SDA 0x00003000 |
Definition at line 2793 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PG3_M 0x0000F000 |
Definition at line 2792 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PG3_M0FAULT2 0x00004000 |
Definition at line 2794 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PG3_M1PWM1 0x00005000 |
Definition at line 2795 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PG3_PHA1 0x00006000 |
Definition at line 2796 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PG3_T5CCP1 0x00007000 |
Definition at line 2797 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PG4_I2C1SCL 0x00030000 |
Definition at line 2786 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PG4_M 0x000F0000 |
Definition at line 2784 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PG4_M0PWM4 0x00040000 |
Definition at line 2787 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PG4_M1PWM2 0x00050000 |
Definition at line 2788 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PG4_PHB1 0x00060000 |
Definition at line 2789 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PG4_U2RX 0x00010000 |
Definition at line 2785 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PG4_USB0EPEN 0x00080000 |
Definition at line 2791 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PG4_WT0CCP0 0x00070000 |
Definition at line 2790 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PG5_I2C1SDA 0x00300000 |
Definition at line 2778 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PG5_IDX1 0x00600000 |
Definition at line 2781 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PG5_M 0x00F00000 |
Definition at line 2776 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PG5_M0PWM5 0x00400000 |
Definition at line 2779 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PG5_M1PWM3 0x00500000 |
Definition at line 2780 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PG5_U2TX 0x00100000 |
Definition at line 2777 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PG5_USB0PFLT 0x00800000 |
Definition at line 2783 of file tm4c123fe6pm.h.
#define GPIO_PCTL_PG5_WT0CCP1 0x00700000 |
Definition at line 2782 of file tm4c123fe6pm.h.
#define GPIO_PORTA_ADCCTL_R (*((volatile uint32_t *)0x40004530)) |
Definition at line 186 of file tm4c123fe6pm.h.
#define GPIO_PORTA_AFSEL_R (*((volatile uint32_t *)0x40004420)) |
Definition at line 173 of file tm4c123fe6pm.h.
Referenced by commonInit().
#define GPIO_PORTA_AHB_ADCCTL_R (*((volatile uint32_t *)0x40058530)) |
Definition at line 1822 of file tm4c123fe6pm.h.
#define GPIO_PORTA_AHB_AFSEL_R (*((volatile uint32_t *)0x40058420)) |
Definition at line 1809 of file tm4c123fe6pm.h.
#define GPIO_PORTA_AHB_AMSEL_R (*((volatile uint32_t *)0x40058528)) |
Definition at line 1820 of file tm4c123fe6pm.h.
#define GPIO_PORTA_AHB_CR_R (*((volatile uint32_t *)0x40058524)) |
Definition at line 1819 of file tm4c123fe6pm.h.
#define GPIO_PORTA_AHB_DATA_BITS_R ((volatile uint32_t *)0x40058000) |
Definition at line 1798 of file tm4c123fe6pm.h.
#define GPIO_PORTA_AHB_DATA_R (*((volatile uint32_t *)0x400583FC)) |
Definition at line 1800 of file tm4c123fe6pm.h.
#define GPIO_PORTA_AHB_DEN_R (*((volatile uint32_t *)0x4005851C)) |
Definition at line 1817 of file tm4c123fe6pm.h.
#define GPIO_PORTA_AHB_DIR_R (*((volatile uint32_t *)0x40058400)) |
Definition at line 1801 of file tm4c123fe6pm.h.
#define GPIO_PORTA_AHB_DMACTL_R (*((volatile uint32_t *)0x40058534)) |
Definition at line 1823 of file tm4c123fe6pm.h.
#define GPIO_PORTA_AHB_DR2R_R (*((volatile uint32_t *)0x40058500)) |
Definition at line 1810 of file tm4c123fe6pm.h.
#define GPIO_PORTA_AHB_DR4R_R (*((volatile uint32_t *)0x40058504)) |
Definition at line 1811 of file tm4c123fe6pm.h.
#define GPIO_PORTA_AHB_DR8R_R (*((volatile uint32_t *)0x40058508)) |
Definition at line 1812 of file tm4c123fe6pm.h.
#define GPIO_PORTA_AHB_IBE_R (*((volatile uint32_t *)0x40058408)) |
Definition at line 1803 of file tm4c123fe6pm.h.
#define GPIO_PORTA_AHB_ICR_R (*((volatile uint32_t *)0x4005841C)) |
Definition at line 1808 of file tm4c123fe6pm.h.
#define GPIO_PORTA_AHB_IEV_R (*((volatile uint32_t *)0x4005840C)) |
Definition at line 1804 of file tm4c123fe6pm.h.
#define GPIO_PORTA_AHB_IM_R (*((volatile uint32_t *)0x40058410)) |
Definition at line 1805 of file tm4c123fe6pm.h.
#define GPIO_PORTA_AHB_IS_R (*((volatile uint32_t *)0x40058404)) |
Definition at line 1802 of file tm4c123fe6pm.h.
#define GPIO_PORTA_AHB_LOCK_R (*((volatile uint32_t *)0x40058520)) |
Definition at line 1818 of file tm4c123fe6pm.h.
#define GPIO_PORTA_AHB_MIS_R (*((volatile uint32_t *)0x40058418)) |
Definition at line 1807 of file tm4c123fe6pm.h.
#define GPIO_PORTA_AHB_ODR_R (*((volatile uint32_t *)0x4005850C)) |
Definition at line 1813 of file tm4c123fe6pm.h.
#define GPIO_PORTA_AHB_PCTL_R (*((volatile uint32_t *)0x4005852C)) |
Definition at line 1821 of file tm4c123fe6pm.h.
#define GPIO_PORTA_AHB_PDR_R (*((volatile uint32_t *)0x40058514)) |
Definition at line 1815 of file tm4c123fe6pm.h.
#define GPIO_PORTA_AHB_PUR_R (*((volatile uint32_t *)0x40058510)) |
Definition at line 1814 of file tm4c123fe6pm.h.
#define GPIO_PORTA_AHB_RIS_R (*((volatile uint32_t *)0x40058414)) |
Definition at line 1806 of file tm4c123fe6pm.h.
#define GPIO_PORTA_AHB_SLR_R (*((volatile uint32_t *)0x40058518)) |
Definition at line 1816 of file tm4c123fe6pm.h.
#define GPIO_PORTA_AMSEL_R (*((volatile uint32_t *)0x40004528)) |
Definition at line 184 of file tm4c123fe6pm.h.
Referenced by commonInit().
#define GPIO_PORTA_CR_R (*((volatile uint32_t *)0x40004524)) |
Definition at line 183 of file tm4c123fe6pm.h.
#define GPIO_PORTA_DATA_BITS_R ((volatile uint32_t *)0x40004000) |
Definition at line 163 of file tm4c123fe6pm.h.
#define GPIO_PORTA_DATA_R (*((volatile uint32_t *)0x400043FC)) |
Definition at line 164 of file tm4c123fe6pm.h.
#define GPIO_PORTA_DEN_R (*((volatile uint32_t *)0x4000451C)) |
Definition at line 181 of file tm4c123fe6pm.h.
Referenced by commonInit().
#define GPIO_PORTA_DIR_R (*((volatile uint32_t *)0x40004400)) |
Definition at line 165 of file tm4c123fe6pm.h.
Referenced by commonInit().
#define GPIO_PORTA_DMACTL_R (*((volatile uint32_t *)0x40004534)) |
Definition at line 187 of file tm4c123fe6pm.h.
#define GPIO_PORTA_DR2R_R (*((volatile uint32_t *)0x40004500)) |
Definition at line 174 of file tm4c123fe6pm.h.
#define GPIO_PORTA_DR4R_R (*((volatile uint32_t *)0x40004504)) |
Definition at line 175 of file tm4c123fe6pm.h.
#define GPIO_PORTA_DR8R_R (*((volatile uint32_t *)0x40004508)) |
Definition at line 176 of file tm4c123fe6pm.h.
#define GPIO_PORTA_IBE_R (*((volatile uint32_t *)0x40004408)) |
Definition at line 167 of file tm4c123fe6pm.h.
#define GPIO_PORTA_ICR_R (*((volatile uint32_t *)0x4000441C)) |
Definition at line 172 of file tm4c123fe6pm.h.
#define GPIO_PORTA_IEV_R (*((volatile uint32_t *)0x4000440C)) |
Definition at line 168 of file tm4c123fe6pm.h.
#define GPIO_PORTA_IM_R (*((volatile uint32_t *)0x40004410)) |
Definition at line 169 of file tm4c123fe6pm.h.
#define GPIO_PORTA_IS_R (*((volatile uint32_t *)0x40004404)) |
Definition at line 166 of file tm4c123fe6pm.h.
#define GPIO_PORTA_LOCK_R (*((volatile uint32_t *)0x40004520)) |
Definition at line 182 of file tm4c123fe6pm.h.
#define GPIO_PORTA_MIS_R (*((volatile uint32_t *)0x40004418)) |
Definition at line 171 of file tm4c123fe6pm.h.
#define GPIO_PORTA_ODR_R (*((volatile uint32_t *)0x4000450C)) |
Definition at line 177 of file tm4c123fe6pm.h.
#define GPIO_PORTA_PCTL_R (*((volatile uint32_t *)0x4000452C)) |
Definition at line 185 of file tm4c123fe6pm.h.
Referenced by commonInit().
#define GPIO_PORTA_PDR_R (*((volatile uint32_t *)0x40004514)) |
Definition at line 179 of file tm4c123fe6pm.h.
#define GPIO_PORTA_PUR_R (*((volatile uint32_t *)0x40004510)) |
Definition at line 178 of file tm4c123fe6pm.h.
#define GPIO_PORTA_RIS_R (*((volatile uint32_t *)0x40004414)) |
Definition at line 170 of file tm4c123fe6pm.h.
#define GPIO_PORTA_SLR_R (*((volatile uint32_t *)0x40004518)) |
Definition at line 180 of file tm4c123fe6pm.h.
#define GPIO_PORTB_ADCCTL_R (*((volatile uint32_t *)0x40005530)) |
Definition at line 217 of file tm4c123fe6pm.h.
#define GPIO_PORTB_AFSEL_R (*((volatile uint32_t *)0x40005420)) |
Definition at line 204 of file tm4c123fe6pm.h.
#define GPIO_PORTB_AHB_ADCCTL_R (*((volatile uint32_t *)0x40059530)) |
Definition at line 1854 of file tm4c123fe6pm.h.
#define GPIO_PORTB_AHB_AFSEL_R (*((volatile uint32_t *)0x40059420)) |
Definition at line 1841 of file tm4c123fe6pm.h.
#define GPIO_PORTB_AHB_AMSEL_R (*((volatile uint32_t *)0x40059528)) |
Definition at line 1852 of file tm4c123fe6pm.h.
#define GPIO_PORTB_AHB_CR_R (*((volatile uint32_t *)0x40059524)) |
Definition at line 1851 of file tm4c123fe6pm.h.
#define GPIO_PORTB_AHB_DATA_BITS_R ((volatile uint32_t *)0x40059000) |
Definition at line 1830 of file tm4c123fe6pm.h.
#define GPIO_PORTB_AHB_DATA_R (*((volatile uint32_t *)0x400593FC)) |
Definition at line 1832 of file tm4c123fe6pm.h.
#define GPIO_PORTB_AHB_DEN_R (*((volatile uint32_t *)0x4005951C)) |
Definition at line 1849 of file tm4c123fe6pm.h.
#define GPIO_PORTB_AHB_DIR_R (*((volatile uint32_t *)0x40059400)) |
Definition at line 1833 of file tm4c123fe6pm.h.
#define GPIO_PORTB_AHB_DMACTL_R (*((volatile uint32_t *)0x40059534)) |
Definition at line 1855 of file tm4c123fe6pm.h.
#define GPIO_PORTB_AHB_DR2R_R (*((volatile uint32_t *)0x40059500)) |
Definition at line 1842 of file tm4c123fe6pm.h.
#define GPIO_PORTB_AHB_DR4R_R (*((volatile uint32_t *)0x40059504)) |
Definition at line 1843 of file tm4c123fe6pm.h.
#define GPIO_PORTB_AHB_DR8R_R (*((volatile uint32_t *)0x40059508)) |
Definition at line 1844 of file tm4c123fe6pm.h.
#define GPIO_PORTB_AHB_IBE_R (*((volatile uint32_t *)0x40059408)) |
Definition at line 1835 of file tm4c123fe6pm.h.
#define GPIO_PORTB_AHB_ICR_R (*((volatile uint32_t *)0x4005941C)) |
Definition at line 1840 of file tm4c123fe6pm.h.
#define GPIO_PORTB_AHB_IEV_R (*((volatile uint32_t *)0x4005940C)) |
Definition at line 1836 of file tm4c123fe6pm.h.
#define GPIO_PORTB_AHB_IM_R (*((volatile uint32_t *)0x40059410)) |
Definition at line 1837 of file tm4c123fe6pm.h.
#define GPIO_PORTB_AHB_IS_R (*((volatile uint32_t *)0x40059404)) |
Definition at line 1834 of file tm4c123fe6pm.h.
#define GPIO_PORTB_AHB_LOCK_R (*((volatile uint32_t *)0x40059520)) |
Definition at line 1850 of file tm4c123fe6pm.h.
#define GPIO_PORTB_AHB_MIS_R (*((volatile uint32_t *)0x40059418)) |
Definition at line 1839 of file tm4c123fe6pm.h.
#define GPIO_PORTB_AHB_ODR_R (*((volatile uint32_t *)0x4005950C)) |
Definition at line 1845 of file tm4c123fe6pm.h.
#define GPIO_PORTB_AHB_PCTL_R (*((volatile uint32_t *)0x4005952C)) |
Definition at line 1853 of file tm4c123fe6pm.h.
#define GPIO_PORTB_AHB_PDR_R (*((volatile uint32_t *)0x40059514)) |
Definition at line 1847 of file tm4c123fe6pm.h.
#define GPIO_PORTB_AHB_PUR_R (*((volatile uint32_t *)0x40059510)) |
Definition at line 1846 of file tm4c123fe6pm.h.
#define GPIO_PORTB_AHB_RIS_R (*((volatile uint32_t *)0x40059414)) |
Definition at line 1838 of file tm4c123fe6pm.h.
#define GPIO_PORTB_AHB_SLR_R (*((volatile uint32_t *)0x40059518)) |
Definition at line 1848 of file tm4c123fe6pm.h.
#define GPIO_PORTB_AMSEL_R (*((volatile uint32_t *)0x40005528)) |
Definition at line 215 of file tm4c123fe6pm.h.
#define GPIO_PORTB_CR_R (*((volatile uint32_t *)0x40005524)) |
Definition at line 214 of file tm4c123fe6pm.h.
#define GPIO_PORTB_DATA_BITS_R ((volatile uint32_t *)0x40005000) |
Definition at line 194 of file tm4c123fe6pm.h.
#define GPIO_PORTB_DATA_R (*((volatile uint32_t *)0x400053FC)) |
Definition at line 195 of file tm4c123fe6pm.h.
#define GPIO_PORTB_DEN_R (*((volatile uint32_t *)0x4000551C)) |
Definition at line 212 of file tm4c123fe6pm.h.
#define GPIO_PORTB_DIR_R (*((volatile uint32_t *)0x40005400)) |
Definition at line 196 of file tm4c123fe6pm.h.
#define GPIO_PORTB_DMACTL_R (*((volatile uint32_t *)0x40005534)) |
Definition at line 218 of file tm4c123fe6pm.h.
#define GPIO_PORTB_DR2R_R (*((volatile uint32_t *)0x40005500)) |
Definition at line 205 of file tm4c123fe6pm.h.
#define GPIO_PORTB_DR4R_R (*((volatile uint32_t *)0x40005504)) |
Definition at line 206 of file tm4c123fe6pm.h.
#define GPIO_PORTB_DR8R_R (*((volatile uint32_t *)0x40005508)) |
Definition at line 207 of file tm4c123fe6pm.h.
#define GPIO_PORTB_IBE_R (*((volatile uint32_t *)0x40005408)) |
Definition at line 198 of file tm4c123fe6pm.h.
#define GPIO_PORTB_ICR_R (*((volatile uint32_t *)0x4000541C)) |
Definition at line 203 of file tm4c123fe6pm.h.
#define GPIO_PORTB_IEV_R (*((volatile uint32_t *)0x4000540C)) |
Definition at line 199 of file tm4c123fe6pm.h.
#define GPIO_PORTB_IM_R (*((volatile uint32_t *)0x40005410)) |
Definition at line 200 of file tm4c123fe6pm.h.
#define GPIO_PORTB_IS_R (*((volatile uint32_t *)0x40005404)) |
Definition at line 197 of file tm4c123fe6pm.h.
#define GPIO_PORTB_LOCK_R (*((volatile uint32_t *)0x40005520)) |
Definition at line 213 of file tm4c123fe6pm.h.
#define GPIO_PORTB_MIS_R (*((volatile uint32_t *)0x40005418)) |
Definition at line 202 of file tm4c123fe6pm.h.
#define GPIO_PORTB_ODR_R (*((volatile uint32_t *)0x4000550C)) |
Definition at line 208 of file tm4c123fe6pm.h.
#define GPIO_PORTB_PCTL_R (*((volatile uint32_t *)0x4000552C)) |
Definition at line 216 of file tm4c123fe6pm.h.
#define GPIO_PORTB_PDR_R (*((volatile uint32_t *)0x40005514)) |
Definition at line 210 of file tm4c123fe6pm.h.
#define GPIO_PORTB_PUR_R (*((volatile uint32_t *)0x40005510)) |
Definition at line 209 of file tm4c123fe6pm.h.
#define GPIO_PORTB_RIS_R (*((volatile uint32_t *)0x40005414)) |
Definition at line 201 of file tm4c123fe6pm.h.
#define GPIO_PORTB_SLR_R (*((volatile uint32_t *)0x40005518)) |
Definition at line 211 of file tm4c123fe6pm.h.
#define GPIO_PORTC_ADCCTL_R (*((volatile uint32_t *)0x40006530)) |
Definition at line 248 of file tm4c123fe6pm.h.
#define GPIO_PORTC_AFSEL_R (*((volatile uint32_t *)0x40006420)) |
Definition at line 235 of file tm4c123fe6pm.h.
#define GPIO_PORTC_AHB_ADCCTL_R (*((volatile uint32_t *)0x4005A530)) |
Definition at line 1886 of file tm4c123fe6pm.h.
#define GPIO_PORTC_AHB_AFSEL_R (*((volatile uint32_t *)0x4005A420)) |
Definition at line 1873 of file tm4c123fe6pm.h.
#define GPIO_PORTC_AHB_AMSEL_R (*((volatile uint32_t *)0x4005A528)) |
Definition at line 1884 of file tm4c123fe6pm.h.
#define GPIO_PORTC_AHB_CR_R (*((volatile uint32_t *)0x4005A524)) |
Definition at line 1883 of file tm4c123fe6pm.h.
#define GPIO_PORTC_AHB_DATA_BITS_R ((volatile uint32_t *)0x4005A000) |
Definition at line 1862 of file tm4c123fe6pm.h.
#define GPIO_PORTC_AHB_DATA_R (*((volatile uint32_t *)0x4005A3FC)) |
Definition at line 1864 of file tm4c123fe6pm.h.
#define GPIO_PORTC_AHB_DEN_R (*((volatile uint32_t *)0x4005A51C)) |
Definition at line 1881 of file tm4c123fe6pm.h.
#define GPIO_PORTC_AHB_DIR_R (*((volatile uint32_t *)0x4005A400)) |
Definition at line 1865 of file tm4c123fe6pm.h.
#define GPIO_PORTC_AHB_DMACTL_R (*((volatile uint32_t *)0x4005A534)) |
Definition at line 1887 of file tm4c123fe6pm.h.
#define GPIO_PORTC_AHB_DR2R_R (*((volatile uint32_t *)0x4005A500)) |
Definition at line 1874 of file tm4c123fe6pm.h.
#define GPIO_PORTC_AHB_DR4R_R (*((volatile uint32_t *)0x4005A504)) |
Definition at line 1875 of file tm4c123fe6pm.h.
#define GPIO_PORTC_AHB_DR8R_R (*((volatile uint32_t *)0x4005A508)) |
Definition at line 1876 of file tm4c123fe6pm.h.
#define GPIO_PORTC_AHB_IBE_R (*((volatile uint32_t *)0x4005A408)) |
Definition at line 1867 of file tm4c123fe6pm.h.
#define GPIO_PORTC_AHB_ICR_R (*((volatile uint32_t *)0x4005A41C)) |
Definition at line 1872 of file tm4c123fe6pm.h.
#define GPIO_PORTC_AHB_IEV_R (*((volatile uint32_t *)0x4005A40C)) |
Definition at line 1868 of file tm4c123fe6pm.h.
#define GPIO_PORTC_AHB_IM_R (*((volatile uint32_t *)0x4005A410)) |
Definition at line 1869 of file tm4c123fe6pm.h.
#define GPIO_PORTC_AHB_IS_R (*((volatile uint32_t *)0x4005A404)) |
Definition at line 1866 of file tm4c123fe6pm.h.
#define GPIO_PORTC_AHB_LOCK_R (*((volatile uint32_t *)0x4005A520)) |
Definition at line 1882 of file tm4c123fe6pm.h.
#define GPIO_PORTC_AHB_MIS_R (*((volatile uint32_t *)0x4005A418)) |
Definition at line 1871 of file tm4c123fe6pm.h.
#define GPIO_PORTC_AHB_ODR_R (*((volatile uint32_t *)0x4005A50C)) |
Definition at line 1877 of file tm4c123fe6pm.h.
#define GPIO_PORTC_AHB_PCTL_R (*((volatile uint32_t *)0x4005A52C)) |
Definition at line 1885 of file tm4c123fe6pm.h.
#define GPIO_PORTC_AHB_PDR_R (*((volatile uint32_t *)0x4005A514)) |
Definition at line 1879 of file tm4c123fe6pm.h.
#define GPIO_PORTC_AHB_PUR_R (*((volatile uint32_t *)0x4005A510)) |
Definition at line 1878 of file tm4c123fe6pm.h.
#define GPIO_PORTC_AHB_RIS_R (*((volatile uint32_t *)0x4005A414)) |
Definition at line 1870 of file tm4c123fe6pm.h.
#define GPIO_PORTC_AHB_SLR_R (*((volatile uint32_t *)0x4005A518)) |
Definition at line 1880 of file tm4c123fe6pm.h.
#define GPIO_PORTC_AMSEL_R (*((volatile uint32_t *)0x40006528)) |
Definition at line 246 of file tm4c123fe6pm.h.
#define GPIO_PORTC_CR_R (*((volatile uint32_t *)0x40006524)) |
Definition at line 245 of file tm4c123fe6pm.h.
#define GPIO_PORTC_DATA_BITS_R ((volatile uint32_t *)0x40006000) |
Definition at line 225 of file tm4c123fe6pm.h.
#define GPIO_PORTC_DATA_R (*((volatile uint32_t *)0x400063FC)) |
Definition at line 226 of file tm4c123fe6pm.h.
#define GPIO_PORTC_DEN_R (*((volatile uint32_t *)0x4000651C)) |
Definition at line 243 of file tm4c123fe6pm.h.
#define GPIO_PORTC_DIR_R (*((volatile uint32_t *)0x40006400)) |
Definition at line 227 of file tm4c123fe6pm.h.
#define GPIO_PORTC_DMACTL_R (*((volatile uint32_t *)0x40006534)) |
Definition at line 249 of file tm4c123fe6pm.h.
#define GPIO_PORTC_DR2R_R (*((volatile uint32_t *)0x40006500)) |
Definition at line 236 of file tm4c123fe6pm.h.
#define GPIO_PORTC_DR4R_R (*((volatile uint32_t *)0x40006504)) |
Definition at line 237 of file tm4c123fe6pm.h.
#define GPIO_PORTC_DR8R_R (*((volatile uint32_t *)0x40006508)) |
Definition at line 238 of file tm4c123fe6pm.h.
#define GPIO_PORTC_IBE_R (*((volatile uint32_t *)0x40006408)) |
Definition at line 229 of file tm4c123fe6pm.h.
#define GPIO_PORTC_ICR_R (*((volatile uint32_t *)0x4000641C)) |
Definition at line 234 of file tm4c123fe6pm.h.
#define GPIO_PORTC_IEV_R (*((volatile uint32_t *)0x4000640C)) |
Definition at line 230 of file tm4c123fe6pm.h.
#define GPIO_PORTC_IM_R (*((volatile uint32_t *)0x40006410)) |
Definition at line 231 of file tm4c123fe6pm.h.
#define GPIO_PORTC_IS_R (*((volatile uint32_t *)0x40006404)) |
Definition at line 228 of file tm4c123fe6pm.h.
#define GPIO_PORTC_LOCK_R (*((volatile uint32_t *)0x40006520)) |
Definition at line 244 of file tm4c123fe6pm.h.
#define GPIO_PORTC_MIS_R (*((volatile uint32_t *)0x40006418)) |
Definition at line 233 of file tm4c123fe6pm.h.
#define GPIO_PORTC_ODR_R (*((volatile uint32_t *)0x4000650C)) |
Definition at line 239 of file tm4c123fe6pm.h.
#define GPIO_PORTC_PCTL_R (*((volatile uint32_t *)0x4000652C)) |
Definition at line 247 of file tm4c123fe6pm.h.
#define GPIO_PORTC_PDR_R (*((volatile uint32_t *)0x40006514)) |
Definition at line 241 of file tm4c123fe6pm.h.
#define GPIO_PORTC_PUR_R (*((volatile uint32_t *)0x40006510)) |
Definition at line 240 of file tm4c123fe6pm.h.
#define GPIO_PORTC_RIS_R (*((volatile uint32_t *)0x40006414)) |
Definition at line 232 of file tm4c123fe6pm.h.
#define GPIO_PORTC_SLR_R (*((volatile uint32_t *)0x40006518)) |
Definition at line 242 of file tm4c123fe6pm.h.
#define GPIO_PORTD_ADCCTL_R (*((volatile uint32_t *)0x40007530)) |
Definition at line 279 of file tm4c123fe6pm.h.
#define GPIO_PORTD_AFSEL_R (*((volatile uint32_t *)0x40007420)) |
Definition at line 266 of file tm4c123fe6pm.h.
#define GPIO_PORTD_AHB_ADCCTL_R (*((volatile uint32_t *)0x4005B530)) |
Definition at line 1918 of file tm4c123fe6pm.h.
#define GPIO_PORTD_AHB_AFSEL_R (*((volatile uint32_t *)0x4005B420)) |
Definition at line 1905 of file tm4c123fe6pm.h.
#define GPIO_PORTD_AHB_AMSEL_R (*((volatile uint32_t *)0x4005B528)) |
Definition at line 1916 of file tm4c123fe6pm.h.
#define GPIO_PORTD_AHB_CR_R (*((volatile uint32_t *)0x4005B524)) |
Definition at line 1915 of file tm4c123fe6pm.h.
#define GPIO_PORTD_AHB_DATA_BITS_R ((volatile uint32_t *)0x4005B000) |
Definition at line 1894 of file tm4c123fe6pm.h.
#define GPIO_PORTD_AHB_DATA_R (*((volatile uint32_t *)0x4005B3FC)) |
Definition at line 1896 of file tm4c123fe6pm.h.
#define GPIO_PORTD_AHB_DEN_R (*((volatile uint32_t *)0x4005B51C)) |
Definition at line 1913 of file tm4c123fe6pm.h.
#define GPIO_PORTD_AHB_DIR_R (*((volatile uint32_t *)0x4005B400)) |
Definition at line 1897 of file tm4c123fe6pm.h.
#define GPIO_PORTD_AHB_DMACTL_R (*((volatile uint32_t *)0x4005B534)) |
Definition at line 1919 of file tm4c123fe6pm.h.
#define GPIO_PORTD_AHB_DR2R_R (*((volatile uint32_t *)0x4005B500)) |
Definition at line 1906 of file tm4c123fe6pm.h.
#define GPIO_PORTD_AHB_DR4R_R (*((volatile uint32_t *)0x4005B504)) |
Definition at line 1907 of file tm4c123fe6pm.h.
#define GPIO_PORTD_AHB_DR8R_R (*((volatile uint32_t *)0x4005B508)) |
Definition at line 1908 of file tm4c123fe6pm.h.
#define GPIO_PORTD_AHB_IBE_R (*((volatile uint32_t *)0x4005B408)) |
Definition at line 1899 of file tm4c123fe6pm.h.
#define GPIO_PORTD_AHB_ICR_R (*((volatile uint32_t *)0x4005B41C)) |
Definition at line 1904 of file tm4c123fe6pm.h.
#define GPIO_PORTD_AHB_IEV_R (*((volatile uint32_t *)0x4005B40C)) |
Definition at line 1900 of file tm4c123fe6pm.h.
#define GPIO_PORTD_AHB_IM_R (*((volatile uint32_t *)0x4005B410)) |
Definition at line 1901 of file tm4c123fe6pm.h.
#define GPIO_PORTD_AHB_IS_R (*((volatile uint32_t *)0x4005B404)) |
Definition at line 1898 of file tm4c123fe6pm.h.
#define GPIO_PORTD_AHB_LOCK_R (*((volatile uint32_t *)0x4005B520)) |
Definition at line 1914 of file tm4c123fe6pm.h.
#define GPIO_PORTD_AHB_MIS_R (*((volatile uint32_t *)0x4005B418)) |
Definition at line 1903 of file tm4c123fe6pm.h.
#define GPIO_PORTD_AHB_ODR_R (*((volatile uint32_t *)0x4005B50C)) |
Definition at line 1909 of file tm4c123fe6pm.h.
#define GPIO_PORTD_AHB_PCTL_R (*((volatile uint32_t *)0x4005B52C)) |
Definition at line 1917 of file tm4c123fe6pm.h.
#define GPIO_PORTD_AHB_PDR_R (*((volatile uint32_t *)0x4005B514)) |
Definition at line 1911 of file tm4c123fe6pm.h.
#define GPIO_PORTD_AHB_PUR_R (*((volatile uint32_t *)0x4005B510)) |
Definition at line 1910 of file tm4c123fe6pm.h.
#define GPIO_PORTD_AHB_RIS_R (*((volatile uint32_t *)0x4005B414)) |
Definition at line 1902 of file tm4c123fe6pm.h.
#define GPIO_PORTD_AHB_SLR_R (*((volatile uint32_t *)0x4005B518)) |
Definition at line 1912 of file tm4c123fe6pm.h.
#define GPIO_PORTD_AMSEL_R (*((volatile uint32_t *)0x40007528)) |
Definition at line 277 of file tm4c123fe6pm.h.
#define GPIO_PORTD_CR_R (*((volatile uint32_t *)0x40007524)) |
Definition at line 276 of file tm4c123fe6pm.h.
#define GPIO_PORTD_DATA_BITS_R ((volatile uint32_t *)0x40007000) |
Definition at line 256 of file tm4c123fe6pm.h.
#define GPIO_PORTD_DATA_R (*((volatile uint32_t *)0x400073FC)) |
Definition at line 257 of file tm4c123fe6pm.h.
#define GPIO_PORTD_DEN_R (*((volatile uint32_t *)0x4000751C)) |
Definition at line 274 of file tm4c123fe6pm.h.
#define GPIO_PORTD_DIR_R (*((volatile uint32_t *)0x40007400)) |
Definition at line 258 of file tm4c123fe6pm.h.
#define GPIO_PORTD_DMACTL_R (*((volatile uint32_t *)0x40007534)) |
Definition at line 280 of file tm4c123fe6pm.h.
#define GPIO_PORTD_DR2R_R (*((volatile uint32_t *)0x40007500)) |
Definition at line 267 of file tm4c123fe6pm.h.
#define GPIO_PORTD_DR4R_R (*((volatile uint32_t *)0x40007504)) |
Definition at line 268 of file tm4c123fe6pm.h.
#define GPIO_PORTD_DR8R_R (*((volatile uint32_t *)0x40007508)) |
Definition at line 269 of file tm4c123fe6pm.h.
#define GPIO_PORTD_IBE_R (*((volatile uint32_t *)0x40007408)) |
Definition at line 260 of file tm4c123fe6pm.h.
#define GPIO_PORTD_ICR_R (*((volatile uint32_t *)0x4000741C)) |
Definition at line 265 of file tm4c123fe6pm.h.
#define GPIO_PORTD_IEV_R (*((volatile uint32_t *)0x4000740C)) |
Definition at line 261 of file tm4c123fe6pm.h.
#define GPIO_PORTD_IM_R (*((volatile uint32_t *)0x40007410)) |
Definition at line 262 of file tm4c123fe6pm.h.
#define GPIO_PORTD_IS_R (*((volatile uint32_t *)0x40007404)) |
Definition at line 259 of file tm4c123fe6pm.h.
#define GPIO_PORTD_LOCK_R (*((volatile uint32_t *)0x40007520)) |
Definition at line 275 of file tm4c123fe6pm.h.
#define GPIO_PORTD_MIS_R (*((volatile uint32_t *)0x40007418)) |
Definition at line 264 of file tm4c123fe6pm.h.
#define GPIO_PORTD_ODR_R (*((volatile uint32_t *)0x4000750C)) |
Definition at line 270 of file tm4c123fe6pm.h.
#define GPIO_PORTD_PCTL_R (*((volatile uint32_t *)0x4000752C)) |
Definition at line 278 of file tm4c123fe6pm.h.
#define GPIO_PORTD_PDR_R (*((volatile uint32_t *)0x40007514)) |
Definition at line 272 of file tm4c123fe6pm.h.
#define GPIO_PORTD_PUR_R (*((volatile uint32_t *)0x40007510)) |
Definition at line 271 of file tm4c123fe6pm.h.
#define GPIO_PORTD_RIS_R (*((volatile uint32_t *)0x40007414)) |
Definition at line 263 of file tm4c123fe6pm.h.
#define GPIO_PORTD_SLR_R (*((volatile uint32_t *)0x40007518)) |
Definition at line 273 of file tm4c123fe6pm.h.
#define GPIO_PORTE_ADCCTL_R (*((volatile uint32_t *)0x40024530)) |
Definition at line 694 of file tm4c123fe6pm.h.
#define GPIO_PORTE_AFSEL_R (*((volatile uint32_t *)0x40024420)) |
Definition at line 681 of file tm4c123fe6pm.h.
#define GPIO_PORTE_AHB_ADCCTL_R (*((volatile uint32_t *)0x4005C530)) |
Definition at line 1950 of file tm4c123fe6pm.h.
#define GPIO_PORTE_AHB_AFSEL_R (*((volatile uint32_t *)0x4005C420)) |
Definition at line 1937 of file tm4c123fe6pm.h.
#define GPIO_PORTE_AHB_AMSEL_R (*((volatile uint32_t *)0x4005C528)) |
Definition at line 1948 of file tm4c123fe6pm.h.
#define GPIO_PORTE_AHB_CR_R (*((volatile uint32_t *)0x4005C524)) |
Definition at line 1947 of file tm4c123fe6pm.h.
#define GPIO_PORTE_AHB_DATA_BITS_R ((volatile uint32_t *)0x4005C000) |
Definition at line 1926 of file tm4c123fe6pm.h.
#define GPIO_PORTE_AHB_DATA_R (*((volatile uint32_t *)0x4005C3FC)) |
Definition at line 1928 of file tm4c123fe6pm.h.
#define GPIO_PORTE_AHB_DEN_R (*((volatile uint32_t *)0x4005C51C)) |
Definition at line 1945 of file tm4c123fe6pm.h.
#define GPIO_PORTE_AHB_DIR_R (*((volatile uint32_t *)0x4005C400)) |
Definition at line 1929 of file tm4c123fe6pm.h.
#define GPIO_PORTE_AHB_DMACTL_R (*((volatile uint32_t *)0x4005C534)) |
Definition at line 1951 of file tm4c123fe6pm.h.
#define GPIO_PORTE_AHB_DR2R_R (*((volatile uint32_t *)0x4005C500)) |
Definition at line 1938 of file tm4c123fe6pm.h.
#define GPIO_PORTE_AHB_DR4R_R (*((volatile uint32_t *)0x4005C504)) |
Definition at line 1939 of file tm4c123fe6pm.h.
#define GPIO_PORTE_AHB_DR8R_R (*((volatile uint32_t *)0x4005C508)) |
Definition at line 1940 of file tm4c123fe6pm.h.
#define GPIO_PORTE_AHB_IBE_R (*((volatile uint32_t *)0x4005C408)) |
Definition at line 1931 of file tm4c123fe6pm.h.
#define GPIO_PORTE_AHB_ICR_R (*((volatile uint32_t *)0x4005C41C)) |
Definition at line 1936 of file tm4c123fe6pm.h.
#define GPIO_PORTE_AHB_IEV_R (*((volatile uint32_t *)0x4005C40C)) |
Definition at line 1932 of file tm4c123fe6pm.h.
#define GPIO_PORTE_AHB_IM_R (*((volatile uint32_t *)0x4005C410)) |
Definition at line 1933 of file tm4c123fe6pm.h.
#define GPIO_PORTE_AHB_IS_R (*((volatile uint32_t *)0x4005C404)) |
Definition at line 1930 of file tm4c123fe6pm.h.
#define GPIO_PORTE_AHB_LOCK_R (*((volatile uint32_t *)0x4005C520)) |
Definition at line 1946 of file tm4c123fe6pm.h.
#define GPIO_PORTE_AHB_MIS_R (*((volatile uint32_t *)0x4005C418)) |
Definition at line 1935 of file tm4c123fe6pm.h.
#define GPIO_PORTE_AHB_ODR_R (*((volatile uint32_t *)0x4005C50C)) |
Definition at line 1941 of file tm4c123fe6pm.h.
#define GPIO_PORTE_AHB_PCTL_R (*((volatile uint32_t *)0x4005C52C)) |
Definition at line 1949 of file tm4c123fe6pm.h.
#define GPIO_PORTE_AHB_PDR_R (*((volatile uint32_t *)0x4005C514)) |
Definition at line 1943 of file tm4c123fe6pm.h.
#define GPIO_PORTE_AHB_PUR_R (*((volatile uint32_t *)0x4005C510)) |
Definition at line 1942 of file tm4c123fe6pm.h.
#define GPIO_PORTE_AHB_RIS_R (*((volatile uint32_t *)0x4005C414)) |
Definition at line 1934 of file tm4c123fe6pm.h.
#define GPIO_PORTE_AHB_SLR_R (*((volatile uint32_t *)0x4005C518)) |
Definition at line 1944 of file tm4c123fe6pm.h.
#define GPIO_PORTE_AMSEL_R (*((volatile uint32_t *)0x40024528)) |
Definition at line 692 of file tm4c123fe6pm.h.
#define GPIO_PORTE_CR_R (*((volatile uint32_t *)0x40024524)) |
Definition at line 691 of file tm4c123fe6pm.h.
#define GPIO_PORTE_DATA_BITS_R ((volatile uint32_t *)0x40024000) |
Definition at line 671 of file tm4c123fe6pm.h.
#define GPIO_PORTE_DATA_R (*((volatile uint32_t *)0x400243FC)) |
Definition at line 672 of file tm4c123fe6pm.h.
#define GPIO_PORTE_DEN_R (*((volatile uint32_t *)0x4002451C)) |
Definition at line 689 of file tm4c123fe6pm.h.
#define GPIO_PORTE_DIR_R (*((volatile uint32_t *)0x40024400)) |
Definition at line 673 of file tm4c123fe6pm.h.
#define GPIO_PORTE_DMACTL_R (*((volatile uint32_t *)0x40024534)) |
Definition at line 695 of file tm4c123fe6pm.h.
#define GPIO_PORTE_DR2R_R (*((volatile uint32_t *)0x40024500)) |
Definition at line 682 of file tm4c123fe6pm.h.
#define GPIO_PORTE_DR4R_R (*((volatile uint32_t *)0x40024504)) |
Definition at line 683 of file tm4c123fe6pm.h.
#define GPIO_PORTE_DR8R_R (*((volatile uint32_t *)0x40024508)) |
Definition at line 684 of file tm4c123fe6pm.h.
#define GPIO_PORTE_IBE_R (*((volatile uint32_t *)0x40024408)) |
Definition at line 675 of file tm4c123fe6pm.h.
#define GPIO_PORTE_ICR_R (*((volatile uint32_t *)0x4002441C)) |
Definition at line 680 of file tm4c123fe6pm.h.
#define GPIO_PORTE_IEV_R (*((volatile uint32_t *)0x4002440C)) |
Definition at line 676 of file tm4c123fe6pm.h.
#define GPIO_PORTE_IM_R (*((volatile uint32_t *)0x40024410)) |
Definition at line 677 of file tm4c123fe6pm.h.
#define GPIO_PORTE_IS_R (*((volatile uint32_t *)0x40024404)) |
Definition at line 674 of file tm4c123fe6pm.h.
#define GPIO_PORTE_LOCK_R (*((volatile uint32_t *)0x40024520)) |
Definition at line 690 of file tm4c123fe6pm.h.
#define GPIO_PORTE_MIS_R (*((volatile uint32_t *)0x40024418)) |
Definition at line 679 of file tm4c123fe6pm.h.
#define GPIO_PORTE_ODR_R (*((volatile uint32_t *)0x4002450C)) |
Definition at line 685 of file tm4c123fe6pm.h.
#define GPIO_PORTE_PCTL_R (*((volatile uint32_t *)0x4002452C)) |
Definition at line 693 of file tm4c123fe6pm.h.
#define GPIO_PORTE_PDR_R (*((volatile uint32_t *)0x40024514)) |
Definition at line 687 of file tm4c123fe6pm.h.
#define GPIO_PORTE_PUR_R (*((volatile uint32_t *)0x40024510)) |
Definition at line 686 of file tm4c123fe6pm.h.
#define GPIO_PORTE_RIS_R (*((volatile uint32_t *)0x40024414)) |
Definition at line 678 of file tm4c123fe6pm.h.
#define GPIO_PORTE_SLR_R (*((volatile uint32_t *)0x40024518)) |
Definition at line 688 of file tm4c123fe6pm.h.
#define GPIO_PORTF_ADCCTL_R (*((volatile uint32_t *)0x40025530)) |
Definition at line 725 of file tm4c123fe6pm.h.
#define GPIO_PORTF_AFSEL_R (*((volatile uint32_t *)0x40025420)) |
Definition at line 712 of file tm4c123fe6pm.h.
#define GPIO_PORTF_AHB_ADCCTL_R (*((volatile uint32_t *)0x4005D530)) |
Definition at line 1982 of file tm4c123fe6pm.h.
#define GPIO_PORTF_AHB_AFSEL_R (*((volatile uint32_t *)0x4005D420)) |
Definition at line 1969 of file tm4c123fe6pm.h.
#define GPIO_PORTF_AHB_AMSEL_R (*((volatile uint32_t *)0x4005D528)) |
Definition at line 1980 of file tm4c123fe6pm.h.
#define GPIO_PORTF_AHB_CR_R (*((volatile uint32_t *)0x4005D524)) |
Definition at line 1979 of file tm4c123fe6pm.h.
#define GPIO_PORTF_AHB_DATA_BITS_R ((volatile uint32_t *)0x4005D000) |
Definition at line 1958 of file tm4c123fe6pm.h.
#define GPIO_PORTF_AHB_DATA_R (*((volatile uint32_t *)0x4005D3FC)) |
Definition at line 1960 of file tm4c123fe6pm.h.
#define GPIO_PORTF_AHB_DEN_R (*((volatile uint32_t *)0x4005D51C)) |
Definition at line 1977 of file tm4c123fe6pm.h.
#define GPIO_PORTF_AHB_DIR_R (*((volatile uint32_t *)0x4005D400)) |
Definition at line 1961 of file tm4c123fe6pm.h.
#define GPIO_PORTF_AHB_DMACTL_R (*((volatile uint32_t *)0x4005D534)) |
Definition at line 1983 of file tm4c123fe6pm.h.
#define GPIO_PORTF_AHB_DR2R_R (*((volatile uint32_t *)0x4005D500)) |
Definition at line 1970 of file tm4c123fe6pm.h.
#define GPIO_PORTF_AHB_DR4R_R (*((volatile uint32_t *)0x4005D504)) |
Definition at line 1971 of file tm4c123fe6pm.h.
#define GPIO_PORTF_AHB_DR8R_R (*((volatile uint32_t *)0x4005D508)) |
Definition at line 1972 of file tm4c123fe6pm.h.
#define GPIO_PORTF_AHB_IBE_R (*((volatile uint32_t *)0x4005D408)) |
Definition at line 1963 of file tm4c123fe6pm.h.
#define GPIO_PORTF_AHB_ICR_R (*((volatile uint32_t *)0x4005D41C)) |
Definition at line 1968 of file tm4c123fe6pm.h.
#define GPIO_PORTF_AHB_IEV_R (*((volatile uint32_t *)0x4005D40C)) |
Definition at line 1964 of file tm4c123fe6pm.h.
#define GPIO_PORTF_AHB_IM_R (*((volatile uint32_t *)0x4005D410)) |
Definition at line 1965 of file tm4c123fe6pm.h.
#define GPIO_PORTF_AHB_IS_R (*((volatile uint32_t *)0x4005D404)) |
Definition at line 1962 of file tm4c123fe6pm.h.
#define GPIO_PORTF_AHB_LOCK_R (*((volatile uint32_t *)0x4005D520)) |
Definition at line 1978 of file tm4c123fe6pm.h.
#define GPIO_PORTF_AHB_MIS_R (*((volatile uint32_t *)0x4005D418)) |
Definition at line 1967 of file tm4c123fe6pm.h.
#define GPIO_PORTF_AHB_ODR_R (*((volatile uint32_t *)0x4005D50C)) |
Definition at line 1973 of file tm4c123fe6pm.h.
#define GPIO_PORTF_AHB_PCTL_R (*((volatile uint32_t *)0x4005D52C)) |
Definition at line 1981 of file tm4c123fe6pm.h.
#define GPIO_PORTF_AHB_PDR_R (*((volatile uint32_t *)0x4005D514)) |
Definition at line 1975 of file tm4c123fe6pm.h.
#define GPIO_PORTF_AHB_PUR_R (*((volatile uint32_t *)0x4005D510)) |
Definition at line 1974 of file tm4c123fe6pm.h.
#define GPIO_PORTF_AHB_RIS_R (*((volatile uint32_t *)0x4005D414)) |
Definition at line 1966 of file tm4c123fe6pm.h.
#define GPIO_PORTF_AHB_SLR_R (*((volatile uint32_t *)0x4005D518)) |
Definition at line 1976 of file tm4c123fe6pm.h.
#define GPIO_PORTF_AMSEL_R (*((volatile uint32_t *)0x40025528)) |
Definition at line 723 of file tm4c123fe6pm.h.
#define GPIO_PORTF_CR_R (*((volatile uint32_t *)0x40025524)) |
Definition at line 722 of file tm4c123fe6pm.h.
#define GPIO_PORTF_DATA_BITS_R ((volatile uint32_t *)0x40025000) |
Definition at line 702 of file tm4c123fe6pm.h.
#define GPIO_PORTF_DATA_R (*((volatile uint32_t *)0x400253FC)) |
Definition at line 703 of file tm4c123fe6pm.h.
Referenced by main().
#define GPIO_PORTF_DEN_R (*((volatile uint32_t *)0x4002551C)) |
Definition at line 720 of file tm4c123fe6pm.h.
Referenced by main().
#define GPIO_PORTF_DIR_R (*((volatile uint32_t *)0x40025400)) |
Definition at line 704 of file tm4c123fe6pm.h.
Referenced by main().
#define GPIO_PORTF_DMACTL_R (*((volatile uint32_t *)0x40025534)) |
Definition at line 726 of file tm4c123fe6pm.h.
#define GPIO_PORTF_DR2R_R (*((volatile uint32_t *)0x40025500)) |
Definition at line 713 of file tm4c123fe6pm.h.
#define GPIO_PORTF_DR4R_R (*((volatile uint32_t *)0x40025504)) |
Definition at line 714 of file tm4c123fe6pm.h.
#define GPIO_PORTF_DR8R_R (*((volatile uint32_t *)0x40025508)) |
Definition at line 715 of file tm4c123fe6pm.h.
#define GPIO_PORTF_IBE_R (*((volatile uint32_t *)0x40025408)) |
Definition at line 706 of file tm4c123fe6pm.h.
#define GPIO_PORTF_ICR_R (*((volatile uint32_t *)0x4002541C)) |
Definition at line 711 of file tm4c123fe6pm.h.
#define GPIO_PORTF_IEV_R (*((volatile uint32_t *)0x4002540C)) |
Definition at line 707 of file tm4c123fe6pm.h.
#define GPIO_PORTF_IM_R (*((volatile uint32_t *)0x40025410)) |
Definition at line 708 of file tm4c123fe6pm.h.
#define GPIO_PORTF_IS_R (*((volatile uint32_t *)0x40025404)) |
Definition at line 705 of file tm4c123fe6pm.h.
#define GPIO_PORTF_LOCK_R (*((volatile uint32_t *)0x40025520)) |
Definition at line 721 of file tm4c123fe6pm.h.
#define GPIO_PORTF_MIS_R (*((volatile uint32_t *)0x40025418)) |
Definition at line 710 of file tm4c123fe6pm.h.
#define GPIO_PORTF_ODR_R (*((volatile uint32_t *)0x4002550C)) |
Definition at line 716 of file tm4c123fe6pm.h.
#define GPIO_PORTF_PCTL_R (*((volatile uint32_t *)0x4002552C)) |
Definition at line 724 of file tm4c123fe6pm.h.
#define GPIO_PORTF_PDR_R (*((volatile uint32_t *)0x40025514)) |
Definition at line 718 of file tm4c123fe6pm.h.
#define GPIO_PORTF_PUR_R (*((volatile uint32_t *)0x40025510)) |
Definition at line 717 of file tm4c123fe6pm.h.
#define GPIO_PORTF_RIS_R (*((volatile uint32_t *)0x40025414)) |
Definition at line 709 of file tm4c123fe6pm.h.
#define GPIO_PORTF_SLR_R (*((volatile uint32_t *)0x40025518)) |
Definition at line 719 of file tm4c123fe6pm.h.
#define GPIO_PORTG_ADCCTL_R (*((volatile uint32_t *)0x40026530)) |
Definition at line 756 of file tm4c123fe6pm.h.
#define GPIO_PORTG_AFSEL_R (*((volatile uint32_t *)0x40026420)) |
Definition at line 743 of file tm4c123fe6pm.h.
#define GPIO_PORTG_AHB_ADCCTL_R (*((volatile uint32_t *)0x4005E530)) |
Definition at line 2014 of file tm4c123fe6pm.h.
#define GPIO_PORTG_AHB_AFSEL_R (*((volatile uint32_t *)0x4005E420)) |
Definition at line 2001 of file tm4c123fe6pm.h.
#define GPIO_PORTG_AHB_AMSEL_R (*((volatile uint32_t *)0x4005E528)) |
Definition at line 2012 of file tm4c123fe6pm.h.
#define GPIO_PORTG_AHB_CR_R (*((volatile uint32_t *)0x4005E524)) |
Definition at line 2011 of file tm4c123fe6pm.h.
#define GPIO_PORTG_AHB_DATA_BITS_R ((volatile uint32_t *)0x4005E000) |
Definition at line 1990 of file tm4c123fe6pm.h.
#define GPIO_PORTG_AHB_DATA_R (*((volatile uint32_t *)0x4005E3FC)) |
Definition at line 1992 of file tm4c123fe6pm.h.
#define GPIO_PORTG_AHB_DEN_R (*((volatile uint32_t *)0x4005E51C)) |
Definition at line 2009 of file tm4c123fe6pm.h.
#define GPIO_PORTG_AHB_DIR_R (*((volatile uint32_t *)0x4005E400)) |
Definition at line 1993 of file tm4c123fe6pm.h.
#define GPIO_PORTG_AHB_DMACTL_R (*((volatile uint32_t *)0x4005E534)) |
Definition at line 2015 of file tm4c123fe6pm.h.
#define GPIO_PORTG_AHB_DR2R_R (*((volatile uint32_t *)0x4005E500)) |
Definition at line 2002 of file tm4c123fe6pm.h.
#define GPIO_PORTG_AHB_DR4R_R (*((volatile uint32_t *)0x4005E504)) |
Definition at line 2003 of file tm4c123fe6pm.h.
#define GPIO_PORTG_AHB_DR8R_R (*((volatile uint32_t *)0x4005E508)) |
Definition at line 2004 of file tm4c123fe6pm.h.
#define GPIO_PORTG_AHB_IBE_R (*((volatile uint32_t *)0x4005E408)) |
Definition at line 1995 of file tm4c123fe6pm.h.
#define GPIO_PORTG_AHB_ICR_R (*((volatile uint32_t *)0x4005E41C)) |
Definition at line 2000 of file tm4c123fe6pm.h.
#define GPIO_PORTG_AHB_IEV_R (*((volatile uint32_t *)0x4005E40C)) |
Definition at line 1996 of file tm4c123fe6pm.h.
#define GPIO_PORTG_AHB_IM_R (*((volatile uint32_t *)0x4005E410)) |
Definition at line 1997 of file tm4c123fe6pm.h.
#define GPIO_PORTG_AHB_IS_R (*((volatile uint32_t *)0x4005E404)) |
Definition at line 1994 of file tm4c123fe6pm.h.
#define GPIO_PORTG_AHB_LOCK_R (*((volatile uint32_t *)0x4005E520)) |
Definition at line 2010 of file tm4c123fe6pm.h.
#define GPIO_PORTG_AHB_MIS_R (*((volatile uint32_t *)0x4005E418)) |
Definition at line 1999 of file tm4c123fe6pm.h.
#define GPIO_PORTG_AHB_ODR_R (*((volatile uint32_t *)0x4005E50C)) |
Definition at line 2005 of file tm4c123fe6pm.h.
#define GPIO_PORTG_AHB_PCTL_R (*((volatile uint32_t *)0x4005E52C)) |
Definition at line 2013 of file tm4c123fe6pm.h.
#define GPIO_PORTG_AHB_PDR_R (*((volatile uint32_t *)0x4005E514)) |
Definition at line 2007 of file tm4c123fe6pm.h.
#define GPIO_PORTG_AHB_PUR_R (*((volatile uint32_t *)0x4005E510)) |
Definition at line 2006 of file tm4c123fe6pm.h.
#define GPIO_PORTG_AHB_RIS_R (*((volatile uint32_t *)0x4005E414)) |
Definition at line 1998 of file tm4c123fe6pm.h.
#define GPIO_PORTG_AHB_SLR_R (*((volatile uint32_t *)0x4005E518)) |
Definition at line 2008 of file tm4c123fe6pm.h.
#define GPIO_PORTG_AMSEL_R (*((volatile uint32_t *)0x40026528)) |
Definition at line 754 of file tm4c123fe6pm.h.
#define GPIO_PORTG_CR_R (*((volatile uint32_t *)0x40026524)) |
Definition at line 753 of file tm4c123fe6pm.h.
#define GPIO_PORTG_DATA_BITS_R ((volatile uint32_t *)0x40026000) |
Definition at line 733 of file tm4c123fe6pm.h.
#define GPIO_PORTG_DATA_R (*((volatile uint32_t *)0x400263FC)) |
Definition at line 734 of file tm4c123fe6pm.h.
#define GPIO_PORTG_DEN_R (*((volatile uint32_t *)0x4002651C)) |
Definition at line 751 of file tm4c123fe6pm.h.
#define GPIO_PORTG_DIR_R (*((volatile uint32_t *)0x40026400)) |
Definition at line 735 of file tm4c123fe6pm.h.
#define GPIO_PORTG_DMACTL_R (*((volatile uint32_t *)0x40026534)) |
Definition at line 757 of file tm4c123fe6pm.h.
#define GPIO_PORTG_DR2R_R (*((volatile uint32_t *)0x40026500)) |
Definition at line 744 of file tm4c123fe6pm.h.
#define GPIO_PORTG_DR4R_R (*((volatile uint32_t *)0x40026504)) |
Definition at line 745 of file tm4c123fe6pm.h.
#define GPIO_PORTG_DR8R_R (*((volatile uint32_t *)0x40026508)) |
Definition at line 746 of file tm4c123fe6pm.h.
#define GPIO_PORTG_IBE_R (*((volatile uint32_t *)0x40026408)) |
Definition at line 737 of file tm4c123fe6pm.h.
#define GPIO_PORTG_ICR_R (*((volatile uint32_t *)0x4002641C)) |
Definition at line 742 of file tm4c123fe6pm.h.
#define GPIO_PORTG_IEV_R (*((volatile uint32_t *)0x4002640C)) |
Definition at line 738 of file tm4c123fe6pm.h.
#define GPIO_PORTG_IM_R (*((volatile uint32_t *)0x40026410)) |
Definition at line 739 of file tm4c123fe6pm.h.
#define GPIO_PORTG_IS_R (*((volatile uint32_t *)0x40026404)) |
Definition at line 736 of file tm4c123fe6pm.h.
#define GPIO_PORTG_LOCK_R (*((volatile uint32_t *)0x40026520)) |
Definition at line 752 of file tm4c123fe6pm.h.
#define GPIO_PORTG_MIS_R (*((volatile uint32_t *)0x40026418)) |
Definition at line 741 of file tm4c123fe6pm.h.
#define GPIO_PORTG_ODR_R (*((volatile uint32_t *)0x4002650C)) |
Definition at line 747 of file tm4c123fe6pm.h.
#define GPIO_PORTG_PCTL_R (*((volatile uint32_t *)0x4002652C)) |
Definition at line 755 of file tm4c123fe6pm.h.
#define GPIO_PORTG_PDR_R (*((volatile uint32_t *)0x40026514)) |
Definition at line 749 of file tm4c123fe6pm.h.
#define GPIO_PORTG_PUR_R (*((volatile uint32_t *)0x40026510)) |
Definition at line 748 of file tm4c123fe6pm.h.
#define GPIO_PORTG_RIS_R (*((volatile uint32_t *)0x40026414)) |
Definition at line 740 of file tm4c123fe6pm.h.
#define GPIO_PORTG_SLR_R (*((volatile uint32_t *)0x40026518)) |
Definition at line 750 of file tm4c123fe6pm.h.
#define GPIO_RIS_GPIO_M 0x000000FF |
Definition at line 2499 of file tm4c123fe6pm.h.
#define GPIO_RIS_GPIO_S 0 |
Definition at line 2500 of file tm4c123fe6pm.h.
#define I2C0_MBMON_R (*((volatile uint32_t *)0x4002002C)) |
Definition at line 565 of file tm4c123fe6pm.h.
#define I2C0_MCLKOCNT_R (*((volatile uint32_t *)0x40020024)) |
Definition at line 564 of file tm4c123fe6pm.h.
#define I2C0_MCR2_R (*((volatile uint32_t *)0x40020038)) |
Definition at line 566 of file tm4c123fe6pm.h.
#define I2C0_MCR_R (*((volatile uint32_t *)0x40020020)) |
Definition at line 563 of file tm4c123fe6pm.h.
#define I2C0_MCS_R (*((volatile uint32_t *)0x40020004)) |
Definition at line 556 of file tm4c123fe6pm.h.
#define I2C0_MDR_R (*((volatile uint32_t *)0x40020008)) |
Definition at line 557 of file tm4c123fe6pm.h.
#define I2C0_MICR_R (*((volatile uint32_t *)0x4002001C)) |
Definition at line 562 of file tm4c123fe6pm.h.
#define I2C0_MIMR_R (*((volatile uint32_t *)0x40020010)) |
Definition at line 559 of file tm4c123fe6pm.h.
#define I2C0_MMIS_R (*((volatile uint32_t *)0x40020018)) |
Definition at line 561 of file tm4c123fe6pm.h.
#define I2C0_MRIS_R (*((volatile uint32_t *)0x40020014)) |
Definition at line 560 of file tm4c123fe6pm.h.
#define I2C0_MSA_R (*((volatile uint32_t *)0x40020000)) |
Definition at line 555 of file tm4c123fe6pm.h.
#define I2C0_MTPR_R (*((volatile uint32_t *)0x4002000C)) |
Definition at line 558 of file tm4c123fe6pm.h.
#define I2C0_PC_R (*((volatile uint32_t *)0x40020FC4)) |
Definition at line 577 of file tm4c123fe6pm.h.
#define I2C0_PP_R (*((volatile uint32_t *)0x40020FC0)) |
Definition at line 576 of file tm4c123fe6pm.h.
#define I2C0_SACKCTL_R (*((volatile uint32_t *)0x40020820)) |
Definition at line 575 of file tm4c123fe6pm.h.
#define I2C0_SCSR_R (*((volatile uint32_t *)0x40020804)) |
Definition at line 568 of file tm4c123fe6pm.h.
#define I2C0_SDR_R (*((volatile uint32_t *)0x40020808)) |
Definition at line 569 of file tm4c123fe6pm.h.
#define I2C0_SICR_R (*((volatile uint32_t *)0x40020818)) |
Definition at line 573 of file tm4c123fe6pm.h.
#define I2C0_SIMR_R (*((volatile uint32_t *)0x4002080C)) |
Definition at line 570 of file tm4c123fe6pm.h.
#define I2C0_SMIS_R (*((volatile uint32_t *)0x40020814)) |
Definition at line 572 of file tm4c123fe6pm.h.
#define I2C0_SOAR2_R (*((volatile uint32_t *)0x4002081C)) |
Definition at line 574 of file tm4c123fe6pm.h.
#define I2C0_SOAR_R (*((volatile uint32_t *)0x40020800)) |
Definition at line 567 of file tm4c123fe6pm.h.
#define I2C0_SRIS_R (*((volatile uint32_t *)0x40020810)) |
Definition at line 571 of file tm4c123fe6pm.h.
#define I2C1_MBMON_R (*((volatile uint32_t *)0x4002102C)) |
Definition at line 594 of file tm4c123fe6pm.h.
#define I2C1_MCLKOCNT_R (*((volatile uint32_t *)0x40021024)) |
Definition at line 593 of file tm4c123fe6pm.h.
#define I2C1_MCR2_R (*((volatile uint32_t *)0x40021038)) |
Definition at line 595 of file tm4c123fe6pm.h.
#define I2C1_MCR_R (*((volatile uint32_t *)0x40021020)) |
Definition at line 592 of file tm4c123fe6pm.h.
#define I2C1_MCS_R (*((volatile uint32_t *)0x40021004)) |
Definition at line 585 of file tm4c123fe6pm.h.
#define I2C1_MDR_R (*((volatile uint32_t *)0x40021008)) |
Definition at line 586 of file tm4c123fe6pm.h.
#define I2C1_MICR_R (*((volatile uint32_t *)0x4002101C)) |
Definition at line 591 of file tm4c123fe6pm.h.
#define I2C1_MIMR_R (*((volatile uint32_t *)0x40021010)) |
Definition at line 588 of file tm4c123fe6pm.h.
#define I2C1_MMIS_R (*((volatile uint32_t *)0x40021018)) |
Definition at line 590 of file tm4c123fe6pm.h.
#define I2C1_MRIS_R (*((volatile uint32_t *)0x40021014)) |
Definition at line 589 of file tm4c123fe6pm.h.
#define I2C1_MSA_R (*((volatile uint32_t *)0x40021000)) |
Definition at line 584 of file tm4c123fe6pm.h.
#define I2C1_MTPR_R (*((volatile uint32_t *)0x4002100C)) |
Definition at line 587 of file tm4c123fe6pm.h.
#define I2C1_PC_R (*((volatile uint32_t *)0x40021FC4)) |
Definition at line 606 of file tm4c123fe6pm.h.
#define I2C1_PP_R (*((volatile uint32_t *)0x40021FC0)) |
Definition at line 605 of file tm4c123fe6pm.h.
#define I2C1_SACKCTL_R (*((volatile uint32_t *)0x40021820)) |
Definition at line 604 of file tm4c123fe6pm.h.
#define I2C1_SCSR_R (*((volatile uint32_t *)0x40021804)) |
Definition at line 597 of file tm4c123fe6pm.h.
#define I2C1_SDR_R (*((volatile uint32_t *)0x40021808)) |
Definition at line 598 of file tm4c123fe6pm.h.
#define I2C1_SICR_R (*((volatile uint32_t *)0x40021818)) |
Definition at line 602 of file tm4c123fe6pm.h.
#define I2C1_SIMR_R (*((volatile uint32_t *)0x4002180C)) |
Definition at line 599 of file tm4c123fe6pm.h.
#define I2C1_SMIS_R (*((volatile uint32_t *)0x40021814)) |
Definition at line 601 of file tm4c123fe6pm.h.
#define I2C1_SOAR2_R (*((volatile uint32_t *)0x4002181C)) |
Definition at line 603 of file tm4c123fe6pm.h.
#define I2C1_SOAR_R (*((volatile uint32_t *)0x40021800)) |
Definition at line 596 of file tm4c123fe6pm.h.
#define I2C1_SRIS_R (*((volatile uint32_t *)0x40021810)) |
Definition at line 600 of file tm4c123fe6pm.h.
#define I2C2_MBMON_R (*((volatile uint32_t *)0x4002202C)) |
Definition at line 623 of file tm4c123fe6pm.h.
#define I2C2_MCLKOCNT_R (*((volatile uint32_t *)0x40022024)) |
Definition at line 622 of file tm4c123fe6pm.h.
#define I2C2_MCR2_R (*((volatile uint32_t *)0x40022038)) |
Definition at line 624 of file tm4c123fe6pm.h.
#define I2C2_MCR_R (*((volatile uint32_t *)0x40022020)) |
Definition at line 621 of file tm4c123fe6pm.h.
#define I2C2_MCS_R (*((volatile uint32_t *)0x40022004)) |
Definition at line 614 of file tm4c123fe6pm.h.
#define I2C2_MDR_R (*((volatile uint32_t *)0x40022008)) |
Definition at line 615 of file tm4c123fe6pm.h.
#define I2C2_MICR_R (*((volatile uint32_t *)0x4002201C)) |
Definition at line 620 of file tm4c123fe6pm.h.
#define I2C2_MIMR_R (*((volatile uint32_t *)0x40022010)) |
Definition at line 617 of file tm4c123fe6pm.h.
#define I2C2_MMIS_R (*((volatile uint32_t *)0x40022018)) |
Definition at line 619 of file tm4c123fe6pm.h.
#define I2C2_MRIS_R (*((volatile uint32_t *)0x40022014)) |
Definition at line 618 of file tm4c123fe6pm.h.
#define I2C2_MSA_R (*((volatile uint32_t *)0x40022000)) |
Definition at line 613 of file tm4c123fe6pm.h.
#define I2C2_MTPR_R (*((volatile uint32_t *)0x4002200C)) |
Definition at line 616 of file tm4c123fe6pm.h.
#define I2C2_PC_R (*((volatile uint32_t *)0x40022FC4)) |
Definition at line 635 of file tm4c123fe6pm.h.
#define I2C2_PP_R (*((volatile uint32_t *)0x40022FC0)) |
Definition at line 634 of file tm4c123fe6pm.h.
#define I2C2_SACKCTL_R (*((volatile uint32_t *)0x40022820)) |
Definition at line 633 of file tm4c123fe6pm.h.
#define I2C2_SCSR_R (*((volatile uint32_t *)0x40022804)) |
Definition at line 626 of file tm4c123fe6pm.h.
#define I2C2_SDR_R (*((volatile uint32_t *)0x40022808)) |
Definition at line 627 of file tm4c123fe6pm.h.
#define I2C2_SICR_R (*((volatile uint32_t *)0x40022818)) |
Definition at line 631 of file tm4c123fe6pm.h.
#define I2C2_SIMR_R (*((volatile uint32_t *)0x4002280C)) |
Definition at line 628 of file tm4c123fe6pm.h.
#define I2C2_SMIS_R (*((volatile uint32_t *)0x40022814)) |
Definition at line 630 of file tm4c123fe6pm.h.
#define I2C2_SOAR2_R (*((volatile uint32_t *)0x4002281C)) |
Definition at line 632 of file tm4c123fe6pm.h.
#define I2C2_SOAR_R (*((volatile uint32_t *)0x40022800)) |
Definition at line 625 of file tm4c123fe6pm.h.
#define I2C2_SRIS_R (*((volatile uint32_t *)0x40022810)) |
Definition at line 629 of file tm4c123fe6pm.h.
#define I2C3_MBMON_R (*((volatile uint32_t *)0x4002302C)) |
Definition at line 652 of file tm4c123fe6pm.h.
#define I2C3_MCLKOCNT_R (*((volatile uint32_t *)0x40023024)) |
Definition at line 651 of file tm4c123fe6pm.h.
#define I2C3_MCR2_R (*((volatile uint32_t *)0x40023038)) |
Definition at line 653 of file tm4c123fe6pm.h.
#define I2C3_MCR_R (*((volatile uint32_t *)0x40023020)) |
Definition at line 650 of file tm4c123fe6pm.h.
#define I2C3_MCS_R (*((volatile uint32_t *)0x40023004)) |
Definition at line 643 of file tm4c123fe6pm.h.
#define I2C3_MDR_R (*((volatile uint32_t *)0x40023008)) |
Definition at line 644 of file tm4c123fe6pm.h.
#define I2C3_MICR_R (*((volatile uint32_t *)0x4002301C)) |
Definition at line 649 of file tm4c123fe6pm.h.
#define I2C3_MIMR_R (*((volatile uint32_t *)0x40023010)) |
Definition at line 646 of file tm4c123fe6pm.h.
#define I2C3_MMIS_R (*((volatile uint32_t *)0x40023018)) |
Definition at line 648 of file tm4c123fe6pm.h.
#define I2C3_MRIS_R (*((volatile uint32_t *)0x40023014)) |
Definition at line 647 of file tm4c123fe6pm.h.
#define I2C3_MSA_R (*((volatile uint32_t *)0x40023000)) |
Definition at line 642 of file tm4c123fe6pm.h.
#define I2C3_MTPR_R (*((volatile uint32_t *)0x4002300C)) |
Definition at line 645 of file tm4c123fe6pm.h.
#define I2C3_PC_R (*((volatile uint32_t *)0x40023FC4)) |
Definition at line 664 of file tm4c123fe6pm.h.
#define I2C3_PP_R (*((volatile uint32_t *)0x40023FC0)) |
Definition at line 663 of file tm4c123fe6pm.h.
#define I2C3_SACKCTL_R (*((volatile uint32_t *)0x40023820)) |
Definition at line 662 of file tm4c123fe6pm.h.
#define I2C3_SCSR_R (*((volatile uint32_t *)0x40023804)) |
Definition at line 655 of file tm4c123fe6pm.h.
#define I2C3_SDR_R (*((volatile uint32_t *)0x40023808)) |
Definition at line 656 of file tm4c123fe6pm.h.
#define I2C3_SICR_R (*((volatile uint32_t *)0x40023818)) |
Definition at line 660 of file tm4c123fe6pm.h.
#define I2C3_SIMR_R (*((volatile uint32_t *)0x4002380C)) |
Definition at line 657 of file tm4c123fe6pm.h.
#define I2C3_SMIS_R (*((volatile uint32_t *)0x40023814)) |
Definition at line 659 of file tm4c123fe6pm.h.
#define I2C3_SOAR2_R (*((volatile uint32_t *)0x4002381C)) |
Definition at line 661 of file tm4c123fe6pm.h.
#define I2C3_SOAR_R (*((volatile uint32_t *)0x40023800)) |
Definition at line 654 of file tm4c123fe6pm.h.
#define I2C3_SRIS_R (*((volatile uint32_t *)0x40023810)) |
Definition at line 658 of file tm4c123fe6pm.h.
#define I2C4_MBMON_R (*((volatile uint32_t *)0x400C002C)) |
Definition at line 2054 of file tm4c123fe6pm.h.
#define I2C4_MCLKOCNT_R (*((volatile uint32_t *)0x400C0024)) |
Definition at line 2053 of file tm4c123fe6pm.h.
#define I2C4_MCR2_R (*((volatile uint32_t *)0x400C0038)) |
Definition at line 2055 of file tm4c123fe6pm.h.
#define I2C4_MCR_R (*((volatile uint32_t *)0x400C0020)) |
Definition at line 2052 of file tm4c123fe6pm.h.
#define I2C4_MCS_R (*((volatile uint32_t *)0x400C0004)) |
Definition at line 2045 of file tm4c123fe6pm.h.
#define I2C4_MDR_R (*((volatile uint32_t *)0x400C0008)) |
Definition at line 2046 of file tm4c123fe6pm.h.
#define I2C4_MICR_R (*((volatile uint32_t *)0x400C001C)) |
Definition at line 2051 of file tm4c123fe6pm.h.
#define I2C4_MIMR_R (*((volatile uint32_t *)0x400C0010)) |
Definition at line 2048 of file tm4c123fe6pm.h.
#define I2C4_MMIS_R (*((volatile uint32_t *)0x400C0018)) |
Definition at line 2050 of file tm4c123fe6pm.h.
#define I2C4_MRIS_R (*((volatile uint32_t *)0x400C0014)) |
Definition at line 2049 of file tm4c123fe6pm.h.
#define I2C4_MSA_R (*((volatile uint32_t *)0x400C0000)) |
Definition at line 2044 of file tm4c123fe6pm.h.
#define I2C4_MTPR_R (*((volatile uint32_t *)0x400C000C)) |
Definition at line 2047 of file tm4c123fe6pm.h.
#define I2C4_PC_R (*((volatile uint32_t *)0x400C0FC4)) |
Definition at line 2066 of file tm4c123fe6pm.h.
#define I2C4_PP_R (*((volatile uint32_t *)0x400C0FC0)) |
Definition at line 2065 of file tm4c123fe6pm.h.
#define I2C4_SACKCTL_R (*((volatile uint32_t *)0x400C0820)) |
Definition at line 2064 of file tm4c123fe6pm.h.
#define I2C4_SCSR_R (*((volatile uint32_t *)0x400C0804)) |
Definition at line 2057 of file tm4c123fe6pm.h.
#define I2C4_SDR_R (*((volatile uint32_t *)0x400C0808)) |
Definition at line 2058 of file tm4c123fe6pm.h.
#define I2C4_SICR_R (*((volatile uint32_t *)0x400C0818)) |
Definition at line 2062 of file tm4c123fe6pm.h.
#define I2C4_SIMR_R (*((volatile uint32_t *)0x400C080C)) |
Definition at line 2059 of file tm4c123fe6pm.h.
#define I2C4_SMIS_R (*((volatile uint32_t *)0x400C0814)) |
Definition at line 2061 of file tm4c123fe6pm.h.
#define I2C4_SOAR2_R (*((volatile uint32_t *)0x400C081C)) |
Definition at line 2063 of file tm4c123fe6pm.h.
#define I2C4_SOAR_R (*((volatile uint32_t *)0x400C0800)) |
Definition at line 2056 of file tm4c123fe6pm.h.
#define I2C4_SRIS_R (*((volatile uint32_t *)0x400C0810)) |
Definition at line 2060 of file tm4c123fe6pm.h.
#define I2C5_MBMON_R (*((volatile uint32_t *)0x400C102C)) |
Definition at line 2083 of file tm4c123fe6pm.h.
#define I2C5_MCLKOCNT_R (*((volatile uint32_t *)0x400C1024)) |
Definition at line 2082 of file tm4c123fe6pm.h.
#define I2C5_MCR2_R (*((volatile uint32_t *)0x400C1038)) |
Definition at line 2084 of file tm4c123fe6pm.h.
#define I2C5_MCR_R (*((volatile uint32_t *)0x400C1020)) |
Definition at line 2081 of file tm4c123fe6pm.h.
#define I2C5_MCS_R (*((volatile uint32_t *)0x400C1004)) |
Definition at line 2074 of file tm4c123fe6pm.h.
#define I2C5_MDR_R (*((volatile uint32_t *)0x400C1008)) |
Definition at line 2075 of file tm4c123fe6pm.h.
#define I2C5_MICR_R (*((volatile uint32_t *)0x400C101C)) |
Definition at line 2080 of file tm4c123fe6pm.h.
#define I2C5_MIMR_R (*((volatile uint32_t *)0x400C1010)) |
Definition at line 2077 of file tm4c123fe6pm.h.
#define I2C5_MMIS_R (*((volatile uint32_t *)0x400C1018)) |
Definition at line 2079 of file tm4c123fe6pm.h.
#define I2C5_MRIS_R (*((volatile uint32_t *)0x400C1014)) |
Definition at line 2078 of file tm4c123fe6pm.h.
#define I2C5_MSA_R (*((volatile uint32_t *)0x400C1000)) |
Definition at line 2073 of file tm4c123fe6pm.h.
#define I2C5_MTPR_R (*((volatile uint32_t *)0x400C100C)) |
Definition at line 2076 of file tm4c123fe6pm.h.
#define I2C5_PC_R (*((volatile uint32_t *)0x400C1FC4)) |
Definition at line 2095 of file tm4c123fe6pm.h.
#define I2C5_PP_R (*((volatile uint32_t *)0x400C1FC0)) |
Definition at line 2094 of file tm4c123fe6pm.h.
#define I2C5_SACKCTL_R (*((volatile uint32_t *)0x400C1820)) |
Definition at line 2093 of file tm4c123fe6pm.h.
#define I2C5_SCSR_R (*((volatile uint32_t *)0x400C1804)) |
Definition at line 2086 of file tm4c123fe6pm.h.
#define I2C5_SDR_R (*((volatile uint32_t *)0x400C1808)) |
Definition at line 2087 of file tm4c123fe6pm.h.
#define I2C5_SICR_R (*((volatile uint32_t *)0x400C1818)) |
Definition at line 2091 of file tm4c123fe6pm.h.
#define I2C5_SIMR_R (*((volatile uint32_t *)0x400C180C)) |
Definition at line 2088 of file tm4c123fe6pm.h.
#define I2C5_SMIS_R (*((volatile uint32_t *)0x400C1814)) |
Definition at line 2090 of file tm4c123fe6pm.h.
#define I2C5_SOAR2_R (*((volatile uint32_t *)0x400C181C)) |
Definition at line 2092 of file tm4c123fe6pm.h.
#define I2C5_SOAR_R (*((volatile uint32_t *)0x400C1800)) |
Definition at line 2085 of file tm4c123fe6pm.h.
#define I2C5_SRIS_R (*((volatile uint32_t *)0x400C1810)) |
Definition at line 2089 of file tm4c123fe6pm.h.
#define I2C_MBMON_SCL 0x00000001 |
Definition at line 3301 of file tm4c123fe6pm.h.
#define I2C_MBMON_SDA 0x00000002 |
Definition at line 3300 of file tm4c123fe6pm.h.
#define I2C_MCLKOCNT_CNTL_M 0x000000FF |
Definition at line 3292 of file tm4c123fe6pm.h.
#define I2C_MCLKOCNT_CNTL_S 0 |
Definition at line 3293 of file tm4c123fe6pm.h.
#define I2C_MCR2_GFPW_1 0x00000010 |
Definition at line 3310 of file tm4c123fe6pm.h.
#define I2C_MCR2_GFPW_16 0x00000060 |
Definition at line 3315 of file tm4c123fe6pm.h.
#define I2C_MCR2_GFPW_2 0x00000020 |
Definition at line 3311 of file tm4c123fe6pm.h.
#define I2C_MCR2_GFPW_3 0x00000030 |
Definition at line 3312 of file tm4c123fe6pm.h.
#define I2C_MCR2_GFPW_31 0x00000070 |
Definition at line 3316 of file tm4c123fe6pm.h.
#define I2C_MCR2_GFPW_4 0x00000040 |
Definition at line 3313 of file tm4c123fe6pm.h.
#define I2C_MCR2_GFPW_8 0x00000050 |
Definition at line 3314 of file tm4c123fe6pm.h.
#define I2C_MCR2_GFPW_BYPASS 0x00000000 |
Definition at line 3309 of file tm4c123fe6pm.h.
#define I2C_MCR2_GFPW_M 0x00000070 |
Definition at line 3308 of file tm4c123fe6pm.h.
#define I2C_MCR_GFE 0x00000040 |
Definition at line 3282 of file tm4c123fe6pm.h.
#define I2C_MCR_LPBK 0x00000001 |
Definition at line 3285 of file tm4c123fe6pm.h.
#define I2C_MCR_MFE 0x00000010 |
Definition at line 3284 of file tm4c123fe6pm.h.
#define I2C_MCR_SFE 0x00000020 |
Definition at line 3283 of file tm4c123fe6pm.h.
#define I2C_MCS_ACK 0x00000008 |
Definition at line 3216 of file tm4c123fe6pm.h.
#define I2C_MCS_ADRACK 0x00000004 |
Definition at line 3218 of file tm4c123fe6pm.h.
#define I2C_MCS_ARBLST 0x00000010 |
Definition at line 3214 of file tm4c123fe6pm.h.
#define I2C_MCS_BUSBSY 0x00000040 |
Definition at line 3212 of file tm4c123fe6pm.h.
#define I2C_MCS_BUSY 0x00000001 |
Definition at line 3223 of file tm4c123fe6pm.h.
#define I2C_MCS_CLKTO 0x00000080 |
Definition at line 3211 of file tm4c123fe6pm.h.
#define I2C_MCS_DATACK 0x00000008 |
Definition at line 3217 of file tm4c123fe6pm.h.
#define I2C_MCS_ERROR 0x00000002 |
Definition at line 3220 of file tm4c123fe6pm.h.
#define I2C_MCS_HS 0x00000010 |
Definition at line 3215 of file tm4c123fe6pm.h.
#define I2C_MCS_IDLE 0x00000020 |
Definition at line 3213 of file tm4c123fe6pm.h.
#define I2C_MCS_RUN 0x00000001 |
Definition at line 3222 of file tm4c123fe6pm.h.
#define I2C_MCS_START 0x00000002 |
Definition at line 3221 of file tm4c123fe6pm.h.
#define I2C_MCS_STOP 0x00000004 |
Definition at line 3219 of file tm4c123fe6pm.h.
#define I2C_MDR_DATA_M 0x000000FF |
Definition at line 3230 of file tm4c123fe6pm.h.
#define I2C_MDR_DATA_S 0 |
Definition at line 3232 of file tm4c123fe6pm.h.
#define I2C_MICR_CLKIC 0x00000002 |
Definition at line 3274 of file tm4c123fe6pm.h.
#define I2C_MICR_IC 0x00000001 |
Definition at line 3275 of file tm4c123fe6pm.h.
#define I2C_MIMR_CLKIM 0x00000002 |
Definition at line 3248 of file tm4c123fe6pm.h.
#define I2C_MIMR_IM 0x00000001 |
Definition at line 3249 of file tm4c123fe6pm.h.
#define I2C_MMIS_CLKMIS 0x00000002 |
Definition at line 3265 of file tm4c123fe6pm.h.
#define I2C_MMIS_MIS 0x00000001 |
Definition at line 3267 of file tm4c123fe6pm.h.
#define I2C_MRIS_CLKRIS 0x00000002 |
Definition at line 3256 of file tm4c123fe6pm.h.
#define I2C_MRIS_RIS 0x00000001 |
Definition at line 3258 of file tm4c123fe6pm.h.
#define I2C_MSA_RS 0x00000001 |
Definition at line 3203 of file tm4c123fe6pm.h.
#define I2C_MSA_SA_M 0x000000FE |
Definition at line 3202 of file tm4c123fe6pm.h.
#define I2C_MSA_SA_S 1 |
Definition at line 3204 of file tm4c123fe6pm.h.
#define I2C_MTPR_HS 0x00000080 |
Definition at line 3239 of file tm4c123fe6pm.h.
#define I2C_MTPR_TPR_M 0x0000007F |
Definition at line 3240 of file tm4c123fe6pm.h.
#define I2C_MTPR_TPR_S 0 |
Definition at line 3241 of file tm4c123fe6pm.h.
#define I2C_PC_HS 0x00000001 |
Definition at line 3414 of file tm4c123fe6pm.h.
#define I2C_PP_HS 0x00000001 |
Definition at line 3407 of file tm4c123fe6pm.h.
#define I2C_SACKCTL_ACKOEN 0x00000001 |
Definition at line 3400 of file tm4c123fe6pm.h.
#define I2C_SACKCTL_ACKOVAL 0x00000002 |
Definition at line 3399 of file tm4c123fe6pm.h.
#define I2C_SCSR_DA 0x00000001 |
Definition at line 3334 of file tm4c123fe6pm.h.
#define I2C_SCSR_FBR 0x00000004 |
Definition at line 3332 of file tm4c123fe6pm.h.
#define I2C_SCSR_OAR2SEL 0x00000008 |
Definition at line 3331 of file tm4c123fe6pm.h.
#define I2C_SCSR_RREQ 0x00000001 |
Definition at line 3335 of file tm4c123fe6pm.h.
#define I2C_SCSR_TREQ 0x00000002 |
Definition at line 3333 of file tm4c123fe6pm.h.
#define I2C_SDR_DATA_M 0x000000FF |
Definition at line 3342 of file tm4c123fe6pm.h.
#define I2C_SDR_DATA_S 0 |
Definition at line 3343 of file tm4c123fe6pm.h.
#define I2C_SICR_DATAIC 0x00000001 |
Definition at line 3383 of file tm4c123fe6pm.h.
#define I2C_SICR_STARTIC 0x00000002 |
Definition at line 3382 of file tm4c123fe6pm.h.
#define I2C_SICR_STOPIC 0x00000004 |
Definition at line 3381 of file tm4c123fe6pm.h.
#define I2C_SIMR_DATAIM 0x00000001 |
Definition at line 3352 of file tm4c123fe6pm.h.
#define I2C_SIMR_STARTIM 0x00000002 |
Definition at line 3351 of file tm4c123fe6pm.h.
#define I2C_SIMR_STOPIM 0x00000004 |
Definition at line 3350 of file tm4c123fe6pm.h.
#define I2C_SMIS_DATAMIS 0x00000001 |
Definition at line 3374 of file tm4c123fe6pm.h.
#define I2C_SMIS_STARTMIS 0x00000002 |
Definition at line 3372 of file tm4c123fe6pm.h.
#define I2C_SMIS_STOPMIS 0x00000004 |
Definition at line 3370 of file tm4c123fe6pm.h.
#define I2C_SOAR2_OAR2_M 0x0000007F |
Definition at line 3391 of file tm4c123fe6pm.h.
#define I2C_SOAR2_OAR2_S 0 |
Definition at line 3392 of file tm4c123fe6pm.h.
#define I2C_SOAR2_OAR2EN 0x00000080 |
Definition at line 3390 of file tm4c123fe6pm.h.
#define I2C_SOAR_OAR_M 0x0000007F |
Definition at line 3323 of file tm4c123fe6pm.h.
#define I2C_SOAR_OAR_S 0 |
Definition at line 3324 of file tm4c123fe6pm.h.
#define I2C_SRIS_DATARIS 0x00000001 |
Definition at line 3363 of file tm4c123fe6pm.h.
#define I2C_SRIS_STARTRIS 0x00000002 |
Definition at line 3361 of file tm4c123fe6pm.h.
#define I2C_SRIS_STOPRIS 0x00000004 |
Definition at line 3359 of file tm4c123fe6pm.h.
#define INT_ADC0SS0 30 |
Definition at line 62 of file tm4c123fe6pm.h.
#define INT_ADC0SS1 31 |
Definition at line 63 of file tm4c123fe6pm.h.
#define INT_ADC0SS2 32 |
Definition at line 64 of file tm4c123fe6pm.h.
#define INT_ADC0SS3 33 |
Definition at line 65 of file tm4c123fe6pm.h.
#define INT_ADC1SS0 64 |
Definition at line 92 of file tm4c123fe6pm.h.
#define INT_ADC1SS1 65 |
Definition at line 93 of file tm4c123fe6pm.h.
#define INT_ADC1SS2 66 |
Definition at line 94 of file tm4c123fe6pm.h.
#define INT_ADC1SS3 67 |
Definition at line 95 of file tm4c123fe6pm.h.
#define INT_CAN0 55 |
Definition at line 86 of file tm4c123fe6pm.h.
#define INT_CAN1 56 |
Definition at line 87 of file tm4c123fe6pm.h.
#define INT_COMP0 41 |
Definition at line 73 of file tm4c123fe6pm.h.
#define INT_COMP1 42 |
Definition at line 74 of file tm4c123fe6pm.h.
#define INT_FLASH 45 |
Definition at line 76 of file tm4c123fe6pm.h.
#define INT_GPIOA 16 |
Definition at line 48 of file tm4c123fe6pm.h.
#define INT_GPIOB 17 |
Definition at line 49 of file tm4c123fe6pm.h.
#define INT_GPIOC 18 |
Definition at line 50 of file tm4c123fe6pm.h.
#define INT_GPIOD 19 |
Definition at line 51 of file tm4c123fe6pm.h.
#define INT_GPIOE 20 |
Definition at line 52 of file tm4c123fe6pm.h.
#define INT_GPIOF 46 |
Definition at line 78 of file tm4c123fe6pm.h.
#define INT_GPIOG 47 |
Definition at line 79 of file tm4c123fe6pm.h.
#define INT_I2C0 24 |
Definition at line 56 of file tm4c123fe6pm.h.
#define INT_I2C1 53 |
Definition at line 84 of file tm4c123fe6pm.h.
#define INT_I2C2 84 |
Definition at line 103 of file tm4c123fe6pm.h.
#define INT_I2C3 85 |
Definition at line 104 of file tm4c123fe6pm.h.
#define INT_I2C4 125 |
Definition at line 122 of file tm4c123fe6pm.h.
#define INT_I2C5 126 |
Definition at line 123 of file tm4c123fe6pm.h.
#define INT_PWM0_0 26 |
Definition at line 58 of file tm4c123fe6pm.h.
#define INT_PWM0_1 27 |
Definition at line 59 of file tm4c123fe6pm.h.
#define INT_PWM0_2 28 |
Definition at line 60 of file tm4c123fe6pm.h.
#define INT_PWM0_3 61 |
Definition at line 89 of file tm4c123fe6pm.h.
#define INT_PWM0_FAULT 25 |
Definition at line 57 of file tm4c123fe6pm.h.
#define INT_PWM1_0 150 |
Definition at line 124 of file tm4c123fe6pm.h.
#define INT_PWM1_1 151 |
Definition at line 125 of file tm4c123fe6pm.h.
#define INT_PWM1_2 152 |
Definition at line 126 of file tm4c123fe6pm.h.
#define INT_PWM1_3 153 |
Definition at line 127 of file tm4c123fe6pm.h.
#define INT_PWM1_FAULT 154 |
Definition at line 128 of file tm4c123fe6pm.h.
#define INT_QEI0 29 |
Definition at line 61 of file tm4c123fe6pm.h.
#define INT_QEI1 54 |
Definition at line 85 of file tm4c123fe6pm.h.
#define INT_SSI0 23 |
Definition at line 55 of file tm4c123fe6pm.h.
#define INT_SSI1 50 |
Definition at line 81 of file tm4c123fe6pm.h.
#define INT_SSI2 73 |
Definition at line 96 of file tm4c123fe6pm.h.
#define INT_SSI3 74 |
Definition at line 97 of file tm4c123fe6pm.h.
#define INT_SYSCTL 44 |
Definition at line 75 of file tm4c123fe6pm.h.
#define INT_SYSEXC 122 |
Definition at line 121 of file tm4c123fe6pm.h.
#define INT_TIMER0A 35 |
Definition at line 67 of file tm4c123fe6pm.h.
#define INT_TIMER0B 36 |
Definition at line 68 of file tm4c123fe6pm.h.
#define INT_TIMER1A 37 |
Definition at line 69 of file tm4c123fe6pm.h.
#define INT_TIMER1B 38 |
Definition at line 70 of file tm4c123fe6pm.h.
#define INT_TIMER2A 39 |
Definition at line 71 of file tm4c123fe6pm.h.
#define INT_TIMER2B 40 |
Definition at line 72 of file tm4c123fe6pm.h.
#define INT_TIMER3A 51 |
Definition at line 82 of file tm4c123fe6pm.h.
#define INT_TIMER3B 52 |
Definition at line 83 of file tm4c123fe6pm.h.
#define INT_TIMER4A 86 |
Definition at line 105 of file tm4c123fe6pm.h.
#define INT_TIMER4B 87 |
Definition at line 106 of file tm4c123fe6pm.h.
#define INT_TIMER5A 108 |
Definition at line 107 of file tm4c123fe6pm.h.
#define INT_TIMER5B 109 |
Definition at line 108 of file tm4c123fe6pm.h.
#define INT_UART0 21 |
Definition at line 53 of file tm4c123fe6pm.h.
#define INT_UART1 22 |
Definition at line 54 of file tm4c123fe6pm.h.
#define INT_UART2 49 |
Definition at line 80 of file tm4c123fe6pm.h.
#define INT_UART3 75 |
Definition at line 98 of file tm4c123fe6pm.h.
#define INT_UART4 76 |
Definition at line 99 of file tm4c123fe6pm.h.
#define INT_UART5 77 |
Definition at line 100 of file tm4c123fe6pm.h.
#define INT_UART6 78 |
Definition at line 101 of file tm4c123fe6pm.h.
#define INT_UART7 79 |
Definition at line 102 of file tm4c123fe6pm.h.
#define INT_UDMA 62 |
Definition at line 90 of file tm4c123fe6pm.h.
#define INT_UDMAERR 63 |
Definition at line 91 of file tm4c123fe6pm.h.
#define INT_USB0 60 |
Definition at line 88 of file tm4c123fe6pm.h.
#define INT_WATCHDOG 34 |
Definition at line 66 of file tm4c123fe6pm.h.
#define INT_WTIMER0A 110 |
Definition at line 109 of file tm4c123fe6pm.h.
#define INT_WTIMER0B 111 |
Definition at line 110 of file tm4c123fe6pm.h.
#define INT_WTIMER1A 112 |
Definition at line 111 of file tm4c123fe6pm.h.
#define INT_WTIMER1B 113 |
Definition at line 112 of file tm4c123fe6pm.h.
#define INT_WTIMER2A 114 |
Definition at line 113 of file tm4c123fe6pm.h.
#define INT_WTIMER2B 115 |
Definition at line 114 of file tm4c123fe6pm.h.
#define INT_WTIMER3A 116 |
Definition at line 115 of file tm4c123fe6pm.h.
#define INT_WTIMER3B 117 |
Definition at line 116 of file tm4c123fe6pm.h.
#define INT_WTIMER4A 118 |
Definition at line 117 of file tm4c123fe6pm.h.
#define INT_WTIMER4B 119 |
Definition at line 118 of file tm4c123fe6pm.h.
#define INT_WTIMER5A 120 |
Definition at line 119 of file tm4c123fe6pm.h.
#define INT_WTIMER5B 121 |
Definition at line 120 of file tm4c123fe6pm.h.
#define NVIC_ACTIVE0_INT_M 0xFFFFFFFF |
Definition at line 11861 of file tm4c123fe6pm.h.
#define NVIC_ACTIVE0_R (*((volatile uint32_t *)0xE000E300)) |
Definition at line 2345 of file tm4c123fe6pm.h.
#define NVIC_ACTIVE1_INT_M 0xFFFFFFFF |
Definition at line 11868 of file tm4c123fe6pm.h.
#define NVIC_ACTIVE1_R (*((volatile uint32_t *)0xE000E304)) |
Definition at line 2346 of file tm4c123fe6pm.h.
#define NVIC_ACTIVE2_INT_M 0xFFFFFFFF |
Definition at line 11875 of file tm4c123fe6pm.h.
#define NVIC_ACTIVE2_R (*((volatile uint32_t *)0xE000E308)) |
Definition at line 2347 of file tm4c123fe6pm.h.
#define NVIC_ACTIVE3_INT_M 0xFFFFFFFF |
Definition at line 11882 of file tm4c123fe6pm.h.
#define NVIC_ACTIVE3_R (*((volatile uint32_t *)0xE000E30C)) |
Definition at line 2348 of file tm4c123fe6pm.h.
#define NVIC_ACTIVE4_INT_M 0x000007FF |
Definition at line 11889 of file tm4c123fe6pm.h.
#define NVIC_ACTIVE4_R (*((volatile uint32_t *)0xE000E310)) |
Definition at line 2349 of file tm4c123fe6pm.h.
#define NVIC_ACTLR_DISFOLD 0x00000004 |
Definition at line 11684 of file tm4c123fe6pm.h.
#define NVIC_ACTLR_DISFPCA 0x00000100 |
Definition at line 11683 of file tm4c123fe6pm.h.
#define NVIC_ACTLR_DISMCYC 0x00000001 |
Definition at line 11686 of file tm4c123fe6pm.h.
#define NVIC_ACTLR_DISOOFP 0x00000200 |
Definition at line 11681 of file tm4c123fe6pm.h.
#define NVIC_ACTLR_DISWBUF 0x00000002 |
Definition at line 11685 of file tm4c123fe6pm.h.
#define NVIC_ACTLR_R (*((volatile uint32_t *)0xE000E008)) |
Definition at line 2321 of file tm4c123fe6pm.h.
#define NVIC_APINT_ENDIANESS 0x00008000 |
Definition at line 12450 of file tm4c123fe6pm.h.
#define NVIC_APINT_PRIGROUP_0_8 0x00000700 |
Definition at line 12459 of file tm4c123fe6pm.h.
#define NVIC_APINT_PRIGROUP_1_7 0x00000600 |
Definition at line 12458 of file tm4c123fe6pm.h.
#define NVIC_APINT_PRIGROUP_2_6 0x00000500 |
Definition at line 12457 of file tm4c123fe6pm.h.
#define NVIC_APINT_PRIGROUP_3_5 0x00000400 |
Definition at line 12456 of file tm4c123fe6pm.h.
#define NVIC_APINT_PRIGROUP_4_4 0x00000300 |
Definition at line 12455 of file tm4c123fe6pm.h.
#define NVIC_APINT_PRIGROUP_5_3 0x00000200 |
Definition at line 12454 of file tm4c123fe6pm.h.
#define NVIC_APINT_PRIGROUP_6_2 0x00000100 |
Definition at line 12453 of file tm4c123fe6pm.h.
#define NVIC_APINT_PRIGROUP_7_1 0x00000000 |
Definition at line 12452 of file tm4c123fe6pm.h.
#define NVIC_APINT_PRIGROUP_M 0x00000700 |
Definition at line 12451 of file tm4c123fe6pm.h.
#define NVIC_APINT_R (*((volatile uint32_t *)0xE000ED0C)) |
Definition at line 2388 of file tm4c123fe6pm.h.
#define NVIC_APINT_SYSRESETREQ 0x00000004 |
Definition at line 12460 of file tm4c123fe6pm.h.
#define NVIC_APINT_VECT_CLR_ACT 0x00000002 |
Definition at line 12461 of file tm4c123fe6pm.h.
#define NVIC_APINT_VECT_RESET 0x00000001 |
Definition at line 12462 of file tm4c123fe6pm.h.
#define NVIC_APINT_VECTKEY 0x05FA0000 |
Definition at line 12449 of file tm4c123fe6pm.h.
#define NVIC_APINT_VECTKEY_M 0xFFFF0000 |
Definition at line 12448 of file tm4c123fe6pm.h.
#define NVIC_CFG_CTRL_BASE_THR 0x00000001 |
Definition at line 12485 of file tm4c123fe6pm.h.
#define NVIC_CFG_CTRL_BFHFNMIGN 0x00000100 |
Definition at line 12480 of file tm4c123fe6pm.h.
#define NVIC_CFG_CTRL_DIV0 0x00000010 |
Definition at line 12482 of file tm4c123fe6pm.h.
#define NVIC_CFG_CTRL_MAIN_PEND 0x00000002 |
Definition at line 12484 of file tm4c123fe6pm.h.
#define NVIC_CFG_CTRL_R (*((volatile uint32_t *)0xE000ED14)) |
Definition at line 2390 of file tm4c123fe6pm.h.
#define NVIC_CFG_CTRL_STKALIGN 0x00000200 |
Definition at line 12478 of file tm4c123fe6pm.h.
#define NVIC_CFG_CTRL_UNALIGNED 0x00000008 |
Definition at line 12483 of file tm4c123fe6pm.h.
#define NVIC_CPAC_CP10_DIS 0x00000000 |
Definition at line 12623 of file tm4c123fe6pm.h.
#define NVIC_CPAC_CP10_FULL 0x00300000 |
Definition at line 12625 of file tm4c123fe6pm.h.
#define NVIC_CPAC_CP10_M 0x00300000 |
Definition at line 12621 of file tm4c123fe6pm.h.
#define NVIC_CPAC_CP10_PRIV 0x00100000 |
Definition at line 12624 of file tm4c123fe6pm.h.
#define NVIC_CPAC_CP11_DIS 0x00000000 |
Definition at line 12618 of file tm4c123fe6pm.h.
#define NVIC_CPAC_CP11_FULL 0x00C00000 |
Definition at line 12620 of file tm4c123fe6pm.h.
#define NVIC_CPAC_CP11_M 0x00C00000 |
Definition at line 12616 of file tm4c123fe6pm.h.
#define NVIC_CPAC_CP11_PRIV 0x00400000 |
Definition at line 12619 of file tm4c123fe6pm.h.
#define NVIC_CPAC_R (*((volatile uint32_t *)0xE000ED88)) |
Definition at line 2400 of file tm4c123fe6pm.h.
#define NVIC_CPUID_CON_M 0x000F0000 |
Definition at line 12397 of file tm4c123fe6pm.h.
#define NVIC_CPUID_IMP_ARM 0x41000000 |
Definition at line 12395 of file tm4c123fe6pm.h.
#define NVIC_CPUID_IMP_M 0xFF000000 |
Definition at line 12394 of file tm4c123fe6pm.h.
#define NVIC_CPUID_PARTNO_CM4 0x0000C240 |
Definition at line 12399 of file tm4c123fe6pm.h.
#define NVIC_CPUID_PARTNO_M 0x0000FFF0 |
Definition at line 12398 of file tm4c123fe6pm.h.
#define NVIC_CPUID_R (*((volatile uint32_t *)0xE000ED00)) |
Definition at line 2385 of file tm4c123fe6pm.h.
#define NVIC_CPUID_REV_M 0x0000000F |
Definition at line 12400 of file tm4c123fe6pm.h.
#define NVIC_CPUID_VAR_M 0x00F00000 |
Definition at line 12396 of file tm4c123fe6pm.h.
#define NVIC_DBG_CTRL_C_DEBUGEN 0x00000001 |
Definition at line 12790 of file tm4c123fe6pm.h.
#define NVIC_DBG_CTRL_C_HALT 0x00000002 |
Definition at line 12789 of file tm4c123fe6pm.h.
#define NVIC_DBG_CTRL_C_MASKINT 0x00000008 |
Definition at line 12787 of file tm4c123fe6pm.h.
#define NVIC_DBG_CTRL_C_SNAPSTALL 0x00000020 |
Definition at line 12785 of file tm4c123fe6pm.h.
#define NVIC_DBG_CTRL_C_STEP 0x00000004 |
Definition at line 12788 of file tm4c123fe6pm.h.
#define NVIC_DBG_CTRL_DBGKEY 0xA05F0000 |
Definition at line 12775 of file tm4c123fe6pm.h.
#define NVIC_DBG_CTRL_DBGKEY_M 0xFFFF0000 |
Definition at line 12774 of file tm4c123fe6pm.h.
#define NVIC_DBG_CTRL_R (*((volatile uint32_t *)0xE000EDF0)) |
Definition at line 2412 of file tm4c123fe6pm.h.
#define NVIC_DBG_CTRL_S_HALT 0x00020000 |
Definition at line 12783 of file tm4c123fe6pm.h.
#define NVIC_DBG_CTRL_S_LOCKUP 0x00080000 |
Definition at line 12781 of file tm4c123fe6pm.h.
#define NVIC_DBG_CTRL_S_REGRDY 0x00010000 |
Definition at line 12784 of file tm4c123fe6pm.h.
#define NVIC_DBG_CTRL_S_RESET_ST 0x02000000 |
Definition at line 12776 of file tm4c123fe6pm.h.
#define NVIC_DBG_CTRL_S_RETIRE_ST 0x01000000 |
Definition at line 12778 of file tm4c123fe6pm.h.
#define NVIC_DBG_CTRL_S_SLEEP 0x00040000 |
Definition at line 12782 of file tm4c123fe6pm.h.
#define NVIC_DBG_DATA_M 0xFFFFFFFF |
Definition at line 12826 of file tm4c123fe6pm.h.
#define NVIC_DBG_DATA_R (*((volatile uint32_t *)0xE000EDF8)) |
Definition at line 2414 of file tm4c123fe6pm.h.
#define NVIC_DBG_DATA_S 0 |
Definition at line 12827 of file tm4c123fe6pm.h.
#define NVIC_DBG_INT_BUSERR 0x00000100 |
Definition at line 12836 of file tm4c123fe6pm.h.
#define NVIC_DBG_INT_CHKERR 0x00000040 |
Definition at line 12838 of file tm4c123fe6pm.h.
#define NVIC_DBG_INT_HARDERR 0x00000400 |
Definition at line 12834 of file tm4c123fe6pm.h.
#define NVIC_DBG_INT_INTERR 0x00000200 |
Definition at line 12835 of file tm4c123fe6pm.h.
#define NVIC_DBG_INT_MMERR 0x00000010 |
Definition at line 12840 of file tm4c123fe6pm.h.
#define NVIC_DBG_INT_NOCPERR 0x00000020 |
Definition at line 12839 of file tm4c123fe6pm.h.
#define NVIC_DBG_INT_R (*((volatile uint32_t *)0xE000EDFC)) |
Definition at line 2415 of file tm4c123fe6pm.h.
#define NVIC_DBG_INT_RESET 0x00000008 |
Definition at line 12841 of file tm4c123fe6pm.h.
#define NVIC_DBG_INT_RSTPENDCLR 0x00000004 |
Definition at line 12842 of file tm4c123fe6pm.h.
#define NVIC_DBG_INT_RSTPENDING 0x00000002 |
Definition at line 12843 of file tm4c123fe6pm.h.
#define NVIC_DBG_INT_RSTVCATCH 0x00000001 |
Definition at line 12844 of file tm4c123fe6pm.h.
#define NVIC_DBG_INT_STATERR 0x00000080 |
Definition at line 12837 of file tm4c123fe6pm.h.
#define NVIC_DBG_XFER_R (*((volatile uint32_t *)0xE000EDF4)) |
Definition at line 2413 of file tm4c123fe6pm.h.
#define NVIC_DBG_XFER_REG_CFBP 0x00000014 |
Definition at line 12819 of file tm4c123fe6pm.h.
#define NVIC_DBG_XFER_REG_DSP 0x00000013 |
Definition at line 12818 of file tm4c123fe6pm.h.
#define NVIC_DBG_XFER_REG_FLAGS 0x00000010 |
Definition at line 12815 of file tm4c123fe6pm.h.
#define NVIC_DBG_XFER_REG_MSP 0x00000011 |
Definition at line 12816 of file tm4c123fe6pm.h.
#define NVIC_DBG_XFER_REG_PSP 0x00000012 |
Definition at line 12817 of file tm4c123fe6pm.h.
#define NVIC_DBG_XFER_REG_R0 0x00000000 |
Definition at line 12799 of file tm4c123fe6pm.h.
#define NVIC_DBG_XFER_REG_R1 0x00000001 |
Definition at line 12800 of file tm4c123fe6pm.h.
#define NVIC_DBG_XFER_REG_R10 0x0000000A |
Definition at line 12809 of file tm4c123fe6pm.h.
#define NVIC_DBG_XFER_REG_R11 0x0000000B |
Definition at line 12810 of file tm4c123fe6pm.h.
#define NVIC_DBG_XFER_REG_R12 0x0000000C |
Definition at line 12811 of file tm4c123fe6pm.h.
#define NVIC_DBG_XFER_REG_R13 0x0000000D |
Definition at line 12812 of file tm4c123fe6pm.h.
#define NVIC_DBG_XFER_REG_R14 0x0000000E |
Definition at line 12813 of file tm4c123fe6pm.h.
#define NVIC_DBG_XFER_REG_R15 0x0000000F |
Definition at line 12814 of file tm4c123fe6pm.h.
#define NVIC_DBG_XFER_REG_R2 0x00000002 |
Definition at line 12801 of file tm4c123fe6pm.h.
#define NVIC_DBG_XFER_REG_R3 0x00000003 |
Definition at line 12802 of file tm4c123fe6pm.h.
#define NVIC_DBG_XFER_REG_R4 0x00000004 |
Definition at line 12803 of file tm4c123fe6pm.h.
#define NVIC_DBG_XFER_REG_R5 0x00000005 |
Definition at line 12804 of file tm4c123fe6pm.h.
#define NVIC_DBG_XFER_REG_R6 0x00000006 |
Definition at line 12805 of file tm4c123fe6pm.h.
#define NVIC_DBG_XFER_REG_R7 0x00000007 |
Definition at line 12806 of file tm4c123fe6pm.h.
#define NVIC_DBG_XFER_REG_R8 0x00000008 |
Definition at line 12807 of file tm4c123fe6pm.h.
#define NVIC_DBG_XFER_REG_R9 0x00000009 |
Definition at line 12808 of file tm4c123fe6pm.h.
#define NVIC_DBG_XFER_REG_SEL_M 0x0000001F |
Definition at line 12798 of file tm4c123fe6pm.h.
#define NVIC_DBG_XFER_REG_WNR 0x00010000 |
Definition at line 12797 of file tm4c123fe6pm.h.
#define NVIC_DEBUG_STAT_BKPT 0x00000002 |
Definition at line 12591 of file tm4c123fe6pm.h.
#define NVIC_DEBUG_STAT_DWTTRAP 0x00000004 |
Definition at line 12590 of file tm4c123fe6pm.h.
#define NVIC_DEBUG_STAT_EXTRNL 0x00000010 |
Definition at line 12588 of file tm4c123fe6pm.h.
#define NVIC_DEBUG_STAT_HALTED 0x00000001 |
Definition at line 12592 of file tm4c123fe6pm.h.
#define NVIC_DEBUG_STAT_R (*((volatile uint32_t *)0xE000ED30)) |
Definition at line 2397 of file tm4c123fe6pm.h.
#define NVIC_DEBUG_STAT_VCATCH 0x00000008 |
Definition at line 12589 of file tm4c123fe6pm.h.
#define NVIC_DIS0_INT_M 0xFFFFFFFF |
Definition at line 11756 of file tm4c123fe6pm.h.
#define NVIC_DIS0_R (*((volatile uint32_t *)0xE000E180)) |
Definition at line 2330 of file tm4c123fe6pm.h.
#define NVIC_DIS1_INT_M 0xFFFFFFFF |
Definition at line 11763 of file tm4c123fe6pm.h.
#define NVIC_DIS1_R (*((volatile uint32_t *)0xE000E184)) |
Definition at line 2331 of file tm4c123fe6pm.h.
#define NVIC_DIS2_INT_M 0xFFFFFFFF |
Definition at line 11770 of file tm4c123fe6pm.h.
#define NVIC_DIS2_R (*((volatile uint32_t *)0xE000E188)) |
Definition at line 2332 of file tm4c123fe6pm.h.
#define NVIC_DIS3_INT_M 0xFFFFFFFF |
Definition at line 11777 of file tm4c123fe6pm.h.
#define NVIC_DIS3_R (*((volatile uint32_t *)0xE000E18C)) |
Definition at line 2333 of file tm4c123fe6pm.h.
#define NVIC_DIS4_INT_M 0x000007FF |
Definition at line 11784 of file tm4c123fe6pm.h.
#define NVIC_DIS4_R (*((volatile uint32_t *)0xE000E190)) |
Definition at line 2334 of file tm4c123fe6pm.h.
#define NVIC_EN0_INT_M 0xFFFFFFFF |
Definition at line 11721 of file tm4c123fe6pm.h.
#define NVIC_EN0_R (*((volatile uint32_t *)0xE000E100)) |
Definition at line 2325 of file tm4c123fe6pm.h.
#define NVIC_EN1_INT_M 0xFFFFFFFF |
Definition at line 11728 of file tm4c123fe6pm.h.
#define NVIC_EN1_R (*((volatile uint32_t *)0xE000E104)) |
Definition at line 2326 of file tm4c123fe6pm.h.
#define NVIC_EN2_INT_M 0xFFFFFFFF |
Definition at line 11735 of file tm4c123fe6pm.h.
#define NVIC_EN2_R (*((volatile uint32_t *)0xE000E108)) |
Definition at line 2327 of file tm4c123fe6pm.h.
#define NVIC_EN3_INT_M 0xFFFFFFFF |
Definition at line 11742 of file tm4c123fe6pm.h.
#define NVIC_EN3_R (*((volatile uint32_t *)0xE000E10C)) |
Definition at line 2328 of file tm4c123fe6pm.h.
#define NVIC_EN4_INT_M 0x000007FF |
Definition at line 11749 of file tm4c123fe6pm.h.
#define NVIC_EN4_R (*((volatile uint32_t *)0xE000E110)) |
Definition at line 2329 of file tm4c123fe6pm.h.
#define NVIC_FAULT_ADDR_M 0xFFFFFFFF |
Definition at line 12608 of file tm4c123fe6pm.h.
#define NVIC_FAULT_ADDR_R (*((volatile uint32_t *)0xE000ED38)) |
Definition at line 2399 of file tm4c123fe6pm.h.
#define NVIC_FAULT_ADDR_S 0 |
Definition at line 12609 of file tm4c123fe6pm.h.
#define NVIC_FAULT_STAT_BFARV 0x00008000 |
Definition at line 12554 of file tm4c123fe6pm.h.
#define NVIC_FAULT_STAT_BLSPERR 0x00002000 |
Definition at line 12555 of file tm4c123fe6pm.h.
#define NVIC_FAULT_STAT_BSTKE 0x00001000 |
Definition at line 12557 of file tm4c123fe6pm.h.
#define NVIC_FAULT_STAT_BUSTKE 0x00000800 |
Definition at line 12558 of file tm4c123fe6pm.h.
#define NVIC_FAULT_STAT_DERR 0x00000002 |
Definition at line 12569 of file tm4c123fe6pm.h.
#define NVIC_FAULT_STAT_DIV0 0x02000000 |
Definition at line 12547 of file tm4c123fe6pm.h.
#define NVIC_FAULT_STAT_IBUS 0x00000100 |
Definition at line 12561 of file tm4c123fe6pm.h.
#define NVIC_FAULT_STAT_IERR 0x00000001 |
Definition at line 12570 of file tm4c123fe6pm.h.
#define NVIC_FAULT_STAT_IMPRE 0x00000400 |
Definition at line 12559 of file tm4c123fe6pm.h.
#define NVIC_FAULT_STAT_INVPC 0x00040000 |
Definition at line 12550 of file tm4c123fe6pm.h.
#define NVIC_FAULT_STAT_INVSTAT 0x00020000 |
Definition at line 12551 of file tm4c123fe6pm.h.
#define NVIC_FAULT_STAT_MLSPERR 0x00000020 |
Definition at line 12564 of file tm4c123fe6pm.h.
#define NVIC_FAULT_STAT_MMARV 0x00000080 |
Definition at line 12562 of file tm4c123fe6pm.h.
#define NVIC_FAULT_STAT_MSTKE 0x00000010 |
Definition at line 12567 of file tm4c123fe6pm.h.
#define NVIC_FAULT_STAT_MUSTKE 0x00000008 |
Definition at line 12568 of file tm4c123fe6pm.h.
#define NVIC_FAULT_STAT_NOCP 0x00080000 |
Definition at line 12549 of file tm4c123fe6pm.h.
#define NVIC_FAULT_STAT_PRECISE 0x00000200 |
Definition at line 12560 of file tm4c123fe6pm.h.
#define NVIC_FAULT_STAT_R (*((volatile uint32_t *)0xE000ED28)) |
Definition at line 2395 of file tm4c123fe6pm.h.
#define NVIC_FAULT_STAT_UNALIGN 0x01000000 |
Definition at line 12548 of file tm4c123fe6pm.h.
#define NVIC_FAULT_STAT_UNDEF 0x00010000 |
Definition at line 12552 of file tm4c123fe6pm.h.
#define NVIC_FPCA_ADDRESS_M 0xFFFFFFF8 |
Definition at line 12875 of file tm4c123fe6pm.h.
#define NVIC_FPCA_ADDRESS_S 3 |
Definition at line 12876 of file tm4c123fe6pm.h.
#define NVIC_FPCA_R (*((volatile uint32_t *)0xE000EF38)) |
Definition at line 2418 of file tm4c123fe6pm.h.
#define NVIC_FPCC_ASPEN 0x80000000 |
Definition at line 12859 of file tm4c123fe6pm.h.
#define NVIC_FPCC_BFRDY 0x00000040 |
Definition at line 12863 of file tm4c123fe6pm.h.
#define NVIC_FPCC_HFRDY 0x00000010 |
Definition at line 12865 of file tm4c123fe6pm.h.
#define NVIC_FPCC_LSPACT 0x00000001 |
Definition at line 12868 of file tm4c123fe6pm.h.
#define NVIC_FPCC_LSPEN 0x40000000 |
Definition at line 12861 of file tm4c123fe6pm.h.
#define NVIC_FPCC_MMRDY 0x00000020 |
Definition at line 12864 of file tm4c123fe6pm.h.
#define NVIC_FPCC_MONRDY 0x00000100 |
Definition at line 12862 of file tm4c123fe6pm.h.
#define NVIC_FPCC_R (*((volatile uint32_t *)0xE000EF34)) |
Definition at line 2417 of file tm4c123fe6pm.h.
#define NVIC_FPCC_THREAD 0x00000008 |
Definition at line 12866 of file tm4c123fe6pm.h.
#define NVIC_FPCC_USER 0x00000002 |
Definition at line 12867 of file tm4c123fe6pm.h.
#define NVIC_FPDSC_AHP 0x04000000 |
Definition at line 12883 of file tm4c123fe6pm.h.
#define NVIC_FPDSC_DN 0x02000000 |
Definition at line 12884 of file tm4c123fe6pm.h.
#define NVIC_FPDSC_FZ 0x01000000 |
Definition at line 12885 of file tm4c123fe6pm.h.
#define NVIC_FPDSC_R (*((volatile uint32_t *)0xE000EF3C)) |
Definition at line 2419 of file tm4c123fe6pm.h.
#define NVIC_FPDSC_RMODE_M 0x00C00000 |
Definition at line 12886 of file tm4c123fe6pm.h.
#define NVIC_FPDSC_RMODE_RM 0x00800000 |
Definition at line 12890 of file tm4c123fe6pm.h.
#define NVIC_FPDSC_RMODE_RN 0x00000000 |
Definition at line 12887 of file tm4c123fe6pm.h.
#define NVIC_FPDSC_RMODE_RP 0x00400000 |
Definition at line 12888 of file tm4c123fe6pm.h.
#define NVIC_FPDSC_RMODE_RZ 0x00C00000 |
Definition at line 12892 of file tm4c123fe6pm.h.
#define NVIC_HFAULT_STAT_DBG 0x80000000 |
Definition at line 12578 of file tm4c123fe6pm.h.
#define NVIC_HFAULT_STAT_FORCED 0x40000000 |
Definition at line 12579 of file tm4c123fe6pm.h.
#define NVIC_HFAULT_STAT_R (*((volatile uint32_t *)0xE000ED2C)) |
Definition at line 2396 of file tm4c123fe6pm.h.
#define NVIC_HFAULT_STAT_VECT 0x00000002 |
Definition at line 12580 of file tm4c123fe6pm.h.
#define NVIC_INT_CTRL_ISR_PEND 0x00400000 |
Definition at line 12413 of file tm4c123fe6pm.h.
#define NVIC_INT_CTRL_ISR_PRE 0x00800000 |
Definition at line 12412 of file tm4c123fe6pm.h.
#define NVIC_INT_CTRL_NMI_SET 0x80000000 |
Definition at line 12407 of file tm4c123fe6pm.h.
#define NVIC_INT_CTRL_PEND_SV 0x10000000 |
Definition at line 12408 of file tm4c123fe6pm.h.
#define NVIC_INT_CTRL_PENDSTCLR 0x02000000 |
Definition at line 12411 of file tm4c123fe6pm.h.
#define NVIC_INT_CTRL_PENDSTSET 0x04000000 |
Definition at line 12410 of file tm4c123fe6pm.h.
#define NVIC_INT_CTRL_R (*((volatile uint32_t *)0xE000ED04)) |
Definition at line 2386 of file tm4c123fe6pm.h.
#define NVIC_INT_CTRL_RET_BASE 0x00000800 |
Definition at line 12431 of file tm4c123fe6pm.h.
#define NVIC_INT_CTRL_UNPEND_SV 0x08000000 |
Definition at line 12409 of file tm4c123fe6pm.h.
#define NVIC_INT_CTRL_VEC_ACT_M 0x000000FF |
Definition at line 12432 of file tm4c123fe6pm.h.
#define NVIC_INT_CTRL_VEC_ACT_S 0 |
Definition at line 12433 of file tm4c123fe6pm.h.
#define NVIC_INT_CTRL_VEC_PEN_BUS 0x00005000 |
Definition at line 12421 of file tm4c123fe6pm.h.
#define NVIC_INT_CTRL_VEC_PEN_HARD 0x00003000 |
Definition at line 12417 of file tm4c123fe6pm.h.
#define NVIC_INT_CTRL_VEC_PEN_M 0x000FF000 |
Definition at line 12414 of file tm4c123fe6pm.h.
#define NVIC_INT_CTRL_VEC_PEN_MEM 0x00004000 |
Definition at line 12419 of file tm4c123fe6pm.h.
#define NVIC_INT_CTRL_VEC_PEN_NMI 0x00002000 |
Definition at line 12415 of file tm4c123fe6pm.h.
#define NVIC_INT_CTRL_VEC_PEN_PNDSV 0x0000E000 |
Definition at line 12427 of file tm4c123fe6pm.h.
#define NVIC_INT_CTRL_VEC_PEN_SVC 0x0000B000 |
Definition at line 12425 of file tm4c123fe6pm.h.
#define NVIC_INT_CTRL_VEC_PEN_TICK 0x0000F000 |
Definition at line 12429 of file tm4c123fe6pm.h.
#define NVIC_INT_CTRL_VEC_PEN_USG 0x00006000 |
Definition at line 12423 of file tm4c123fe6pm.h.
#define NVIC_MM_ADDR_M 0xFFFFFFFF |
Definition at line 12599 of file tm4c123fe6pm.h.
#define NVIC_MM_ADDR_R (*((volatile uint32_t *)0xE000ED34)) |
Definition at line 2398 of file tm4c123fe6pm.h.
#define NVIC_MM_ADDR_S 0 |
Definition at line 12600 of file tm4c123fe6pm.h.
#define NVIC_MPU_ATTR1_AP_M 0x07000000 |
Definition at line 12699 of file tm4c123fe6pm.h.
#define NVIC_MPU_ATTR1_BUFFRABLE 0x00010000 |
Definition at line 12705 of file tm4c123fe6pm.h.
#define NVIC_MPU_ATTR1_CACHEABLE 0x00020000 |
Definition at line 12703 of file tm4c123fe6pm.h.
#define NVIC_MPU_ATTR1_ENABLE 0x00000001 |
Definition at line 12709 of file tm4c123fe6pm.h.
#define NVIC_MPU_ATTR1_R (*((volatile uint32_t *)0xE000EDA8)) |
Definition at line 2407 of file tm4c123fe6pm.h.
#define NVIC_MPU_ATTR1_SHAREABLE 0x00040000 |
Definition at line 12701 of file tm4c123fe6pm.h.
#define NVIC_MPU_ATTR1_SIZE_M 0x0000003E |
Definition at line 12708 of file tm4c123fe6pm.h.
#define NVIC_MPU_ATTR1_SRD_M 0x0000FF00 |
Definition at line 12707 of file tm4c123fe6pm.h.
#define NVIC_MPU_ATTR1_TEX_M 0x00380000 |
Definition at line 12700 of file tm4c123fe6pm.h.
#define NVIC_MPU_ATTR1_XN 0x10000000 |
Definition at line 12698 of file tm4c123fe6pm.h.
#define NVIC_MPU_ATTR2_AP_M 0x07000000 |
Definition at line 12728 of file tm4c123fe6pm.h.
#define NVIC_MPU_ATTR2_BUFFRABLE 0x00010000 |
Definition at line 12734 of file tm4c123fe6pm.h.
#define NVIC_MPU_ATTR2_CACHEABLE 0x00020000 |
Definition at line 12732 of file tm4c123fe6pm.h.
#define NVIC_MPU_ATTR2_ENABLE 0x00000001 |
Definition at line 12738 of file tm4c123fe6pm.h.
#define NVIC_MPU_ATTR2_R (*((volatile uint32_t *)0xE000EDB0)) |
Definition at line 2409 of file tm4c123fe6pm.h.
#define NVIC_MPU_ATTR2_SHAREABLE 0x00040000 |
Definition at line 12730 of file tm4c123fe6pm.h.
#define NVIC_MPU_ATTR2_SIZE_M 0x0000003E |
Definition at line 12737 of file tm4c123fe6pm.h.
#define NVIC_MPU_ATTR2_SRD_M 0x0000FF00 |
Definition at line 12736 of file tm4c123fe6pm.h.
#define NVIC_MPU_ATTR2_TEX_M 0x00380000 |
Definition at line 12729 of file tm4c123fe6pm.h.
#define NVIC_MPU_ATTR2_XN 0x10000000 |
Definition at line 12727 of file tm4c123fe6pm.h.
#define NVIC_MPU_ATTR3_AP_M 0x07000000 |
Definition at line 12757 of file tm4c123fe6pm.h.
#define NVIC_MPU_ATTR3_BUFFRABLE 0x00010000 |
Definition at line 12763 of file tm4c123fe6pm.h.
#define NVIC_MPU_ATTR3_CACHEABLE 0x00020000 |
Definition at line 12761 of file tm4c123fe6pm.h.
#define NVIC_MPU_ATTR3_ENABLE 0x00000001 |
Definition at line 12767 of file tm4c123fe6pm.h.
#define NVIC_MPU_ATTR3_R (*((volatile uint32_t *)0xE000EDB8)) |
Definition at line 2411 of file tm4c123fe6pm.h.
#define NVIC_MPU_ATTR3_SHAREABLE 0x00040000 |
Definition at line 12759 of file tm4c123fe6pm.h.
#define NVIC_MPU_ATTR3_SIZE_M 0x0000003E |
Definition at line 12766 of file tm4c123fe6pm.h.
#define NVIC_MPU_ATTR3_SRD_M 0x0000FF00 |
Definition at line 12765 of file tm4c123fe6pm.h.
#define NVIC_MPU_ATTR3_TEX_M 0x00380000 |
Definition at line 12758 of file tm4c123fe6pm.h.
#define NVIC_MPU_ATTR3_XN 0x10000000 |
Definition at line 12756 of file tm4c123fe6pm.h.
#define NVIC_MPU_ATTR_AP_M 0x07000000 |
Definition at line 12673 of file tm4c123fe6pm.h.
#define NVIC_MPU_ATTR_BUFFRABLE 0x00010000 |
Definition at line 12677 of file tm4c123fe6pm.h.
#define NVIC_MPU_ATTR_CACHEABLE 0x00020000 |
Definition at line 12676 of file tm4c123fe6pm.h.
#define NVIC_MPU_ATTR_ENABLE 0x00000001 |
Definition at line 12680 of file tm4c123fe6pm.h.
#define NVIC_MPU_ATTR_R (*((volatile uint32_t *)0xE000EDA0)) |
Definition at line 2405 of file tm4c123fe6pm.h.
#define NVIC_MPU_ATTR_SHAREABLE 0x00040000 |
Definition at line 12675 of file tm4c123fe6pm.h.
#define NVIC_MPU_ATTR_SIZE_M 0x0000003E |
Definition at line 12679 of file tm4c123fe6pm.h.
#define NVIC_MPU_ATTR_SRD_M 0x0000FF00 |
Definition at line 12678 of file tm4c123fe6pm.h.
#define NVIC_MPU_ATTR_TEX_M 0x00380000 |
Definition at line 12674 of file tm4c123fe6pm.h.
#define NVIC_MPU_ATTR_XN 0x10000000 |
Definition at line 12672 of file tm4c123fe6pm.h.
#define NVIC_MPU_BASE1_ADDR_M 0xFFFFFFE0 |
Definition at line 12687 of file tm4c123fe6pm.h.
#define NVIC_MPU_BASE1_ADDR_S 5 |
Definition at line 12690 of file tm4c123fe6pm.h.
#define NVIC_MPU_BASE1_R (*((volatile uint32_t *)0xE000EDA4)) |
Definition at line 2406 of file tm4c123fe6pm.h.
#define NVIC_MPU_BASE1_REGION_M 0x00000007 |
Definition at line 12689 of file tm4c123fe6pm.h.
#define NVIC_MPU_BASE1_REGION_S 0 |
Definition at line 12691 of file tm4c123fe6pm.h.
#define NVIC_MPU_BASE1_VALID 0x00000010 |
Definition at line 12688 of file tm4c123fe6pm.h.
#define NVIC_MPU_BASE2_ADDR_M 0xFFFFFFE0 |
Definition at line 12716 of file tm4c123fe6pm.h.
#define NVIC_MPU_BASE2_ADDR_S 5 |
Definition at line 12719 of file tm4c123fe6pm.h.
#define NVIC_MPU_BASE2_R (*((volatile uint32_t *)0xE000EDAC)) |
Definition at line 2408 of file tm4c123fe6pm.h.
#define NVIC_MPU_BASE2_REGION_M 0x00000007 |
Definition at line 12718 of file tm4c123fe6pm.h.
#define NVIC_MPU_BASE2_REGION_S 0 |
Definition at line 12720 of file tm4c123fe6pm.h.
#define NVIC_MPU_BASE2_VALID 0x00000010 |
Definition at line 12717 of file tm4c123fe6pm.h.
#define NVIC_MPU_BASE3_ADDR_M 0xFFFFFFE0 |
Definition at line 12745 of file tm4c123fe6pm.h.
#define NVIC_MPU_BASE3_ADDR_S 5 |
Definition at line 12748 of file tm4c123fe6pm.h.
#define NVIC_MPU_BASE3_R (*((volatile uint32_t *)0xE000EDB4)) |
Definition at line 2410 of file tm4c123fe6pm.h.
#define NVIC_MPU_BASE3_REGION_M 0x00000007 |
Definition at line 12747 of file tm4c123fe6pm.h.
#define NVIC_MPU_BASE3_REGION_S 0 |
Definition at line 12749 of file tm4c123fe6pm.h.
#define NVIC_MPU_BASE3_VALID 0x00000010 |
Definition at line 12746 of file tm4c123fe6pm.h.
#define NVIC_MPU_BASE_ADDR_M 0xFFFFFFE0 |
Definition at line 12661 of file tm4c123fe6pm.h.
#define NVIC_MPU_BASE_ADDR_S 5 |
Definition at line 12664 of file tm4c123fe6pm.h.
#define NVIC_MPU_BASE_R (*((volatile uint32_t *)0xE000ED9C)) |
Definition at line 2404 of file tm4c123fe6pm.h.
#define NVIC_MPU_BASE_REGION_M 0x00000007 |
Definition at line 12663 of file tm4c123fe6pm.h.
#define NVIC_MPU_BASE_REGION_S 0 |
Definition at line 12665 of file tm4c123fe6pm.h.
#define NVIC_MPU_BASE_VALID 0x00000010 |
Definition at line 12662 of file tm4c123fe6pm.h.
#define NVIC_MPU_CTRL_ENABLE 0x00000001 |
Definition at line 12645 of file tm4c123fe6pm.h.
#define NVIC_MPU_CTRL_HFNMIENA 0x00000002 |
Definition at line 12644 of file tm4c123fe6pm.h.
#define NVIC_MPU_CTRL_PRIVDEFEN 0x00000004 |
Definition at line 12643 of file tm4c123fe6pm.h.
#define NVIC_MPU_CTRL_R (*((volatile uint32_t *)0xE000ED94)) |
Definition at line 2402 of file tm4c123fe6pm.h.
#define NVIC_MPU_NUMBER_M 0x00000007 |
Definition at line 12653 of file tm4c123fe6pm.h.
#define NVIC_MPU_NUMBER_R (*((volatile uint32_t *)0xE000ED98)) |
Definition at line 2403 of file tm4c123fe6pm.h.
#define NVIC_MPU_NUMBER_S 0 |
Definition at line 12654 of file tm4c123fe6pm.h.
#define NVIC_MPU_TYPE_DREGION_M 0x0000FF00 |
Definition at line 12633 of file tm4c123fe6pm.h.
#define NVIC_MPU_TYPE_DREGION_S 8 |
Definition at line 12636 of file tm4c123fe6pm.h.
#define NVIC_MPU_TYPE_IREGION_M 0x00FF0000 |
Definition at line 12632 of file tm4c123fe6pm.h.
#define NVIC_MPU_TYPE_IREGION_S 16 |
Definition at line 12635 of file tm4c123fe6pm.h.
#define NVIC_MPU_TYPE_R (*((volatile uint32_t *)0xE000ED90)) |
Definition at line 2401 of file tm4c123fe6pm.h.
#define NVIC_MPU_TYPE_SEPARATE 0x00000001 |
Definition at line 12634 of file tm4c123fe6pm.h.
#define NVIC_PEND0_INT_M 0xFFFFFFFF |
Definition at line 11791 of file tm4c123fe6pm.h.
#define NVIC_PEND0_R (*((volatile uint32_t *)0xE000E200)) |
Definition at line 2335 of file tm4c123fe6pm.h.
#define NVIC_PEND1_INT_M 0xFFFFFFFF |
Definition at line 11798 of file tm4c123fe6pm.h.
#define NVIC_PEND1_R (*((volatile uint32_t *)0xE000E204)) |
Definition at line 2336 of file tm4c123fe6pm.h.
#define NVIC_PEND2_INT_M 0xFFFFFFFF |
Definition at line 11805 of file tm4c123fe6pm.h.
#define NVIC_PEND2_R (*((volatile uint32_t *)0xE000E208)) |
Definition at line 2337 of file tm4c123fe6pm.h.
#define NVIC_PEND3_INT_M 0xFFFFFFFF |
Definition at line 11812 of file tm4c123fe6pm.h.
#define NVIC_PEND3_R (*((volatile uint32_t *)0xE000E20C)) |
Definition at line 2338 of file tm4c123fe6pm.h.
#define NVIC_PEND4_INT_M 0x000007FF |
Definition at line 11819 of file tm4c123fe6pm.h.
#define NVIC_PEND4_R (*((volatile uint32_t *)0xE000E210)) |
Definition at line 2339 of file tm4c123fe6pm.h.
#define NVIC_PRI0_INT0_M 0x000000E0 |
Definition at line 11899 of file tm4c123fe6pm.h.
#define NVIC_PRI0_INT0_S 5 |
Definition at line 11903 of file tm4c123fe6pm.h.
#define NVIC_PRI0_INT1_M 0x0000E000 |
Definition at line 11898 of file tm4c123fe6pm.h.
#define NVIC_PRI0_INT1_S 13 |
Definition at line 11902 of file tm4c123fe6pm.h.
#define NVIC_PRI0_INT2_M 0x00E00000 |
Definition at line 11897 of file tm4c123fe6pm.h.
#define NVIC_PRI0_INT2_S 21 |
Definition at line 11901 of file tm4c123fe6pm.h.
#define NVIC_PRI0_INT3_M 0xE0000000 |
Definition at line 11896 of file tm4c123fe6pm.h.
#define NVIC_PRI0_INT3_S 29 |
Definition at line 11900 of file tm4c123fe6pm.h.
#define NVIC_PRI0_R (*((volatile uint32_t *)0xE000E400)) |
Definition at line 2350 of file tm4c123fe6pm.h.
#define NVIC_PRI10_INT40_M 0x000000E0 |
Definition at line 12039 of file tm4c123fe6pm.h.
#define NVIC_PRI10_INT40_S 5 |
Definition at line 12043 of file tm4c123fe6pm.h.
#define NVIC_PRI10_INT41_M 0x0000E000 |
Definition at line 12038 of file tm4c123fe6pm.h.
#define NVIC_PRI10_INT41_S 13 |
Definition at line 12042 of file tm4c123fe6pm.h.
#define NVIC_PRI10_INT42_M 0x00E00000 |
Definition at line 12037 of file tm4c123fe6pm.h.
#define NVIC_PRI10_INT42_S 21 |
Definition at line 12041 of file tm4c123fe6pm.h.
#define NVIC_PRI10_INT43_M 0xE0000000 |
Definition at line 12036 of file tm4c123fe6pm.h.
#define NVIC_PRI10_INT43_S 29 |
Definition at line 12040 of file tm4c123fe6pm.h.
#define NVIC_PRI10_R (*((volatile uint32_t *)0xE000E428)) |
Definition at line 2360 of file tm4c123fe6pm.h.
#define NVIC_PRI11_INT44_M 0x000000E0 |
Definition at line 12053 of file tm4c123fe6pm.h.
#define NVIC_PRI11_INT44_S 5 |
Definition at line 12057 of file tm4c123fe6pm.h.
#define NVIC_PRI11_INT45_M 0x0000E000 |
Definition at line 12052 of file tm4c123fe6pm.h.
#define NVIC_PRI11_INT45_S 13 |
Definition at line 12056 of file tm4c123fe6pm.h.
#define NVIC_PRI11_INT46_M 0x00E00000 |
Definition at line 12051 of file tm4c123fe6pm.h.
#define NVIC_PRI11_INT46_S 21 |
Definition at line 12055 of file tm4c123fe6pm.h.
#define NVIC_PRI11_INT47_M 0xE0000000 |
Definition at line 12050 of file tm4c123fe6pm.h.
#define NVIC_PRI11_INT47_S 29 |
Definition at line 12054 of file tm4c123fe6pm.h.
#define NVIC_PRI11_R (*((volatile uint32_t *)0xE000E42C)) |
Definition at line 2361 of file tm4c123fe6pm.h.
#define NVIC_PRI12_INT48_M 0x000000E0 |
Definition at line 12067 of file tm4c123fe6pm.h.
#define NVIC_PRI12_INT48_S 5 |
Definition at line 12071 of file tm4c123fe6pm.h.
#define NVIC_PRI12_INT49_M 0x0000E000 |
Definition at line 12066 of file tm4c123fe6pm.h.
#define NVIC_PRI12_INT49_S 13 |
Definition at line 12070 of file tm4c123fe6pm.h.
#define NVIC_PRI12_INT50_M 0x00E00000 |
Definition at line 12065 of file tm4c123fe6pm.h.
#define NVIC_PRI12_INT50_S 21 |
Definition at line 12069 of file tm4c123fe6pm.h.
#define NVIC_PRI12_INT51_M 0xE0000000 |
Definition at line 12064 of file tm4c123fe6pm.h.
#define NVIC_PRI12_INT51_S 29 |
Definition at line 12068 of file tm4c123fe6pm.h.
#define NVIC_PRI12_R (*((volatile uint32_t *)0xE000E430)) |
Definition at line 2362 of file tm4c123fe6pm.h.
#define NVIC_PRI13_INT52_M 0x000000E0 |
Definition at line 12081 of file tm4c123fe6pm.h.
#define NVIC_PRI13_INT52_S 5 |
Definition at line 12085 of file tm4c123fe6pm.h.
#define NVIC_PRI13_INT53_M 0x0000E000 |
Definition at line 12080 of file tm4c123fe6pm.h.
#define NVIC_PRI13_INT53_S 13 |
Definition at line 12084 of file tm4c123fe6pm.h.
#define NVIC_PRI13_INT54_M 0x00E00000 |
Definition at line 12079 of file tm4c123fe6pm.h.
#define NVIC_PRI13_INT54_S 21 |
Definition at line 12083 of file tm4c123fe6pm.h.
#define NVIC_PRI13_INT55_M 0xE0000000 |
Definition at line 12078 of file tm4c123fe6pm.h.
#define NVIC_PRI13_INT55_S 29 |
Definition at line 12082 of file tm4c123fe6pm.h.
#define NVIC_PRI13_R (*((volatile uint32_t *)0xE000E434)) |
Definition at line 2363 of file tm4c123fe6pm.h.
#define NVIC_PRI14_INTA_M 0x000000E0 |
Definition at line 12095 of file tm4c123fe6pm.h.
#define NVIC_PRI14_INTA_S 5 |
Definition at line 12099 of file tm4c123fe6pm.h.
#define NVIC_PRI14_INTB_M 0x0000E000 |
Definition at line 12094 of file tm4c123fe6pm.h.
#define NVIC_PRI14_INTB_S 13 |
Definition at line 12098 of file tm4c123fe6pm.h.
#define NVIC_PRI14_INTC_M 0x00E00000 |
Definition at line 12093 of file tm4c123fe6pm.h.
#define NVIC_PRI14_INTC_S 21 |
Definition at line 12097 of file tm4c123fe6pm.h.
#define NVIC_PRI14_INTD_M 0xE0000000 |
Definition at line 12092 of file tm4c123fe6pm.h.
#define NVIC_PRI14_INTD_S 29 |
Definition at line 12096 of file tm4c123fe6pm.h.
#define NVIC_PRI14_R (*((volatile uint32_t *)0xE000E438)) |
Definition at line 2364 of file tm4c123fe6pm.h.
#define NVIC_PRI15_INTA_M 0x000000E0 |
Definition at line 12109 of file tm4c123fe6pm.h.
#define NVIC_PRI15_INTA_S 5 |
Definition at line 12113 of file tm4c123fe6pm.h.
#define NVIC_PRI15_INTB_M 0x0000E000 |
Definition at line 12108 of file tm4c123fe6pm.h.
#define NVIC_PRI15_INTB_S 13 |
Definition at line 12112 of file tm4c123fe6pm.h.
#define NVIC_PRI15_INTC_M 0x00E00000 |
Definition at line 12107 of file tm4c123fe6pm.h.
#define NVIC_PRI15_INTC_S 21 |
Definition at line 12111 of file tm4c123fe6pm.h.
#define NVIC_PRI15_INTD_M 0xE0000000 |
Definition at line 12106 of file tm4c123fe6pm.h.
#define NVIC_PRI15_INTD_S 29 |
Definition at line 12110 of file tm4c123fe6pm.h.
#define NVIC_PRI15_R (*((volatile uint32_t *)0xE000E43C)) |
Definition at line 2365 of file tm4c123fe6pm.h.
#define NVIC_PRI16_INTA_M 0x000000E0 |
Definition at line 12123 of file tm4c123fe6pm.h.
#define NVIC_PRI16_INTA_S 5 |
Definition at line 12127 of file tm4c123fe6pm.h.
#define NVIC_PRI16_INTB_M 0x0000E000 |
Definition at line 12122 of file tm4c123fe6pm.h.
#define NVIC_PRI16_INTB_S 13 |
Definition at line 12126 of file tm4c123fe6pm.h.
#define NVIC_PRI16_INTC_M 0x00E00000 |
Definition at line 12121 of file tm4c123fe6pm.h.
#define NVIC_PRI16_INTC_S 21 |
Definition at line 12125 of file tm4c123fe6pm.h.
#define NVIC_PRI16_INTD_M 0xE0000000 |
Definition at line 12120 of file tm4c123fe6pm.h.
#define NVIC_PRI16_INTD_S 29 |
Definition at line 12124 of file tm4c123fe6pm.h.
#define NVIC_PRI16_R (*((volatile uint32_t *)0xE000E440)) |
Definition at line 2366 of file tm4c123fe6pm.h.
#define NVIC_PRI17_INTA_M 0x000000E0 |
Definition at line 12137 of file tm4c123fe6pm.h.
#define NVIC_PRI17_INTA_S 5 |
Definition at line 12141 of file tm4c123fe6pm.h.
#define NVIC_PRI17_INTB_M 0x0000E000 |
Definition at line 12136 of file tm4c123fe6pm.h.
#define NVIC_PRI17_INTB_S 13 |
Definition at line 12140 of file tm4c123fe6pm.h.
#define NVIC_PRI17_INTC_M 0x00E00000 |
Definition at line 12135 of file tm4c123fe6pm.h.
#define NVIC_PRI17_INTC_S 21 |
Definition at line 12139 of file tm4c123fe6pm.h.
#define NVIC_PRI17_INTD_M 0xE0000000 |
Definition at line 12134 of file tm4c123fe6pm.h.
#define NVIC_PRI17_INTD_S 29 |
Definition at line 12138 of file tm4c123fe6pm.h.
#define NVIC_PRI17_R (*((volatile uint32_t *)0xE000E444)) |
Definition at line 2367 of file tm4c123fe6pm.h.
#define NVIC_PRI18_INTA_M 0x000000E0 |
Definition at line 12151 of file tm4c123fe6pm.h.
#define NVIC_PRI18_INTA_S 5 |
Definition at line 12155 of file tm4c123fe6pm.h.
#define NVIC_PRI18_INTB_M 0x0000E000 |
Definition at line 12150 of file tm4c123fe6pm.h.
#define NVIC_PRI18_INTB_S 13 |
Definition at line 12154 of file tm4c123fe6pm.h.
#define NVIC_PRI18_INTC_M 0x00E00000 |
Definition at line 12149 of file tm4c123fe6pm.h.
#define NVIC_PRI18_INTC_S 21 |
Definition at line 12153 of file tm4c123fe6pm.h.
#define NVIC_PRI18_INTD_M 0xE0000000 |
Definition at line 12148 of file tm4c123fe6pm.h.
#define NVIC_PRI18_INTD_S 29 |
Definition at line 12152 of file tm4c123fe6pm.h.
#define NVIC_PRI18_R (*((volatile uint32_t *)0xE000E448)) |
Definition at line 2368 of file tm4c123fe6pm.h.
#define NVIC_PRI19_INTA_M 0x000000E0 |
Definition at line 12165 of file tm4c123fe6pm.h.
#define NVIC_PRI19_INTA_S 5 |
Definition at line 12169 of file tm4c123fe6pm.h.
#define NVIC_PRI19_INTB_M 0x0000E000 |
Definition at line 12164 of file tm4c123fe6pm.h.
#define NVIC_PRI19_INTB_S 13 |
Definition at line 12168 of file tm4c123fe6pm.h.
#define NVIC_PRI19_INTC_M 0x00E00000 |
Definition at line 12163 of file tm4c123fe6pm.h.
#define NVIC_PRI19_INTC_S 21 |
Definition at line 12167 of file tm4c123fe6pm.h.
#define NVIC_PRI19_INTD_M 0xE0000000 |
Definition at line 12162 of file tm4c123fe6pm.h.
#define NVIC_PRI19_INTD_S 29 |
Definition at line 12166 of file tm4c123fe6pm.h.
#define NVIC_PRI19_R (*((volatile uint32_t *)0xE000E44C)) |
Definition at line 2369 of file tm4c123fe6pm.h.
#define NVIC_PRI1_INT4_M 0x000000E0 |
Definition at line 11913 of file tm4c123fe6pm.h.
#define NVIC_PRI1_INT4_S 5 |
Definition at line 11917 of file tm4c123fe6pm.h.
#define NVIC_PRI1_INT5_M 0x0000E000 |
Definition at line 11912 of file tm4c123fe6pm.h.
#define NVIC_PRI1_INT5_S 13 |
Definition at line 11916 of file tm4c123fe6pm.h.
#define NVIC_PRI1_INT6_M 0x00E00000 |
Definition at line 11911 of file tm4c123fe6pm.h.
#define NVIC_PRI1_INT6_S 21 |
Definition at line 11915 of file tm4c123fe6pm.h.
#define NVIC_PRI1_INT7_M 0xE0000000 |
Definition at line 11910 of file tm4c123fe6pm.h.
#define NVIC_PRI1_INT7_S 29 |
Definition at line 11914 of file tm4c123fe6pm.h.
#define NVIC_PRI1_R (*((volatile uint32_t *)0xE000E404)) |
Definition at line 2351 of file tm4c123fe6pm.h.
#define NVIC_PRI20_INTA_M 0x000000E0 |
Definition at line 12179 of file tm4c123fe6pm.h.
#define NVIC_PRI20_INTA_S 5 |
Definition at line 12183 of file tm4c123fe6pm.h.
#define NVIC_PRI20_INTB_M 0x0000E000 |
Definition at line 12178 of file tm4c123fe6pm.h.
#define NVIC_PRI20_INTB_S 13 |
Definition at line 12182 of file tm4c123fe6pm.h.
#define NVIC_PRI20_INTC_M 0x00E00000 |
Definition at line 12177 of file tm4c123fe6pm.h.
#define NVIC_PRI20_INTC_S 21 |
Definition at line 12181 of file tm4c123fe6pm.h.
#define NVIC_PRI20_INTD_M 0xE0000000 |
Definition at line 12176 of file tm4c123fe6pm.h.
#define NVIC_PRI20_INTD_S 29 |
Definition at line 12180 of file tm4c123fe6pm.h.
#define NVIC_PRI20_R (*((volatile uint32_t *)0xE000E450)) |
Definition at line 2370 of file tm4c123fe6pm.h.
#define NVIC_PRI21_INTA_M 0x000000E0 |
Definition at line 12193 of file tm4c123fe6pm.h.
#define NVIC_PRI21_INTA_S 5 |
Definition at line 12197 of file tm4c123fe6pm.h.
#define NVIC_PRI21_INTB_M 0x0000E000 |
Definition at line 12192 of file tm4c123fe6pm.h.
#define NVIC_PRI21_INTB_S 13 |
Definition at line 12196 of file tm4c123fe6pm.h.
#define NVIC_PRI21_INTC_M 0x00E00000 |
Definition at line 12191 of file tm4c123fe6pm.h.
#define NVIC_PRI21_INTC_S 21 |
Definition at line 12195 of file tm4c123fe6pm.h.
#define NVIC_PRI21_INTD_M 0xE0000000 |
Definition at line 12190 of file tm4c123fe6pm.h.
#define NVIC_PRI21_INTD_S 29 |
Definition at line 12194 of file tm4c123fe6pm.h.
#define NVIC_PRI21_R (*((volatile uint32_t *)0xE000E454)) |
Definition at line 2371 of file tm4c123fe6pm.h.
#define NVIC_PRI22_INTA_M 0x000000E0 |
Definition at line 12207 of file tm4c123fe6pm.h.
#define NVIC_PRI22_INTA_S 5 |
Definition at line 12211 of file tm4c123fe6pm.h.
#define NVIC_PRI22_INTB_M 0x0000E000 |
Definition at line 12206 of file tm4c123fe6pm.h.
#define NVIC_PRI22_INTB_S 13 |
Definition at line 12210 of file tm4c123fe6pm.h.
#define NVIC_PRI22_INTC_M 0x00E00000 |
Definition at line 12205 of file tm4c123fe6pm.h.
#define NVIC_PRI22_INTC_S 21 |
Definition at line 12209 of file tm4c123fe6pm.h.
#define NVIC_PRI22_INTD_M 0xE0000000 |
Definition at line 12204 of file tm4c123fe6pm.h.
#define NVIC_PRI22_INTD_S 29 |
Definition at line 12208 of file tm4c123fe6pm.h.
#define NVIC_PRI22_R (*((volatile uint32_t *)0xE000E458)) |
Definition at line 2372 of file tm4c123fe6pm.h.
#define NVIC_PRI23_INTA_M 0x000000E0 |
Definition at line 12221 of file tm4c123fe6pm.h.
#define NVIC_PRI23_INTA_S 5 |
Definition at line 12225 of file tm4c123fe6pm.h.
#define NVIC_PRI23_INTB_M 0x0000E000 |
Definition at line 12220 of file tm4c123fe6pm.h.
#define NVIC_PRI23_INTB_S 13 |
Definition at line 12224 of file tm4c123fe6pm.h.
#define NVIC_PRI23_INTC_M 0x00E00000 |
Definition at line 12219 of file tm4c123fe6pm.h.
#define NVIC_PRI23_INTC_S 21 |
Definition at line 12223 of file tm4c123fe6pm.h.
#define NVIC_PRI23_INTD_M 0xE0000000 |
Definition at line 12218 of file tm4c123fe6pm.h.
#define NVIC_PRI23_INTD_S 29 |
Definition at line 12222 of file tm4c123fe6pm.h.
#define NVIC_PRI23_R (*((volatile uint32_t *)0xE000E45C)) |
Definition at line 2373 of file tm4c123fe6pm.h.
#define NVIC_PRI24_INTA_M 0x000000E0 |
Definition at line 12235 of file tm4c123fe6pm.h.
#define NVIC_PRI24_INTA_S 5 |
Definition at line 12239 of file tm4c123fe6pm.h.
#define NVIC_PRI24_INTB_M 0x0000E000 |
Definition at line 12234 of file tm4c123fe6pm.h.
#define NVIC_PRI24_INTB_S 13 |
Definition at line 12238 of file tm4c123fe6pm.h.
#define NVIC_PRI24_INTC_M 0x00E00000 |
Definition at line 12233 of file tm4c123fe6pm.h.
#define NVIC_PRI24_INTC_S 21 |
Definition at line 12237 of file tm4c123fe6pm.h.
#define NVIC_PRI24_INTD_M 0xE0000000 |
Definition at line 12232 of file tm4c123fe6pm.h.
#define NVIC_PRI24_INTD_S 29 |
Definition at line 12236 of file tm4c123fe6pm.h.
#define NVIC_PRI24_R (*((volatile uint32_t *)0xE000E460)) |
Definition at line 2374 of file tm4c123fe6pm.h.
#define NVIC_PRI25_INTA_M 0x000000E0 |
Definition at line 12249 of file tm4c123fe6pm.h.
#define NVIC_PRI25_INTA_S 5 |
Definition at line 12253 of file tm4c123fe6pm.h.
#define NVIC_PRI25_INTB_M 0x0000E000 |
Definition at line 12248 of file tm4c123fe6pm.h.
#define NVIC_PRI25_INTB_S 13 |
Definition at line 12252 of file tm4c123fe6pm.h.
#define NVIC_PRI25_INTC_M 0x00E00000 |
Definition at line 12247 of file tm4c123fe6pm.h.
#define NVIC_PRI25_INTC_S 21 |
Definition at line 12251 of file tm4c123fe6pm.h.
#define NVIC_PRI25_INTD_M 0xE0000000 |
Definition at line 12246 of file tm4c123fe6pm.h.
#define NVIC_PRI25_INTD_S 29 |
Definition at line 12250 of file tm4c123fe6pm.h.
#define NVIC_PRI25_R (*((volatile uint32_t *)0xE000E464)) |
Definition at line 2375 of file tm4c123fe6pm.h.
#define NVIC_PRI26_INTA_M 0x000000E0 |
Definition at line 12263 of file tm4c123fe6pm.h.
#define NVIC_PRI26_INTA_S 5 |
Definition at line 12267 of file tm4c123fe6pm.h.
#define NVIC_PRI26_INTB_M 0x0000E000 |
Definition at line 12262 of file tm4c123fe6pm.h.
#define NVIC_PRI26_INTB_S 13 |
Definition at line 12266 of file tm4c123fe6pm.h.
#define NVIC_PRI26_INTC_M 0x00E00000 |
Definition at line 12261 of file tm4c123fe6pm.h.
#define NVIC_PRI26_INTC_S 21 |
Definition at line 12265 of file tm4c123fe6pm.h.
#define NVIC_PRI26_INTD_M 0xE0000000 |
Definition at line 12260 of file tm4c123fe6pm.h.
#define NVIC_PRI26_INTD_S 29 |
Definition at line 12264 of file tm4c123fe6pm.h.
#define NVIC_PRI26_R (*((volatile uint32_t *)0xE000E468)) |
Definition at line 2376 of file tm4c123fe6pm.h.
#define NVIC_PRI27_INTA_M 0x000000E0 |
Definition at line 12277 of file tm4c123fe6pm.h.
#define NVIC_PRI27_INTA_S 5 |
Definition at line 12281 of file tm4c123fe6pm.h.
#define NVIC_PRI27_INTB_M 0x0000E000 |
Definition at line 12276 of file tm4c123fe6pm.h.
#define NVIC_PRI27_INTB_S 13 |
Definition at line 12280 of file tm4c123fe6pm.h.
#define NVIC_PRI27_INTC_M 0x00E00000 |
Definition at line 12275 of file tm4c123fe6pm.h.
#define NVIC_PRI27_INTC_S 21 |
Definition at line 12279 of file tm4c123fe6pm.h.
#define NVIC_PRI27_INTD_M 0xE0000000 |
Definition at line 12274 of file tm4c123fe6pm.h.
#define NVIC_PRI27_INTD_S 29 |
Definition at line 12278 of file tm4c123fe6pm.h.
#define NVIC_PRI27_R (*((volatile uint32_t *)0xE000E46C)) |
Definition at line 2377 of file tm4c123fe6pm.h.
#define NVIC_PRI28_INTA_M 0x000000E0 |
Definition at line 12291 of file tm4c123fe6pm.h.
#define NVIC_PRI28_INTA_S 5 |
Definition at line 12295 of file tm4c123fe6pm.h.
#define NVIC_PRI28_INTB_M 0x0000E000 |
Definition at line 12290 of file tm4c123fe6pm.h.
#define NVIC_PRI28_INTB_S 13 |
Definition at line 12294 of file tm4c123fe6pm.h.
#define NVIC_PRI28_INTC_M 0x00E00000 |
Definition at line 12289 of file tm4c123fe6pm.h.
#define NVIC_PRI28_INTC_S 21 |
Definition at line 12293 of file tm4c123fe6pm.h.
#define NVIC_PRI28_INTD_M 0xE0000000 |
Definition at line 12288 of file tm4c123fe6pm.h.
#define NVIC_PRI28_INTD_S 29 |
Definition at line 12292 of file tm4c123fe6pm.h.
#define NVIC_PRI28_R (*((volatile uint32_t *)0xE000E470)) |
Definition at line 2378 of file tm4c123fe6pm.h.
#define NVIC_PRI29_INTA_M 0x000000E0 |
Definition at line 12305 of file tm4c123fe6pm.h.
#define NVIC_PRI29_INTA_S 5 |
Definition at line 12309 of file tm4c123fe6pm.h.
#define NVIC_PRI29_INTB_M 0x0000E000 |
Definition at line 12304 of file tm4c123fe6pm.h.
#define NVIC_PRI29_INTB_S 13 |
Definition at line 12308 of file tm4c123fe6pm.h.
#define NVIC_PRI29_INTC_M 0x00E00000 |
Definition at line 12303 of file tm4c123fe6pm.h.
#define NVIC_PRI29_INTC_S 21 |
Definition at line 12307 of file tm4c123fe6pm.h.
#define NVIC_PRI29_INTD_M 0xE0000000 |
Definition at line 12302 of file tm4c123fe6pm.h.
#define NVIC_PRI29_INTD_S 29 |
Definition at line 12306 of file tm4c123fe6pm.h.
#define NVIC_PRI29_R (*((volatile uint32_t *)0xE000E474)) |
Definition at line 2379 of file tm4c123fe6pm.h.
#define NVIC_PRI2_INT10_M 0x00E00000 |
Definition at line 11925 of file tm4c123fe6pm.h.
#define NVIC_PRI2_INT10_S 21 |
Definition at line 11929 of file tm4c123fe6pm.h.
#define NVIC_PRI2_INT11_M 0xE0000000 |
Definition at line 11924 of file tm4c123fe6pm.h.
#define NVIC_PRI2_INT11_S 29 |
Definition at line 11928 of file tm4c123fe6pm.h.
#define NVIC_PRI2_INT8_M 0x000000E0 |
Definition at line 11927 of file tm4c123fe6pm.h.
#define NVIC_PRI2_INT8_S 5 |
Definition at line 11931 of file tm4c123fe6pm.h.
#define NVIC_PRI2_INT9_M 0x0000E000 |
Definition at line 11926 of file tm4c123fe6pm.h.
#define NVIC_PRI2_INT9_S 13 |
Definition at line 11930 of file tm4c123fe6pm.h.
#define NVIC_PRI2_R (*((volatile uint32_t *)0xE000E408)) |
Definition at line 2352 of file tm4c123fe6pm.h.
#define NVIC_PRI30_INTA_M 0x000000E0 |
Definition at line 12319 of file tm4c123fe6pm.h.
#define NVIC_PRI30_INTA_S 5 |
Definition at line 12323 of file tm4c123fe6pm.h.
#define NVIC_PRI30_INTB_M 0x0000E000 |
Definition at line 12318 of file tm4c123fe6pm.h.
#define NVIC_PRI30_INTB_S 13 |
Definition at line 12322 of file tm4c123fe6pm.h.
#define NVIC_PRI30_INTC_M 0x00E00000 |
Definition at line 12317 of file tm4c123fe6pm.h.
#define NVIC_PRI30_INTC_S 21 |
Definition at line 12321 of file tm4c123fe6pm.h.
#define NVIC_PRI30_INTD_M 0xE0000000 |
Definition at line 12316 of file tm4c123fe6pm.h.
#define NVIC_PRI30_INTD_S 29 |
Definition at line 12320 of file tm4c123fe6pm.h.
#define NVIC_PRI30_R (*((volatile uint32_t *)0xE000E478)) |
Definition at line 2380 of file tm4c123fe6pm.h.
#define NVIC_PRI31_INTA_M 0x000000E0 |
Definition at line 12333 of file tm4c123fe6pm.h.
#define NVIC_PRI31_INTA_S 5 |
Definition at line 12337 of file tm4c123fe6pm.h.
#define NVIC_PRI31_INTB_M 0x0000E000 |
Definition at line 12332 of file tm4c123fe6pm.h.
#define NVIC_PRI31_INTB_S 13 |
Definition at line 12336 of file tm4c123fe6pm.h.
#define NVIC_PRI31_INTC_M 0x00E00000 |
Definition at line 12331 of file tm4c123fe6pm.h.
#define NVIC_PRI31_INTC_S 21 |
Definition at line 12335 of file tm4c123fe6pm.h.
#define NVIC_PRI31_INTD_M 0xE0000000 |
Definition at line 12330 of file tm4c123fe6pm.h.
#define NVIC_PRI31_INTD_S 29 |
Definition at line 12334 of file tm4c123fe6pm.h.
#define NVIC_PRI31_R (*((volatile uint32_t *)0xE000E47C)) |
Definition at line 2381 of file tm4c123fe6pm.h.
#define NVIC_PRI32_INTA_M 0x000000E0 |
Definition at line 12347 of file tm4c123fe6pm.h.
#define NVIC_PRI32_INTA_S 5 |
Definition at line 12351 of file tm4c123fe6pm.h.
#define NVIC_PRI32_INTB_M 0x0000E000 |
Definition at line 12346 of file tm4c123fe6pm.h.
#define NVIC_PRI32_INTB_S 13 |
Definition at line 12350 of file tm4c123fe6pm.h.
#define NVIC_PRI32_INTC_M 0x00E00000 |
Definition at line 12345 of file tm4c123fe6pm.h.
#define NVIC_PRI32_INTC_S 21 |
Definition at line 12349 of file tm4c123fe6pm.h.
#define NVIC_PRI32_INTD_M 0xE0000000 |
Definition at line 12344 of file tm4c123fe6pm.h.
#define NVIC_PRI32_INTD_S 29 |
Definition at line 12348 of file tm4c123fe6pm.h.
#define NVIC_PRI32_R (*((volatile uint32_t *)0xE000E480)) |
Definition at line 2382 of file tm4c123fe6pm.h.
#define NVIC_PRI33_INTA_M 0x000000E0 |
Definition at line 12364 of file tm4c123fe6pm.h.
#define NVIC_PRI33_INTA_S 5 |
Definition at line 12369 of file tm4c123fe6pm.h.
#define NVIC_PRI33_INTB_M 0x0000E000 |
Definition at line 12362 of file tm4c123fe6pm.h.
#define NVIC_PRI33_INTB_S 13 |
Definition at line 12368 of file tm4c123fe6pm.h.
#define NVIC_PRI33_INTC_M 0x00E00000 |
Definition at line 12360 of file tm4c123fe6pm.h.
#define NVIC_PRI33_INTC_S 21 |
Definition at line 12367 of file tm4c123fe6pm.h.
#define NVIC_PRI33_INTD_M 0xE0000000 |
Definition at line 12358 of file tm4c123fe6pm.h.
#define NVIC_PRI33_INTD_S 29 |
Definition at line 12366 of file tm4c123fe6pm.h.
#define NVIC_PRI33_R (*((volatile uint32_t *)0xE000E484)) |
Definition at line 2383 of file tm4c123fe6pm.h.
#define NVIC_PRI34_INTA_M 0x000000E0 |
Definition at line 12382 of file tm4c123fe6pm.h.
#define NVIC_PRI34_INTA_S 5 |
Definition at line 12387 of file tm4c123fe6pm.h.
#define NVIC_PRI34_INTB_M 0x0000E000 |
Definition at line 12380 of file tm4c123fe6pm.h.
#define NVIC_PRI34_INTB_S 13 |
Definition at line 12386 of file tm4c123fe6pm.h.
#define NVIC_PRI34_INTC_M 0x00E00000 |
Definition at line 12378 of file tm4c123fe6pm.h.
#define NVIC_PRI34_INTC_S 21 |
Definition at line 12385 of file tm4c123fe6pm.h.
#define NVIC_PRI34_INTD_M 0xE0000000 |
Definition at line 12376 of file tm4c123fe6pm.h.
#define NVIC_PRI34_INTD_S 29 |
Definition at line 12384 of file tm4c123fe6pm.h.
#define NVIC_PRI34_R (*((volatile uint32_t *)0xE000E488)) |
Definition at line 2384 of file tm4c123fe6pm.h.
#define NVIC_PRI3_INT12_M 0x000000E0 |
Definition at line 11941 of file tm4c123fe6pm.h.
#define NVIC_PRI3_INT12_S 5 |
Definition at line 11945 of file tm4c123fe6pm.h.
#define NVIC_PRI3_INT13_M 0x0000E000 |
Definition at line 11940 of file tm4c123fe6pm.h.
#define NVIC_PRI3_INT13_S 13 |
Definition at line 11944 of file tm4c123fe6pm.h.
#define NVIC_PRI3_INT14_M 0x00E00000 |
Definition at line 11939 of file tm4c123fe6pm.h.
#define NVIC_PRI3_INT14_S 21 |
Definition at line 11943 of file tm4c123fe6pm.h.
#define NVIC_PRI3_INT15_M 0xE0000000 |
Definition at line 11938 of file tm4c123fe6pm.h.
#define NVIC_PRI3_INT15_S 29 |
Definition at line 11942 of file tm4c123fe6pm.h.
#define NVIC_PRI3_R (*((volatile uint32_t *)0xE000E40C)) |
Definition at line 2353 of file tm4c123fe6pm.h.
#define NVIC_PRI4_INT16_M 0x000000E0 |
Definition at line 11955 of file tm4c123fe6pm.h.
#define NVIC_PRI4_INT16_S 5 |
Definition at line 11959 of file tm4c123fe6pm.h.
#define NVIC_PRI4_INT17_M 0x0000E000 |
Definition at line 11954 of file tm4c123fe6pm.h.
#define NVIC_PRI4_INT17_S 13 |
Definition at line 11958 of file tm4c123fe6pm.h.
#define NVIC_PRI4_INT18_M 0x00E00000 |
Definition at line 11953 of file tm4c123fe6pm.h.
#define NVIC_PRI4_INT18_S 21 |
Definition at line 11957 of file tm4c123fe6pm.h.
#define NVIC_PRI4_INT19_M 0xE0000000 |
Definition at line 11952 of file tm4c123fe6pm.h.
#define NVIC_PRI4_INT19_S 29 |
Definition at line 11956 of file tm4c123fe6pm.h.
#define NVIC_PRI4_R (*((volatile uint32_t *)0xE000E410)) |
Definition at line 2354 of file tm4c123fe6pm.h.
#define NVIC_PRI5_INT20_M 0x000000E0 |
Definition at line 11969 of file tm4c123fe6pm.h.
#define NVIC_PRI5_INT20_S 5 |
Definition at line 11973 of file tm4c123fe6pm.h.
#define NVIC_PRI5_INT21_M 0x0000E000 |
Definition at line 11968 of file tm4c123fe6pm.h.
#define NVIC_PRI5_INT21_S 13 |
Definition at line 11972 of file tm4c123fe6pm.h.
#define NVIC_PRI5_INT22_M 0x00E00000 |
Definition at line 11967 of file tm4c123fe6pm.h.
#define NVIC_PRI5_INT22_S 21 |
Definition at line 11971 of file tm4c123fe6pm.h.
#define NVIC_PRI5_INT23_M 0xE0000000 |
Definition at line 11966 of file tm4c123fe6pm.h.
#define NVIC_PRI5_INT23_S 29 |
Definition at line 11970 of file tm4c123fe6pm.h.
#define NVIC_PRI5_R (*((volatile uint32_t *)0xE000E414)) |
Definition at line 2355 of file tm4c123fe6pm.h.
#define NVIC_PRI6_INT24_M 0x000000E0 |
Definition at line 11983 of file tm4c123fe6pm.h.
#define NVIC_PRI6_INT24_S 5 |
Definition at line 11987 of file tm4c123fe6pm.h.
#define NVIC_PRI6_INT25_M 0x0000E000 |
Definition at line 11982 of file tm4c123fe6pm.h.
#define NVIC_PRI6_INT25_S 13 |
Definition at line 11986 of file tm4c123fe6pm.h.
#define NVIC_PRI6_INT26_M 0x00E00000 |
Definition at line 11981 of file tm4c123fe6pm.h.
#define NVIC_PRI6_INT26_S 21 |
Definition at line 11985 of file tm4c123fe6pm.h.
#define NVIC_PRI6_INT27_M 0xE0000000 |
Definition at line 11980 of file tm4c123fe6pm.h.
#define NVIC_PRI6_INT27_S 29 |
Definition at line 11984 of file tm4c123fe6pm.h.
#define NVIC_PRI6_R (*((volatile uint32_t *)0xE000E418)) |
Definition at line 2356 of file tm4c123fe6pm.h.
#define NVIC_PRI7_INT28_M 0x000000E0 |
Definition at line 11997 of file tm4c123fe6pm.h.
#define NVIC_PRI7_INT28_S 5 |
Definition at line 12001 of file tm4c123fe6pm.h.
#define NVIC_PRI7_INT29_M 0x0000E000 |
Definition at line 11996 of file tm4c123fe6pm.h.
#define NVIC_PRI7_INT29_S 13 |
Definition at line 12000 of file tm4c123fe6pm.h.
#define NVIC_PRI7_INT30_M 0x00E00000 |
Definition at line 11995 of file tm4c123fe6pm.h.
#define NVIC_PRI7_INT30_S 21 |
Definition at line 11999 of file tm4c123fe6pm.h.
#define NVIC_PRI7_INT31_M 0xE0000000 |
Definition at line 11994 of file tm4c123fe6pm.h.
#define NVIC_PRI7_INT31_S 29 |
Definition at line 11998 of file tm4c123fe6pm.h.
#define NVIC_PRI7_R (*((volatile uint32_t *)0xE000E41C)) |
Definition at line 2357 of file tm4c123fe6pm.h.
#define NVIC_PRI8_INT32_M 0x000000E0 |
Definition at line 12011 of file tm4c123fe6pm.h.
#define NVIC_PRI8_INT32_S 5 |
Definition at line 12015 of file tm4c123fe6pm.h.
#define NVIC_PRI8_INT33_M 0x0000E000 |
Definition at line 12010 of file tm4c123fe6pm.h.
#define NVIC_PRI8_INT33_S 13 |
Definition at line 12014 of file tm4c123fe6pm.h.
#define NVIC_PRI8_INT34_M 0x00E00000 |
Definition at line 12009 of file tm4c123fe6pm.h.
#define NVIC_PRI8_INT34_S 21 |
Definition at line 12013 of file tm4c123fe6pm.h.
#define NVIC_PRI8_INT35_M 0xE0000000 |
Definition at line 12008 of file tm4c123fe6pm.h.
#define NVIC_PRI8_INT35_S 29 |
Definition at line 12012 of file tm4c123fe6pm.h.
#define NVIC_PRI8_R (*((volatile uint32_t *)0xE000E420)) |
Definition at line 2358 of file tm4c123fe6pm.h.
#define NVIC_PRI9_INT36_M 0x000000E0 |
Definition at line 12025 of file tm4c123fe6pm.h.
#define NVIC_PRI9_INT36_S 5 |
Definition at line 12029 of file tm4c123fe6pm.h.
#define NVIC_PRI9_INT37_M 0x0000E000 |
Definition at line 12024 of file tm4c123fe6pm.h.
#define NVIC_PRI9_INT37_S 13 |
Definition at line 12028 of file tm4c123fe6pm.h.
#define NVIC_PRI9_INT38_M 0x00E00000 |
Definition at line 12023 of file tm4c123fe6pm.h.
#define NVIC_PRI9_INT38_S 21 |
Definition at line 12027 of file tm4c123fe6pm.h.
#define NVIC_PRI9_INT39_M 0xE0000000 |
Definition at line 12022 of file tm4c123fe6pm.h.
#define NVIC_PRI9_INT39_S 29 |
Definition at line 12026 of file tm4c123fe6pm.h.
#define NVIC_PRI9_R (*((volatile uint32_t *)0xE000E424)) |
Definition at line 2359 of file tm4c123fe6pm.h.
#define NVIC_ST_CTRL_CLK_SRC 0x00000004 |
Definition at line 11695 of file tm4c123fe6pm.h.
#define NVIC_ST_CTRL_COUNT 0x00010000 |
Definition at line 11694 of file tm4c123fe6pm.h.
#define NVIC_ST_CTRL_ENABLE 0x00000001 |
Definition at line 11697 of file tm4c123fe6pm.h.
#define NVIC_ST_CTRL_INTEN 0x00000002 |
Definition at line 11696 of file tm4c123fe6pm.h.
#define NVIC_ST_CTRL_R (*((volatile uint32_t *)0xE000E010)) |
Definition at line 2322 of file tm4c123fe6pm.h.
#define NVIC_ST_CURRENT_M 0x00FFFFFF |
Definition at line 11713 of file tm4c123fe6pm.h.
#define NVIC_ST_CURRENT_R (*((volatile uint32_t *)0xE000E018)) |
Definition at line 2324 of file tm4c123fe6pm.h.
#define NVIC_ST_CURRENT_S 0 |
Definition at line 11714 of file tm4c123fe6pm.h.
#define NVIC_ST_RELOAD_M 0x00FFFFFF |
Definition at line 11704 of file tm4c123fe6pm.h.
#define NVIC_ST_RELOAD_R (*((volatile uint32_t *)0xE000E014)) |
Definition at line 2323 of file tm4c123fe6pm.h.
#define NVIC_ST_RELOAD_S 0 |
Definition at line 11705 of file tm4c123fe6pm.h.
#define NVIC_SW_TRIG_INTID_M 0x000000FF |
Definition at line 12851 of file tm4c123fe6pm.h.
#define NVIC_SW_TRIG_INTID_S 0 |
Definition at line 12852 of file tm4c123fe6pm.h.
#define NVIC_SW_TRIG_R (*((volatile uint32_t *)0xE000EF00)) |
Definition at line 2416 of file tm4c123fe6pm.h.
#define NVIC_SYS_CTRL_R (*((volatile uint32_t *)0xE000ED10)) |
Definition at line 2389 of file tm4c123fe6pm.h.
#define NVIC_SYS_CTRL_SEVONPEND 0x00000010 |
Definition at line 12469 of file tm4c123fe6pm.h.
#define NVIC_SYS_CTRL_SLEEPDEEP 0x00000004 |
Definition at line 12470 of file tm4c123fe6pm.h.
#define NVIC_SYS_CTRL_SLEEPEXIT 0x00000002 |
Definition at line 12471 of file tm4c123fe6pm.h.
#define NVIC_SYS_HND_CTRL_BUS 0x00020000 |
Definition at line 12526 of file tm4c123fe6pm.h.
#define NVIC_SYS_HND_CTRL_BUSA 0x00000002 |
Definition at line 12538 of file tm4c123fe6pm.h.
#define NVIC_SYS_HND_CTRL_BUSP 0x00004000 |
Definition at line 12529 of file tm4c123fe6pm.h.
#define NVIC_SYS_HND_CTRL_MEM 0x00010000 |
Definition at line 12527 of file tm4c123fe6pm.h.
#define NVIC_SYS_HND_CTRL_MEMA 0x00000001 |
Definition at line 12539 of file tm4c123fe6pm.h.
#define NVIC_SYS_HND_CTRL_MEMP 0x00002000 |
Definition at line 12530 of file tm4c123fe6pm.h.
#define NVIC_SYS_HND_CTRL_MON 0x00000100 |
Definition at line 12535 of file tm4c123fe6pm.h.
#define NVIC_SYS_HND_CTRL_PNDSV 0x00000400 |
Definition at line 12534 of file tm4c123fe6pm.h.
#define NVIC_SYS_HND_CTRL_R (*((volatile uint32_t *)0xE000ED24)) |
Definition at line 2394 of file tm4c123fe6pm.h.
#define NVIC_SYS_HND_CTRL_SVC 0x00008000 |
Definition at line 12528 of file tm4c123fe6pm.h.
#define NVIC_SYS_HND_CTRL_SVCA 0x00000080 |
Definition at line 12536 of file tm4c123fe6pm.h.
#define NVIC_SYS_HND_CTRL_TICK 0x00000800 |
Definition at line 12533 of file tm4c123fe6pm.h.
#define NVIC_SYS_HND_CTRL_USAGE 0x00040000 |
Definition at line 12525 of file tm4c123fe6pm.h.
#define NVIC_SYS_HND_CTRL_USAGEP 0x00001000 |
Definition at line 12531 of file tm4c123fe6pm.h.
#define NVIC_SYS_HND_CTRL_USGA 0x00000008 |
Definition at line 12537 of file tm4c123fe6pm.h.
#define NVIC_SYS_PRI1_BUS_M 0x0000E000 |
Definition at line 12493 of file tm4c123fe6pm.h.
#define NVIC_SYS_PRI1_BUS_S 13 |
Definition at line 12496 of file tm4c123fe6pm.h.
#define NVIC_SYS_PRI1_MEM_M 0x000000E0 |
Definition at line 12494 of file tm4c123fe6pm.h.
#define NVIC_SYS_PRI1_MEM_S 5 |
Definition at line 12497 of file tm4c123fe6pm.h.
#define NVIC_SYS_PRI1_R (*((volatile uint32_t *)0xE000ED18)) |
Definition at line 2391 of file tm4c123fe6pm.h.
#define NVIC_SYS_PRI1_USAGE_M 0x00E00000 |
Definition at line 12492 of file tm4c123fe6pm.h.
#define NVIC_SYS_PRI1_USAGE_S 21 |
Definition at line 12495 of file tm4c123fe6pm.h.
#define NVIC_SYS_PRI2_R (*((volatile uint32_t *)0xE000ED1C)) |
Definition at line 2392 of file tm4c123fe6pm.h.
#define NVIC_SYS_PRI2_SVC_M 0xE0000000 |
Definition at line 12504 of file tm4c123fe6pm.h.
#define NVIC_SYS_PRI2_SVC_S 29 |
Definition at line 12505 of file tm4c123fe6pm.h.
#define NVIC_SYS_PRI3_DEBUG_M 0x000000E0 |
Definition at line 12514 of file tm4c123fe6pm.h.
#define NVIC_SYS_PRI3_DEBUG_S 5 |
Definition at line 12517 of file tm4c123fe6pm.h.
#define NVIC_SYS_PRI3_PENDSV_M 0x00E00000 |
Definition at line 12513 of file tm4c123fe6pm.h.
#define NVIC_SYS_PRI3_PENDSV_S 21 |
Definition at line 12516 of file tm4c123fe6pm.h.
#define NVIC_SYS_PRI3_R (*((volatile uint32_t *)0xE000ED20)) |
Definition at line 2393 of file tm4c123fe6pm.h.
#define NVIC_SYS_PRI3_TICK_M 0xE0000000 |
Definition at line 12512 of file tm4c123fe6pm.h.
#define NVIC_SYS_PRI3_TICK_S 29 |
Definition at line 12515 of file tm4c123fe6pm.h.
#define NVIC_UNPEND0_INT_M 0xFFFFFFFF |
Definition at line 11826 of file tm4c123fe6pm.h.
#define NVIC_UNPEND0_R (*((volatile uint32_t *)0xE000E280)) |
Definition at line 2340 of file tm4c123fe6pm.h.
#define NVIC_UNPEND1_INT_M 0xFFFFFFFF |
Definition at line 11833 of file tm4c123fe6pm.h.
#define NVIC_UNPEND1_R (*((volatile uint32_t *)0xE000E284)) |
Definition at line 2341 of file tm4c123fe6pm.h.
#define NVIC_UNPEND2_INT_M 0xFFFFFFFF |
Definition at line 11840 of file tm4c123fe6pm.h.
#define NVIC_UNPEND2_R (*((volatile uint32_t *)0xE000E288)) |
Definition at line 2342 of file tm4c123fe6pm.h.
#define NVIC_UNPEND3_INT_M 0xFFFFFFFF |
Definition at line 11847 of file tm4c123fe6pm.h.
#define NVIC_UNPEND3_R (*((volatile uint32_t *)0xE000E28C)) |
Definition at line 2343 of file tm4c123fe6pm.h.
#define NVIC_UNPEND4_INT_M 0x000007FF |
Definition at line 11854 of file tm4c123fe6pm.h.
#define NVIC_UNPEND4_R (*((volatile uint32_t *)0xE000E290)) |
Definition at line 2344 of file tm4c123fe6pm.h.
#define NVIC_VTABLE_OFFSET_M 0xFFFFFC00 |
Definition at line 12440 of file tm4c123fe6pm.h.
#define NVIC_VTABLE_OFFSET_S 10 |
Definition at line 12441 of file tm4c123fe6pm.h.
#define NVIC_VTABLE_R (*((volatile uint32_t *)0xE000ED08)) |
Definition at line 2387 of file tm4c123fe6pm.h.
#define PWM0_0_CMPA_R (*((volatile uint32_t *)0x40028058)) |
Definition at line 781 of file tm4c123fe6pm.h.
#define PWM0_0_CMPB_R (*((volatile uint32_t *)0x4002805C)) |
Definition at line 782 of file tm4c123fe6pm.h.
#define PWM0_0_COUNT_R (*((volatile uint32_t *)0x40028054)) |
Definition at line 780 of file tm4c123fe6pm.h.
#define PWM0_0_CTL_R (*((volatile uint32_t *)0x40028040)) |
Definition at line 775 of file tm4c123fe6pm.h.
#define PWM0_0_DBCTL_R (*((volatile uint32_t *)0x40028068)) |
Definition at line 785 of file tm4c123fe6pm.h.
#define PWM0_0_DBFALL_R (*((volatile uint32_t *)0x40028070)) |
Definition at line 787 of file tm4c123fe6pm.h.
#define PWM0_0_DBRISE_R (*((volatile uint32_t *)0x4002806C)) |
Definition at line 786 of file tm4c123fe6pm.h.
#define PWM0_0_FLTSEN_R (*((volatile uint32_t *)0x40028800)) |
Definition at line 839 of file tm4c123fe6pm.h.
#define PWM0_0_FLTSRC0_R (*((volatile uint32_t *)0x40028074)) |
Definition at line 788 of file tm4c123fe6pm.h.
#define PWM0_0_FLTSRC1_R (*((volatile uint32_t *)0x40028078)) |
Definition at line 789 of file tm4c123fe6pm.h.
#define PWM0_0_FLTSTAT0_R (*((volatile uint32_t *)0x40028804)) |
Definition at line 840 of file tm4c123fe6pm.h.
#define PWM0_0_FLTSTAT1_R (*((volatile uint32_t *)0x40028808)) |
Definition at line 841 of file tm4c123fe6pm.h.
#define PWM0_0_GENA_R (*((volatile uint32_t *)0x40028060)) |
Definition at line 783 of file tm4c123fe6pm.h.
#define PWM0_0_GENB_R (*((volatile uint32_t *)0x40028064)) |
Definition at line 784 of file tm4c123fe6pm.h.
#define PWM0_0_INTEN_R (*((volatile uint32_t *)0x40028044)) |
Definition at line 776 of file tm4c123fe6pm.h.
#define PWM0_0_ISC_R (*((volatile uint32_t *)0x4002804C)) |
Definition at line 778 of file tm4c123fe6pm.h.
#define PWM0_0_LOAD_R (*((volatile uint32_t *)0x40028050)) |
Definition at line 779 of file tm4c123fe6pm.h.
#define PWM0_0_MINFLTPER_R (*((volatile uint32_t *)0x4002807C)) |
Definition at line 790 of file tm4c123fe6pm.h.
#define PWM0_0_RIS_R (*((volatile uint32_t *)0x40028048)) |
Definition at line 777 of file tm4c123fe6pm.h.
#define PWM0_1_CMPA_R (*((volatile uint32_t *)0x40028098)) |
Definition at line 797 of file tm4c123fe6pm.h.
#define PWM0_1_CMPB_R (*((volatile uint32_t *)0x4002809C)) |
Definition at line 798 of file tm4c123fe6pm.h.
#define PWM0_1_COUNT_R (*((volatile uint32_t *)0x40028094)) |
Definition at line 796 of file tm4c123fe6pm.h.
#define PWM0_1_CTL_R (*((volatile uint32_t *)0x40028080)) |
Definition at line 791 of file tm4c123fe6pm.h.
#define PWM0_1_DBCTL_R (*((volatile uint32_t *)0x400280A8)) |
Definition at line 801 of file tm4c123fe6pm.h.
#define PWM0_1_DBFALL_R (*((volatile uint32_t *)0x400280B0)) |
Definition at line 803 of file tm4c123fe6pm.h.
#define PWM0_1_DBRISE_R (*((volatile uint32_t *)0x400280AC)) |
Definition at line 802 of file tm4c123fe6pm.h.
#define PWM0_1_FLTSEN_R (*((volatile uint32_t *)0x40028880)) |
Definition at line 842 of file tm4c123fe6pm.h.
#define PWM0_1_FLTSRC0_R (*((volatile uint32_t *)0x400280B4)) |
Definition at line 804 of file tm4c123fe6pm.h.
#define PWM0_1_FLTSRC1_R (*((volatile uint32_t *)0x400280B8)) |
Definition at line 805 of file tm4c123fe6pm.h.
#define PWM0_1_FLTSTAT0_R (*((volatile uint32_t *)0x40028884)) |
Definition at line 843 of file tm4c123fe6pm.h.
#define PWM0_1_FLTSTAT1_R (*((volatile uint32_t *)0x40028888)) |
Definition at line 844 of file tm4c123fe6pm.h.
#define PWM0_1_GENA_R (*((volatile uint32_t *)0x400280A0)) |
Definition at line 799 of file tm4c123fe6pm.h.
#define PWM0_1_GENB_R (*((volatile uint32_t *)0x400280A4)) |
Definition at line 800 of file tm4c123fe6pm.h.
#define PWM0_1_INTEN_R (*((volatile uint32_t *)0x40028084)) |
Definition at line 792 of file tm4c123fe6pm.h.
#define PWM0_1_ISC_R (*((volatile uint32_t *)0x4002808C)) |
Definition at line 794 of file tm4c123fe6pm.h.
#define PWM0_1_LOAD_R (*((volatile uint32_t *)0x40028090)) |
Definition at line 795 of file tm4c123fe6pm.h.
#define PWM0_1_MINFLTPER_R (*((volatile uint32_t *)0x400280BC)) |
Definition at line 806 of file tm4c123fe6pm.h.
#define PWM0_1_RIS_R (*((volatile uint32_t *)0x40028088)) |
Definition at line 793 of file tm4c123fe6pm.h.
#define PWM0_2_CMPA_R (*((volatile uint32_t *)0x400280D8)) |
Definition at line 813 of file tm4c123fe6pm.h.
#define PWM0_2_CMPB_R (*((volatile uint32_t *)0x400280DC)) |
Definition at line 814 of file tm4c123fe6pm.h.
#define PWM0_2_COUNT_R (*((volatile uint32_t *)0x400280D4)) |
Definition at line 812 of file tm4c123fe6pm.h.
#define PWM0_2_CTL_R (*((volatile uint32_t *)0x400280C0)) |
Definition at line 807 of file tm4c123fe6pm.h.
#define PWM0_2_DBCTL_R (*((volatile uint32_t *)0x400280E8)) |
Definition at line 817 of file tm4c123fe6pm.h.
#define PWM0_2_DBFALL_R (*((volatile uint32_t *)0x400280F0)) |
Definition at line 819 of file tm4c123fe6pm.h.
#define PWM0_2_DBRISE_R (*((volatile uint32_t *)0x400280EC)) |
Definition at line 818 of file tm4c123fe6pm.h.
#define PWM0_2_FLTSEN_R (*((volatile uint32_t *)0x40028900)) |
Definition at line 845 of file tm4c123fe6pm.h.
#define PWM0_2_FLTSRC0_R (*((volatile uint32_t *)0x400280F4)) |
Definition at line 820 of file tm4c123fe6pm.h.
#define PWM0_2_FLTSRC1_R (*((volatile uint32_t *)0x400280F8)) |
Definition at line 821 of file tm4c123fe6pm.h.
#define PWM0_2_FLTSTAT0_R (*((volatile uint32_t *)0x40028904)) |
Definition at line 846 of file tm4c123fe6pm.h.
#define PWM0_2_FLTSTAT1_R (*((volatile uint32_t *)0x40028908)) |
Definition at line 847 of file tm4c123fe6pm.h.
#define PWM0_2_GENA_R (*((volatile uint32_t *)0x400280E0)) |
Definition at line 815 of file tm4c123fe6pm.h.
#define PWM0_2_GENB_R (*((volatile uint32_t *)0x400280E4)) |
Definition at line 816 of file tm4c123fe6pm.h.
#define PWM0_2_INTEN_R (*((volatile uint32_t *)0x400280C4)) |
Definition at line 808 of file tm4c123fe6pm.h.
#define PWM0_2_ISC_R (*((volatile uint32_t *)0x400280CC)) |
Definition at line 810 of file tm4c123fe6pm.h.
#define PWM0_2_LOAD_R (*((volatile uint32_t *)0x400280D0)) |
Definition at line 811 of file tm4c123fe6pm.h.
#define PWM0_2_MINFLTPER_R (*((volatile uint32_t *)0x400280FC)) |
Definition at line 822 of file tm4c123fe6pm.h.
#define PWM0_2_RIS_R (*((volatile uint32_t *)0x400280C8)) |
Definition at line 809 of file tm4c123fe6pm.h.
#define PWM0_3_CMPA_R (*((volatile uint32_t *)0x40028118)) |
Definition at line 829 of file tm4c123fe6pm.h.
#define PWM0_3_CMPB_R (*((volatile uint32_t *)0x4002811C)) |
Definition at line 830 of file tm4c123fe6pm.h.
#define PWM0_3_COUNT_R (*((volatile uint32_t *)0x40028114)) |
Definition at line 828 of file tm4c123fe6pm.h.
#define PWM0_3_CTL_R (*((volatile uint32_t *)0x40028100)) |
Definition at line 823 of file tm4c123fe6pm.h.
#define PWM0_3_DBCTL_R (*((volatile uint32_t *)0x40028128)) |
Definition at line 833 of file tm4c123fe6pm.h.
#define PWM0_3_DBFALL_R (*((volatile uint32_t *)0x40028130)) |
Definition at line 835 of file tm4c123fe6pm.h.
#define PWM0_3_DBRISE_R (*((volatile uint32_t *)0x4002812C)) |
Definition at line 834 of file tm4c123fe6pm.h.
#define PWM0_3_FLTSEN_R (*((volatile uint32_t *)0x40028980)) |
Definition at line 848 of file tm4c123fe6pm.h.
#define PWM0_3_FLTSRC0_R (*((volatile uint32_t *)0x40028134)) |
Definition at line 836 of file tm4c123fe6pm.h.
#define PWM0_3_FLTSRC1_R (*((volatile uint32_t *)0x40028138)) |
Definition at line 837 of file tm4c123fe6pm.h.
#define PWM0_3_FLTSTAT0_R (*((volatile uint32_t *)0x40028984)) |
Definition at line 849 of file tm4c123fe6pm.h.
#define PWM0_3_FLTSTAT1_R (*((volatile uint32_t *)0x40028988)) |
Definition at line 850 of file tm4c123fe6pm.h.
#define PWM0_3_GENA_R (*((volatile uint32_t *)0x40028120)) |
Definition at line 831 of file tm4c123fe6pm.h.
#define PWM0_3_GENB_R (*((volatile uint32_t *)0x40028124)) |
Definition at line 832 of file tm4c123fe6pm.h.
#define PWM0_3_INTEN_R (*((volatile uint32_t *)0x40028104)) |
Definition at line 824 of file tm4c123fe6pm.h.
#define PWM0_3_ISC_R (*((volatile uint32_t *)0x4002810C)) |
Definition at line 826 of file tm4c123fe6pm.h.
#define PWM0_3_LOAD_R (*((volatile uint32_t *)0x40028110)) |
Definition at line 827 of file tm4c123fe6pm.h.
#define PWM0_3_MINFLTPER_R (*((volatile uint32_t *)0x4002813C)) |
Definition at line 838 of file tm4c123fe6pm.h.
#define PWM0_3_RIS_R (*((volatile uint32_t *)0x40028108)) |
Definition at line 825 of file tm4c123fe6pm.h.
#define PWM0_CTL_R (*((volatile uint32_t *)0x40028000)) |
Definition at line 764 of file tm4c123fe6pm.h.
#define PWM0_ENABLE_R (*((volatile uint32_t *)0x40028008)) |
Definition at line 766 of file tm4c123fe6pm.h.
#define PWM0_ENUPD_R (*((volatile uint32_t *)0x40028028)) |
Definition at line 774 of file tm4c123fe6pm.h.
#define PWM0_FAULT_R (*((volatile uint32_t *)0x40028010)) |
Definition at line 768 of file tm4c123fe6pm.h.
#define PWM0_FAULTVAL_R (*((volatile uint32_t *)0x40028024)) |
Definition at line 773 of file tm4c123fe6pm.h.
#define PWM0_INTEN_R (*((volatile uint32_t *)0x40028014)) |
Definition at line 769 of file tm4c123fe6pm.h.
#define PWM0_INVERT_R (*((volatile uint32_t *)0x4002800C)) |
Definition at line 767 of file tm4c123fe6pm.h.
#define PWM0_ISC_R (*((volatile uint32_t *)0x4002801C)) |
Definition at line 771 of file tm4c123fe6pm.h.
#define PWM0_PP_R (*((volatile uint32_t *)0x40028FC0)) |
Definition at line 851 of file tm4c123fe6pm.h.
#define PWM0_RIS_R (*((volatile uint32_t *)0x40028018)) |
Definition at line 770 of file tm4c123fe6pm.h.
#define PWM0_STATUS_R (*((volatile uint32_t *)0x40028020)) |
Definition at line 772 of file tm4c123fe6pm.h.
#define PWM0_SYNC_R (*((volatile uint32_t *)0x40028004)) |
Definition at line 765 of file tm4c123fe6pm.h.
#define PWM1_0_CMPA_R (*((volatile uint32_t *)0x40029058)) |
Definition at line 875 of file tm4c123fe6pm.h.
#define PWM1_0_CMPB_R (*((volatile uint32_t *)0x4002905C)) |
Definition at line 876 of file tm4c123fe6pm.h.
#define PWM1_0_COUNT_R (*((volatile uint32_t *)0x40029054)) |
Definition at line 874 of file tm4c123fe6pm.h.
#define PWM1_0_CTL_R (*((volatile uint32_t *)0x40029040)) |
Definition at line 869 of file tm4c123fe6pm.h.
#define PWM1_0_DBCTL_R (*((volatile uint32_t *)0x40029068)) |
Definition at line 879 of file tm4c123fe6pm.h.
#define PWM1_0_DBFALL_R (*((volatile uint32_t *)0x40029070)) |
Definition at line 881 of file tm4c123fe6pm.h.
#define PWM1_0_DBRISE_R (*((volatile uint32_t *)0x4002906C)) |
Definition at line 880 of file tm4c123fe6pm.h.
#define PWM1_0_FLTSEN_R (*((volatile uint32_t *)0x40029800)) |
Definition at line 933 of file tm4c123fe6pm.h.
#define PWM1_0_FLTSRC0_R (*((volatile uint32_t *)0x40029074)) |
Definition at line 882 of file tm4c123fe6pm.h.
#define PWM1_0_FLTSRC1_R (*((volatile uint32_t *)0x40029078)) |
Definition at line 883 of file tm4c123fe6pm.h.
#define PWM1_0_FLTSTAT0_R (*((volatile uint32_t *)0x40029804)) |
Definition at line 934 of file tm4c123fe6pm.h.
#define PWM1_0_FLTSTAT1_R (*((volatile uint32_t *)0x40029808)) |
Definition at line 935 of file tm4c123fe6pm.h.
#define PWM1_0_GENA_R (*((volatile uint32_t *)0x40029060)) |
Definition at line 877 of file tm4c123fe6pm.h.
#define PWM1_0_GENB_R (*((volatile uint32_t *)0x40029064)) |
Definition at line 878 of file tm4c123fe6pm.h.
#define PWM1_0_INTEN_R (*((volatile uint32_t *)0x40029044)) |
Definition at line 870 of file tm4c123fe6pm.h.
#define PWM1_0_ISC_R (*((volatile uint32_t *)0x4002904C)) |
Definition at line 872 of file tm4c123fe6pm.h.
#define PWM1_0_LOAD_R (*((volatile uint32_t *)0x40029050)) |
Definition at line 873 of file tm4c123fe6pm.h.
#define PWM1_0_MINFLTPER_R (*((volatile uint32_t *)0x4002907C)) |
Definition at line 884 of file tm4c123fe6pm.h.
#define PWM1_0_RIS_R (*((volatile uint32_t *)0x40029048)) |
Definition at line 871 of file tm4c123fe6pm.h.
#define PWM1_1_CMPA_R (*((volatile uint32_t *)0x40029098)) |
Definition at line 891 of file tm4c123fe6pm.h.
#define PWM1_1_CMPB_R (*((volatile uint32_t *)0x4002909C)) |
Definition at line 892 of file tm4c123fe6pm.h.
#define PWM1_1_COUNT_R (*((volatile uint32_t *)0x40029094)) |
Definition at line 890 of file tm4c123fe6pm.h.
#define PWM1_1_CTL_R (*((volatile uint32_t *)0x40029080)) |
Definition at line 885 of file tm4c123fe6pm.h.
#define PWM1_1_DBCTL_R (*((volatile uint32_t *)0x400290A8)) |
Definition at line 895 of file tm4c123fe6pm.h.
#define PWM1_1_DBFALL_R (*((volatile uint32_t *)0x400290B0)) |
Definition at line 897 of file tm4c123fe6pm.h.
#define PWM1_1_DBRISE_R (*((volatile uint32_t *)0x400290AC)) |
Definition at line 896 of file tm4c123fe6pm.h.
#define PWM1_1_FLTSEN_R (*((volatile uint32_t *)0x40029880)) |
Definition at line 936 of file tm4c123fe6pm.h.
#define PWM1_1_FLTSRC0_R (*((volatile uint32_t *)0x400290B4)) |
Definition at line 898 of file tm4c123fe6pm.h.
#define PWM1_1_FLTSRC1_R (*((volatile uint32_t *)0x400290B8)) |
Definition at line 899 of file tm4c123fe6pm.h.
#define PWM1_1_FLTSTAT0_R (*((volatile uint32_t *)0x40029884)) |
Definition at line 937 of file tm4c123fe6pm.h.
#define PWM1_1_FLTSTAT1_R (*((volatile uint32_t *)0x40029888)) |
Definition at line 938 of file tm4c123fe6pm.h.
#define PWM1_1_GENA_R (*((volatile uint32_t *)0x400290A0)) |
Definition at line 893 of file tm4c123fe6pm.h.
#define PWM1_1_GENB_R (*((volatile uint32_t *)0x400290A4)) |
Definition at line 894 of file tm4c123fe6pm.h.
#define PWM1_1_INTEN_R (*((volatile uint32_t *)0x40029084)) |
Definition at line 886 of file tm4c123fe6pm.h.
#define PWM1_1_ISC_R (*((volatile uint32_t *)0x4002908C)) |
Definition at line 888 of file tm4c123fe6pm.h.
#define PWM1_1_LOAD_R (*((volatile uint32_t *)0x40029090)) |
Definition at line 889 of file tm4c123fe6pm.h.
#define PWM1_1_MINFLTPER_R (*((volatile uint32_t *)0x400290BC)) |
Definition at line 900 of file tm4c123fe6pm.h.
#define PWM1_1_RIS_R (*((volatile uint32_t *)0x40029088)) |
Definition at line 887 of file tm4c123fe6pm.h.
#define PWM1_2_CMPA_R (*((volatile uint32_t *)0x400290D8)) |
Definition at line 907 of file tm4c123fe6pm.h.
#define PWM1_2_CMPB_R (*((volatile uint32_t *)0x400290DC)) |
Definition at line 908 of file tm4c123fe6pm.h.
#define PWM1_2_COUNT_R (*((volatile uint32_t *)0x400290D4)) |
Definition at line 906 of file tm4c123fe6pm.h.
#define PWM1_2_CTL_R (*((volatile uint32_t *)0x400290C0)) |
Definition at line 901 of file tm4c123fe6pm.h.
#define PWM1_2_DBCTL_R (*((volatile uint32_t *)0x400290E8)) |
Definition at line 911 of file tm4c123fe6pm.h.
#define PWM1_2_DBFALL_R (*((volatile uint32_t *)0x400290F0)) |
Definition at line 913 of file tm4c123fe6pm.h.
#define PWM1_2_DBRISE_R (*((volatile uint32_t *)0x400290EC)) |
Definition at line 912 of file tm4c123fe6pm.h.
#define PWM1_2_FLTSEN_R (*((volatile uint32_t *)0x40029900)) |
Definition at line 939 of file tm4c123fe6pm.h.
#define PWM1_2_FLTSRC0_R (*((volatile uint32_t *)0x400290F4)) |
Definition at line 914 of file tm4c123fe6pm.h.
#define PWM1_2_FLTSRC1_R (*((volatile uint32_t *)0x400290F8)) |
Definition at line 915 of file tm4c123fe6pm.h.
#define PWM1_2_FLTSTAT0_R (*((volatile uint32_t *)0x40029904)) |
Definition at line 940 of file tm4c123fe6pm.h.
#define PWM1_2_FLTSTAT1_R (*((volatile uint32_t *)0x40029908)) |
Definition at line 941 of file tm4c123fe6pm.h.
#define PWM1_2_GENA_R (*((volatile uint32_t *)0x400290E0)) |
Definition at line 909 of file tm4c123fe6pm.h.
#define PWM1_2_GENB_R (*((volatile uint32_t *)0x400290E4)) |
Definition at line 910 of file tm4c123fe6pm.h.
#define PWM1_2_INTEN_R (*((volatile uint32_t *)0x400290C4)) |
Definition at line 902 of file tm4c123fe6pm.h.
#define PWM1_2_ISC_R (*((volatile uint32_t *)0x400290CC)) |
Definition at line 904 of file tm4c123fe6pm.h.
#define PWM1_2_LOAD_R (*((volatile uint32_t *)0x400290D0)) |
Definition at line 905 of file tm4c123fe6pm.h.
#define PWM1_2_MINFLTPER_R (*((volatile uint32_t *)0x400290FC)) |
Definition at line 916 of file tm4c123fe6pm.h.
#define PWM1_2_RIS_R (*((volatile uint32_t *)0x400290C8)) |
Definition at line 903 of file tm4c123fe6pm.h.
#define PWM1_3_CMPA_R (*((volatile uint32_t *)0x40029118)) |
Definition at line 923 of file tm4c123fe6pm.h.
#define PWM1_3_CMPB_R (*((volatile uint32_t *)0x4002911C)) |
Definition at line 924 of file tm4c123fe6pm.h.
#define PWM1_3_COUNT_R (*((volatile uint32_t *)0x40029114)) |
Definition at line 922 of file tm4c123fe6pm.h.
#define PWM1_3_CTL_R (*((volatile uint32_t *)0x40029100)) |
Definition at line 917 of file tm4c123fe6pm.h.
#define PWM1_3_DBCTL_R (*((volatile uint32_t *)0x40029128)) |
Definition at line 927 of file tm4c123fe6pm.h.
#define PWM1_3_DBFALL_R (*((volatile uint32_t *)0x40029130)) |
Definition at line 929 of file tm4c123fe6pm.h.
#define PWM1_3_DBRISE_R (*((volatile uint32_t *)0x4002912C)) |
Definition at line 928 of file tm4c123fe6pm.h.
#define PWM1_3_FLTSEN_R (*((volatile uint32_t *)0x40029980)) |
Definition at line 942 of file tm4c123fe6pm.h.
#define PWM1_3_FLTSRC0_R (*((volatile uint32_t *)0x40029134)) |
Definition at line 930 of file tm4c123fe6pm.h.
#define PWM1_3_FLTSRC1_R (*((volatile uint32_t *)0x40029138)) |
Definition at line 931 of file tm4c123fe6pm.h.
#define PWM1_3_FLTSTAT0_R (*((volatile uint32_t *)0x40029984)) |
Definition at line 943 of file tm4c123fe6pm.h.
#define PWM1_3_FLTSTAT1_R (*((volatile uint32_t *)0x40029988)) |
Definition at line 944 of file tm4c123fe6pm.h.
#define PWM1_3_GENA_R (*((volatile uint32_t *)0x40029120)) |
Definition at line 925 of file tm4c123fe6pm.h.
#define PWM1_3_GENB_R (*((volatile uint32_t *)0x40029124)) |
Definition at line 926 of file tm4c123fe6pm.h.
#define PWM1_3_INTEN_R (*((volatile uint32_t *)0x40029104)) |
Definition at line 918 of file tm4c123fe6pm.h.
#define PWM1_3_ISC_R (*((volatile uint32_t *)0x4002910C)) |
Definition at line 920 of file tm4c123fe6pm.h.
#define PWM1_3_LOAD_R (*((volatile uint32_t *)0x40029110)) |
Definition at line 921 of file tm4c123fe6pm.h.
#define PWM1_3_MINFLTPER_R (*((volatile uint32_t *)0x4002913C)) |
Definition at line 932 of file tm4c123fe6pm.h.
#define PWM1_3_RIS_R (*((volatile uint32_t *)0x40029108)) |
Definition at line 919 of file tm4c123fe6pm.h.
#define PWM1_CTL_R (*((volatile uint32_t *)0x40029000)) |
Definition at line 858 of file tm4c123fe6pm.h.
#define PWM1_ENABLE_R (*((volatile uint32_t *)0x40029008)) |
Definition at line 860 of file tm4c123fe6pm.h.
#define PWM1_ENUPD_R (*((volatile uint32_t *)0x40029028)) |
Definition at line 868 of file tm4c123fe6pm.h.
#define PWM1_FAULT_R (*((volatile uint32_t *)0x40029010)) |
Definition at line 862 of file tm4c123fe6pm.h.
#define PWM1_FAULTVAL_R (*((volatile uint32_t *)0x40029024)) |
Definition at line 867 of file tm4c123fe6pm.h.
#define PWM1_INTEN_R (*((volatile uint32_t *)0x40029014)) |
Definition at line 863 of file tm4c123fe6pm.h.
#define PWM1_INVERT_R (*((volatile uint32_t *)0x4002900C)) |
Definition at line 861 of file tm4c123fe6pm.h.
#define PWM1_ISC_R (*((volatile uint32_t *)0x4002901C)) |
Definition at line 865 of file tm4c123fe6pm.h.
#define PWM1_PP_R (*((volatile uint32_t *)0x40029FC0)) |
Definition at line 945 of file tm4c123fe6pm.h.
#define PWM1_RIS_R (*((volatile uint32_t *)0x40029018)) |
Definition at line 864 of file tm4c123fe6pm.h.
#define PWM1_STATUS_R (*((volatile uint32_t *)0x40029020)) |
Definition at line 866 of file tm4c123fe6pm.h.
#define PWM1_SYNC_R (*((volatile uint32_t *)0x40029004)) |
Definition at line 859 of file tm4c123fe6pm.h.
#define PWM_0_CMPA_M 0x0000FFFF |
Definition at line 3688 of file tm4c123fe6pm.h.
#define PWM_0_CMPA_S 0 |
Definition at line 3689 of file tm4c123fe6pm.h.
#define PWM_0_CMPB_M 0x0000FFFF |
Definition at line 3696 of file tm4c123fe6pm.h.
#define PWM_0_CMPB_S 0 |
Definition at line 3697 of file tm4c123fe6pm.h.
#define PWM_0_COUNT_M 0x0000FFFF |
Definition at line 3680 of file tm4c123fe6pm.h.
#define PWM_0_COUNT_S 0 |
Definition at line 3681 of file tm4c123fe6pm.h.
#define PWM_0_CTL_CMPAUPD 0x00000010 |
Definition at line 3611 of file tm4c123fe6pm.h.
#define PWM_0_CTL_CMPBUPD 0x00000020 |
Definition at line 3610 of file tm4c123fe6pm.h.
#define PWM_0_CTL_DBCTLUPD_GS 0x00000C00 |
Definition at line 3601 of file tm4c123fe6pm.h.
#define PWM_0_CTL_DBCTLUPD_I 0x00000000 |
Definition at line 3599 of file tm4c123fe6pm.h.
#define PWM_0_CTL_DBCTLUPD_LS 0x00000800 |
Definition at line 3600 of file tm4c123fe6pm.h.
#define PWM_0_CTL_DBCTLUPD_M 0x00000C00 |
Definition at line 3598 of file tm4c123fe6pm.h.
#define PWM_0_CTL_DBFALLUPD_GS 0x0000C000 |
Definition at line 3593 of file tm4c123fe6pm.h.
#define PWM_0_CTL_DBFALLUPD_I 0x00000000 |
Definition at line 3591 of file tm4c123fe6pm.h.
#define PWM_0_CTL_DBFALLUPD_LS 0x00008000 |
Definition at line 3592 of file tm4c123fe6pm.h.
#define PWM_0_CTL_DBFALLUPD_M 0x0000C000 |
Definition at line 3590 of file tm4c123fe6pm.h.
#define PWM_0_CTL_DBRISEUPD_GS 0x00003000 |
Definition at line 3597 of file tm4c123fe6pm.h.
#define PWM_0_CTL_DBRISEUPD_I 0x00000000 |
Definition at line 3595 of file tm4c123fe6pm.h.
#define PWM_0_CTL_DBRISEUPD_LS 0x00002000 |
Definition at line 3596 of file tm4c123fe6pm.h.
#define PWM_0_CTL_DBRISEUPD_M 0x00003000 |
Definition at line 3594 of file tm4c123fe6pm.h.
#define PWM_0_CTL_DEBUG 0x00000004 |
Definition at line 3613 of file tm4c123fe6pm.h.
#define PWM_0_CTL_ENABLE 0x00000001 |
Definition at line 3615 of file tm4c123fe6pm.h.
#define PWM_0_CTL_FLTSRC 0x00010000 |
Definition at line 3589 of file tm4c123fe6pm.h.
#define PWM_0_CTL_GENAUPD_GS 0x000000C0 |
Definition at line 3609 of file tm4c123fe6pm.h.
#define PWM_0_CTL_GENAUPD_I 0x00000000 |
Definition at line 3607 of file tm4c123fe6pm.h.
#define PWM_0_CTL_GENAUPD_LS 0x00000080 |
Definition at line 3608 of file tm4c123fe6pm.h.
#define PWM_0_CTL_GENAUPD_M 0x000000C0 |
Definition at line 3606 of file tm4c123fe6pm.h.
#define PWM_0_CTL_GENBUPD_GS 0x00000300 |
Definition at line 3605 of file tm4c123fe6pm.h.
#define PWM_0_CTL_GENBUPD_I 0x00000000 |
Definition at line 3603 of file tm4c123fe6pm.h.
#define PWM_0_CTL_GENBUPD_LS 0x00000200 |
Definition at line 3604 of file tm4c123fe6pm.h.
#define PWM_0_CTL_GENBUPD_M 0x00000300 |
Definition at line 3602 of file tm4c123fe6pm.h.
#define PWM_0_CTL_LATCH 0x00040000 |
Definition at line 3587 of file tm4c123fe6pm.h.
#define PWM_0_CTL_LOADUPD 0x00000008 |
Definition at line 3612 of file tm4c123fe6pm.h.
#define PWM_0_CTL_MINFLTPER 0x00020000 |
Definition at line 3588 of file tm4c123fe6pm.h.
#define PWM_0_CTL_MODE 0x00000002 |
Definition at line 3614 of file tm4c123fe6pm.h.
#define PWM_0_DBCTL_ENABLE 0x00000001 |
Definition at line 3792 of file tm4c123fe6pm.h.
#define PWM_0_DBFALL_DELAY_M 0x00000FFF |
Definition at line 3807 of file tm4c123fe6pm.h.
#define PWM_0_DBFALL_DELAY_S 0 |
Definition at line 3808 of file tm4c123fe6pm.h.
#define PWM_0_DBRISE_DELAY_M 0x00000FFF |
Definition at line 3799 of file tm4c123fe6pm.h.
#define PWM_0_DBRISE_DELAY_S 0 |
Definition at line 3800 of file tm4c123fe6pm.h.
#define PWM_0_FLTSEN_FAULT0 0x00000001 |
Definition at line 4654 of file tm4c123fe6pm.h.
#define PWM_0_FLTSEN_FAULT1 0x00000002 |
Definition at line 4653 of file tm4c123fe6pm.h.
#define PWM_0_FLTSEN_FAULT2 0x00000004 |
Definition at line 4652 of file tm4c123fe6pm.h.
#define PWM_0_FLTSEN_FAULT3 0x00000008 |
Definition at line 4651 of file tm4c123fe6pm.h.
#define PWM_0_FLTSRC0_FAULT0 0x00000001 |
Definition at line 3819 of file tm4c123fe6pm.h.
#define PWM_0_FLTSRC0_FAULT1 0x00000002 |
Definition at line 3818 of file tm4c123fe6pm.h.
#define PWM_0_FLTSRC0_FAULT2 0x00000004 |
Definition at line 3817 of file tm4c123fe6pm.h.
#define PWM_0_FLTSRC0_FAULT3 0x00000008 |
Definition at line 3816 of file tm4c123fe6pm.h.
#define PWM_0_FLTSRC1_DCMP0 0x00000001 |
Definition at line 3834 of file tm4c123fe6pm.h.
#define PWM_0_FLTSRC1_DCMP1 0x00000002 |
Definition at line 3833 of file tm4c123fe6pm.h.
#define PWM_0_FLTSRC1_DCMP2 0x00000004 |
Definition at line 3832 of file tm4c123fe6pm.h.
#define PWM_0_FLTSRC1_DCMP3 0x00000008 |
Definition at line 3831 of file tm4c123fe6pm.h.
#define PWM_0_FLTSRC1_DCMP4 0x00000010 |
Definition at line 3830 of file tm4c123fe6pm.h.
#define PWM_0_FLTSRC1_DCMP5 0x00000020 |
Definition at line 3829 of file tm4c123fe6pm.h.
#define PWM_0_FLTSRC1_DCMP6 0x00000040 |
Definition at line 3828 of file tm4c123fe6pm.h.
#define PWM_0_FLTSRC1_DCMP7 0x00000080 |
Definition at line 3827 of file tm4c123fe6pm.h.
#define PWM_0_FLTSTAT0_FAULT0 0x00000001 |
Definition at line 4665 of file tm4c123fe6pm.h.
#define PWM_0_FLTSTAT0_FAULT1 0x00000002 |
Definition at line 4664 of file tm4c123fe6pm.h.
#define PWM_0_FLTSTAT0_FAULT2 0x00000004 |
Definition at line 4663 of file tm4c123fe6pm.h.
#define PWM_0_FLTSTAT0_FAULT3 0x00000008 |
Definition at line 4662 of file tm4c123fe6pm.h.
#define PWM_0_FLTSTAT1_DCMP0 0x00000001 |
Definition at line 4680 of file tm4c123fe6pm.h.
#define PWM_0_FLTSTAT1_DCMP1 0x00000002 |
Definition at line 4679 of file tm4c123fe6pm.h.
#define PWM_0_FLTSTAT1_DCMP2 0x00000004 |
Definition at line 4678 of file tm4c123fe6pm.h.
#define PWM_0_FLTSTAT1_DCMP3 0x00000008 |
Definition at line 4677 of file tm4c123fe6pm.h.
#define PWM_0_FLTSTAT1_DCMP4 0x00000010 |
Definition at line 4676 of file tm4c123fe6pm.h.
#define PWM_0_FLTSTAT1_DCMP5 0x00000020 |
Definition at line 4675 of file tm4c123fe6pm.h.
#define PWM_0_FLTSTAT1_DCMP6 0x00000040 |
Definition at line 4674 of file tm4c123fe6pm.h.
#define PWM_0_FLTSTAT1_DCMP7 0x00000080 |
Definition at line 4673 of file tm4c123fe6pm.h.
#define PWM_0_GENA_ACTCMPAD_INV 0x00000040 |
Definition at line 3721 of file tm4c123fe6pm.h.
#define PWM_0_GENA_ACTCMPAD_M 0x000000C0 |
Definition at line 3718 of file tm4c123fe6pm.h.
#define PWM_0_GENA_ACTCMPAD_NONE 0x00000000 |
Definition at line 3719 of file tm4c123fe6pm.h.
#define PWM_0_GENA_ACTCMPAD_ONE 0x000000C0 |
Definition at line 3724 of file tm4c123fe6pm.h.
#define PWM_0_GENA_ACTCMPAD_ZERO 0x00000080 |
Definition at line 3722 of file tm4c123fe6pm.h.
#define PWM_0_GENA_ACTCMPAU_INV 0x00000010 |
Definition at line 3728 of file tm4c123fe6pm.h.
#define PWM_0_GENA_ACTCMPAU_M 0x00000030 |
Definition at line 3725 of file tm4c123fe6pm.h.
#define PWM_0_GENA_ACTCMPAU_NONE 0x00000000 |
Definition at line 3726 of file tm4c123fe6pm.h.
#define PWM_0_GENA_ACTCMPAU_ONE 0x00000030 |
Definition at line 3731 of file tm4c123fe6pm.h.
#define PWM_0_GENA_ACTCMPAU_ZERO 0x00000020 |
Definition at line 3729 of file tm4c123fe6pm.h.
#define PWM_0_GENA_ACTCMPBD_INV 0x00000400 |
Definition at line 3707 of file tm4c123fe6pm.h.
#define PWM_0_GENA_ACTCMPBD_M 0x00000C00 |
Definition at line 3704 of file tm4c123fe6pm.h.
#define PWM_0_GENA_ACTCMPBD_NONE 0x00000000 |
Definition at line 3705 of file tm4c123fe6pm.h.
#define PWM_0_GENA_ACTCMPBD_ONE 0x00000C00 |
Definition at line 3710 of file tm4c123fe6pm.h.
#define PWM_0_GENA_ACTCMPBD_ZERO 0x00000800 |
Definition at line 3708 of file tm4c123fe6pm.h.
#define PWM_0_GENA_ACTCMPBU_INV 0x00000100 |
Definition at line 3714 of file tm4c123fe6pm.h.
#define PWM_0_GENA_ACTCMPBU_M 0x00000300 |
Definition at line 3711 of file tm4c123fe6pm.h.
#define PWM_0_GENA_ACTCMPBU_NONE 0x00000000 |
Definition at line 3712 of file tm4c123fe6pm.h.
#define PWM_0_GENA_ACTCMPBU_ONE 0x00000300 |
Definition at line 3717 of file tm4c123fe6pm.h.
#define PWM_0_GENA_ACTCMPBU_ZERO 0x00000200 |
Definition at line 3715 of file tm4c123fe6pm.h.
#define PWM_0_GENA_ACTLOAD_INV 0x00000004 |
Definition at line 3734 of file tm4c123fe6pm.h.
#define PWM_0_GENA_ACTLOAD_M 0x0000000C |
Definition at line 3732 of file tm4c123fe6pm.h.
#define PWM_0_GENA_ACTLOAD_NONE 0x00000000 |
Definition at line 3733 of file tm4c123fe6pm.h.
#define PWM_0_GENA_ACTLOAD_ONE 0x0000000C |
Definition at line 3736 of file tm4c123fe6pm.h.
#define PWM_0_GENA_ACTLOAD_ZERO 0x00000008 |
Definition at line 3735 of file tm4c123fe6pm.h.
#define PWM_0_GENA_ACTZERO_INV 0x00000001 |
Definition at line 3739 of file tm4c123fe6pm.h.
#define PWM_0_GENA_ACTZERO_M 0x00000003 |
Definition at line 3737 of file tm4c123fe6pm.h.
#define PWM_0_GENA_ACTZERO_NONE 0x00000000 |
Definition at line 3738 of file tm4c123fe6pm.h.
#define PWM_0_GENA_ACTZERO_ONE 0x00000003 |
Definition at line 3741 of file tm4c123fe6pm.h.
#define PWM_0_GENA_ACTZERO_ZERO 0x00000002 |
Definition at line 3740 of file tm4c123fe6pm.h.
#define PWM_0_GENB_ACTCMPAD_INV 0x00000040 |
Definition at line 3765 of file tm4c123fe6pm.h.
#define PWM_0_GENB_ACTCMPAD_M 0x000000C0 |
Definition at line 3762 of file tm4c123fe6pm.h.
#define PWM_0_GENB_ACTCMPAD_NONE 0x00000000 |
Definition at line 3763 of file tm4c123fe6pm.h.
#define PWM_0_GENB_ACTCMPAD_ONE 0x000000C0 |
Definition at line 3768 of file tm4c123fe6pm.h.
#define PWM_0_GENB_ACTCMPAD_ZERO 0x00000080 |
Definition at line 3766 of file tm4c123fe6pm.h.
#define PWM_0_GENB_ACTCMPAU_INV 0x00000010 |
Definition at line 3772 of file tm4c123fe6pm.h.
#define PWM_0_GENB_ACTCMPAU_M 0x00000030 |
Definition at line 3769 of file tm4c123fe6pm.h.
#define PWM_0_GENB_ACTCMPAU_NONE 0x00000000 |
Definition at line 3770 of file tm4c123fe6pm.h.
#define PWM_0_GENB_ACTCMPAU_ONE 0x00000030 |
Definition at line 3775 of file tm4c123fe6pm.h.
#define PWM_0_GENB_ACTCMPAU_ZERO 0x00000020 |
Definition at line 3773 of file tm4c123fe6pm.h.
#define PWM_0_GENB_ACTCMPBD_INV 0x00000400 |
Definition at line 3751 of file tm4c123fe6pm.h.
#define PWM_0_GENB_ACTCMPBD_M 0x00000C00 |
Definition at line 3748 of file tm4c123fe6pm.h.
#define PWM_0_GENB_ACTCMPBD_NONE 0x00000000 |
Definition at line 3749 of file tm4c123fe6pm.h.
#define PWM_0_GENB_ACTCMPBD_ONE 0x00000C00 |
Definition at line 3754 of file tm4c123fe6pm.h.
#define PWM_0_GENB_ACTCMPBD_ZERO 0x00000800 |
Definition at line 3752 of file tm4c123fe6pm.h.
#define PWM_0_GENB_ACTCMPBU_INV 0x00000100 |
Definition at line 3758 of file tm4c123fe6pm.h.
#define PWM_0_GENB_ACTCMPBU_M 0x00000300 |
Definition at line 3755 of file tm4c123fe6pm.h.
#define PWM_0_GENB_ACTCMPBU_NONE 0x00000000 |
Definition at line 3756 of file tm4c123fe6pm.h.
#define PWM_0_GENB_ACTCMPBU_ONE 0x00000300 |
Definition at line 3761 of file tm4c123fe6pm.h.
#define PWM_0_GENB_ACTCMPBU_ZERO 0x00000200 |
Definition at line 3759 of file tm4c123fe6pm.h.
#define PWM_0_GENB_ACTLOAD_INV 0x00000004 |
Definition at line 3778 of file tm4c123fe6pm.h.
#define PWM_0_GENB_ACTLOAD_M 0x0000000C |
Definition at line 3776 of file tm4c123fe6pm.h.
#define PWM_0_GENB_ACTLOAD_NONE 0x00000000 |
Definition at line 3777 of file tm4c123fe6pm.h.
#define PWM_0_GENB_ACTLOAD_ONE 0x0000000C |
Definition at line 3780 of file tm4c123fe6pm.h.
#define PWM_0_GENB_ACTLOAD_ZERO 0x00000008 |
Definition at line 3779 of file tm4c123fe6pm.h.
#define PWM_0_GENB_ACTZERO_INV 0x00000001 |
Definition at line 3783 of file tm4c123fe6pm.h.
#define PWM_0_GENB_ACTZERO_M 0x00000003 |
Definition at line 3781 of file tm4c123fe6pm.h.
#define PWM_0_GENB_ACTZERO_NONE 0x00000000 |
Definition at line 3782 of file tm4c123fe6pm.h.
#define PWM_0_GENB_ACTZERO_ONE 0x00000003 |
Definition at line 3785 of file tm4c123fe6pm.h.
#define PWM_0_GENB_ACTZERO_ZERO 0x00000002 |
Definition at line 3784 of file tm4c123fe6pm.h.
#define PWM_0_INTEN_INTCMPAD 0x00000008 |
Definition at line 3634 of file tm4c123fe6pm.h.
#define PWM_0_INTEN_INTCMPAU 0x00000004 |
Definition at line 3636 of file tm4c123fe6pm.h.
#define PWM_0_INTEN_INTCMPBD 0x00000020 |
Definition at line 3630 of file tm4c123fe6pm.h.
#define PWM_0_INTEN_INTCMPBU 0x00000010 |
Definition at line 3632 of file tm4c123fe6pm.h.
#define PWM_0_INTEN_INTCNTLOAD 0x00000002 |
Definition at line 3638 of file tm4c123fe6pm.h.
#define PWM_0_INTEN_INTCNTZERO 0x00000001 |
Definition at line 3639 of file tm4c123fe6pm.h.
#define PWM_0_INTEN_TRCMPAD 0x00000800 |
Definition at line 3625 of file tm4c123fe6pm.h.
#define PWM_0_INTEN_TRCMPAU 0x00000400 |
Definition at line 3627 of file tm4c123fe6pm.h.
#define PWM_0_INTEN_TRCMPBD 0x00002000 |
Definition at line 3622 of file tm4c123fe6pm.h.
#define PWM_0_INTEN_TRCMPBU 0x00001000 |
Definition at line 3624 of file tm4c123fe6pm.h.
#define PWM_0_INTEN_TRCNTLOAD 0x00000200 |
Definition at line 3628 of file tm4c123fe6pm.h.
#define PWM_0_INTEN_TRCNTZERO 0x00000100 |
Definition at line 3629 of file tm4c123fe6pm.h.
#define PWM_0_ISC_INTCMPAD 0x00000008 |
Definition at line 3662 of file tm4c123fe6pm.h.
#define PWM_0_ISC_INTCMPAU 0x00000004 |
Definition at line 3663 of file tm4c123fe6pm.h.
#define PWM_0_ISC_INTCMPBD 0x00000020 |
Definition at line 3660 of file tm4c123fe6pm.h.
#define PWM_0_ISC_INTCMPBU 0x00000010 |
Definition at line 3661 of file tm4c123fe6pm.h.
#define PWM_0_ISC_INTCNTLOAD 0x00000002 |
Definition at line 3664 of file tm4c123fe6pm.h.
#define PWM_0_ISC_INTCNTZERO 0x00000001 |
Definition at line 3665 of file tm4c123fe6pm.h.
#define PWM_0_LOAD_M 0x0000FFFF |
Definition at line 3672 of file tm4c123fe6pm.h.
#define PWM_0_LOAD_S 0 |
Definition at line 3673 of file tm4c123fe6pm.h.
#define PWM_0_MINFLTPER_M 0x0000FFFF |
Definition at line 3842 of file tm4c123fe6pm.h.
#define PWM_0_MINFLTPER_S 0 |
Definition at line 3843 of file tm4c123fe6pm.h.
#define PWM_0_RIS_INTCMPAD 0x00000008 |
Definition at line 3649 of file tm4c123fe6pm.h.
#define PWM_0_RIS_INTCMPAU 0x00000004 |
Definition at line 3651 of file tm4c123fe6pm.h.
#define PWM_0_RIS_INTCMPBD 0x00000020 |
Definition at line 3646 of file tm4c123fe6pm.h.
#define PWM_0_RIS_INTCMPBU 0x00000010 |
Definition at line 3648 of file tm4c123fe6pm.h.
#define PWM_0_RIS_INTCNTLOAD 0x00000002 |
Definition at line 3652 of file tm4c123fe6pm.h.
#define PWM_0_RIS_INTCNTZERO 0x00000001 |
Definition at line 3653 of file tm4c123fe6pm.h.
#define PWM_1_CMPA_COMPA_M 0x0000FFFF |
Definition at line 3951 of file tm4c123fe6pm.h.
#define PWM_1_CMPA_COMPA_S 0 |
Definition at line 3952 of file tm4c123fe6pm.h.
#define PWM_1_CMPB_COMPB_M 0x0000FFFF |
Definition at line 3959 of file tm4c123fe6pm.h.
#define PWM_1_CMPB_COMPB_S 0 |
Definition at line 3960 of file tm4c123fe6pm.h.
#define PWM_1_COUNT_COUNT_M 0x0000FFFF |
Definition at line 3943 of file tm4c123fe6pm.h.
#define PWM_1_COUNT_COUNT_S 0 |
Definition at line 3944 of file tm4c123fe6pm.h.
#define PWM_1_CTL_CMPAUPD 0x00000010 |
Definition at line 3874 of file tm4c123fe6pm.h.
#define PWM_1_CTL_CMPBUPD 0x00000020 |
Definition at line 3873 of file tm4c123fe6pm.h.
#define PWM_1_CTL_DBCTLUPD_GS 0x00000C00 |
Definition at line 3864 of file tm4c123fe6pm.h.
#define PWM_1_CTL_DBCTLUPD_I 0x00000000 |
Definition at line 3862 of file tm4c123fe6pm.h.
#define PWM_1_CTL_DBCTLUPD_LS 0x00000800 |
Definition at line 3863 of file tm4c123fe6pm.h.
#define PWM_1_CTL_DBCTLUPD_M 0x00000C00 |
Definition at line 3861 of file tm4c123fe6pm.h.
#define PWM_1_CTL_DBFALLUPD_GS 0x0000C000 |
Definition at line 3856 of file tm4c123fe6pm.h.
#define PWM_1_CTL_DBFALLUPD_I 0x00000000 |
Definition at line 3854 of file tm4c123fe6pm.h.
#define PWM_1_CTL_DBFALLUPD_LS 0x00008000 |
Definition at line 3855 of file tm4c123fe6pm.h.
#define PWM_1_CTL_DBFALLUPD_M 0x0000C000 |
Definition at line 3853 of file tm4c123fe6pm.h.
#define PWM_1_CTL_DBRISEUPD_GS 0x00003000 |
Definition at line 3860 of file tm4c123fe6pm.h.
#define PWM_1_CTL_DBRISEUPD_I 0x00000000 |
Definition at line 3858 of file tm4c123fe6pm.h.
#define PWM_1_CTL_DBRISEUPD_LS 0x00002000 |
Definition at line 3859 of file tm4c123fe6pm.h.
#define PWM_1_CTL_DBRISEUPD_M 0x00003000 |
Definition at line 3857 of file tm4c123fe6pm.h.
#define PWM_1_CTL_DEBUG 0x00000004 |
Definition at line 3876 of file tm4c123fe6pm.h.
#define PWM_1_CTL_ENABLE 0x00000001 |
Definition at line 3878 of file tm4c123fe6pm.h.
#define PWM_1_CTL_FLTSRC 0x00010000 |
Definition at line 3852 of file tm4c123fe6pm.h.
#define PWM_1_CTL_GENAUPD_GS 0x000000C0 |
Definition at line 3872 of file tm4c123fe6pm.h.
#define PWM_1_CTL_GENAUPD_I 0x00000000 |
Definition at line 3870 of file tm4c123fe6pm.h.
#define PWM_1_CTL_GENAUPD_LS 0x00000080 |
Definition at line 3871 of file tm4c123fe6pm.h.
#define PWM_1_CTL_GENAUPD_M 0x000000C0 |
Definition at line 3869 of file tm4c123fe6pm.h.
#define PWM_1_CTL_GENBUPD_GS 0x00000300 |
Definition at line 3868 of file tm4c123fe6pm.h.
#define PWM_1_CTL_GENBUPD_I 0x00000000 |
Definition at line 3866 of file tm4c123fe6pm.h.
#define PWM_1_CTL_GENBUPD_LS 0x00000200 |
Definition at line 3867 of file tm4c123fe6pm.h.
#define PWM_1_CTL_GENBUPD_M 0x00000300 |
Definition at line 3865 of file tm4c123fe6pm.h.
#define PWM_1_CTL_LATCH 0x00040000 |
Definition at line 3850 of file tm4c123fe6pm.h.
#define PWM_1_CTL_LOADUPD 0x00000008 |
Definition at line 3875 of file tm4c123fe6pm.h.
#define PWM_1_CTL_MINFLTPER 0x00020000 |
Definition at line 3851 of file tm4c123fe6pm.h.
#define PWM_1_CTL_MODE 0x00000002 |
Definition at line 3877 of file tm4c123fe6pm.h.
#define PWM_1_DBCTL_ENABLE 0x00000001 |
Definition at line 4055 of file tm4c123fe6pm.h.
#define PWM_1_DBFALL_FALLDELAY_M 0x00000FFF |
Definition at line 4072 of file tm4c123fe6pm.h.
#define PWM_1_DBFALL_FALLDELAY_S 0 |
Definition at line 4074 of file tm4c123fe6pm.h.
#define PWM_1_DBRISE_RISEDELAY_M 0x00000FFF |
Definition at line 4062 of file tm4c123fe6pm.h.
#define PWM_1_DBRISE_RISEDELAY_S 0 |
Definition at line 4064 of file tm4c123fe6pm.h.
#define PWM_1_FLTSEN_FAULT0 0x00000001 |
Definition at line 4690 of file tm4c123fe6pm.h.
#define PWM_1_FLTSEN_FAULT1 0x00000002 |
Definition at line 4689 of file tm4c123fe6pm.h.
#define PWM_1_FLTSEN_FAULT2 0x00000004 |
Definition at line 4688 of file tm4c123fe6pm.h.
#define PWM_1_FLTSEN_FAULT3 0x00000008 |
Definition at line 4687 of file tm4c123fe6pm.h.
#define PWM_1_FLTSRC0_FAULT0 0x00000001 |
Definition at line 4086 of file tm4c123fe6pm.h.
#define PWM_1_FLTSRC0_FAULT1 0x00000002 |
Definition at line 4085 of file tm4c123fe6pm.h.
#define PWM_1_FLTSRC0_FAULT2 0x00000004 |
Definition at line 4084 of file tm4c123fe6pm.h.
#define PWM_1_FLTSRC0_FAULT3 0x00000008 |
Definition at line 4083 of file tm4c123fe6pm.h.
#define PWM_1_FLTSRC1_DCMP0 0x00000001 |
Definition at line 4101 of file tm4c123fe6pm.h.
#define PWM_1_FLTSRC1_DCMP1 0x00000002 |
Definition at line 4100 of file tm4c123fe6pm.h.
#define PWM_1_FLTSRC1_DCMP2 0x00000004 |
Definition at line 4099 of file tm4c123fe6pm.h.
#define PWM_1_FLTSRC1_DCMP3 0x00000008 |
Definition at line 4098 of file tm4c123fe6pm.h.
#define PWM_1_FLTSRC1_DCMP4 0x00000010 |
Definition at line 4097 of file tm4c123fe6pm.h.
#define PWM_1_FLTSRC1_DCMP5 0x00000020 |
Definition at line 4096 of file tm4c123fe6pm.h.
#define PWM_1_FLTSRC1_DCMP6 0x00000040 |
Definition at line 4095 of file tm4c123fe6pm.h.
#define PWM_1_FLTSRC1_DCMP7 0x00000080 |
Definition at line 4094 of file tm4c123fe6pm.h.
#define PWM_1_FLTSTAT0_FAULT0 0x00000001 |
Definition at line 4701 of file tm4c123fe6pm.h.
#define PWM_1_FLTSTAT0_FAULT1 0x00000002 |
Definition at line 4700 of file tm4c123fe6pm.h.
#define PWM_1_FLTSTAT0_FAULT2 0x00000004 |
Definition at line 4699 of file tm4c123fe6pm.h.
#define PWM_1_FLTSTAT0_FAULT3 0x00000008 |
Definition at line 4698 of file tm4c123fe6pm.h.
#define PWM_1_FLTSTAT1_DCMP0 0x00000001 |
Definition at line 4716 of file tm4c123fe6pm.h.
#define PWM_1_FLTSTAT1_DCMP1 0x00000002 |
Definition at line 4715 of file tm4c123fe6pm.h.
#define PWM_1_FLTSTAT1_DCMP2 0x00000004 |
Definition at line 4714 of file tm4c123fe6pm.h.
#define PWM_1_FLTSTAT1_DCMP3 0x00000008 |
Definition at line 4713 of file tm4c123fe6pm.h.
#define PWM_1_FLTSTAT1_DCMP4 0x00000010 |
Definition at line 4712 of file tm4c123fe6pm.h.
#define PWM_1_FLTSTAT1_DCMP5 0x00000020 |
Definition at line 4711 of file tm4c123fe6pm.h.
#define PWM_1_FLTSTAT1_DCMP6 0x00000040 |
Definition at line 4710 of file tm4c123fe6pm.h.
#define PWM_1_FLTSTAT1_DCMP7 0x00000080 |
Definition at line 4709 of file tm4c123fe6pm.h.
#define PWM_1_GENA_ACTCMPAD_INV 0x00000040 |
Definition at line 3984 of file tm4c123fe6pm.h.
#define PWM_1_GENA_ACTCMPAD_M 0x000000C0 |
Definition at line 3981 of file tm4c123fe6pm.h.
#define PWM_1_GENA_ACTCMPAD_NONE 0x00000000 |
Definition at line 3982 of file tm4c123fe6pm.h.
#define PWM_1_GENA_ACTCMPAD_ONE 0x000000C0 |
Definition at line 3987 of file tm4c123fe6pm.h.
#define PWM_1_GENA_ACTCMPAD_ZERO 0x00000080 |
Definition at line 3985 of file tm4c123fe6pm.h.
#define PWM_1_GENA_ACTCMPAU_INV 0x00000010 |
Definition at line 3991 of file tm4c123fe6pm.h.
#define PWM_1_GENA_ACTCMPAU_M 0x00000030 |
Definition at line 3988 of file tm4c123fe6pm.h.
#define PWM_1_GENA_ACTCMPAU_NONE 0x00000000 |
Definition at line 3989 of file tm4c123fe6pm.h.
#define PWM_1_GENA_ACTCMPAU_ONE 0x00000030 |
Definition at line 3994 of file tm4c123fe6pm.h.
#define PWM_1_GENA_ACTCMPAU_ZERO 0x00000020 |
Definition at line 3992 of file tm4c123fe6pm.h.
#define PWM_1_GENA_ACTCMPBD_INV 0x00000400 |
Definition at line 3970 of file tm4c123fe6pm.h.
#define PWM_1_GENA_ACTCMPBD_M 0x00000C00 |
Definition at line 3967 of file tm4c123fe6pm.h.
#define PWM_1_GENA_ACTCMPBD_NONE 0x00000000 |
Definition at line 3968 of file tm4c123fe6pm.h.
#define PWM_1_GENA_ACTCMPBD_ONE 0x00000C00 |
Definition at line 3973 of file tm4c123fe6pm.h.
#define PWM_1_GENA_ACTCMPBD_ZERO 0x00000800 |
Definition at line 3971 of file tm4c123fe6pm.h.
#define PWM_1_GENA_ACTCMPBU_INV 0x00000100 |
Definition at line 3977 of file tm4c123fe6pm.h.
#define PWM_1_GENA_ACTCMPBU_M 0x00000300 |
Definition at line 3974 of file tm4c123fe6pm.h.
#define PWM_1_GENA_ACTCMPBU_NONE 0x00000000 |
Definition at line 3975 of file tm4c123fe6pm.h.
#define PWM_1_GENA_ACTCMPBU_ONE 0x00000300 |
Definition at line 3980 of file tm4c123fe6pm.h.
#define PWM_1_GENA_ACTCMPBU_ZERO 0x00000200 |
Definition at line 3978 of file tm4c123fe6pm.h.
#define PWM_1_GENA_ACTLOAD_INV 0x00000004 |
Definition at line 3997 of file tm4c123fe6pm.h.
#define PWM_1_GENA_ACTLOAD_M 0x0000000C |
Definition at line 3995 of file tm4c123fe6pm.h.
#define PWM_1_GENA_ACTLOAD_NONE 0x00000000 |
Definition at line 3996 of file tm4c123fe6pm.h.
#define PWM_1_GENA_ACTLOAD_ONE 0x0000000C |
Definition at line 3999 of file tm4c123fe6pm.h.
#define PWM_1_GENA_ACTLOAD_ZERO 0x00000008 |
Definition at line 3998 of file tm4c123fe6pm.h.
#define PWM_1_GENA_ACTZERO_INV 0x00000001 |
Definition at line 4002 of file tm4c123fe6pm.h.
#define PWM_1_GENA_ACTZERO_M 0x00000003 |
Definition at line 4000 of file tm4c123fe6pm.h.
#define PWM_1_GENA_ACTZERO_NONE 0x00000000 |
Definition at line 4001 of file tm4c123fe6pm.h.
#define PWM_1_GENA_ACTZERO_ONE 0x00000003 |
Definition at line 4004 of file tm4c123fe6pm.h.
#define PWM_1_GENA_ACTZERO_ZERO 0x00000002 |
Definition at line 4003 of file tm4c123fe6pm.h.
#define PWM_1_GENB_ACTCMPAD_INV 0x00000040 |
Definition at line 4028 of file tm4c123fe6pm.h.
#define PWM_1_GENB_ACTCMPAD_M 0x000000C0 |
Definition at line 4025 of file tm4c123fe6pm.h.
#define PWM_1_GENB_ACTCMPAD_NONE 0x00000000 |
Definition at line 4026 of file tm4c123fe6pm.h.
#define PWM_1_GENB_ACTCMPAD_ONE 0x000000C0 |
Definition at line 4031 of file tm4c123fe6pm.h.
#define PWM_1_GENB_ACTCMPAD_ZERO 0x00000080 |
Definition at line 4029 of file tm4c123fe6pm.h.
#define PWM_1_GENB_ACTCMPAU_INV 0x00000010 |
Definition at line 4035 of file tm4c123fe6pm.h.
#define PWM_1_GENB_ACTCMPAU_M 0x00000030 |
Definition at line 4032 of file tm4c123fe6pm.h.
#define PWM_1_GENB_ACTCMPAU_NONE 0x00000000 |
Definition at line 4033 of file tm4c123fe6pm.h.
#define PWM_1_GENB_ACTCMPAU_ONE 0x00000030 |
Definition at line 4038 of file tm4c123fe6pm.h.
#define PWM_1_GENB_ACTCMPAU_ZERO 0x00000020 |
Definition at line 4036 of file tm4c123fe6pm.h.
#define PWM_1_GENB_ACTCMPBD_INV 0x00000400 |
Definition at line 4014 of file tm4c123fe6pm.h.
#define PWM_1_GENB_ACTCMPBD_M 0x00000C00 |
Definition at line 4011 of file tm4c123fe6pm.h.
#define PWM_1_GENB_ACTCMPBD_NONE 0x00000000 |
Definition at line 4012 of file tm4c123fe6pm.h.
#define PWM_1_GENB_ACTCMPBD_ONE 0x00000C00 |
Definition at line 4017 of file tm4c123fe6pm.h.
#define PWM_1_GENB_ACTCMPBD_ZERO 0x00000800 |
Definition at line 4015 of file tm4c123fe6pm.h.
#define PWM_1_GENB_ACTCMPBU_INV 0x00000100 |
Definition at line 4021 of file tm4c123fe6pm.h.
#define PWM_1_GENB_ACTCMPBU_M 0x00000300 |
Definition at line 4018 of file tm4c123fe6pm.h.
#define PWM_1_GENB_ACTCMPBU_NONE 0x00000000 |
Definition at line 4019 of file tm4c123fe6pm.h.
#define PWM_1_GENB_ACTCMPBU_ONE 0x00000300 |
Definition at line 4024 of file tm4c123fe6pm.h.
#define PWM_1_GENB_ACTCMPBU_ZERO 0x00000200 |
Definition at line 4022 of file tm4c123fe6pm.h.
#define PWM_1_GENB_ACTLOAD_INV 0x00000004 |
Definition at line 4041 of file tm4c123fe6pm.h.
#define PWM_1_GENB_ACTLOAD_M 0x0000000C |
Definition at line 4039 of file tm4c123fe6pm.h.
#define PWM_1_GENB_ACTLOAD_NONE 0x00000000 |
Definition at line 4040 of file tm4c123fe6pm.h.
#define PWM_1_GENB_ACTLOAD_ONE 0x0000000C |
Definition at line 4043 of file tm4c123fe6pm.h.
#define PWM_1_GENB_ACTLOAD_ZERO 0x00000008 |
Definition at line 4042 of file tm4c123fe6pm.h.
#define PWM_1_GENB_ACTZERO_INV 0x00000001 |
Definition at line 4046 of file tm4c123fe6pm.h.
#define PWM_1_GENB_ACTZERO_M 0x00000003 |
Definition at line 4044 of file tm4c123fe6pm.h.
#define PWM_1_GENB_ACTZERO_NONE 0x00000000 |
Definition at line 4045 of file tm4c123fe6pm.h.
#define PWM_1_GENB_ACTZERO_ONE 0x00000003 |
Definition at line 4048 of file tm4c123fe6pm.h.
#define PWM_1_GENB_ACTZERO_ZERO 0x00000002 |
Definition at line 4047 of file tm4c123fe6pm.h.
#define PWM_1_INTEN_INTCMPAD 0x00000008 |
Definition at line 3897 of file tm4c123fe6pm.h.
#define PWM_1_INTEN_INTCMPAU 0x00000004 |
Definition at line 3899 of file tm4c123fe6pm.h.
#define PWM_1_INTEN_INTCMPBD 0x00000020 |
Definition at line 3893 of file tm4c123fe6pm.h.
#define PWM_1_INTEN_INTCMPBU 0x00000010 |
Definition at line 3895 of file tm4c123fe6pm.h.
#define PWM_1_INTEN_INTCNTLOAD 0x00000002 |
Definition at line 3901 of file tm4c123fe6pm.h.
#define PWM_1_INTEN_INTCNTZERO 0x00000001 |
Definition at line 3902 of file tm4c123fe6pm.h.
#define PWM_1_INTEN_TRCMPAD 0x00000800 |
Definition at line 3888 of file tm4c123fe6pm.h.
#define PWM_1_INTEN_TRCMPAU 0x00000400 |
Definition at line 3890 of file tm4c123fe6pm.h.
#define PWM_1_INTEN_TRCMPBD 0x00002000 |
Definition at line 3885 of file tm4c123fe6pm.h.
#define PWM_1_INTEN_TRCMPBU 0x00001000 |
Definition at line 3887 of file tm4c123fe6pm.h.
#define PWM_1_INTEN_TRCNTLOAD 0x00000200 |
Definition at line 3891 of file tm4c123fe6pm.h.
#define PWM_1_INTEN_TRCNTZERO 0x00000100 |
Definition at line 3892 of file tm4c123fe6pm.h.
#define PWM_1_ISC_INTCMPAD 0x00000008 |
Definition at line 3925 of file tm4c123fe6pm.h.
#define PWM_1_ISC_INTCMPAU 0x00000004 |
Definition at line 3926 of file tm4c123fe6pm.h.
#define PWM_1_ISC_INTCMPBD 0x00000020 |
Definition at line 3923 of file tm4c123fe6pm.h.
#define PWM_1_ISC_INTCMPBU 0x00000010 |
Definition at line 3924 of file tm4c123fe6pm.h.
#define PWM_1_ISC_INTCNTLOAD 0x00000002 |
Definition at line 3927 of file tm4c123fe6pm.h.
#define PWM_1_ISC_INTCNTZERO 0x00000001 |
Definition at line 3928 of file tm4c123fe6pm.h.
#define PWM_1_LOAD_LOAD_M 0x0000FFFF |
Definition at line 3935 of file tm4c123fe6pm.h.
#define PWM_1_LOAD_LOAD_S 0 |
Definition at line 3936 of file tm4c123fe6pm.h.
#define PWM_1_MINFLTPER_MFP_M 0x0000FFFF |
Definition at line 4109 of file tm4c123fe6pm.h.
#define PWM_1_MINFLTPER_MFP_S 0 |
Definition at line 4110 of file tm4c123fe6pm.h.
#define PWM_1_RIS_INTCMPAD 0x00000008 |
Definition at line 3912 of file tm4c123fe6pm.h.
#define PWM_1_RIS_INTCMPAU 0x00000004 |
Definition at line 3914 of file tm4c123fe6pm.h.
#define PWM_1_RIS_INTCMPBD 0x00000020 |
Definition at line 3909 of file tm4c123fe6pm.h.
#define PWM_1_RIS_INTCMPBU 0x00000010 |
Definition at line 3911 of file tm4c123fe6pm.h.
#define PWM_1_RIS_INTCNTLOAD 0x00000002 |
Definition at line 3915 of file tm4c123fe6pm.h.
#define PWM_1_RIS_INTCNTZERO 0x00000001 |
Definition at line 3916 of file tm4c123fe6pm.h.
#define PWM_2_CMPA_COMPA_M 0x0000FFFF |
Definition at line 4218 of file tm4c123fe6pm.h.
#define PWM_2_CMPA_COMPA_S 0 |
Definition at line 4219 of file tm4c123fe6pm.h.
#define PWM_2_CMPB_COMPB_M 0x0000FFFF |
Definition at line 4226 of file tm4c123fe6pm.h.
#define PWM_2_CMPB_COMPB_S 0 |
Definition at line 4227 of file tm4c123fe6pm.h.
#define PWM_2_COUNT_COUNT_M 0x0000FFFF |
Definition at line 4210 of file tm4c123fe6pm.h.
#define PWM_2_COUNT_COUNT_S 0 |
Definition at line 4211 of file tm4c123fe6pm.h.
#define PWM_2_CTL_CMPAUPD 0x00000010 |
Definition at line 4141 of file tm4c123fe6pm.h.
#define PWM_2_CTL_CMPBUPD 0x00000020 |
Definition at line 4140 of file tm4c123fe6pm.h.
#define PWM_2_CTL_DBCTLUPD_GS 0x00000C00 |
Definition at line 4131 of file tm4c123fe6pm.h.
#define PWM_2_CTL_DBCTLUPD_I 0x00000000 |
Definition at line 4129 of file tm4c123fe6pm.h.
#define PWM_2_CTL_DBCTLUPD_LS 0x00000800 |
Definition at line 4130 of file tm4c123fe6pm.h.
#define PWM_2_CTL_DBCTLUPD_M 0x00000C00 |
Definition at line 4128 of file tm4c123fe6pm.h.
#define PWM_2_CTL_DBFALLUPD_GS 0x0000C000 |
Definition at line 4123 of file tm4c123fe6pm.h.
#define PWM_2_CTL_DBFALLUPD_I 0x00000000 |
Definition at line 4121 of file tm4c123fe6pm.h.
#define PWM_2_CTL_DBFALLUPD_LS 0x00008000 |
Definition at line 4122 of file tm4c123fe6pm.h.
#define PWM_2_CTL_DBFALLUPD_M 0x0000C000 |
Definition at line 4120 of file tm4c123fe6pm.h.
#define PWM_2_CTL_DBRISEUPD_GS 0x00003000 |
Definition at line 4127 of file tm4c123fe6pm.h.
#define PWM_2_CTL_DBRISEUPD_I 0x00000000 |
Definition at line 4125 of file tm4c123fe6pm.h.
#define PWM_2_CTL_DBRISEUPD_LS 0x00002000 |
Definition at line 4126 of file tm4c123fe6pm.h.
#define PWM_2_CTL_DBRISEUPD_M 0x00003000 |
Definition at line 4124 of file tm4c123fe6pm.h.
#define PWM_2_CTL_DEBUG 0x00000004 |
Definition at line 4143 of file tm4c123fe6pm.h.
#define PWM_2_CTL_ENABLE 0x00000001 |
Definition at line 4145 of file tm4c123fe6pm.h.
#define PWM_2_CTL_FLTSRC 0x00010000 |
Definition at line 4119 of file tm4c123fe6pm.h.
#define PWM_2_CTL_GENAUPD_GS 0x000000C0 |
Definition at line 4139 of file tm4c123fe6pm.h.
#define PWM_2_CTL_GENAUPD_I 0x00000000 |
Definition at line 4137 of file tm4c123fe6pm.h.
#define PWM_2_CTL_GENAUPD_LS 0x00000080 |
Definition at line 4138 of file tm4c123fe6pm.h.
#define PWM_2_CTL_GENAUPD_M 0x000000C0 |
Definition at line 4136 of file tm4c123fe6pm.h.
#define PWM_2_CTL_GENBUPD_GS 0x00000300 |
Definition at line 4135 of file tm4c123fe6pm.h.
#define PWM_2_CTL_GENBUPD_I 0x00000000 |
Definition at line 4133 of file tm4c123fe6pm.h.
#define PWM_2_CTL_GENBUPD_LS 0x00000200 |
Definition at line 4134 of file tm4c123fe6pm.h.
#define PWM_2_CTL_GENBUPD_M 0x00000300 |
Definition at line 4132 of file tm4c123fe6pm.h.
#define PWM_2_CTL_LATCH 0x00040000 |
Definition at line 4117 of file tm4c123fe6pm.h.
#define PWM_2_CTL_LOADUPD 0x00000008 |
Definition at line 4142 of file tm4c123fe6pm.h.
#define PWM_2_CTL_MINFLTPER 0x00020000 |
Definition at line 4118 of file tm4c123fe6pm.h.
#define PWM_2_CTL_MODE 0x00000002 |
Definition at line 4144 of file tm4c123fe6pm.h.
#define PWM_2_DBCTL_ENABLE 0x00000001 |
Definition at line 4322 of file tm4c123fe6pm.h.
#define PWM_2_DBFALL_FALLDELAY_M 0x00000FFF |
Definition at line 4339 of file tm4c123fe6pm.h.
#define PWM_2_DBFALL_FALLDELAY_S 0 |
Definition at line 4341 of file tm4c123fe6pm.h.
#define PWM_2_DBRISE_RISEDELAY_M 0x00000FFF |
Definition at line 4329 of file tm4c123fe6pm.h.
#define PWM_2_DBRISE_RISEDELAY_S 0 |
Definition at line 4331 of file tm4c123fe6pm.h.
#define PWM_2_FLTSEN_FAULT0 0x00000001 |
Definition at line 4726 of file tm4c123fe6pm.h.
#define PWM_2_FLTSEN_FAULT1 0x00000002 |
Definition at line 4725 of file tm4c123fe6pm.h.
#define PWM_2_FLTSEN_FAULT2 0x00000004 |
Definition at line 4724 of file tm4c123fe6pm.h.
#define PWM_2_FLTSEN_FAULT3 0x00000008 |
Definition at line 4723 of file tm4c123fe6pm.h.
#define PWM_2_FLTSRC0_FAULT0 0x00000001 |
Definition at line 4353 of file tm4c123fe6pm.h.
#define PWM_2_FLTSRC0_FAULT1 0x00000002 |
Definition at line 4352 of file tm4c123fe6pm.h.
#define PWM_2_FLTSRC0_FAULT2 0x00000004 |
Definition at line 4351 of file tm4c123fe6pm.h.
#define PWM_2_FLTSRC0_FAULT3 0x00000008 |
Definition at line 4350 of file tm4c123fe6pm.h.
#define PWM_2_FLTSRC1_DCMP0 0x00000001 |
Definition at line 4368 of file tm4c123fe6pm.h.
#define PWM_2_FLTSRC1_DCMP1 0x00000002 |
Definition at line 4367 of file tm4c123fe6pm.h.
#define PWM_2_FLTSRC1_DCMP2 0x00000004 |
Definition at line 4366 of file tm4c123fe6pm.h.
#define PWM_2_FLTSRC1_DCMP3 0x00000008 |
Definition at line 4365 of file tm4c123fe6pm.h.
#define PWM_2_FLTSRC1_DCMP4 0x00000010 |
Definition at line 4364 of file tm4c123fe6pm.h.
#define PWM_2_FLTSRC1_DCMP5 0x00000020 |
Definition at line 4363 of file tm4c123fe6pm.h.
#define PWM_2_FLTSRC1_DCMP6 0x00000040 |
Definition at line 4362 of file tm4c123fe6pm.h.
#define PWM_2_FLTSRC1_DCMP7 0x00000080 |
Definition at line 4361 of file tm4c123fe6pm.h.
#define PWM_2_FLTSTAT0_FAULT0 0x00000001 |
Definition at line 4737 of file tm4c123fe6pm.h.
#define PWM_2_FLTSTAT0_FAULT1 0x00000002 |
Definition at line 4736 of file tm4c123fe6pm.h.
#define PWM_2_FLTSTAT0_FAULT2 0x00000004 |
Definition at line 4735 of file tm4c123fe6pm.h.
#define PWM_2_FLTSTAT0_FAULT3 0x00000008 |
Definition at line 4734 of file tm4c123fe6pm.h.
#define PWM_2_FLTSTAT1_DCMP0 0x00000001 |
Definition at line 4752 of file tm4c123fe6pm.h.
#define PWM_2_FLTSTAT1_DCMP1 0x00000002 |
Definition at line 4751 of file tm4c123fe6pm.h.
#define PWM_2_FLTSTAT1_DCMP2 0x00000004 |
Definition at line 4750 of file tm4c123fe6pm.h.
#define PWM_2_FLTSTAT1_DCMP3 0x00000008 |
Definition at line 4749 of file tm4c123fe6pm.h.
#define PWM_2_FLTSTAT1_DCMP4 0x00000010 |
Definition at line 4748 of file tm4c123fe6pm.h.
#define PWM_2_FLTSTAT1_DCMP5 0x00000020 |
Definition at line 4747 of file tm4c123fe6pm.h.
#define PWM_2_FLTSTAT1_DCMP6 0x00000040 |
Definition at line 4746 of file tm4c123fe6pm.h.
#define PWM_2_FLTSTAT1_DCMP7 0x00000080 |
Definition at line 4745 of file tm4c123fe6pm.h.
#define PWM_2_GENA_ACTCMPAD_INV 0x00000040 |
Definition at line 4251 of file tm4c123fe6pm.h.
#define PWM_2_GENA_ACTCMPAD_M 0x000000C0 |
Definition at line 4248 of file tm4c123fe6pm.h.
#define PWM_2_GENA_ACTCMPAD_NONE 0x00000000 |
Definition at line 4249 of file tm4c123fe6pm.h.
#define PWM_2_GENA_ACTCMPAD_ONE 0x000000C0 |
Definition at line 4254 of file tm4c123fe6pm.h.
#define PWM_2_GENA_ACTCMPAD_ZERO 0x00000080 |
Definition at line 4252 of file tm4c123fe6pm.h.
#define PWM_2_GENA_ACTCMPAU_INV 0x00000010 |
Definition at line 4258 of file tm4c123fe6pm.h.
#define PWM_2_GENA_ACTCMPAU_M 0x00000030 |
Definition at line 4255 of file tm4c123fe6pm.h.
#define PWM_2_GENA_ACTCMPAU_NONE 0x00000000 |
Definition at line 4256 of file tm4c123fe6pm.h.
#define PWM_2_GENA_ACTCMPAU_ONE 0x00000030 |
Definition at line 4261 of file tm4c123fe6pm.h.
#define PWM_2_GENA_ACTCMPAU_ZERO 0x00000020 |
Definition at line 4259 of file tm4c123fe6pm.h.
#define PWM_2_GENA_ACTCMPBD_INV 0x00000400 |
Definition at line 4237 of file tm4c123fe6pm.h.
#define PWM_2_GENA_ACTCMPBD_M 0x00000C00 |
Definition at line 4234 of file tm4c123fe6pm.h.
#define PWM_2_GENA_ACTCMPBD_NONE 0x00000000 |
Definition at line 4235 of file tm4c123fe6pm.h.
#define PWM_2_GENA_ACTCMPBD_ONE 0x00000C00 |
Definition at line 4240 of file tm4c123fe6pm.h.
#define PWM_2_GENA_ACTCMPBD_ZERO 0x00000800 |
Definition at line 4238 of file tm4c123fe6pm.h.
#define PWM_2_GENA_ACTCMPBU_INV 0x00000100 |
Definition at line 4244 of file tm4c123fe6pm.h.
#define PWM_2_GENA_ACTCMPBU_M 0x00000300 |
Definition at line 4241 of file tm4c123fe6pm.h.
#define PWM_2_GENA_ACTCMPBU_NONE 0x00000000 |
Definition at line 4242 of file tm4c123fe6pm.h.
#define PWM_2_GENA_ACTCMPBU_ONE 0x00000300 |
Definition at line 4247 of file tm4c123fe6pm.h.
#define PWM_2_GENA_ACTCMPBU_ZERO 0x00000200 |
Definition at line 4245 of file tm4c123fe6pm.h.
#define PWM_2_GENA_ACTLOAD_INV 0x00000004 |
Definition at line 4264 of file tm4c123fe6pm.h.
#define PWM_2_GENA_ACTLOAD_M 0x0000000C |
Definition at line 4262 of file tm4c123fe6pm.h.
#define PWM_2_GENA_ACTLOAD_NONE 0x00000000 |
Definition at line 4263 of file tm4c123fe6pm.h.
#define PWM_2_GENA_ACTLOAD_ONE 0x0000000C |
Definition at line 4266 of file tm4c123fe6pm.h.
#define PWM_2_GENA_ACTLOAD_ZERO 0x00000008 |
Definition at line 4265 of file tm4c123fe6pm.h.
#define PWM_2_GENA_ACTZERO_INV 0x00000001 |
Definition at line 4269 of file tm4c123fe6pm.h.
#define PWM_2_GENA_ACTZERO_M 0x00000003 |
Definition at line 4267 of file tm4c123fe6pm.h.
#define PWM_2_GENA_ACTZERO_NONE 0x00000000 |
Definition at line 4268 of file tm4c123fe6pm.h.
#define PWM_2_GENA_ACTZERO_ONE 0x00000003 |
Definition at line 4271 of file tm4c123fe6pm.h.
#define PWM_2_GENA_ACTZERO_ZERO 0x00000002 |
Definition at line 4270 of file tm4c123fe6pm.h.
#define PWM_2_GENB_ACTCMPAD_INV 0x00000040 |
Definition at line 4295 of file tm4c123fe6pm.h.
#define PWM_2_GENB_ACTCMPAD_M 0x000000C0 |
Definition at line 4292 of file tm4c123fe6pm.h.
#define PWM_2_GENB_ACTCMPAD_NONE 0x00000000 |
Definition at line 4293 of file tm4c123fe6pm.h.
#define PWM_2_GENB_ACTCMPAD_ONE 0x000000C0 |
Definition at line 4298 of file tm4c123fe6pm.h.
#define PWM_2_GENB_ACTCMPAD_ZERO 0x00000080 |
Definition at line 4296 of file tm4c123fe6pm.h.
#define PWM_2_GENB_ACTCMPAU_INV 0x00000010 |
Definition at line 4302 of file tm4c123fe6pm.h.
#define PWM_2_GENB_ACTCMPAU_M 0x00000030 |
Definition at line 4299 of file tm4c123fe6pm.h.
#define PWM_2_GENB_ACTCMPAU_NONE 0x00000000 |
Definition at line 4300 of file tm4c123fe6pm.h.
#define PWM_2_GENB_ACTCMPAU_ONE 0x00000030 |
Definition at line 4305 of file tm4c123fe6pm.h.
#define PWM_2_GENB_ACTCMPAU_ZERO 0x00000020 |
Definition at line 4303 of file tm4c123fe6pm.h.
#define PWM_2_GENB_ACTCMPBD_INV 0x00000400 |
Definition at line 4281 of file tm4c123fe6pm.h.
#define PWM_2_GENB_ACTCMPBD_M 0x00000C00 |
Definition at line 4278 of file tm4c123fe6pm.h.
#define PWM_2_GENB_ACTCMPBD_NONE 0x00000000 |
Definition at line 4279 of file tm4c123fe6pm.h.
#define PWM_2_GENB_ACTCMPBD_ONE 0x00000C00 |
Definition at line 4284 of file tm4c123fe6pm.h.
#define PWM_2_GENB_ACTCMPBD_ZERO 0x00000800 |
Definition at line 4282 of file tm4c123fe6pm.h.
#define PWM_2_GENB_ACTCMPBU_INV 0x00000100 |
Definition at line 4288 of file tm4c123fe6pm.h.
#define PWM_2_GENB_ACTCMPBU_M 0x00000300 |
Definition at line 4285 of file tm4c123fe6pm.h.
#define PWM_2_GENB_ACTCMPBU_NONE 0x00000000 |
Definition at line 4286 of file tm4c123fe6pm.h.
#define PWM_2_GENB_ACTCMPBU_ONE 0x00000300 |
Definition at line 4291 of file tm4c123fe6pm.h.
#define PWM_2_GENB_ACTCMPBU_ZERO 0x00000200 |
Definition at line 4289 of file tm4c123fe6pm.h.
#define PWM_2_GENB_ACTLOAD_INV 0x00000004 |
Definition at line 4308 of file tm4c123fe6pm.h.
#define PWM_2_GENB_ACTLOAD_M 0x0000000C |
Definition at line 4306 of file tm4c123fe6pm.h.
#define PWM_2_GENB_ACTLOAD_NONE 0x00000000 |
Definition at line 4307 of file tm4c123fe6pm.h.
#define PWM_2_GENB_ACTLOAD_ONE 0x0000000C |
Definition at line 4310 of file tm4c123fe6pm.h.
#define PWM_2_GENB_ACTLOAD_ZERO 0x00000008 |
Definition at line 4309 of file tm4c123fe6pm.h.
#define PWM_2_GENB_ACTZERO_INV 0x00000001 |
Definition at line 4313 of file tm4c123fe6pm.h.
#define PWM_2_GENB_ACTZERO_M 0x00000003 |
Definition at line 4311 of file tm4c123fe6pm.h.
#define PWM_2_GENB_ACTZERO_NONE 0x00000000 |
Definition at line 4312 of file tm4c123fe6pm.h.
#define PWM_2_GENB_ACTZERO_ONE 0x00000003 |
Definition at line 4315 of file tm4c123fe6pm.h.
#define PWM_2_GENB_ACTZERO_ZERO 0x00000002 |
Definition at line 4314 of file tm4c123fe6pm.h.
#define PWM_2_INTEN_INTCMPAD 0x00000008 |
Definition at line 4164 of file tm4c123fe6pm.h.
#define PWM_2_INTEN_INTCMPAU 0x00000004 |
Definition at line 4166 of file tm4c123fe6pm.h.
#define PWM_2_INTEN_INTCMPBD 0x00000020 |
Definition at line 4160 of file tm4c123fe6pm.h.
#define PWM_2_INTEN_INTCMPBU 0x00000010 |
Definition at line 4162 of file tm4c123fe6pm.h.
#define PWM_2_INTEN_INTCNTLOAD 0x00000002 |
Definition at line 4168 of file tm4c123fe6pm.h.
#define PWM_2_INTEN_INTCNTZERO 0x00000001 |
Definition at line 4169 of file tm4c123fe6pm.h.
#define PWM_2_INTEN_TRCMPAD 0x00000800 |
Definition at line 4155 of file tm4c123fe6pm.h.
#define PWM_2_INTEN_TRCMPAU 0x00000400 |
Definition at line 4157 of file tm4c123fe6pm.h.
#define PWM_2_INTEN_TRCMPBD 0x00002000 |
Definition at line 4152 of file tm4c123fe6pm.h.
#define PWM_2_INTEN_TRCMPBU 0x00001000 |
Definition at line 4154 of file tm4c123fe6pm.h.
#define PWM_2_INTEN_TRCNTLOAD 0x00000200 |
Definition at line 4158 of file tm4c123fe6pm.h.
#define PWM_2_INTEN_TRCNTZERO 0x00000100 |
Definition at line 4159 of file tm4c123fe6pm.h.
#define PWM_2_ISC_INTCMPAD 0x00000008 |
Definition at line 4192 of file tm4c123fe6pm.h.
#define PWM_2_ISC_INTCMPAU 0x00000004 |
Definition at line 4193 of file tm4c123fe6pm.h.
#define PWM_2_ISC_INTCMPBD 0x00000020 |
Definition at line 4190 of file tm4c123fe6pm.h.
#define PWM_2_ISC_INTCMPBU 0x00000010 |
Definition at line 4191 of file tm4c123fe6pm.h.
#define PWM_2_ISC_INTCNTLOAD 0x00000002 |
Definition at line 4194 of file tm4c123fe6pm.h.
#define PWM_2_ISC_INTCNTZERO 0x00000001 |
Definition at line 4195 of file tm4c123fe6pm.h.
#define PWM_2_LOAD_LOAD_M 0x0000FFFF |
Definition at line 4202 of file tm4c123fe6pm.h.
#define PWM_2_LOAD_LOAD_S 0 |
Definition at line 4203 of file tm4c123fe6pm.h.
#define PWM_2_MINFLTPER_MFP_M 0x0000FFFF |
Definition at line 4376 of file tm4c123fe6pm.h.
#define PWM_2_MINFLTPER_MFP_S 0 |
Definition at line 4377 of file tm4c123fe6pm.h.
#define PWM_2_RIS_INTCMPAD 0x00000008 |
Definition at line 4179 of file tm4c123fe6pm.h.
#define PWM_2_RIS_INTCMPAU 0x00000004 |
Definition at line 4181 of file tm4c123fe6pm.h.
#define PWM_2_RIS_INTCMPBD 0x00000020 |
Definition at line 4176 of file tm4c123fe6pm.h.
#define PWM_2_RIS_INTCMPBU 0x00000010 |
Definition at line 4178 of file tm4c123fe6pm.h.
#define PWM_2_RIS_INTCNTLOAD 0x00000002 |
Definition at line 4182 of file tm4c123fe6pm.h.
#define PWM_2_RIS_INTCNTZERO 0x00000001 |
Definition at line 4183 of file tm4c123fe6pm.h.
#define PWM_3_CMPA_COMPA_M 0x0000FFFF |
Definition at line 4485 of file tm4c123fe6pm.h.
#define PWM_3_CMPA_COMPA_S 0 |
Definition at line 4486 of file tm4c123fe6pm.h.
#define PWM_3_CMPB_COMPB_M 0x0000FFFF |
Definition at line 4493 of file tm4c123fe6pm.h.
#define PWM_3_CMPB_COMPB_S 0 |
Definition at line 4494 of file tm4c123fe6pm.h.
#define PWM_3_COUNT_COUNT_M 0x0000FFFF |
Definition at line 4477 of file tm4c123fe6pm.h.
#define PWM_3_COUNT_COUNT_S 0 |
Definition at line 4478 of file tm4c123fe6pm.h.
#define PWM_3_CTL_CMPAUPD 0x00000010 |
Definition at line 4408 of file tm4c123fe6pm.h.
#define PWM_3_CTL_CMPBUPD 0x00000020 |
Definition at line 4407 of file tm4c123fe6pm.h.
#define PWM_3_CTL_DBCTLUPD_GS 0x00000C00 |
Definition at line 4398 of file tm4c123fe6pm.h.
#define PWM_3_CTL_DBCTLUPD_I 0x00000000 |
Definition at line 4396 of file tm4c123fe6pm.h.
#define PWM_3_CTL_DBCTLUPD_LS 0x00000800 |
Definition at line 4397 of file tm4c123fe6pm.h.
#define PWM_3_CTL_DBCTLUPD_M 0x00000C00 |
Definition at line 4395 of file tm4c123fe6pm.h.
#define PWM_3_CTL_DBFALLUPD_GS 0x0000C000 |
Definition at line 4390 of file tm4c123fe6pm.h.
#define PWM_3_CTL_DBFALLUPD_I 0x00000000 |
Definition at line 4388 of file tm4c123fe6pm.h.
#define PWM_3_CTL_DBFALLUPD_LS 0x00008000 |
Definition at line 4389 of file tm4c123fe6pm.h.
#define PWM_3_CTL_DBFALLUPD_M 0x0000C000 |
Definition at line 4387 of file tm4c123fe6pm.h.
#define PWM_3_CTL_DBRISEUPD_GS 0x00003000 |
Definition at line 4394 of file tm4c123fe6pm.h.
#define PWM_3_CTL_DBRISEUPD_I 0x00000000 |
Definition at line 4392 of file tm4c123fe6pm.h.
#define PWM_3_CTL_DBRISEUPD_LS 0x00002000 |
Definition at line 4393 of file tm4c123fe6pm.h.
#define PWM_3_CTL_DBRISEUPD_M 0x00003000 |
Definition at line 4391 of file tm4c123fe6pm.h.
#define PWM_3_CTL_DEBUG 0x00000004 |
Definition at line 4410 of file tm4c123fe6pm.h.
#define PWM_3_CTL_ENABLE 0x00000001 |
Definition at line 4412 of file tm4c123fe6pm.h.
#define PWM_3_CTL_FLTSRC 0x00010000 |
Definition at line 4386 of file tm4c123fe6pm.h.
#define PWM_3_CTL_GENAUPD_GS 0x000000C0 |
Definition at line 4406 of file tm4c123fe6pm.h.
#define PWM_3_CTL_GENAUPD_I 0x00000000 |
Definition at line 4404 of file tm4c123fe6pm.h.
#define PWM_3_CTL_GENAUPD_LS 0x00000080 |
Definition at line 4405 of file tm4c123fe6pm.h.
#define PWM_3_CTL_GENAUPD_M 0x000000C0 |
Definition at line 4403 of file tm4c123fe6pm.h.
#define PWM_3_CTL_GENBUPD_GS 0x00000300 |
Definition at line 4402 of file tm4c123fe6pm.h.
#define PWM_3_CTL_GENBUPD_I 0x00000000 |
Definition at line 4400 of file tm4c123fe6pm.h.
#define PWM_3_CTL_GENBUPD_LS 0x00000200 |
Definition at line 4401 of file tm4c123fe6pm.h.
#define PWM_3_CTL_GENBUPD_M 0x00000300 |
Definition at line 4399 of file tm4c123fe6pm.h.
#define PWM_3_CTL_LATCH 0x00040000 |
Definition at line 4384 of file tm4c123fe6pm.h.
#define PWM_3_CTL_LOADUPD 0x00000008 |
Definition at line 4409 of file tm4c123fe6pm.h.
#define PWM_3_CTL_MINFLTPER 0x00020000 |
Definition at line 4385 of file tm4c123fe6pm.h.
#define PWM_3_CTL_MODE 0x00000002 |
Definition at line 4411 of file tm4c123fe6pm.h.
#define PWM_3_DBCTL_ENABLE 0x00000001 |
Definition at line 4589 of file tm4c123fe6pm.h.
#define PWM_3_DBFALL_FALLDELAY_M 0x00000FFF |
Definition at line 4606 of file tm4c123fe6pm.h.
#define PWM_3_DBFALL_FALLDELAY_S 0 |
Definition at line 4608 of file tm4c123fe6pm.h.
#define PWM_3_DBRISE_RISEDELAY_M 0x00000FFF |
Definition at line 4596 of file tm4c123fe6pm.h.
#define PWM_3_DBRISE_RISEDELAY_S 0 |
Definition at line 4598 of file tm4c123fe6pm.h.
#define PWM_3_FLTSEN_FAULT0 0x00000001 |
Definition at line 4762 of file tm4c123fe6pm.h.
#define PWM_3_FLTSEN_FAULT1 0x00000002 |
Definition at line 4761 of file tm4c123fe6pm.h.
#define PWM_3_FLTSEN_FAULT2 0x00000004 |
Definition at line 4760 of file tm4c123fe6pm.h.
#define PWM_3_FLTSEN_FAULT3 0x00000008 |
Definition at line 4759 of file tm4c123fe6pm.h.
#define PWM_3_FLTSRC0_FAULT0 0x00000001 |
Definition at line 4620 of file tm4c123fe6pm.h.
#define PWM_3_FLTSRC0_FAULT1 0x00000002 |
Definition at line 4619 of file tm4c123fe6pm.h.
#define PWM_3_FLTSRC0_FAULT2 0x00000004 |
Definition at line 4618 of file tm4c123fe6pm.h.
#define PWM_3_FLTSRC0_FAULT3 0x00000008 |
Definition at line 4617 of file tm4c123fe6pm.h.
#define PWM_3_FLTSRC1_DCMP0 0x00000001 |
Definition at line 4635 of file tm4c123fe6pm.h.
#define PWM_3_FLTSRC1_DCMP1 0x00000002 |
Definition at line 4634 of file tm4c123fe6pm.h.
#define PWM_3_FLTSRC1_DCMP2 0x00000004 |
Definition at line 4633 of file tm4c123fe6pm.h.
#define PWM_3_FLTSRC1_DCMP3 0x00000008 |
Definition at line 4632 of file tm4c123fe6pm.h.
#define PWM_3_FLTSRC1_DCMP4 0x00000010 |
Definition at line 4631 of file tm4c123fe6pm.h.
#define PWM_3_FLTSRC1_DCMP5 0x00000020 |
Definition at line 4630 of file tm4c123fe6pm.h.
#define PWM_3_FLTSRC1_DCMP6 0x00000040 |
Definition at line 4629 of file tm4c123fe6pm.h.
#define PWM_3_FLTSRC1_DCMP7 0x00000080 |
Definition at line 4628 of file tm4c123fe6pm.h.
#define PWM_3_FLTSTAT0_FAULT0 0x00000001 |
Definition at line 4773 of file tm4c123fe6pm.h.
#define PWM_3_FLTSTAT0_FAULT1 0x00000002 |
Definition at line 4772 of file tm4c123fe6pm.h.
#define PWM_3_FLTSTAT0_FAULT2 0x00000004 |
Definition at line 4771 of file tm4c123fe6pm.h.
#define PWM_3_FLTSTAT0_FAULT3 0x00000008 |
Definition at line 4770 of file tm4c123fe6pm.h.
#define PWM_3_FLTSTAT1_DCMP0 0x00000001 |
Definition at line 4788 of file tm4c123fe6pm.h.
#define PWM_3_FLTSTAT1_DCMP1 0x00000002 |
Definition at line 4787 of file tm4c123fe6pm.h.
#define PWM_3_FLTSTAT1_DCMP2 0x00000004 |
Definition at line 4786 of file tm4c123fe6pm.h.
#define PWM_3_FLTSTAT1_DCMP3 0x00000008 |
Definition at line 4785 of file tm4c123fe6pm.h.
#define PWM_3_FLTSTAT1_DCMP4 0x00000010 |
Definition at line 4784 of file tm4c123fe6pm.h.
#define PWM_3_FLTSTAT1_DCMP5 0x00000020 |
Definition at line 4783 of file tm4c123fe6pm.h.
#define PWM_3_FLTSTAT1_DCMP6 0x00000040 |
Definition at line 4782 of file tm4c123fe6pm.h.
#define PWM_3_FLTSTAT1_DCMP7 0x00000080 |
Definition at line 4781 of file tm4c123fe6pm.h.
#define PWM_3_GENA_ACTCMPAD_INV 0x00000040 |
Definition at line 4518 of file tm4c123fe6pm.h.
#define PWM_3_GENA_ACTCMPAD_M 0x000000C0 |
Definition at line 4515 of file tm4c123fe6pm.h.
#define PWM_3_GENA_ACTCMPAD_NONE 0x00000000 |
Definition at line 4516 of file tm4c123fe6pm.h.
#define PWM_3_GENA_ACTCMPAD_ONE 0x000000C0 |
Definition at line 4521 of file tm4c123fe6pm.h.
#define PWM_3_GENA_ACTCMPAD_ZERO 0x00000080 |
Definition at line 4519 of file tm4c123fe6pm.h.
#define PWM_3_GENA_ACTCMPAU_INV 0x00000010 |
Definition at line 4525 of file tm4c123fe6pm.h.
#define PWM_3_GENA_ACTCMPAU_M 0x00000030 |
Definition at line 4522 of file tm4c123fe6pm.h.
#define PWM_3_GENA_ACTCMPAU_NONE 0x00000000 |
Definition at line 4523 of file tm4c123fe6pm.h.
#define PWM_3_GENA_ACTCMPAU_ONE 0x00000030 |
Definition at line 4528 of file tm4c123fe6pm.h.
#define PWM_3_GENA_ACTCMPAU_ZERO 0x00000020 |
Definition at line 4526 of file tm4c123fe6pm.h.
#define PWM_3_GENA_ACTCMPBD_INV 0x00000400 |
Definition at line 4504 of file tm4c123fe6pm.h.
#define PWM_3_GENA_ACTCMPBD_M 0x00000C00 |
Definition at line 4501 of file tm4c123fe6pm.h.
#define PWM_3_GENA_ACTCMPBD_NONE 0x00000000 |
Definition at line 4502 of file tm4c123fe6pm.h.
#define PWM_3_GENA_ACTCMPBD_ONE 0x00000C00 |
Definition at line 4507 of file tm4c123fe6pm.h.
#define PWM_3_GENA_ACTCMPBD_ZERO 0x00000800 |
Definition at line 4505 of file tm4c123fe6pm.h.
#define PWM_3_GENA_ACTCMPBU_INV 0x00000100 |
Definition at line 4511 of file tm4c123fe6pm.h.
#define PWM_3_GENA_ACTCMPBU_M 0x00000300 |
Definition at line 4508 of file tm4c123fe6pm.h.
#define PWM_3_GENA_ACTCMPBU_NONE 0x00000000 |
Definition at line 4509 of file tm4c123fe6pm.h.
#define PWM_3_GENA_ACTCMPBU_ONE 0x00000300 |
Definition at line 4514 of file tm4c123fe6pm.h.
#define PWM_3_GENA_ACTCMPBU_ZERO 0x00000200 |
Definition at line 4512 of file tm4c123fe6pm.h.
#define PWM_3_GENA_ACTLOAD_INV 0x00000004 |
Definition at line 4531 of file tm4c123fe6pm.h.
#define PWM_3_GENA_ACTLOAD_M 0x0000000C |
Definition at line 4529 of file tm4c123fe6pm.h.
#define PWM_3_GENA_ACTLOAD_NONE 0x00000000 |
Definition at line 4530 of file tm4c123fe6pm.h.
#define PWM_3_GENA_ACTLOAD_ONE 0x0000000C |
Definition at line 4533 of file tm4c123fe6pm.h.
#define PWM_3_GENA_ACTLOAD_ZERO 0x00000008 |
Definition at line 4532 of file tm4c123fe6pm.h.
#define PWM_3_GENA_ACTZERO_INV 0x00000001 |
Definition at line 4536 of file tm4c123fe6pm.h.
#define PWM_3_GENA_ACTZERO_M 0x00000003 |
Definition at line 4534 of file tm4c123fe6pm.h.
#define PWM_3_GENA_ACTZERO_NONE 0x00000000 |
Definition at line 4535 of file tm4c123fe6pm.h.
#define PWM_3_GENA_ACTZERO_ONE 0x00000003 |
Definition at line 4538 of file tm4c123fe6pm.h.
#define PWM_3_GENA_ACTZERO_ZERO 0x00000002 |
Definition at line 4537 of file tm4c123fe6pm.h.
#define PWM_3_GENB_ACTCMPAD_INV 0x00000040 |
Definition at line 4562 of file tm4c123fe6pm.h.
#define PWM_3_GENB_ACTCMPAD_M 0x000000C0 |
Definition at line 4559 of file tm4c123fe6pm.h.
#define PWM_3_GENB_ACTCMPAD_NONE 0x00000000 |
Definition at line 4560 of file tm4c123fe6pm.h.
#define PWM_3_GENB_ACTCMPAD_ONE 0x000000C0 |
Definition at line 4565 of file tm4c123fe6pm.h.
#define PWM_3_GENB_ACTCMPAD_ZERO 0x00000080 |
Definition at line 4563 of file tm4c123fe6pm.h.
#define PWM_3_GENB_ACTCMPAU_INV 0x00000010 |
Definition at line 4569 of file tm4c123fe6pm.h.
#define PWM_3_GENB_ACTCMPAU_M 0x00000030 |
Definition at line 4566 of file tm4c123fe6pm.h.
#define PWM_3_GENB_ACTCMPAU_NONE 0x00000000 |
Definition at line 4567 of file tm4c123fe6pm.h.
#define PWM_3_GENB_ACTCMPAU_ONE 0x00000030 |
Definition at line 4572 of file tm4c123fe6pm.h.
#define PWM_3_GENB_ACTCMPAU_ZERO 0x00000020 |
Definition at line 4570 of file tm4c123fe6pm.h.
#define PWM_3_GENB_ACTCMPBD_INV 0x00000400 |
Definition at line 4548 of file tm4c123fe6pm.h.
#define PWM_3_GENB_ACTCMPBD_M 0x00000C00 |
Definition at line 4545 of file tm4c123fe6pm.h.
#define PWM_3_GENB_ACTCMPBD_NONE 0x00000000 |
Definition at line 4546 of file tm4c123fe6pm.h.
#define PWM_3_GENB_ACTCMPBD_ONE 0x00000C00 |
Definition at line 4551 of file tm4c123fe6pm.h.
#define PWM_3_GENB_ACTCMPBD_ZERO 0x00000800 |
Definition at line 4549 of file tm4c123fe6pm.h.
#define PWM_3_GENB_ACTCMPBU_INV 0x00000100 |
Definition at line 4555 of file tm4c123fe6pm.h.
#define PWM_3_GENB_ACTCMPBU_M 0x00000300 |
Definition at line 4552 of file tm4c123fe6pm.h.
#define PWM_3_GENB_ACTCMPBU_NONE 0x00000000 |
Definition at line 4553 of file tm4c123fe6pm.h.
#define PWM_3_GENB_ACTCMPBU_ONE 0x00000300 |
Definition at line 4558 of file tm4c123fe6pm.h.
#define PWM_3_GENB_ACTCMPBU_ZERO 0x00000200 |
Definition at line 4556 of file tm4c123fe6pm.h.
#define PWM_3_GENB_ACTLOAD_INV 0x00000004 |
Definition at line 4575 of file tm4c123fe6pm.h.
#define PWM_3_GENB_ACTLOAD_M 0x0000000C |
Definition at line 4573 of file tm4c123fe6pm.h.
#define PWM_3_GENB_ACTLOAD_NONE 0x00000000 |
Definition at line 4574 of file tm4c123fe6pm.h.
#define PWM_3_GENB_ACTLOAD_ONE 0x0000000C |
Definition at line 4577 of file tm4c123fe6pm.h.
#define PWM_3_GENB_ACTLOAD_ZERO 0x00000008 |
Definition at line 4576 of file tm4c123fe6pm.h.
#define PWM_3_GENB_ACTZERO_INV 0x00000001 |
Definition at line 4580 of file tm4c123fe6pm.h.
#define PWM_3_GENB_ACTZERO_M 0x00000003 |
Definition at line 4578 of file tm4c123fe6pm.h.
#define PWM_3_GENB_ACTZERO_NONE 0x00000000 |
Definition at line 4579 of file tm4c123fe6pm.h.
#define PWM_3_GENB_ACTZERO_ONE 0x00000003 |
Definition at line 4582 of file tm4c123fe6pm.h.
#define PWM_3_GENB_ACTZERO_ZERO 0x00000002 |
Definition at line 4581 of file tm4c123fe6pm.h.
#define PWM_3_INTEN_INTCMPAD 0x00000008 |
Definition at line 4431 of file tm4c123fe6pm.h.
#define PWM_3_INTEN_INTCMPAU 0x00000004 |
Definition at line 4433 of file tm4c123fe6pm.h.
#define PWM_3_INTEN_INTCMPBD 0x00000020 |
Definition at line 4427 of file tm4c123fe6pm.h.
#define PWM_3_INTEN_INTCMPBU 0x00000010 |
Definition at line 4429 of file tm4c123fe6pm.h.
#define PWM_3_INTEN_INTCNTLOAD 0x00000002 |
Definition at line 4435 of file tm4c123fe6pm.h.
#define PWM_3_INTEN_INTCNTZERO 0x00000001 |
Definition at line 4436 of file tm4c123fe6pm.h.
#define PWM_3_INTEN_TRCMPAD 0x00000800 |
Definition at line 4422 of file tm4c123fe6pm.h.
#define PWM_3_INTEN_TRCMPAU 0x00000400 |
Definition at line 4424 of file tm4c123fe6pm.h.
#define PWM_3_INTEN_TRCMPBD 0x00002000 |
Definition at line 4419 of file tm4c123fe6pm.h.
#define PWM_3_INTEN_TRCMPBU 0x00001000 |
Definition at line 4421 of file tm4c123fe6pm.h.
#define PWM_3_INTEN_TRCNTLOAD 0x00000200 |
Definition at line 4425 of file tm4c123fe6pm.h.
#define PWM_3_INTEN_TRCNTZERO 0x00000100 |
Definition at line 4426 of file tm4c123fe6pm.h.
#define PWM_3_ISC_INTCMPAD 0x00000008 |
Definition at line 4459 of file tm4c123fe6pm.h.
#define PWM_3_ISC_INTCMPAU 0x00000004 |
Definition at line 4460 of file tm4c123fe6pm.h.
#define PWM_3_ISC_INTCMPBD 0x00000020 |
Definition at line 4457 of file tm4c123fe6pm.h.
#define PWM_3_ISC_INTCMPBU 0x00000010 |
Definition at line 4458 of file tm4c123fe6pm.h.
#define PWM_3_ISC_INTCNTLOAD 0x00000002 |
Definition at line 4461 of file tm4c123fe6pm.h.
#define PWM_3_ISC_INTCNTZERO 0x00000001 |
Definition at line 4462 of file tm4c123fe6pm.h.
#define PWM_3_LOAD_LOAD_M 0x0000FFFF |
Definition at line 4469 of file tm4c123fe6pm.h.
#define PWM_3_LOAD_LOAD_S 0 |
Definition at line 4470 of file tm4c123fe6pm.h.
#define PWM_3_MINFLTPER_MFP_M 0x0000FFFF |
Definition at line 4643 of file tm4c123fe6pm.h.
#define PWM_3_MINFLTPER_MFP_S 0 |
Definition at line 4644 of file tm4c123fe6pm.h.
#define PWM_3_RIS_INTCMPAD 0x00000008 |
Definition at line 4446 of file tm4c123fe6pm.h.
#define PWM_3_RIS_INTCMPAU 0x00000004 |
Definition at line 4448 of file tm4c123fe6pm.h.
#define PWM_3_RIS_INTCMPBD 0x00000020 |
Definition at line 4443 of file tm4c123fe6pm.h.
#define PWM_3_RIS_INTCMPBU 0x00000010 |
Definition at line 4445 of file tm4c123fe6pm.h.
#define PWM_3_RIS_INTCNTLOAD 0x00000002 |
Definition at line 4449 of file tm4c123fe6pm.h.
#define PWM_3_RIS_INTCNTZERO 0x00000001 |
Definition at line 4450 of file tm4c123fe6pm.h.
#define PWM_CTL_GLOBALSYNC0 0x00000001 |
Definition at line 3424 of file tm4c123fe6pm.h.
#define PWM_CTL_GLOBALSYNC1 0x00000002 |
Definition at line 3423 of file tm4c123fe6pm.h.
#define PWM_CTL_GLOBALSYNC2 0x00000004 |
Definition at line 3422 of file tm4c123fe6pm.h.
#define PWM_CTL_GLOBALSYNC3 0x00000008 |
Definition at line 3421 of file tm4c123fe6pm.h.
#define PWM_ENABLE_PWM0EN 0x00000001 |
Definition at line 3448 of file tm4c123fe6pm.h.
#define PWM_ENABLE_PWM1EN 0x00000002 |
Definition at line 3447 of file tm4c123fe6pm.h.
#define PWM_ENABLE_PWM2EN 0x00000004 |
Definition at line 3446 of file tm4c123fe6pm.h.
#define PWM_ENABLE_PWM3EN 0x00000008 |
Definition at line 3445 of file tm4c123fe6pm.h.
#define PWM_ENABLE_PWM4EN 0x00000010 |
Definition at line 3444 of file tm4c123fe6pm.h.
#define PWM_ENABLE_PWM5EN 0x00000020 |
Definition at line 3443 of file tm4c123fe6pm.h.
#define PWM_ENABLE_PWM6EN 0x00000040 |
Definition at line 3442 of file tm4c123fe6pm.h.
#define PWM_ENABLE_PWM7EN 0x00000080 |
Definition at line 3441 of file tm4c123fe6pm.h.
#define PWM_ENUPD_ENUPD0_GSYNC 0x00000003 |
Definition at line 3580 of file tm4c123fe6pm.h.
#define PWM_ENUPD_ENUPD0_IMM 0x00000000 |
Definition at line 3578 of file tm4c123fe6pm.h.
#define PWM_ENUPD_ENUPD0_LSYNC 0x00000002 |
Definition at line 3579 of file tm4c123fe6pm.h.
#define PWM_ENUPD_ENUPD0_M 0x00000003 |
Definition at line 3577 of file tm4c123fe6pm.h.
#define PWM_ENUPD_ENUPD1_GSYNC 0x0000000C |
Definition at line 3576 of file tm4c123fe6pm.h.
#define PWM_ENUPD_ENUPD1_IMM 0x00000000 |
Definition at line 3574 of file tm4c123fe6pm.h.
#define PWM_ENUPD_ENUPD1_LSYNC 0x00000008 |
Definition at line 3575 of file tm4c123fe6pm.h.
#define PWM_ENUPD_ENUPD1_M 0x0000000C |
Definition at line 3573 of file tm4c123fe6pm.h.
#define PWM_ENUPD_ENUPD2_GSYNC 0x00000030 |
Definition at line 3572 of file tm4c123fe6pm.h.
#define PWM_ENUPD_ENUPD2_IMM 0x00000000 |
Definition at line 3570 of file tm4c123fe6pm.h.
#define PWM_ENUPD_ENUPD2_LSYNC 0x00000020 |
Definition at line 3571 of file tm4c123fe6pm.h.
#define PWM_ENUPD_ENUPD2_M 0x00000030 |
Definition at line 3569 of file tm4c123fe6pm.h.
#define PWM_ENUPD_ENUPD3_GSYNC 0x000000C0 |
Definition at line 3568 of file tm4c123fe6pm.h.
#define PWM_ENUPD_ENUPD3_IMM 0x00000000 |
Definition at line 3566 of file tm4c123fe6pm.h.
#define PWM_ENUPD_ENUPD3_LSYNC 0x00000080 |
Definition at line 3567 of file tm4c123fe6pm.h.
#define PWM_ENUPD_ENUPD3_M 0x000000C0 |
Definition at line 3565 of file tm4c123fe6pm.h.
#define PWM_ENUPD_ENUPD4_GSYNC 0x00000300 |
Definition at line 3564 of file tm4c123fe6pm.h.
#define PWM_ENUPD_ENUPD4_IMM 0x00000000 |
Definition at line 3562 of file tm4c123fe6pm.h.
#define PWM_ENUPD_ENUPD4_LSYNC 0x00000200 |
Definition at line 3563 of file tm4c123fe6pm.h.
#define PWM_ENUPD_ENUPD4_M 0x00000300 |
Definition at line 3561 of file tm4c123fe6pm.h.
#define PWM_ENUPD_ENUPD5_GSYNC 0x00000C00 |
Definition at line 3560 of file tm4c123fe6pm.h.
#define PWM_ENUPD_ENUPD5_IMM 0x00000000 |
Definition at line 3558 of file tm4c123fe6pm.h.
#define PWM_ENUPD_ENUPD5_LSYNC 0x00000800 |
Definition at line 3559 of file tm4c123fe6pm.h.
#define PWM_ENUPD_ENUPD5_M 0x00000C00 |
Definition at line 3557 of file tm4c123fe6pm.h.
#define PWM_ENUPD_ENUPD6_GSYNC 0x00003000 |
Definition at line 3556 of file tm4c123fe6pm.h.
#define PWM_ENUPD_ENUPD6_IMM 0x00000000 |
Definition at line 3554 of file tm4c123fe6pm.h.
#define PWM_ENUPD_ENUPD6_LSYNC 0x00002000 |
Definition at line 3555 of file tm4c123fe6pm.h.
#define PWM_ENUPD_ENUPD6_M 0x00003000 |
Definition at line 3553 of file tm4c123fe6pm.h.
#define PWM_ENUPD_ENUPD7_GSYNC 0x0000C000 |
Definition at line 3552 of file tm4c123fe6pm.h.
#define PWM_ENUPD_ENUPD7_IMM 0x00000000 |
Definition at line 3550 of file tm4c123fe6pm.h.
#define PWM_ENUPD_ENUPD7_LSYNC 0x00008000 |
Definition at line 3551 of file tm4c123fe6pm.h.
#define PWM_ENUPD_ENUPD7_M 0x0000C000 |
Definition at line 3549 of file tm4c123fe6pm.h.
#define PWM_FAULT_FAULT0 0x00000001 |
Definition at line 3476 of file tm4c123fe6pm.h.
#define PWM_FAULT_FAULT1 0x00000002 |
Definition at line 3475 of file tm4c123fe6pm.h.
#define PWM_FAULT_FAULT2 0x00000004 |
Definition at line 3474 of file tm4c123fe6pm.h.
#define PWM_FAULT_FAULT3 0x00000008 |
Definition at line 3473 of file tm4c123fe6pm.h.
#define PWM_FAULT_FAULT4 0x00000010 |
Definition at line 3472 of file tm4c123fe6pm.h.
#define PWM_FAULT_FAULT5 0x00000020 |
Definition at line 3471 of file tm4c123fe6pm.h.
#define PWM_FAULT_FAULT6 0x00000040 |
Definition at line 3470 of file tm4c123fe6pm.h.
#define PWM_FAULT_FAULT7 0x00000080 |
Definition at line 3469 of file tm4c123fe6pm.h.
#define PWM_FAULTVAL_PWM0 0x00000001 |
Definition at line 3542 of file tm4c123fe6pm.h.
#define PWM_FAULTVAL_PWM1 0x00000002 |
Definition at line 3541 of file tm4c123fe6pm.h.
#define PWM_FAULTVAL_PWM2 0x00000004 |
Definition at line 3540 of file tm4c123fe6pm.h.
#define PWM_FAULTVAL_PWM3 0x00000008 |
Definition at line 3539 of file tm4c123fe6pm.h.
#define PWM_FAULTVAL_PWM4 0x00000010 |
Definition at line 3538 of file tm4c123fe6pm.h.
#define PWM_FAULTVAL_PWM5 0x00000020 |
Definition at line 3537 of file tm4c123fe6pm.h.
#define PWM_FAULTVAL_PWM6 0x00000040 |
Definition at line 3536 of file tm4c123fe6pm.h.
#define PWM_FAULTVAL_PWM7 0x00000080 |
Definition at line 3535 of file tm4c123fe6pm.h.
#define PWM_INTEN_INTFAULT0 0x00010000 |
Definition at line 3486 of file tm4c123fe6pm.h.
#define PWM_INTEN_INTFAULT1 0x00020000 |
Definition at line 3485 of file tm4c123fe6pm.h.
#define PWM_INTEN_INTFAULT2 0x00040000 |
Definition at line 3484 of file tm4c123fe6pm.h.
#define PWM_INTEN_INTFAULT3 0x00080000 |
Definition at line 3483 of file tm4c123fe6pm.h.
#define PWM_INTEN_INTPWM0 0x00000001 |
Definition at line 3490 of file tm4c123fe6pm.h.
#define PWM_INTEN_INTPWM1 0x00000002 |
Definition at line 3489 of file tm4c123fe6pm.h.
#define PWM_INTEN_INTPWM2 0x00000004 |
Definition at line 3488 of file tm4c123fe6pm.h.
#define PWM_INTEN_INTPWM3 0x00000008 |
Definition at line 3487 of file tm4c123fe6pm.h.
#define PWM_INVERT_PWM0INV 0x00000001 |
Definition at line 3462 of file tm4c123fe6pm.h.
#define PWM_INVERT_PWM1INV 0x00000002 |
Definition at line 3461 of file tm4c123fe6pm.h.
#define PWM_INVERT_PWM2INV 0x00000004 |
Definition at line 3460 of file tm4c123fe6pm.h.
#define PWM_INVERT_PWM3INV 0x00000008 |
Definition at line 3459 of file tm4c123fe6pm.h.
#define PWM_INVERT_PWM4INV 0x00000010 |
Definition at line 3458 of file tm4c123fe6pm.h.
#define PWM_INVERT_PWM5INV 0x00000020 |
Definition at line 3457 of file tm4c123fe6pm.h.
#define PWM_INVERT_PWM6INV 0x00000040 |
Definition at line 3456 of file tm4c123fe6pm.h.
#define PWM_INVERT_PWM7INV 0x00000080 |
Definition at line 3455 of file tm4c123fe6pm.h.
#define PWM_ISC_INTFAULT0 0x00010000 |
Definition at line 3514 of file tm4c123fe6pm.h.
#define PWM_ISC_INTFAULT1 0x00020000 |
Definition at line 3513 of file tm4c123fe6pm.h.
#define PWM_ISC_INTFAULT2 0x00040000 |
Definition at line 3512 of file tm4c123fe6pm.h.
#define PWM_ISC_INTFAULT3 0x00080000 |
Definition at line 3511 of file tm4c123fe6pm.h.
#define PWM_ISC_INTPWM0 0x00000001 |
Definition at line 3518 of file tm4c123fe6pm.h.
#define PWM_ISC_INTPWM1 0x00000002 |
Definition at line 3517 of file tm4c123fe6pm.h.
#define PWM_ISC_INTPWM2 0x00000004 |
Definition at line 3516 of file tm4c123fe6pm.h.
#define PWM_ISC_INTPWM3 0x00000008 |
Definition at line 3515 of file tm4c123fe6pm.h.
#define PWM_PP_EFAULT 0x00000200 |
Definition at line 4796 of file tm4c123fe6pm.h.
#define PWM_PP_ESYNC 0x00000100 |
Definition at line 4797 of file tm4c123fe6pm.h.
#define PWM_PP_FCNT_M 0x000000F0 |
Definition at line 4798 of file tm4c123fe6pm.h.
#define PWM_PP_FCNT_S 4 |
Definition at line 4800 of file tm4c123fe6pm.h.
#define PWM_PP_GCNT_M 0x0000000F |
Definition at line 4799 of file tm4c123fe6pm.h.
#define PWM_PP_GCNT_S 0 |
Definition at line 4801 of file tm4c123fe6pm.h.
#define PWM_PP_ONE 0x00000400 |
Definition at line 4795 of file tm4c123fe6pm.h.
#define PWM_RIS_INTFAULT0 0x00010000 |
Definition at line 3500 of file tm4c123fe6pm.h.
#define PWM_RIS_INTFAULT1 0x00020000 |
Definition at line 3499 of file tm4c123fe6pm.h.
#define PWM_RIS_INTFAULT2 0x00040000 |
Definition at line 3498 of file tm4c123fe6pm.h.
#define PWM_RIS_INTFAULT3 0x00080000 |
Definition at line 3497 of file tm4c123fe6pm.h.
#define PWM_RIS_INTPWM0 0x00000001 |
Definition at line 3504 of file tm4c123fe6pm.h.
#define PWM_RIS_INTPWM1 0x00000002 |
Definition at line 3503 of file tm4c123fe6pm.h.
#define PWM_RIS_INTPWM2 0x00000004 |
Definition at line 3502 of file tm4c123fe6pm.h.
#define PWM_RIS_INTPWM3 0x00000008 |
Definition at line 3501 of file tm4c123fe6pm.h.
#define PWM_STATUS_FAULT0 0x00000001 |
Definition at line 3528 of file tm4c123fe6pm.h.
#define PWM_STATUS_FAULT1 0x00000002 |
Definition at line 3527 of file tm4c123fe6pm.h.
#define PWM_STATUS_FAULT2 0x00000004 |
Definition at line 3526 of file tm4c123fe6pm.h.
#define PWM_STATUS_FAULT3 0x00000008 |
Definition at line 3525 of file tm4c123fe6pm.h.
#define PWM_SYNC_SYNC0 0x00000001 |
Definition at line 3434 of file tm4c123fe6pm.h.
#define PWM_SYNC_SYNC1 0x00000002 |
Definition at line 3433 of file tm4c123fe6pm.h.
#define PWM_SYNC_SYNC2 0x00000004 |
Definition at line 3432 of file tm4c123fe6pm.h.
#define PWM_SYNC_SYNC3 0x00000008 |
Definition at line 3431 of file tm4c123fe6pm.h.
#define QEI0_COUNT_R (*((volatile uint32_t *)0x4002C018)) |
Definition at line 958 of file tm4c123fe6pm.h.
#define QEI0_CTL_R (*((volatile uint32_t *)0x4002C000)) |
Definition at line 952 of file tm4c123fe6pm.h.
#define QEI0_INTEN_R (*((volatile uint32_t *)0x4002C020)) |
Definition at line 960 of file tm4c123fe6pm.h.
#define QEI0_ISC_R (*((volatile uint32_t *)0x4002C028)) |
Definition at line 962 of file tm4c123fe6pm.h.
#define QEI0_LOAD_R (*((volatile uint32_t *)0x4002C010)) |
Definition at line 956 of file tm4c123fe6pm.h.
#define QEI0_MAXPOS_R (*((volatile uint32_t *)0x4002C00C)) |
Definition at line 955 of file tm4c123fe6pm.h.
#define QEI0_POS_R (*((volatile uint32_t *)0x4002C008)) |
Definition at line 954 of file tm4c123fe6pm.h.
#define QEI0_RIS_R (*((volatile uint32_t *)0x4002C024)) |
Definition at line 961 of file tm4c123fe6pm.h.
#define QEI0_SPEED_R (*((volatile uint32_t *)0x4002C01C)) |
Definition at line 959 of file tm4c123fe6pm.h.
#define QEI0_STAT_R (*((volatile uint32_t *)0x4002C004)) |
Definition at line 953 of file tm4c123fe6pm.h.
#define QEI0_TIME_R (*((volatile uint32_t *)0x4002C014)) |
Definition at line 957 of file tm4c123fe6pm.h.
#define QEI1_COUNT_R (*((volatile uint32_t *)0x4002D018)) |
Definition at line 975 of file tm4c123fe6pm.h.
#define QEI1_CTL_R (*((volatile uint32_t *)0x4002D000)) |
Definition at line 969 of file tm4c123fe6pm.h.
#define QEI1_INTEN_R (*((volatile uint32_t *)0x4002D020)) |
Definition at line 977 of file tm4c123fe6pm.h.
#define QEI1_ISC_R (*((volatile uint32_t *)0x4002D028)) |
Definition at line 979 of file tm4c123fe6pm.h.
#define QEI1_LOAD_R (*((volatile uint32_t *)0x4002D010)) |
Definition at line 973 of file tm4c123fe6pm.h.
#define QEI1_MAXPOS_R (*((volatile uint32_t *)0x4002D00C)) |
Definition at line 972 of file tm4c123fe6pm.h.
#define QEI1_POS_R (*((volatile uint32_t *)0x4002D008)) |
Definition at line 971 of file tm4c123fe6pm.h.
#define QEI1_RIS_R (*((volatile uint32_t *)0x4002D024)) |
Definition at line 978 of file tm4c123fe6pm.h.
#define QEI1_SPEED_R (*((volatile uint32_t *)0x4002D01C)) |
Definition at line 976 of file tm4c123fe6pm.h.
#define QEI1_STAT_R (*((volatile uint32_t *)0x4002D004)) |
Definition at line 970 of file tm4c123fe6pm.h.
#define QEI1_TIME_R (*((volatile uint32_t *)0x4002D014)) |
Definition at line 974 of file tm4c123fe6pm.h.
#define QEI_COUNT_M 0xFFFFFFFF |
Definition at line 4878 of file tm4c123fe6pm.h.
#define QEI_COUNT_S 0 |
Definition at line 4879 of file tm4c123fe6pm.h.
#define QEI_CTL_CAPMODE 0x00000008 |
Definition at line 4825 of file tm4c123fe6pm.h.
#define QEI_CTL_ENABLE 0x00000001 |
Definition at line 4828 of file tm4c123fe6pm.h.
#define QEI_CTL_FILTCNT_M 0x000F0000 |
Definition at line 4808 of file tm4c123fe6pm.h.
#define QEI_CTL_FILTCNT_S 16 |
Definition at line 4829 of file tm4c123fe6pm.h.
#define QEI_CTL_FILTEN 0x00002000 |
Definition at line 4809 of file tm4c123fe6pm.h.
#define QEI_CTL_INVA 0x00000200 |
Definition at line 4813 of file tm4c123fe6pm.h.
#define QEI_CTL_INVB 0x00000400 |
Definition at line 4812 of file tm4c123fe6pm.h.
#define QEI_CTL_INVI 0x00000800 |
Definition at line 4811 of file tm4c123fe6pm.h.
#define QEI_CTL_RESMODE 0x00000010 |
Definition at line 4824 of file tm4c123fe6pm.h.
#define QEI_CTL_SIGMODE 0x00000004 |
Definition at line 4826 of file tm4c123fe6pm.h.
#define QEI_CTL_STALLEN 0x00001000 |
Definition at line 4810 of file tm4c123fe6pm.h.
#define QEI_CTL_SWAP 0x00000002 |
Definition at line 4827 of file tm4c123fe6pm.h.
#define QEI_CTL_VELDIV_1 0x00000000 |
Definition at line 4815 of file tm4c123fe6pm.h.
#define QEI_CTL_VELDIV_128 0x000001C0 |
Definition at line 4822 of file tm4c123fe6pm.h.
#define QEI_CTL_VELDIV_16 0x00000100 |
Definition at line 4819 of file tm4c123fe6pm.h.
#define QEI_CTL_VELDIV_2 0x00000040 |
Definition at line 4816 of file tm4c123fe6pm.h.
#define QEI_CTL_VELDIV_32 0x00000140 |
Definition at line 4820 of file tm4c123fe6pm.h.
#define QEI_CTL_VELDIV_4 0x00000080 |
Definition at line 4817 of file tm4c123fe6pm.h.
#define QEI_CTL_VELDIV_64 0x00000180 |
Definition at line 4821 of file tm4c123fe6pm.h.
#define QEI_CTL_VELDIV_8 0x000000C0 |
Definition at line 4818 of file tm4c123fe6pm.h.
#define QEI_CTL_VELDIV_M 0x000001C0 |
Definition at line 4814 of file tm4c123fe6pm.h.
#define QEI_CTL_VELEN 0x00000020 |
Definition at line 4823 of file tm4c123fe6pm.h.
#define QEI_INTEN_DIR 0x00000004 |
Definition at line 4895 of file tm4c123fe6pm.h.
#define QEI_INTEN_ERROR 0x00000008 |
Definition at line 4894 of file tm4c123fe6pm.h.
#define QEI_INTEN_INDEX 0x00000001 |
Definition at line 4898 of file tm4c123fe6pm.h.
#define QEI_INTEN_TIMER 0x00000002 |
Definition at line 4897 of file tm4c123fe6pm.h.
#define QEI_ISC_DIR 0x00000004 |
Definition at line 4917 of file tm4c123fe6pm.h.
#define QEI_ISC_ERROR 0x00000008 |
Definition at line 4916 of file tm4c123fe6pm.h.
#define QEI_ISC_INDEX 0x00000001 |
Definition at line 4919 of file tm4c123fe6pm.h.
#define QEI_ISC_TIMER 0x00000002 |
Definition at line 4918 of file tm4c123fe6pm.h.
#define QEI_LOAD_M 0xFFFFFFFF |
Definition at line 4862 of file tm4c123fe6pm.h.
#define QEI_LOAD_S 0 |
Definition at line 4863 of file tm4c123fe6pm.h.
#define QEI_MAXPOS_M 0xFFFFFFFF |
Definition at line 4853 of file tm4c123fe6pm.h.
#define QEI_MAXPOS_S 0 |
Definition at line 4855 of file tm4c123fe6pm.h.
#define QEI_POS_M 0xFFFFFFFF |
Definition at line 4844 of file tm4c123fe6pm.h.
#define QEI_POS_S 0 |
Definition at line 4846 of file tm4c123fe6pm.h.
#define QEI_RIS_DIR 0x00000004 |
Definition at line 4907 of file tm4c123fe6pm.h.
#define QEI_RIS_ERROR 0x00000008 |
Definition at line 4906 of file tm4c123fe6pm.h.
#define QEI_RIS_INDEX 0x00000001 |
Definition at line 4909 of file tm4c123fe6pm.h.
#define QEI_RIS_TIMER 0x00000002 |
Definition at line 4908 of file tm4c123fe6pm.h.
#define QEI_SPEED_M 0xFFFFFFFF |
Definition at line 4886 of file tm4c123fe6pm.h.
#define QEI_SPEED_S 0 |
Definition at line 4887 of file tm4c123fe6pm.h.
#define QEI_STAT_DIRECTION 0x00000002 |
Definition at line 4836 of file tm4c123fe6pm.h.
#define QEI_STAT_ERROR 0x00000001 |
Definition at line 4837 of file tm4c123fe6pm.h.
#define QEI_TIME_M 0xFFFFFFFF |
Definition at line 4870 of file tm4c123fe6pm.h.
#define QEI_TIME_S 0 |
Definition at line 4871 of file tm4c123fe6pm.h.
#define SSI0_CC_R (*((volatile uint32_t *)0x40008FC8)) |
Definition at line 297 of file tm4c123fe6pm.h.
Referenced by commonInit().
#define SSI0_CPSR_R (*((volatile uint32_t *)0x40008010)) |
Definition at line 291 of file tm4c123fe6pm.h.
Referenced by commonInit().
#define SSI0_CR0_R (*((volatile uint32_t *)0x40008000)) |
Definition at line 287 of file tm4c123fe6pm.h.
Referenced by commonInit().
#define SSI0_CR1_R (*((volatile uint32_t *)0x40008004)) |
Definition at line 288 of file tm4c123fe6pm.h.
Referenced by commonInit().
#define SSI0_DMACTL_R (*((volatile uint32_t *)0x40008024)) |
Definition at line 296 of file tm4c123fe6pm.h.
#define SSI0_DR_R (*((volatile uint32_t *)0x40008008)) |
Definition at line 289 of file tm4c123fe6pm.h.
Referenced by writecommand(), and writedata().
#define SSI0_ICR_R (*((volatile uint32_t *)0x40008020)) |
Definition at line 295 of file tm4c123fe6pm.h.
#define SSI0_IM_R (*((volatile uint32_t *)0x40008014)) |
Definition at line 292 of file tm4c123fe6pm.h.
#define SSI0_MIS_R (*((volatile uint32_t *)0x4000801C)) |
Definition at line 294 of file tm4c123fe6pm.h.
#define SSI0_RIS_R (*((volatile uint32_t *)0x40008018)) |
Definition at line 293 of file tm4c123fe6pm.h.
#define SSI0_SR_R (*((volatile uint32_t *)0x4000800C)) |
Definition at line 290 of file tm4c123fe6pm.h.
Referenced by writecommand(), and writedata().
#define SSI1_CC_R (*((volatile uint32_t *)0x40009FC8)) |
Definition at line 314 of file tm4c123fe6pm.h.
#define SSI1_CPSR_R (*((volatile uint32_t *)0x40009010)) |
Definition at line 308 of file tm4c123fe6pm.h.
#define SSI1_CR0_R (*((volatile uint32_t *)0x40009000)) |
Definition at line 304 of file tm4c123fe6pm.h.
#define SSI1_CR1_R (*((volatile uint32_t *)0x40009004)) |
Definition at line 305 of file tm4c123fe6pm.h.
#define SSI1_DMACTL_R (*((volatile uint32_t *)0x40009024)) |
Definition at line 313 of file tm4c123fe6pm.h.
#define SSI1_DR_R (*((volatile uint32_t *)0x40009008)) |
Definition at line 306 of file tm4c123fe6pm.h.
#define SSI1_ICR_R (*((volatile uint32_t *)0x40009020)) |
Definition at line 312 of file tm4c123fe6pm.h.
#define SSI1_IM_R (*((volatile uint32_t *)0x40009014)) |
Definition at line 309 of file tm4c123fe6pm.h.
#define SSI1_MIS_R (*((volatile uint32_t *)0x4000901C)) |
Definition at line 311 of file tm4c123fe6pm.h.
#define SSI1_RIS_R (*((volatile uint32_t *)0x40009018)) |
Definition at line 310 of file tm4c123fe6pm.h.
#define SSI1_SR_R (*((volatile uint32_t *)0x4000900C)) |
Definition at line 307 of file tm4c123fe6pm.h.
#define SSI2_CC_R (*((volatile uint32_t *)0x4000AFC8)) |
Definition at line 331 of file tm4c123fe6pm.h.
#define SSI2_CPSR_R (*((volatile uint32_t *)0x4000A010)) |
Definition at line 325 of file tm4c123fe6pm.h.
#define SSI2_CR0_R (*((volatile uint32_t *)0x4000A000)) |
Definition at line 321 of file tm4c123fe6pm.h.
#define SSI2_CR1_R (*((volatile uint32_t *)0x4000A004)) |
Definition at line 322 of file tm4c123fe6pm.h.
#define SSI2_DMACTL_R (*((volatile uint32_t *)0x4000A024)) |
Definition at line 330 of file tm4c123fe6pm.h.
#define SSI2_DR_R (*((volatile uint32_t *)0x4000A008)) |
Definition at line 323 of file tm4c123fe6pm.h.
#define SSI2_ICR_R (*((volatile uint32_t *)0x4000A020)) |
Definition at line 329 of file tm4c123fe6pm.h.
#define SSI2_IM_R (*((volatile uint32_t *)0x4000A014)) |
Definition at line 326 of file tm4c123fe6pm.h.
#define SSI2_MIS_R (*((volatile uint32_t *)0x4000A01C)) |
Definition at line 328 of file tm4c123fe6pm.h.
#define SSI2_RIS_R (*((volatile uint32_t *)0x4000A018)) |
Definition at line 327 of file tm4c123fe6pm.h.
#define SSI2_SR_R (*((volatile uint32_t *)0x4000A00C)) |
Definition at line 324 of file tm4c123fe6pm.h.
#define SSI3_CC_R (*((volatile uint32_t *)0x4000BFC8)) |
Definition at line 348 of file tm4c123fe6pm.h.
#define SSI3_CPSR_R (*((volatile uint32_t *)0x4000B010)) |
Definition at line 342 of file tm4c123fe6pm.h.
#define SSI3_CR0_R (*((volatile uint32_t *)0x4000B000)) |
Definition at line 338 of file tm4c123fe6pm.h.
#define SSI3_CR1_R (*((volatile uint32_t *)0x4000B004)) |
Definition at line 339 of file tm4c123fe6pm.h.
#define SSI3_DMACTL_R (*((volatile uint32_t *)0x4000B024)) |
Definition at line 347 of file tm4c123fe6pm.h.
#define SSI3_DR_R (*((volatile uint32_t *)0x4000B008)) |
Definition at line 340 of file tm4c123fe6pm.h.
#define SSI3_ICR_R (*((volatile uint32_t *)0x4000B020)) |
Definition at line 346 of file tm4c123fe6pm.h.
#define SSI3_IM_R (*((volatile uint32_t *)0x4000B014)) |
Definition at line 343 of file tm4c123fe6pm.h.
#define SSI3_MIS_R (*((volatile uint32_t *)0x4000B01C)) |
Definition at line 345 of file tm4c123fe6pm.h.
#define SSI3_RIS_R (*((volatile uint32_t *)0x4000B018)) |
Definition at line 344 of file tm4c123fe6pm.h.
#define SSI3_SR_R (*((volatile uint32_t *)0x4000B00C)) |
Definition at line 341 of file tm4c123fe6pm.h.
#define SSI_CC_CS_M 0x0000000F |
Definition at line 2943 of file tm4c123fe6pm.h.
#define SSI_CC_CS_PIOSC 0x00000005 |
Definition at line 2946 of file tm4c123fe6pm.h.
#define SSI_CC_CS_SYSPLL 0x00000000 |
Definition at line 2944 of file tm4c123fe6pm.h.
#define SSI_CPSR_CPSDVSR_M 0x000000FF |
Definition at line 2877 of file tm4c123fe6pm.h.
#define SSI_CPSR_CPSDVSR_S 0 |
Definition at line 2878 of file tm4c123fe6pm.h.
#define SSI_CR0_DSS_10 0x00000009 |
Definition at line 2833 of file tm4c123fe6pm.h.
#define SSI_CR0_DSS_11 0x0000000A |
Definition at line 2834 of file tm4c123fe6pm.h.
#define SSI_CR0_DSS_12 0x0000000B |
Definition at line 2835 of file tm4c123fe6pm.h.
#define SSI_CR0_DSS_13 0x0000000C |
Definition at line 2836 of file tm4c123fe6pm.h.
#define SSI_CR0_DSS_14 0x0000000D |
Definition at line 2837 of file tm4c123fe6pm.h.
#define SSI_CR0_DSS_15 0x0000000E |
Definition at line 2838 of file tm4c123fe6pm.h.
#define SSI_CR0_DSS_16 0x0000000F |
Definition at line 2839 of file tm4c123fe6pm.h.
#define SSI_CR0_DSS_4 0x00000003 |
Definition at line 2827 of file tm4c123fe6pm.h.
#define SSI_CR0_DSS_5 0x00000004 |
Definition at line 2828 of file tm4c123fe6pm.h.
#define SSI_CR0_DSS_6 0x00000005 |
Definition at line 2829 of file tm4c123fe6pm.h.
#define SSI_CR0_DSS_7 0x00000006 |
Definition at line 2830 of file tm4c123fe6pm.h.
#define SSI_CR0_DSS_8 0x00000007 |
Definition at line 2831 of file tm4c123fe6pm.h.
#define SSI_CR0_DSS_9 0x00000008 |
Definition at line 2832 of file tm4c123fe6pm.h.
#define SSI_CR0_DSS_M 0x0000000F |
Definition at line 2826 of file tm4c123fe6pm.h.
#define SSI_CR0_FRF_M 0x00000030 |
Definition at line 2822 of file tm4c123fe6pm.h.
#define SSI_CR0_FRF_MOTO 0x00000000 |
Definition at line 2823 of file tm4c123fe6pm.h.
#define SSI_CR0_FRF_NMW 0x00000020 |
Definition at line 2825 of file tm4c123fe6pm.h.
#define SSI_CR0_FRF_TI 0x00000010 |
Definition at line 2824 of file tm4c123fe6pm.h.
#define SSI_CR0_SCR_M 0x0000FF00 |
Definition at line 2819 of file tm4c123fe6pm.h.
#define SSI_CR0_SCR_S 8 |
Definition at line 2840 of file tm4c123fe6pm.h.
#define SSI_CR0_SPH 0x00000080 |
Definition at line 2820 of file tm4c123fe6pm.h.
#define SSI_CR0_SPO 0x00000040 |
Definition at line 2821 of file tm4c123fe6pm.h.
#define SSI_CR1_EOT 0x00000010 |
Definition at line 2847 of file tm4c123fe6pm.h.
#define SSI_CR1_LBM 0x00000001 |
Definition at line 2851 of file tm4c123fe6pm.h.
#define SSI_CR1_MS 0x00000004 |
Definition at line 2848 of file tm4c123fe6pm.h.
#define SSI_CR1_SSE 0x00000002 |
Definition at line 2849 of file tm4c123fe6pm.h.
#define SSI_DMACTL_RXDMAE 0x00000001 |
Definition at line 2936 of file tm4c123fe6pm.h.
#define SSI_DMACTL_TXDMAE 0x00000002 |
Definition at line 2935 of file tm4c123fe6pm.h.
#define SSI_DR_DATA_M 0x0000FFFF |
Definition at line 2858 of file tm4c123fe6pm.h.
#define SSI_DR_DATA_S 0 |
Definition at line 2859 of file tm4c123fe6pm.h.
#define SSI_ICR_RORIC 0x00000001 |
Definition at line 2927 of file tm4c123fe6pm.h.
#define SSI_ICR_RTIC 0x00000002 |
Definition at line 2925 of file tm4c123fe6pm.h.
#define SSI_IM_RORIM 0x00000001 |
Definition at line 2889 of file tm4c123fe6pm.h.
#define SSI_IM_RTIM 0x00000002 |
Definition at line 2887 of file tm4c123fe6pm.h.
#define SSI_IM_RXIM 0x00000004 |
Definition at line 2886 of file tm4c123fe6pm.h.
#define SSI_IM_TXIM 0x00000008 |
Definition at line 2885 of file tm4c123fe6pm.h.
#define SSI_MIS_RORMIS 0x00000001 |
Definition at line 2917 of file tm4c123fe6pm.h.
#define SSI_MIS_RTMIS 0x00000002 |
Definition at line 2915 of file tm4c123fe6pm.h.
#define SSI_MIS_RXMIS 0x00000004 |
Definition at line 2913 of file tm4c123fe6pm.h.
#define SSI_MIS_TXMIS 0x00000008 |
Definition at line 2911 of file tm4c123fe6pm.h.
#define SSI_RIS_RORRIS 0x00000001 |
Definition at line 2903 of file tm4c123fe6pm.h.
#define SSI_RIS_RTRIS 0x00000002 |
Definition at line 2901 of file tm4c123fe6pm.h.
#define SSI_RIS_RXRIS 0x00000004 |
Definition at line 2899 of file tm4c123fe6pm.h.
#define SSI_RIS_TXRIS 0x00000008 |
Definition at line 2897 of file tm4c123fe6pm.h.
#define SSI_SR_BSY 0x00000010 |
Definition at line 2866 of file tm4c123fe6pm.h.
#define SSI_SR_RFF 0x00000008 |
Definition at line 2867 of file tm4c123fe6pm.h.
#define SSI_SR_RNE 0x00000004 |
Definition at line 2868 of file tm4c123fe6pm.h.
#define SSI_SR_TFE 0x00000001 |
Definition at line 2870 of file tm4c123fe6pm.h.
#define SSI_SR_TNF 0x00000002 |
Definition at line 2869 of file tm4c123fe6pm.h.
#define SYSCTL_DC0_FLASHSZ_128K 0x0000003F |
Definition at line 9440 of file tm4c123fe6pm.h.
#define SYSCTL_DC0_FLASHSZ_16KB 0x00000007 |
Definition at line 9436 of file tm4c123fe6pm.h.
#define SYSCTL_DC0_FLASHSZ_192K 0x0000005F |
Definition at line 9441 of file tm4c123fe6pm.h.
#define SYSCTL_DC0_FLASHSZ_256K 0x0000007F |
Definition at line 9442 of file tm4c123fe6pm.h.
#define SYSCTL_DC0_FLASHSZ_32KB 0x0000000F |
Definition at line 9437 of file tm4c123fe6pm.h.
#define SYSCTL_DC0_FLASHSZ_64KB 0x0000001F |
Definition at line 9438 of file tm4c123fe6pm.h.
#define SYSCTL_DC0_FLASHSZ_8KB 0x00000003 |
Definition at line 9435 of file tm4c123fe6pm.h.
#define SYSCTL_DC0_FLASHSZ_96KB 0x0000002F |
Definition at line 9439 of file tm4c123fe6pm.h.
#define SYSCTL_DC0_FLASHSZ_M 0x0000FFFF |
Definition at line 9434 of file tm4c123fe6pm.h.
#define SYSCTL_DC0_R (*((volatile uint32_t *)0x400FE008)) |
Definition at line 2142 of file tm4c123fe6pm.h.
#define SYSCTL_DC0_SRAMSZ_12KB 0x002F0000 |
Definition at line 9429 of file tm4c123fe6pm.h.
#define SYSCTL_DC0_SRAMSZ_16KB 0x003F0000 |
Definition at line 9430 of file tm4c123fe6pm.h.
#define SYSCTL_DC0_SRAMSZ_20KB 0x004F0000 |
Definition at line 9431 of file tm4c123fe6pm.h.
#define SYSCTL_DC0_SRAMSZ_24KB 0x005F0000 |
Definition at line 9432 of file tm4c123fe6pm.h.
#define SYSCTL_DC0_SRAMSZ_2KB 0x00070000 |
Definition at line 9425 of file tm4c123fe6pm.h.
#define SYSCTL_DC0_SRAMSZ_32KB 0x007F0000 |
Definition at line 9433 of file tm4c123fe6pm.h.
#define SYSCTL_DC0_SRAMSZ_4KB 0x000F0000 |
Definition at line 9426 of file tm4c123fe6pm.h.
#define SYSCTL_DC0_SRAMSZ_6KB 0x00170000 |
Definition at line 9427 of file tm4c123fe6pm.h.
#define SYSCTL_DC0_SRAMSZ_8KB 0x001F0000 |
Definition at line 9428 of file tm4c123fe6pm.h.
#define SYSCTL_DC0_SRAMSZ_M 0xFFFF0000 |
Definition at line 9424 of file tm4c123fe6pm.h.
#define SYSCTL_DC1_ADC0 0x00010000 |
Definition at line 9455 of file tm4c123fe6pm.h.
#define SYSCTL_DC1_ADC0SPD_125K 0x00000000 |
Definition at line 9475 of file tm4c123fe6pm.h.
#define SYSCTL_DC1_ADC0SPD_1M 0x00000300 |
Definition at line 9478 of file tm4c123fe6pm.h.
#define SYSCTL_DC1_ADC0SPD_250K 0x00000100 |
Definition at line 9476 of file tm4c123fe6pm.h.
#define SYSCTL_DC1_ADC0SPD_500K 0x00000200 |
Definition at line 9477 of file tm4c123fe6pm.h.
#define SYSCTL_DC1_ADC0SPD_M 0x00000300 |
Definition at line 9474 of file tm4c123fe6pm.h.
#define SYSCTL_DC1_ADC1 0x00020000 |
Definition at line 9454 of file tm4c123fe6pm.h.
#define SYSCTL_DC1_ADC1SPD_125K 0x00000000 |
Definition at line 9470 of file tm4c123fe6pm.h.
#define SYSCTL_DC1_ADC1SPD_1M 0x00000C00 |
Definition at line 9473 of file tm4c123fe6pm.h.
#define SYSCTL_DC1_ADC1SPD_250K 0x00000400 |
Definition at line 9471 of file tm4c123fe6pm.h.
#define SYSCTL_DC1_ADC1SPD_500K 0x00000800 |
Definition at line 9472 of file tm4c123fe6pm.h.
#define SYSCTL_DC1_ADC1SPD_M 0x00000C00 |
Definition at line 9469 of file tm4c123fe6pm.h.
#define SYSCTL_DC1_CAN0 0x01000000 |
Definition at line 9451 of file tm4c123fe6pm.h.
#define SYSCTL_DC1_CAN1 0x02000000 |
Definition at line 9450 of file tm4c123fe6pm.h.
#define SYSCTL_DC1_HIB 0x00000040 |
Definition at line 9480 of file tm4c123fe6pm.h.
#define SYSCTL_DC1_JTAG 0x00000001 |
Definition at line 9486 of file tm4c123fe6pm.h.
#define SYSCTL_DC1_MINSYSDIV_20 0x00009000 |
Definition at line 9467 of file tm4c123fe6pm.h.
#define SYSCTL_DC1_MINSYSDIV_25 0x00007000 |
Definition at line 9465 of file tm4c123fe6pm.h.
#define SYSCTL_DC1_MINSYSDIV_40 0x00004000 |
Definition at line 9463 of file tm4c123fe6pm.h.
#define SYSCTL_DC1_MINSYSDIV_50 0x00003000 |
Definition at line 9461 of file tm4c123fe6pm.h.
#define SYSCTL_DC1_MINSYSDIV_66 0x00002000 |
Definition at line 9459 of file tm4c123fe6pm.h.
#define SYSCTL_DC1_MINSYSDIV_80 0x00001000 |
Definition at line 9457 of file tm4c123fe6pm.h.
#define SYSCTL_DC1_MINSYSDIV_M 0x0000F000 |
Definition at line 9456 of file tm4c123fe6pm.h.
#define SYSCTL_DC1_MPU 0x00000080 |
Definition at line 9479 of file tm4c123fe6pm.h.
#define SYSCTL_DC1_PLL 0x00000010 |
Definition at line 9482 of file tm4c123fe6pm.h.
#define SYSCTL_DC1_PWM0 0x00100000 |
Definition at line 9453 of file tm4c123fe6pm.h.
#define SYSCTL_DC1_PWM1 0x00200000 |
Definition at line 9452 of file tm4c123fe6pm.h.
#define SYSCTL_DC1_R (*((volatile uint32_t *)0x400FE010)) |
Definition at line 2143 of file tm4c123fe6pm.h.
#define SYSCTL_DC1_SWD 0x00000002 |
Definition at line 9485 of file tm4c123fe6pm.h.
#define SYSCTL_DC1_SWO 0x00000004 |
Definition at line 9484 of file tm4c123fe6pm.h.
#define SYSCTL_DC1_TEMP 0x00000020 |
Definition at line 9481 of file tm4c123fe6pm.h.
#define SYSCTL_DC1_WDT0 0x00000008 |
Definition at line 9483 of file tm4c123fe6pm.h.
#define SYSCTL_DC1_WDT1 0x10000000 |
Definition at line 9449 of file tm4c123fe6pm.h.
#define SYSCTL_DC2_COMP0 0x01000000 |
Definition at line 9497 of file tm4c123fe6pm.h.
#define SYSCTL_DC2_COMP1 0x02000000 |
Definition at line 9496 of file tm4c123fe6pm.h.
#define SYSCTL_DC2_COMP2 0x04000000 |
Definition at line 9495 of file tm4c123fe6pm.h.
#define SYSCTL_DC2_EPI0 0x40000000 |
Definition at line 9493 of file tm4c123fe6pm.h.
#define SYSCTL_DC2_I2C0 0x00001000 |
Definition at line 9505 of file tm4c123fe6pm.h.
#define SYSCTL_DC2_I2C0HS 0x00002000 |
Definition at line 9504 of file tm4c123fe6pm.h.
#define SYSCTL_DC2_I2C1 0x00004000 |
Definition at line 9503 of file tm4c123fe6pm.h.
#define SYSCTL_DC2_I2C1HS 0x00008000 |
Definition at line 9502 of file tm4c123fe6pm.h.
#define SYSCTL_DC2_I2S0 0x10000000 |
Definition at line 9494 of file tm4c123fe6pm.h.
#define SYSCTL_DC2_QEI0 0x00000100 |
Definition at line 9507 of file tm4c123fe6pm.h.
#define SYSCTL_DC2_QEI1 0x00000200 |
Definition at line 9506 of file tm4c123fe6pm.h.
#define SYSCTL_DC2_R (*((volatile uint32_t *)0x400FE014)) |
Definition at line 2144 of file tm4c123fe6pm.h.
#define SYSCTL_DC2_SSI0 0x00000010 |
Definition at line 9509 of file tm4c123fe6pm.h.
#define SYSCTL_DC2_SSI1 0x00000020 |
Definition at line 9508 of file tm4c123fe6pm.h.
#define SYSCTL_DC2_TIMER0 0x00010000 |
Definition at line 9501 of file tm4c123fe6pm.h.
#define SYSCTL_DC2_TIMER1 0x00020000 |
Definition at line 9500 of file tm4c123fe6pm.h.
#define SYSCTL_DC2_TIMER2 0x00040000 |
Definition at line 9499 of file tm4c123fe6pm.h.
#define SYSCTL_DC2_TIMER3 0x00080000 |
Definition at line 9498 of file tm4c123fe6pm.h.
#define SYSCTL_DC2_UART0 0x00000001 |
Definition at line 9512 of file tm4c123fe6pm.h.
#define SYSCTL_DC2_UART1 0x00000002 |
Definition at line 9511 of file tm4c123fe6pm.h.
#define SYSCTL_DC2_UART2 0x00000004 |
Definition at line 9510 of file tm4c123fe6pm.h.
#define SYSCTL_DC3_32KHZ 0x80000000 |
Definition at line 9519 of file tm4c123fe6pm.h.
#define SYSCTL_DC3_ADC0AIN0 0x00010000 |
Definition at line 9533 of file tm4c123fe6pm.h.
#define SYSCTL_DC3_ADC0AIN1 0x00020000 |
Definition at line 9532 of file tm4c123fe6pm.h.
#define SYSCTL_DC3_ADC0AIN2 0x00040000 |
Definition at line 9531 of file tm4c123fe6pm.h.
#define SYSCTL_DC3_ADC0AIN3 0x00080000 |
Definition at line 9530 of file tm4c123fe6pm.h.
#define SYSCTL_DC3_ADC0AIN4 0x00100000 |
Definition at line 9529 of file tm4c123fe6pm.h.
#define SYSCTL_DC3_ADC0AIN5 0x00200000 |
Definition at line 9528 of file tm4c123fe6pm.h.
#define SYSCTL_DC3_ADC0AIN6 0x00400000 |
Definition at line 9527 of file tm4c123fe6pm.h.
#define SYSCTL_DC3_ADC0AIN7 0x00800000 |
Definition at line 9526 of file tm4c123fe6pm.h.
#define SYSCTL_DC3_C0MINUS 0x00000040 |
Definition at line 9543 of file tm4c123fe6pm.h.
#define SYSCTL_DC3_C0O 0x00000100 |
Definition at line 9541 of file tm4c123fe6pm.h.
#define SYSCTL_DC3_C0PLUS 0x00000080 |
Definition at line 9542 of file tm4c123fe6pm.h.
#define SYSCTL_DC3_C1MINUS 0x00000200 |
Definition at line 9540 of file tm4c123fe6pm.h.
#define SYSCTL_DC3_C1O 0x00000800 |
Definition at line 9538 of file tm4c123fe6pm.h.
#define SYSCTL_DC3_C1PLUS 0x00000400 |
Definition at line 9539 of file tm4c123fe6pm.h.
#define SYSCTL_DC3_C2MINUS 0x00001000 |
Definition at line 9537 of file tm4c123fe6pm.h.
#define SYSCTL_DC3_C2O 0x00004000 |
Definition at line 9535 of file tm4c123fe6pm.h.
#define SYSCTL_DC3_C2PLUS 0x00002000 |
Definition at line 9536 of file tm4c123fe6pm.h.
#define SYSCTL_DC3_CCP0 0x01000000 |
Definition at line 9525 of file tm4c123fe6pm.h.
#define SYSCTL_DC3_CCP1 0x02000000 |
Definition at line 9524 of file tm4c123fe6pm.h.
#define SYSCTL_DC3_CCP2 0x04000000 |
Definition at line 9523 of file tm4c123fe6pm.h.
#define SYSCTL_DC3_CCP3 0x08000000 |
Definition at line 9522 of file tm4c123fe6pm.h.
#define SYSCTL_DC3_CCP4 0x10000000 |
Definition at line 9521 of file tm4c123fe6pm.h.
#define SYSCTL_DC3_CCP5 0x20000000 |
Definition at line 9520 of file tm4c123fe6pm.h.
#define SYSCTL_DC3_PWM0 0x00000001 |
Definition at line 9549 of file tm4c123fe6pm.h.
#define SYSCTL_DC3_PWM1 0x00000002 |
Definition at line 9548 of file tm4c123fe6pm.h.
#define SYSCTL_DC3_PWM2 0x00000004 |
Definition at line 9547 of file tm4c123fe6pm.h.
#define SYSCTL_DC3_PWM3 0x00000008 |
Definition at line 9546 of file tm4c123fe6pm.h.
#define SYSCTL_DC3_PWM4 0x00000010 |
Definition at line 9545 of file tm4c123fe6pm.h.
#define SYSCTL_DC3_PWM5 0x00000020 |
Definition at line 9544 of file tm4c123fe6pm.h.
#define SYSCTL_DC3_PWMFAULT 0x00008000 |
Definition at line 9534 of file tm4c123fe6pm.h.
#define SYSCTL_DC3_R (*((volatile uint32_t *)0x400FE018)) |
Definition at line 2145 of file tm4c123fe6pm.h.
#define SYSCTL_DC4_CCP6 0x00004000 |
Definition at line 9561 of file tm4c123fe6pm.h.
#define SYSCTL_DC4_CCP7 0x00008000 |
Definition at line 9560 of file tm4c123fe6pm.h.
#define SYSCTL_DC4_E1588 0x01000000 |
Definition at line 9558 of file tm4c123fe6pm.h.
#define SYSCTL_DC4_EMAC0 0x10000000 |
Definition at line 9557 of file tm4c123fe6pm.h.
#define SYSCTL_DC4_EPHY0 0x40000000 |
Definition at line 9556 of file tm4c123fe6pm.h.
#define SYSCTL_DC4_GPIOA 0x00000001 |
Definition at line 9572 of file tm4c123fe6pm.h.
#define SYSCTL_DC4_GPIOB 0x00000002 |
Definition at line 9571 of file tm4c123fe6pm.h.
#define SYSCTL_DC4_GPIOC 0x00000004 |
Definition at line 9570 of file tm4c123fe6pm.h.
#define SYSCTL_DC4_GPIOD 0x00000008 |
Definition at line 9569 of file tm4c123fe6pm.h.
#define SYSCTL_DC4_GPIOE 0x00000010 |
Definition at line 9568 of file tm4c123fe6pm.h.
#define SYSCTL_DC4_GPIOF 0x00000020 |
Definition at line 9567 of file tm4c123fe6pm.h.
#define SYSCTL_DC4_GPIOG 0x00000040 |
Definition at line 9566 of file tm4c123fe6pm.h.
#define SYSCTL_DC4_GPIOH 0x00000080 |
Definition at line 9565 of file tm4c123fe6pm.h.
#define SYSCTL_DC4_GPIOJ 0x00000100 |
Definition at line 9564 of file tm4c123fe6pm.h.
#define SYSCTL_DC4_PICAL 0x00040000 |
Definition at line 9559 of file tm4c123fe6pm.h.
#define SYSCTL_DC4_R (*((volatile uint32_t *)0x400FE01C)) |
Definition at line 2146 of file tm4c123fe6pm.h.
#define SYSCTL_DC4_ROM 0x00001000 |
Definition at line 9563 of file tm4c123fe6pm.h.
#define SYSCTL_DC4_UDMA 0x00002000 |
Definition at line 9562 of file tm4c123fe6pm.h.
#define SYSCTL_DC5_PWM0 0x00000001 |
Definition at line 9592 of file tm4c123fe6pm.h.
#define SYSCTL_DC5_PWM1 0x00000002 |
Definition at line 9591 of file tm4c123fe6pm.h.
#define SYSCTL_DC5_PWM2 0x00000004 |
Definition at line 9590 of file tm4c123fe6pm.h.
#define SYSCTL_DC5_PWM3 0x00000008 |
Definition at line 9589 of file tm4c123fe6pm.h.
#define SYSCTL_DC5_PWM4 0x00000010 |
Definition at line 9588 of file tm4c123fe6pm.h.
#define SYSCTL_DC5_PWM5 0x00000020 |
Definition at line 9587 of file tm4c123fe6pm.h.
#define SYSCTL_DC5_PWM6 0x00000040 |
Definition at line 9586 of file tm4c123fe6pm.h.
#define SYSCTL_DC5_PWM7 0x00000080 |
Definition at line 9585 of file tm4c123fe6pm.h.
#define SYSCTL_DC5_PWMEFLT 0x00200000 |
Definition at line 9583 of file tm4c123fe6pm.h.
#define SYSCTL_DC5_PWMESYNC 0x00100000 |
Definition at line 9584 of file tm4c123fe6pm.h.
#define SYSCTL_DC5_PWMFAULT0 0x01000000 |
Definition at line 9582 of file tm4c123fe6pm.h.
#define SYSCTL_DC5_PWMFAULT1 0x02000000 |
Definition at line 9581 of file tm4c123fe6pm.h.
#define SYSCTL_DC5_PWMFAULT2 0x04000000 |
Definition at line 9580 of file tm4c123fe6pm.h.
#define SYSCTL_DC5_PWMFAULT3 0x08000000 |
Definition at line 9579 of file tm4c123fe6pm.h.
#define SYSCTL_DC5_R (*((volatile uint32_t *)0x400FE020)) |
Definition at line 2147 of file tm4c123fe6pm.h.
#define SYSCTL_DC6_R (*((volatile uint32_t *)0x400FE024)) |
Definition at line 2148 of file tm4c123fe6pm.h.
#define SYSCTL_DC6_USB0_DEV 0x00000001 |
Definition at line 9601 of file tm4c123fe6pm.h.
#define SYSCTL_DC6_USB0_HOSTDEV 0x00000002 |
Definition at line 9602 of file tm4c123fe6pm.h.
#define SYSCTL_DC6_USB0_M 0x00000003 |
Definition at line 9600 of file tm4c123fe6pm.h.
#define SYSCTL_DC6_USB0_OTG 0x00000003 |
Definition at line 9603 of file tm4c123fe6pm.h.
#define SYSCTL_DC6_USB0PHY 0x00000010 |
Definition at line 9599 of file tm4c123fe6pm.h.
#define SYSCTL_DC7_DMACH0 0x00000001 |
Definition at line 9640 of file tm4c123fe6pm.h.
#define SYSCTL_DC7_DMACH1 0x00000002 |
Definition at line 9639 of file tm4c123fe6pm.h.
#define SYSCTL_DC7_DMACH10 0x00000400 |
Definition at line 9630 of file tm4c123fe6pm.h.
#define SYSCTL_DC7_DMACH11 0x00000800 |
Definition at line 9629 of file tm4c123fe6pm.h.
#define SYSCTL_DC7_DMACH12 0x00001000 |
Definition at line 9628 of file tm4c123fe6pm.h.
#define SYSCTL_DC7_DMACH13 0x00002000 |
Definition at line 9627 of file tm4c123fe6pm.h.
#define SYSCTL_DC7_DMACH14 0x00004000 |
Definition at line 9626 of file tm4c123fe6pm.h.
#define SYSCTL_DC7_DMACH15 0x00008000 |
Definition at line 9625 of file tm4c123fe6pm.h.
#define SYSCTL_DC7_DMACH16 0x00010000 |
Definition at line 9624 of file tm4c123fe6pm.h.
#define SYSCTL_DC7_DMACH17 0x00020000 |
Definition at line 9623 of file tm4c123fe6pm.h.
#define SYSCTL_DC7_DMACH18 0x00040000 |
Definition at line 9622 of file tm4c123fe6pm.h.
#define SYSCTL_DC7_DMACH19 0x00080000 |
Definition at line 9621 of file tm4c123fe6pm.h.
#define SYSCTL_DC7_DMACH2 0x00000004 |
Definition at line 9638 of file tm4c123fe6pm.h.
#define SYSCTL_DC7_DMACH20 0x00100000 |
Definition at line 9620 of file tm4c123fe6pm.h.
#define SYSCTL_DC7_DMACH21 0x00200000 |
Definition at line 9619 of file tm4c123fe6pm.h.
#define SYSCTL_DC7_DMACH22 0x00400000 |
Definition at line 9618 of file tm4c123fe6pm.h.
#define SYSCTL_DC7_DMACH23 0x00800000 |
Definition at line 9617 of file tm4c123fe6pm.h.
#define SYSCTL_DC7_DMACH24 0x01000000 |
Definition at line 9616 of file tm4c123fe6pm.h.
#define SYSCTL_DC7_DMACH25 0x02000000 |
Definition at line 9615 of file tm4c123fe6pm.h.
#define SYSCTL_DC7_DMACH26 0x04000000 |
Definition at line 9614 of file tm4c123fe6pm.h.
#define SYSCTL_DC7_DMACH27 0x08000000 |
Definition at line 9613 of file tm4c123fe6pm.h.
#define SYSCTL_DC7_DMACH28 0x10000000 |
Definition at line 9612 of file tm4c123fe6pm.h.
#define SYSCTL_DC7_DMACH29 0x20000000 |
Definition at line 9611 of file tm4c123fe6pm.h.
#define SYSCTL_DC7_DMACH3 0x00000008 |
Definition at line 9637 of file tm4c123fe6pm.h.
#define SYSCTL_DC7_DMACH30 0x40000000 |
Definition at line 9610 of file tm4c123fe6pm.h.
#define SYSCTL_DC7_DMACH4 0x00000010 |
Definition at line 9636 of file tm4c123fe6pm.h.
#define SYSCTL_DC7_DMACH5 0x00000020 |
Definition at line 9635 of file tm4c123fe6pm.h.
#define SYSCTL_DC7_DMACH6 0x00000040 |
Definition at line 9634 of file tm4c123fe6pm.h.
#define SYSCTL_DC7_DMACH7 0x00000080 |
Definition at line 9633 of file tm4c123fe6pm.h.
#define SYSCTL_DC7_DMACH8 0x00000100 |
Definition at line 9632 of file tm4c123fe6pm.h.
#define SYSCTL_DC7_DMACH9 0x00000200 |
Definition at line 9631 of file tm4c123fe6pm.h.
#define SYSCTL_DC7_R (*((volatile uint32_t *)0x400FE028)) |
Definition at line 2149 of file tm4c123fe6pm.h.
#define SYSCTL_DC8_ADC0AIN0 0x00000001 |
Definition at line 9678 of file tm4c123fe6pm.h.
#define SYSCTL_DC8_ADC0AIN1 0x00000002 |
Definition at line 9677 of file tm4c123fe6pm.h.
#define SYSCTL_DC8_ADC0AIN10 0x00000400 |
Definition at line 9668 of file tm4c123fe6pm.h.
#define SYSCTL_DC8_ADC0AIN11 0x00000800 |
Definition at line 9667 of file tm4c123fe6pm.h.
#define SYSCTL_DC8_ADC0AIN12 0x00001000 |
Definition at line 9666 of file tm4c123fe6pm.h.
#define SYSCTL_DC8_ADC0AIN13 0x00002000 |
Definition at line 9665 of file tm4c123fe6pm.h.
#define SYSCTL_DC8_ADC0AIN14 0x00004000 |
Definition at line 9664 of file tm4c123fe6pm.h.
#define SYSCTL_DC8_ADC0AIN15 0x00008000 |
Definition at line 9663 of file tm4c123fe6pm.h.
#define SYSCTL_DC8_ADC0AIN2 0x00000004 |
Definition at line 9676 of file tm4c123fe6pm.h.
#define SYSCTL_DC8_ADC0AIN3 0x00000008 |
Definition at line 9675 of file tm4c123fe6pm.h.
#define SYSCTL_DC8_ADC0AIN4 0x00000010 |
Definition at line 9674 of file tm4c123fe6pm.h.
#define SYSCTL_DC8_ADC0AIN5 0x00000020 |
Definition at line 9673 of file tm4c123fe6pm.h.
#define SYSCTL_DC8_ADC0AIN6 0x00000040 |
Definition at line 9672 of file tm4c123fe6pm.h.
#define SYSCTL_DC8_ADC0AIN7 0x00000080 |
Definition at line 9671 of file tm4c123fe6pm.h.
#define SYSCTL_DC8_ADC0AIN8 0x00000100 |
Definition at line 9670 of file tm4c123fe6pm.h.
#define SYSCTL_DC8_ADC0AIN9 0x00000200 |
Definition at line 9669 of file tm4c123fe6pm.h.
#define SYSCTL_DC8_ADC1AIN0 0x00010000 |
Definition at line 9662 of file tm4c123fe6pm.h.
#define SYSCTL_DC8_ADC1AIN1 0x00020000 |
Definition at line 9661 of file tm4c123fe6pm.h.
#define SYSCTL_DC8_ADC1AIN10 0x04000000 |
Definition at line 9652 of file tm4c123fe6pm.h.
#define SYSCTL_DC8_ADC1AIN11 0x08000000 |
Definition at line 9651 of file tm4c123fe6pm.h.
#define SYSCTL_DC8_ADC1AIN12 0x10000000 |
Definition at line 9650 of file tm4c123fe6pm.h.
#define SYSCTL_DC8_ADC1AIN13 0x20000000 |
Definition at line 9649 of file tm4c123fe6pm.h.
#define SYSCTL_DC8_ADC1AIN14 0x40000000 |
Definition at line 9648 of file tm4c123fe6pm.h.
#define SYSCTL_DC8_ADC1AIN15 0x80000000 |
Definition at line 9647 of file tm4c123fe6pm.h.
#define SYSCTL_DC8_ADC1AIN2 0x00040000 |
Definition at line 9660 of file tm4c123fe6pm.h.
#define SYSCTL_DC8_ADC1AIN3 0x00080000 |
Definition at line 9659 of file tm4c123fe6pm.h.
#define SYSCTL_DC8_ADC1AIN4 0x00100000 |
Definition at line 9658 of file tm4c123fe6pm.h.
#define SYSCTL_DC8_ADC1AIN5 0x00200000 |
Definition at line 9657 of file tm4c123fe6pm.h.
#define SYSCTL_DC8_ADC1AIN6 0x00400000 |
Definition at line 9656 of file tm4c123fe6pm.h.
#define SYSCTL_DC8_ADC1AIN7 0x00800000 |
Definition at line 9655 of file tm4c123fe6pm.h.
#define SYSCTL_DC8_ADC1AIN8 0x01000000 |
Definition at line 9654 of file tm4c123fe6pm.h.
#define SYSCTL_DC8_ADC1AIN9 0x02000000 |
Definition at line 9653 of file tm4c123fe6pm.h.
#define SYSCTL_DC8_R (*((volatile uint32_t *)0x400FE02C)) |
Definition at line 2150 of file tm4c123fe6pm.h.
#define SYSCTL_DC9_ADC0DC0 0x00000001 |
Definition at line 10187 of file tm4c123fe6pm.h.
#define SYSCTL_DC9_ADC0DC1 0x00000002 |
Definition at line 10186 of file tm4c123fe6pm.h.
#define SYSCTL_DC9_ADC0DC2 0x00000004 |
Definition at line 10185 of file tm4c123fe6pm.h.
#define SYSCTL_DC9_ADC0DC3 0x00000008 |
Definition at line 10184 of file tm4c123fe6pm.h.
#define SYSCTL_DC9_ADC0DC4 0x00000010 |
Definition at line 10183 of file tm4c123fe6pm.h.
#define SYSCTL_DC9_ADC0DC5 0x00000020 |
Definition at line 10182 of file tm4c123fe6pm.h.
#define SYSCTL_DC9_ADC0DC6 0x00000040 |
Definition at line 10181 of file tm4c123fe6pm.h.
#define SYSCTL_DC9_ADC0DC7 0x00000080 |
Definition at line 10180 of file tm4c123fe6pm.h.
#define SYSCTL_DC9_ADC1DC0 0x00010000 |
Definition at line 10179 of file tm4c123fe6pm.h.
#define SYSCTL_DC9_ADC1DC1 0x00020000 |
Definition at line 10178 of file tm4c123fe6pm.h.
#define SYSCTL_DC9_ADC1DC2 0x00040000 |
Definition at line 10177 of file tm4c123fe6pm.h.
#define SYSCTL_DC9_ADC1DC3 0x00080000 |
Definition at line 10176 of file tm4c123fe6pm.h.
#define SYSCTL_DC9_ADC1DC4 0x00100000 |
Definition at line 10175 of file tm4c123fe6pm.h.
#define SYSCTL_DC9_ADC1DC5 0x00200000 |
Definition at line 10174 of file tm4c123fe6pm.h.
#define SYSCTL_DC9_ADC1DC6 0x00400000 |
Definition at line 10173 of file tm4c123fe6pm.h.
#define SYSCTL_DC9_ADC1DC7 0x00800000 |
Definition at line 10172 of file tm4c123fe6pm.h.
#define SYSCTL_DC9_R (*((volatile uint32_t *)0x400FE190)) |
Definition at line 2180 of file tm4c123fe6pm.h.
#define SYSCTL_DCGC0_ADC0 0x00010000 |
Definition at line 10024 of file tm4c123fe6pm.h.
#define SYSCTL_DCGC0_ADC1 0x00020000 |
Definition at line 10023 of file tm4c123fe6pm.h.
#define SYSCTL_DCGC0_CAN0 0x01000000 |
Definition at line 10021 of file tm4c123fe6pm.h.
#define SYSCTL_DCGC0_CAN1 0x02000000 |
Definition at line 10020 of file tm4c123fe6pm.h.
#define SYSCTL_DCGC0_PWM0 0x00100000 |
Definition at line 10022 of file tm4c123fe6pm.h.
#define SYSCTL_DCGC0_R (*((volatile uint32_t *)0x400FE120)) |
Definition at line 2169 of file tm4c123fe6pm.h.
#define SYSCTL_DCGC0_WDT0 0x00000008 |
Definition at line 10025 of file tm4c123fe6pm.h.
#define SYSCTL_DCGC0_WDT1 0x10000000 |
Definition at line 10019 of file tm4c123fe6pm.h.
#define SYSCTL_DCGC1_COMP0 0x01000000 |
Definition at line 10033 of file tm4c123fe6pm.h.
#define SYSCTL_DCGC1_COMP1 0x02000000 |
Definition at line 10032 of file tm4c123fe6pm.h.
#define SYSCTL_DCGC1_I2C0 0x00001000 |
Definition at line 10039 of file tm4c123fe6pm.h.
#define SYSCTL_DCGC1_I2C1 0x00004000 |
Definition at line 10038 of file tm4c123fe6pm.h.
#define SYSCTL_DCGC1_QEI0 0x00000100 |
Definition at line 10041 of file tm4c123fe6pm.h.
#define SYSCTL_DCGC1_QEI1 0x00000200 |
Definition at line 10040 of file tm4c123fe6pm.h.
#define SYSCTL_DCGC1_R (*((volatile uint32_t *)0x400FE124)) |
Definition at line 2170 of file tm4c123fe6pm.h.
#define SYSCTL_DCGC1_SSI0 0x00000010 |
Definition at line 10043 of file tm4c123fe6pm.h.
#define SYSCTL_DCGC1_SSI1 0x00000020 |
Definition at line 10042 of file tm4c123fe6pm.h.
#define SYSCTL_DCGC1_TIMER0 0x00010000 |
Definition at line 10037 of file tm4c123fe6pm.h.
#define SYSCTL_DCGC1_TIMER1 0x00020000 |
Definition at line 10036 of file tm4c123fe6pm.h.
#define SYSCTL_DCGC1_TIMER2 0x00040000 |
Definition at line 10035 of file tm4c123fe6pm.h.
#define SYSCTL_DCGC1_TIMER3 0x00080000 |
Definition at line 10034 of file tm4c123fe6pm.h.
#define SYSCTL_DCGC1_UART0 0x00000001 |
Definition at line 10046 of file tm4c123fe6pm.h.
#define SYSCTL_DCGC1_UART1 0x00000002 |
Definition at line 10045 of file tm4c123fe6pm.h.
#define SYSCTL_DCGC1_UART2 0x00000004 |
Definition at line 10044 of file tm4c123fe6pm.h.
#define SYSCTL_DCGC2_GPIOA 0x00000001 |
Definition at line 10061 of file tm4c123fe6pm.h.
#define SYSCTL_DCGC2_GPIOB 0x00000002 |
Definition at line 10060 of file tm4c123fe6pm.h.
#define SYSCTL_DCGC2_GPIOC 0x00000004 |
Definition at line 10059 of file tm4c123fe6pm.h.
#define SYSCTL_DCGC2_GPIOD 0x00000008 |
Definition at line 10058 of file tm4c123fe6pm.h.
#define SYSCTL_DCGC2_GPIOE 0x00000010 |
Definition at line 10057 of file tm4c123fe6pm.h.
#define SYSCTL_DCGC2_GPIOF 0x00000020 |
Definition at line 10056 of file tm4c123fe6pm.h.
#define SYSCTL_DCGC2_GPIOG 0x00000040 |
Definition at line 10055 of file tm4c123fe6pm.h.
#define SYSCTL_DCGC2_R (*((volatile uint32_t *)0x400FE128)) |
Definition at line 2171 of file tm4c123fe6pm.h.
#define SYSCTL_DCGC2_UDMA 0x00002000 |
Definition at line 10054 of file tm4c123fe6pm.h.
#define SYSCTL_DCGC2_USB0 0x00010000 |
Definition at line 10053 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCACMP_D0 0x00000001 |
Definition at line 11136 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCACMP_R (*((volatile uint32_t *)0x400FE83C)) |
Definition at line 2255 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCADC_D0 0x00000001 |
Definition at line 11127 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCADC_D1 0x00000002 |
Definition at line 11125 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCADC_R (*((volatile uint32_t *)0x400FE838)) |
Definition at line 2254 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCCAN_D0 0x00000001 |
Definition at line 11117 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCCAN_D1 0x00000002 |
Definition at line 11115 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCCAN_R (*((volatile uint32_t *)0x400FE834)) |
Definition at line 2253 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCDMA_D0 0x00000001 |
Definition at line 11044 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCDMA_R (*((volatile uint32_t *)0x400FE80C)) |
Definition at line 2248 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCEEPROM_D0 0x00000001 |
Definition at line 11166 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCEEPROM_R (*((volatile uint32_t *)0x400FE858)) |
Definition at line 2258 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCGPIO_D0 0x00000001 |
Definition at line 11036 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCGPIO_D1 0x00000002 |
Definition at line 11034 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCGPIO_D2 0x00000004 |
Definition at line 11032 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCGPIO_D3 0x00000008 |
Definition at line 11030 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCGPIO_D4 0x00000010 |
Definition at line 11028 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCGPIO_D5 0x00000020 |
Definition at line 11026 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCGPIO_D6 0x00000040 |
Definition at line 11024 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCGPIO_R (*((volatile uint32_t *)0x400FE808)) |
Definition at line 2247 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCI2C_D0 0x00000001 |
Definition at line 11099 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCI2C_D1 0x00000002 |
Definition at line 11097 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCI2C_D2 0x00000004 |
Definition at line 11095 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCI2C_D3 0x00000008 |
Definition at line 11093 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCI2C_D4 0x00000010 |
Definition at line 11091 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCI2C_D5 0x00000020 |
Definition at line 11089 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCI2C_R (*((volatile uint32_t *)0x400FE820)) |
Definition at line 2251 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCPWM_D0 0x00000001 |
Definition at line 11147 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCPWM_D1 0x00000002 |
Definition at line 11145 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCPWM_R (*((volatile uint32_t *)0x400FE840)) |
Definition at line 2256 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCQEI_D0 0x00000001 |
Definition at line 11157 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCQEI_D1 0x00000002 |
Definition at line 11155 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCQEI_R (*((volatile uint32_t *)0x400FE844)) |
Definition at line 2257 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCSSI_D0 0x00000001 |
Definition at line 11081 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCSSI_D1 0x00000002 |
Definition at line 11079 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCSSI_D2 0x00000004 |
Definition at line 11077 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCSSI_D3 0x00000008 |
Definition at line 11075 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCSSI_R (*((volatile uint32_t *)0x400FE81C)) |
Definition at line 2250 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCTIMER_D0 0x00000001 |
Definition at line 11014 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCTIMER_D1 0x00000002 |
Definition at line 11011 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCTIMER_D2 0x00000004 |
Definition at line 11008 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCTIMER_D3 0x00000008 |
Definition at line 11005 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCTIMER_D4 0x00000010 |
Definition at line 11002 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCTIMER_D5 0x00000020 |
Definition at line 10999 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCTIMER_R (*((volatile uint32_t *)0x400FE804)) |
Definition at line 2246 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCUART_D0 0x00000001 |
Definition at line 11067 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCUART_D1 0x00000002 |
Definition at line 11065 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCUART_D2 0x00000004 |
Definition at line 11063 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCUART_D3 0x00000008 |
Definition at line 11061 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCUART_D4 0x00000010 |
Definition at line 11059 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCUART_D5 0x00000020 |
Definition at line 11057 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCUART_D6 0x00000040 |
Definition at line 11055 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCUART_D7 0x00000080 |
Definition at line 11053 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCUART_R (*((volatile uint32_t *)0x400FE818)) |
Definition at line 2249 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCUSB_D0 0x00000001 |
Definition at line 11107 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCUSB_R (*((volatile uint32_t *)0x400FE828)) |
Definition at line 2252 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCWD_D0 0x00000001 |
Definition at line 10990 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCWD_D1 0x00000002 |
Definition at line 10988 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCWD_R (*((volatile uint32_t *)0x400FE800)) |
Definition at line 2245 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCWTIMER_D0 0x00000001 |
Definition at line 11190 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCWTIMER_D1 0x00000002 |
Definition at line 11187 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCWTIMER_D2 0x00000004 |
Definition at line 11184 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCWTIMER_D3 0x00000008 |
Definition at line 11181 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCWTIMER_D4 0x00000010 |
Definition at line 11178 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCWTIMER_D5 0x00000020 |
Definition at line 11175 of file tm4c123fe6pm.h.
#define SYSCTL_DCGCWTIMER_R (*((volatile uint32_t *)0x400FE85C)) |
Definition at line 2259 of file tm4c123fe6pm.h.
#define SYSCTL_DID0_CLASS_BLIZZARD 0x00050000 |
Definition at line 12900 of file tm4c123fe6pm.h.
#define SYSCTL_DID0_CLASS_M 0x00FF0000 |
Definition at line 9369 of file tm4c123fe6pm.h.
#define SYSCTL_DID0_CLASS_TM4C123 0x00050000 |
Definition at line 9370 of file tm4c123fe6pm.h.
#define SYSCTL_DID0_MAJ_M 0x0000FF00 |
Definition at line 9373 of file tm4c123fe6pm.h.
#define SYSCTL_DID0_MAJ_REVA 0x00000000 |
Definition at line 9374 of file tm4c123fe6pm.h.
#define SYSCTL_DID0_MAJ_REVB 0x00000100 |
Definition at line 9375 of file tm4c123fe6pm.h.
#define SYSCTL_DID0_MAJ_REVC 0x00000200 |
Definition at line 9377 of file tm4c123fe6pm.h.
#define SYSCTL_DID0_MIN_0 0x00000000 |
Definition at line 9380 of file tm4c123fe6pm.h.
#define SYSCTL_DID0_MIN_1 0x00000001 |
Definition at line 9382 of file tm4c123fe6pm.h.
#define SYSCTL_DID0_MIN_2 0x00000002 |
Definition at line 9383 of file tm4c123fe6pm.h.
#define SYSCTL_DID0_MIN_M 0x000000FF |
Definition at line 9379 of file tm4c123fe6pm.h.
#define SYSCTL_DID0_R (*((volatile uint32_t *)0x400FE000)) |
Definition at line 2140 of file tm4c123fe6pm.h.
#define SYSCTL_DID0_VER_1 0x10000000 |
Definition at line 9367 of file tm4c123fe6pm.h.
#define SYSCTL_DID0_VER_M 0x70000000 |
Definition at line 9366 of file tm4c123fe6pm.h.
#define SYSCTL_DID1_FAM_M 0x0F000000 |
Definition at line 9392 of file tm4c123fe6pm.h.
#define SYSCTL_DID1_FAM_TIVA 0x00000000 |
Definition at line 9393 of file tm4c123fe6pm.h.
#define SYSCTL_DID1_PINCNT_100 0x00004000 |
Definition at line 9398 of file tm4c123fe6pm.h.
#define SYSCTL_DID1_PINCNT_128 0x0000C000 |
Definition at line 9402 of file tm4c123fe6pm.h.
#define SYSCTL_DID1_PINCNT_144 0x00008000 |
Definition at line 9400 of file tm4c123fe6pm.h.
#define SYSCTL_DID1_PINCNT_157 0x0000A000 |
Definition at line 9401 of file tm4c123fe6pm.h.
#define SYSCTL_DID1_PINCNT_64 0x00006000 |
Definition at line 9399 of file tm4c123fe6pm.h.
#define SYSCTL_DID1_PINCNT_M 0x0000E000 |
Definition at line 9397 of file tm4c123fe6pm.h.
#define SYSCTL_DID1_PKG_BGA 0x00000010 |
Definition at line 9412 of file tm4c123fe6pm.h.
#define SYSCTL_DID1_PKG_M 0x00000018 |
Definition at line 9410 of file tm4c123fe6pm.h.
#define SYSCTL_DID1_PKG_QFP 0x00000008 |
Definition at line 9411 of file tm4c123fe6pm.h.
#define SYSCTL_DID1_PRTNO_M 0x00FF0000 |
Definition at line 9394 of file tm4c123fe6pm.h.
#define SYSCTL_DID1_PRTNO_TM4C123FE6PM 0x00B00000 |
Definition at line 9395 of file tm4c123fe6pm.h.
#define SYSCTL_DID1_QUAL_ES 0x00000000 |
Definition at line 9415 of file tm4c123fe6pm.h.
#define SYSCTL_DID1_QUAL_FQ 0x00000002 |
Definition at line 9417 of file tm4c123fe6pm.h.
#define SYSCTL_DID1_QUAL_M 0x00000003 |
Definition at line 9414 of file tm4c123fe6pm.h.
#define SYSCTL_DID1_QUAL_PP 0x00000001 |
Definition at line 9416 of file tm4c123fe6pm.h.
#define SYSCTL_DID1_R (*((volatile uint32_t *)0x400FE004)) |
Definition at line 2141 of file tm4c123fe6pm.h.
#define SYSCTL_DID1_ROHS 0x00000004 |
Definition at line 9413 of file tm4c123fe6pm.h.
#define SYSCTL_DID1_TEMP_E 0x00000040 |
Definition at line 9405 of file tm4c123fe6pm.h.
#define SYSCTL_DID1_TEMP_I 0x00000020 |
Definition at line 9404 of file tm4c123fe6pm.h.
#define SYSCTL_DID1_TEMP_IE 0x00000060 |
Definition at line 9406 of file tm4c123fe6pm.h.
#define SYSCTL_DID1_TEMP_M 0x000000E0 |
Definition at line 9403 of file tm4c123fe6pm.h.
#define SYSCTL_DID1_VER_1 0x10000000 |
Definition at line 9391 of file tm4c123fe6pm.h.
#define SYSCTL_DID1_VER_M 0xF0000000 |
Definition at line 9390 of file tm4c123fe6pm.h.
#define SYSCTL_DSLPCLKCFG_D_M 0x1F800000 |
Definition at line 10069 of file tm4c123fe6pm.h.
#define SYSCTL_DSLPCLKCFG_D_S 23 |
Definition at line 10076 of file tm4c123fe6pm.h.
#define SYSCTL_DSLPCLKCFG_O_30 0x00000030 |
Definition at line 10073 of file tm4c123fe6pm.h.
#define SYSCTL_DSLPCLKCFG_O_IGN 0x00000000 |
Definition at line 10071 of file tm4c123fe6pm.h.
#define SYSCTL_DSLPCLKCFG_O_IO 0x00000010 |
Definition at line 10072 of file tm4c123fe6pm.h.
#define SYSCTL_DSLPCLKCFG_O_M 0x00000070 |
Definition at line 10070 of file tm4c123fe6pm.h.
#define SYSCTL_DSLPCLKCFG_PIOSCPD 0x00000002 |
Definition at line 10074 of file tm4c123fe6pm.h.
#define SYSCTL_DSLPCLKCFG_R (*((volatile uint32_t *)0x400FE144)) |
Definition at line 2172 of file tm4c123fe6pm.h.
#define SYSCTL_DSLPPWRCFG_FLASHPM_M 0x00000030 |
Definition at line 10152 of file tm4c123fe6pm.h.
#define SYSCTL_DSLPPWRCFG_FLASHPM_NRM 0x00000000 |
Definition at line 10154 of file tm4c123fe6pm.h.
#define SYSCTL_DSLPPWRCFG_FLASHPM_SLP 0x00000020 |
Definition at line 10156 of file tm4c123fe6pm.h.
#define SYSCTL_DSLPPWRCFG_R (*((volatile uint32_t *)0x400FE18C)) |
Definition at line 2179 of file tm4c123fe6pm.h.
#define SYSCTL_DSLPPWRCFG_SRAMPM_LP 0x00000003 |
Definition at line 10164 of file tm4c123fe6pm.h.
#define SYSCTL_DSLPPWRCFG_SRAMPM_M 0x00000003 |
Definition at line 10158 of file tm4c123fe6pm.h.
#define SYSCTL_DSLPPWRCFG_SRAMPM_NRM 0x00000000 |
Definition at line 10160 of file tm4c123fe6pm.h.
#define SYSCTL_DSLPPWRCFG_SRAMPM_SBY 0x00000001 |
Definition at line 10162 of file tm4c123fe6pm.h.
#define SYSCTL_GPIOHBCTL_PORTA 0x00000001 |
Definition at line 9868 of file tm4c123fe6pm.h.
#define SYSCTL_GPIOHBCTL_PORTB 0x00000002 |
Definition at line 9866 of file tm4c123fe6pm.h.
#define SYSCTL_GPIOHBCTL_PORTC 0x00000004 |
Definition at line 9864 of file tm4c123fe6pm.h.
#define SYSCTL_GPIOHBCTL_PORTD 0x00000008 |
Definition at line 9862 of file tm4c123fe6pm.h.
#define SYSCTL_GPIOHBCTL_PORTE 0x00000010 |
Definition at line 9860 of file tm4c123fe6pm.h.
#define SYSCTL_GPIOHBCTL_PORTF 0x00000020 |
Definition at line 9858 of file tm4c123fe6pm.h.
#define SYSCTL_GPIOHBCTL_PORTG 0x00000040 |
Definition at line 9856 of file tm4c123fe6pm.h.
#define SYSCTL_GPIOHBCTL_R (*((volatile uint32_t *)0x400FE06C)) |
Definition at line 2160 of file tm4c123fe6pm.h.
#define SYSCTL_IMC_BOR0IM 0x00000800 |
Definition at line 9761 of file tm4c123fe6pm.h.
#define SYSCTL_IMC_BOR1IM 0x00000002 |
Definition at line 9768 of file tm4c123fe6pm.h.
#define SYSCTL_IMC_MOFIM 0x00000008 |
Definition at line 9766 of file tm4c123fe6pm.h.
#define SYSCTL_IMC_MOSCPUPIM 0x00000100 |
Definition at line 9763 of file tm4c123fe6pm.h.
#define SYSCTL_IMC_PLLLIM 0x00000040 |
Definition at line 9765 of file tm4c123fe6pm.h.
#define SYSCTL_IMC_R (*((volatile uint32_t *)0x400FE054)) |
Definition at line 2156 of file tm4c123fe6pm.h.
#define SYSCTL_IMC_USBPLLLIM 0x00000080 |
Definition at line 9764 of file tm4c123fe6pm.h.
#define SYSCTL_IMC_VDDAIM 0x00000400 |
Definition at line 9762 of file tm4c123fe6pm.h.
#define SYSCTL_LDODPCTL_R (*((volatile uint32_t *)0x400FE1BC)) |
Definition at line 2183 of file tm4c123fe6pm.h.
#define SYSCTL_LDODPCTL_VADJEN 0x80000000 |
Definition at line 10226 of file tm4c123fe6pm.h.
#define SYSCTL_LDODPCTL_VLDO_0_90V 0x00000012 |
Definition at line 10228 of file tm4c123fe6pm.h.
#define SYSCTL_LDODPCTL_VLDO_0_95V 0x00000013 |
Definition at line 10230 of file tm4c123fe6pm.h.
#define SYSCTL_LDODPCTL_VLDO_1_00V 0x00000014 |
Definition at line 10232 of file tm4c123fe6pm.h.
#define SYSCTL_LDODPCTL_VLDO_1_05V 0x00000015 |
Definition at line 10234 of file tm4c123fe6pm.h.
#define SYSCTL_LDODPCTL_VLDO_1_10V 0x00000016 |
Definition at line 10236 of file tm4c123fe6pm.h.
#define SYSCTL_LDODPCTL_VLDO_1_15V 0x00000017 |
Definition at line 10238 of file tm4c123fe6pm.h.
#define SYSCTL_LDODPCTL_VLDO_1_20V 0x00000018 |
Definition at line 10240 of file tm4c123fe6pm.h.
#define SYSCTL_LDODPCTL_VLDO_M 0x000000FF |
Definition at line 10227 of file tm4c123fe6pm.h.
#define SYSCTL_LDOSPCTL_R (*((volatile uint32_t *)0x400FE1B4)) |
Definition at line 2182 of file tm4c123fe6pm.h.
#define SYSCTL_LDOSPCTL_VADJEN 0x80000000 |
Definition at line 10203 of file tm4c123fe6pm.h.
#define SYSCTL_LDOSPCTL_VLDO_0_90V 0x00000012 |
Definition at line 10205 of file tm4c123fe6pm.h.
#define SYSCTL_LDOSPCTL_VLDO_0_95V 0x00000013 |
Definition at line 10207 of file tm4c123fe6pm.h.
#define SYSCTL_LDOSPCTL_VLDO_1_00V 0x00000014 |
Definition at line 10209 of file tm4c123fe6pm.h.
#define SYSCTL_LDOSPCTL_VLDO_1_05V 0x00000015 |
Definition at line 10211 of file tm4c123fe6pm.h.
#define SYSCTL_LDOSPCTL_VLDO_1_10V 0x00000016 |
Definition at line 10213 of file tm4c123fe6pm.h.
#define SYSCTL_LDOSPCTL_VLDO_1_15V 0x00000017 |
Definition at line 10215 of file tm4c123fe6pm.h.
#define SYSCTL_LDOSPCTL_VLDO_1_20V 0x00000018 |
Definition at line 10217 of file tm4c123fe6pm.h.
#define SYSCTL_LDOSPCTL_VLDO_M 0x000000FF |
Definition at line 10204 of file tm4c123fe6pm.h.
#define SYSCTL_MISC_BOR0MIS 0x00000800 |
Definition at line 9775 of file tm4c123fe6pm.h.
#define SYSCTL_MISC_BOR1MIS 0x00000002 |
Definition at line 9786 of file tm4c123fe6pm.h.
#define SYSCTL_MISC_MOFMIS 0x00000008 |
Definition at line 9784 of file tm4c123fe6pm.h.
#define SYSCTL_MISC_MOSCPUPMIS 0x00000100 |
Definition at line 9779 of file tm4c123fe6pm.h.
#define SYSCTL_MISC_PLLLMIS 0x00000040 |
Definition at line 9783 of file tm4c123fe6pm.h.
#define SYSCTL_MISC_R (*((volatile uint32_t *)0x400FE058)) |
Definition at line 2157 of file tm4c123fe6pm.h.
#define SYSCTL_MISC_USBPLLLMIS 0x00000080 |
Definition at line 9781 of file tm4c123fe6pm.h.
#define SYSCTL_MISC_VDDAMIS 0x00000400 |
Definition at line 9777 of file tm4c123fe6pm.h.
#define SYSCTL_MOSCCTL_CVAL 0x00000001 |
Definition at line 9898 of file tm4c123fe6pm.h.
#define SYSCTL_MOSCCTL_MOSCIM 0x00000002 |
Definition at line 9897 of file tm4c123fe6pm.h.
#define SYSCTL_MOSCCTL_NOXTAL 0x00000004 |
Definition at line 9896 of file tm4c123fe6pm.h.
#define SYSCTL_MOSCCTL_R (*((volatile uint32_t *)0x400FE07C)) |
Definition at line 2162 of file tm4c123fe6pm.h.
#define SYSCTL_NVMSTAT_FWB 0x00000001 |
Definition at line 10194 of file tm4c123fe6pm.h.
#define SYSCTL_NVMSTAT_R (*((volatile uint32_t *)0x400FE1A0)) |
Definition at line 2181 of file tm4c123fe6pm.h.
#define SYSCTL_PBORCTL_BOR0 0x00000004 |
Definition at line 9685 of file tm4c123fe6pm.h.
#define SYSCTL_PBORCTL_BOR1 0x00000002 |
Definition at line 9686 of file tm4c123fe6pm.h.
#define SYSCTL_PBORCTL_R (*((volatile uint32_t *)0x400FE030)) |
Definition at line 2151 of file tm4c123fe6pm.h.
#define SYSCTL_PIOSCCAL_R (*((volatile uint32_t *)0x400FE150)) |
Definition at line 2174 of file tm4c123fe6pm.h.
#define SYSCTL_PIOSCCAL_UPDATE 0x00000100 |
Definition at line 10092 of file tm4c123fe6pm.h.
#define SYSCTL_PIOSCCAL_UT_M 0x0000007F |
Definition at line 10093 of file tm4c123fe6pm.h.
#define SYSCTL_PIOSCCAL_UT_S 0 |
Definition at line 10094 of file tm4c123fe6pm.h.
#define SYSCTL_PIOSCCAL_UTEN 0x80000000 |
Definition at line 10091 of file tm4c123fe6pm.h.
#define SYSCTL_PLLFREQ0_MFRAC_M 0x000FFC00 |
Definition at line 10102 of file tm4c123fe6pm.h.
#define SYSCTL_PLLFREQ0_MFRAC_S 10 |
Definition at line 10104 of file tm4c123fe6pm.h.
#define SYSCTL_PLLFREQ0_MINT_M 0x000003FF |
Definition at line 10103 of file tm4c123fe6pm.h.
#define SYSCTL_PLLFREQ0_MINT_S 0 |
Definition at line 10105 of file tm4c123fe6pm.h.
#define SYSCTL_PLLFREQ0_R (*((volatile uint32_t *)0x400FE160)) |
Definition at line 2175 of file tm4c123fe6pm.h.
#define SYSCTL_PLLFREQ1_N_M 0x0000001F |
Definition at line 10114 of file tm4c123fe6pm.h.
#define SYSCTL_PLLFREQ1_N_S 0 |
Definition at line 10116 of file tm4c123fe6pm.h.
#define SYSCTL_PLLFREQ1_Q_M 0x00001F00 |
Definition at line 10113 of file tm4c123fe6pm.h.
#define SYSCTL_PLLFREQ1_Q_S 8 |
Definition at line 10115 of file tm4c123fe6pm.h.
#define SYSCTL_PLLFREQ1_R (*((volatile uint32_t *)0x400FE164)) |
Definition at line 2176 of file tm4c123fe6pm.h.
#define SYSCTL_PLLSTAT_LOCK 0x00000001 |
Definition at line 10123 of file tm4c123fe6pm.h.
#define SYSCTL_PLLSTAT_R (*((volatile uint32_t *)0x400FE168)) |
Definition at line 2177 of file tm4c123fe6pm.h.
#define SYSCTL_PPACMP_P0 0x00000001 |
Definition at line 10368 of file tm4c123fe6pm.h.
#define SYSCTL_PPACMP_R (*((volatile uint32_t *)0x400FE33C)) |
Definition at line 2195 of file tm4c123fe6pm.h.
#define SYSCTL_PPADC_P0 0x00000001 |
Definition at line 10361 of file tm4c123fe6pm.h.
#define SYSCTL_PPADC_P1 0x00000002 |
Definition at line 10360 of file tm4c123fe6pm.h.
#define SYSCTL_PPADC_R (*((volatile uint32_t *)0x400FE338)) |
Definition at line 2194 of file tm4c123fe6pm.h.
#define SYSCTL_PPCAN_P0 0x00000001 |
Definition at line 10353 of file tm4c123fe6pm.h.
#define SYSCTL_PPCAN_P1 0x00000002 |
Definition at line 10352 of file tm4c123fe6pm.h.
#define SYSCTL_PPCAN_R (*((volatile uint32_t *)0x400FE334)) |
Definition at line 2193 of file tm4c123fe6pm.h.
#define SYSCTL_PPDMA_P0 0x00000001 |
Definition at line 10295 of file tm4c123fe6pm.h.
#define SYSCTL_PPDMA_R (*((volatile uint32_t *)0x400FE30C)) |
Definition at line 2187 of file tm4c123fe6pm.h.
#define SYSCTL_PPEEPROM_P0 0x00000001 |
Definition at line 10392 of file tm4c123fe6pm.h.
#define SYSCTL_PPEEPROM_R (*((volatile uint32_t *)0x400FE358)) |
Definition at line 2198 of file tm4c123fe6pm.h.
#define SYSCTL_PPGPIO_P0 0x00000001 |
Definition at line 10288 of file tm4c123fe6pm.h.
#define SYSCTL_PPGPIO_P1 0x00000002 |
Definition at line 10287 of file tm4c123fe6pm.h.
#define SYSCTL_PPGPIO_P10 0x00000400 |
Definition at line 10278 of file tm4c123fe6pm.h.
#define SYSCTL_PPGPIO_P11 0x00000800 |
Definition at line 10277 of file tm4c123fe6pm.h.
#define SYSCTL_PPGPIO_P12 0x00001000 |
Definition at line 10276 of file tm4c123fe6pm.h.
#define SYSCTL_PPGPIO_P13 0x00002000 |
Definition at line 10275 of file tm4c123fe6pm.h.
#define SYSCTL_PPGPIO_P14 0x00004000 |
Definition at line 10274 of file tm4c123fe6pm.h.
#define SYSCTL_PPGPIO_P2 0x00000004 |
Definition at line 10286 of file tm4c123fe6pm.h.
#define SYSCTL_PPGPIO_P3 0x00000008 |
Definition at line 10285 of file tm4c123fe6pm.h.
#define SYSCTL_PPGPIO_P4 0x00000010 |
Definition at line 10284 of file tm4c123fe6pm.h.
#define SYSCTL_PPGPIO_P5 0x00000020 |
Definition at line 10283 of file tm4c123fe6pm.h.
#define SYSCTL_PPGPIO_P6 0x00000040 |
Definition at line 10282 of file tm4c123fe6pm.h.
#define SYSCTL_PPGPIO_P7 0x00000080 |
Definition at line 10281 of file tm4c123fe6pm.h.
#define SYSCTL_PPGPIO_P8 0x00000100 |
Definition at line 10280 of file tm4c123fe6pm.h.
#define SYSCTL_PPGPIO_P9 0x00000200 |
Definition at line 10279 of file tm4c123fe6pm.h.
#define SYSCTL_PPGPIO_R (*((volatile uint32_t *)0x400FE308)) |
Definition at line 2186 of file tm4c123fe6pm.h.
#define SYSCTL_PPHIB_P0 0x00000001 |
Definition at line 10302 of file tm4c123fe6pm.h.
#define SYSCTL_PPHIB_R (*((volatile uint32_t *)0x400FE314)) |
Definition at line 2188 of file tm4c123fe6pm.h.
#define SYSCTL_PPI2C_P0 0x00000001 |
Definition at line 10338 of file tm4c123fe6pm.h.
#define SYSCTL_PPI2C_P1 0x00000002 |
Definition at line 10337 of file tm4c123fe6pm.h.
#define SYSCTL_PPI2C_P2 0x00000004 |
Definition at line 10336 of file tm4c123fe6pm.h.
#define SYSCTL_PPI2C_P3 0x00000008 |
Definition at line 10335 of file tm4c123fe6pm.h.
#define SYSCTL_PPI2C_P4 0x00000010 |
Definition at line 10334 of file tm4c123fe6pm.h.
#define SYSCTL_PPI2C_P5 0x00000020 |
Definition at line 10333 of file tm4c123fe6pm.h.
#define SYSCTL_PPI2C_R (*((volatile uint32_t *)0x400FE320)) |
Definition at line 2191 of file tm4c123fe6pm.h.
#define SYSCTL_PPPWM_P0 0x00000001 |
Definition at line 10376 of file tm4c123fe6pm.h.
#define SYSCTL_PPPWM_P1 0x00000002 |
Definition at line 10375 of file tm4c123fe6pm.h.
#define SYSCTL_PPPWM_R (*((volatile uint32_t *)0x400FE340)) |
Definition at line 2196 of file tm4c123fe6pm.h.
#define SYSCTL_PPQEI_P0 0x00000001 |
Definition at line 10384 of file tm4c123fe6pm.h.
#define SYSCTL_PPQEI_P1 0x00000002 |
Definition at line 10383 of file tm4c123fe6pm.h.
#define SYSCTL_PPQEI_R (*((volatile uint32_t *)0x400FE344)) |
Definition at line 2197 of file tm4c123fe6pm.h.
#define SYSCTL_PPSSI_P0 0x00000001 |
Definition at line 10326 of file tm4c123fe6pm.h.
#define SYSCTL_PPSSI_P1 0x00000002 |
Definition at line 10325 of file tm4c123fe6pm.h.
#define SYSCTL_PPSSI_P2 0x00000004 |
Definition at line 10324 of file tm4c123fe6pm.h.
#define SYSCTL_PPSSI_P3 0x00000008 |
Definition at line 10323 of file tm4c123fe6pm.h.
#define SYSCTL_PPSSI_R (*((volatile uint32_t *)0x400FE31C)) |
Definition at line 2190 of file tm4c123fe6pm.h.
#define SYSCTL_PPTIMER_P0 0x00000001 |
Definition at line 10266 of file tm4c123fe6pm.h.
#define SYSCTL_PPTIMER_P1 0x00000002 |
Definition at line 10264 of file tm4c123fe6pm.h.
#define SYSCTL_PPTIMER_P2 0x00000004 |
Definition at line 10262 of file tm4c123fe6pm.h.
#define SYSCTL_PPTIMER_P3 0x00000008 |
Definition at line 10260 of file tm4c123fe6pm.h.
#define SYSCTL_PPTIMER_P4 0x00000010 |
Definition at line 10258 of file tm4c123fe6pm.h.
#define SYSCTL_PPTIMER_P5 0x00000020 |
Definition at line 10256 of file tm4c123fe6pm.h.
#define SYSCTL_PPTIMER_R (*((volatile uint32_t *)0x400FE304)) |
Definition at line 2185 of file tm4c123fe6pm.h.
#define SYSCTL_PPUART_P0 0x00000001 |
Definition at line 10316 of file tm4c123fe6pm.h.
#define SYSCTL_PPUART_P1 0x00000002 |
Definition at line 10315 of file tm4c123fe6pm.h.
#define SYSCTL_PPUART_P2 0x00000004 |
Definition at line 10314 of file tm4c123fe6pm.h.
#define SYSCTL_PPUART_P3 0x00000008 |
Definition at line 10313 of file tm4c123fe6pm.h.
#define SYSCTL_PPUART_P4 0x00000010 |
Definition at line 10312 of file tm4c123fe6pm.h.
#define SYSCTL_PPUART_P5 0x00000020 |
Definition at line 10311 of file tm4c123fe6pm.h.
#define SYSCTL_PPUART_P6 0x00000040 |
Definition at line 10310 of file tm4c123fe6pm.h.
#define SYSCTL_PPUART_P7 0x00000080 |
Definition at line 10309 of file tm4c123fe6pm.h.
#define SYSCTL_PPUART_R (*((volatile uint32_t *)0x400FE318)) |
Definition at line 2189 of file tm4c123fe6pm.h.
#define SYSCTL_PPUSB_P0 0x00000001 |
Definition at line 10345 of file tm4c123fe6pm.h.
#define SYSCTL_PPUSB_R (*((volatile uint32_t *)0x400FE328)) |
Definition at line 2192 of file tm4c123fe6pm.h.
#define SYSCTL_PPWD_P0 0x00000001 |
Definition at line 10249 of file tm4c123fe6pm.h.
#define SYSCTL_PPWD_P1 0x00000002 |
Definition at line 10248 of file tm4c123fe6pm.h.
#define SYSCTL_PPWD_R (*((volatile uint32_t *)0x400FE300)) |
Definition at line 2184 of file tm4c123fe6pm.h.
#define SYSCTL_PPWTIMER_P0 0x00000001 |
Definition at line 10410 of file tm4c123fe6pm.h.
#define SYSCTL_PPWTIMER_P1 0x00000002 |
Definition at line 10408 of file tm4c123fe6pm.h.
#define SYSCTL_PPWTIMER_P2 0x00000004 |
Definition at line 10406 of file tm4c123fe6pm.h.
#define SYSCTL_PPWTIMER_P3 0x00000008 |
Definition at line 10404 of file tm4c123fe6pm.h.
#define SYSCTL_PPWTIMER_P4 0x00000010 |
Definition at line 10402 of file tm4c123fe6pm.h.
#define SYSCTL_PPWTIMER_P5 0x00000020 |
Definition at line 10400 of file tm4c123fe6pm.h.
#define SYSCTL_PPWTIMER_R (*((volatile uint32_t *)0x400FE35C)) |
Definition at line 2199 of file tm4c123fe6pm.h.
#define SYSCTL_PRACMP_R (*((volatile uint32_t *)0x400FEA3C)) |
Definition at line 2270 of file tm4c123fe6pm.h.
#define SYSCTL_PRACMP_R0 0x00000001 |
Definition at line 11306 of file tm4c123fe6pm.h.
#define SYSCTL_PRADC_R (*((volatile uint32_t *)0x400FEA38)) |
Definition at line 2269 of file tm4c123fe6pm.h.
#define SYSCTL_PRADC_R0 0x00000001 |
Definition at line 11299 of file tm4c123fe6pm.h.
#define SYSCTL_PRADC_R1 0x00000002 |
Definition at line 11298 of file tm4c123fe6pm.h.
#define SYSCTL_PRCAN_R (*((volatile uint32_t *)0x400FEA34)) |
Definition at line 2268 of file tm4c123fe6pm.h.
#define SYSCTL_PRCAN_R0 0x00000001 |
Definition at line 11291 of file tm4c123fe6pm.h.
#define SYSCTL_PRCAN_R1 0x00000002 |
Definition at line 11290 of file tm4c123fe6pm.h.
#define SYSCTL_PRDMA_R (*((volatile uint32_t *)0x400FEA0C)) |
Definition at line 2263 of file tm4c123fe6pm.h.
#define SYSCTL_PRDMA_R0 0x00000001 |
Definition at line 11240 of file tm4c123fe6pm.h.
#define SYSCTL_PREEPROM_R (*((volatile uint32_t *)0x400FEA58)) |
Definition at line 2273 of file tm4c123fe6pm.h.
#define SYSCTL_PREEPROM_R0 0x00000001 |
Definition at line 11331 of file tm4c123fe6pm.h.
#define SYSCTL_PRGPIO_R (*((volatile uint32_t *)0x400FEA08)) |
Definition at line 2262 of file tm4c123fe6pm.h.
Referenced by commonInit().
#define SYSCTL_PRGPIO_R0 0x00000001 |
Definition at line 11233 of file tm4c123fe6pm.h.
#define SYSCTL_PRGPIO_R1 0x00000002 |
Definition at line 11232 of file tm4c123fe6pm.h.
#define SYSCTL_PRGPIO_R2 0x00000004 |
Definition at line 11231 of file tm4c123fe6pm.h.
#define SYSCTL_PRGPIO_R3 0x00000008 |
Definition at line 11230 of file tm4c123fe6pm.h.
#define SYSCTL_PRGPIO_R4 0x00000010 |
Definition at line 11229 of file tm4c123fe6pm.h.
#define SYSCTL_PRGPIO_R5 0x00000020 |
Definition at line 11228 of file tm4c123fe6pm.h.
#define SYSCTL_PRGPIO_R6 0x00000040 |
Definition at line 11227 of file tm4c123fe6pm.h.
#define SYSCTL_PRI2C_R (*((volatile uint32_t *)0x400FEA20)) |
Definition at line 2266 of file tm4c123fe6pm.h.
#define SYSCTL_PRI2C_R0 0x00000001 |
Definition at line 11276 of file tm4c123fe6pm.h.
#define SYSCTL_PRI2C_R1 0x00000002 |
Definition at line 11275 of file tm4c123fe6pm.h.
#define SYSCTL_PRI2C_R2 0x00000004 |
Definition at line 11274 of file tm4c123fe6pm.h.
#define SYSCTL_PRI2C_R3 0x00000008 |
Definition at line 11273 of file tm4c123fe6pm.h.
#define SYSCTL_PRI2C_R4 0x00000010 |
Definition at line 11272 of file tm4c123fe6pm.h.
#define SYSCTL_PRI2C_R5 0x00000020 |
Definition at line 11271 of file tm4c123fe6pm.h.
#define SYSCTL_PRPWM_R (*((volatile uint32_t *)0x400FEA40)) |
Definition at line 2271 of file tm4c123fe6pm.h.
#define SYSCTL_PRPWM_R0 0x00000001 |
Definition at line 11315 of file tm4c123fe6pm.h.
#define SYSCTL_PRPWM_R1 0x00000002 |
Definition at line 11314 of file tm4c123fe6pm.h.
#define SYSCTL_PRQEI_R (*((volatile uint32_t *)0x400FEA44)) |
Definition at line 2272 of file tm4c123fe6pm.h.
#define SYSCTL_PRQEI_R0 0x00000001 |
Definition at line 11323 of file tm4c123fe6pm.h.
#define SYSCTL_PRQEI_R1 0x00000002 |
Definition at line 11322 of file tm4c123fe6pm.h.
#define SYSCTL_PRSSI_R (*((volatile uint32_t *)0x400FEA1C)) |
Definition at line 2265 of file tm4c123fe6pm.h.
#define SYSCTL_PRSSI_R0 0x00000001 |
Definition at line 11264 of file tm4c123fe6pm.h.
#define SYSCTL_PRSSI_R1 0x00000002 |
Definition at line 11263 of file tm4c123fe6pm.h.
#define SYSCTL_PRSSI_R2 0x00000004 |
Definition at line 11262 of file tm4c123fe6pm.h.
#define SYSCTL_PRSSI_R3 0x00000008 |
Definition at line 11261 of file tm4c123fe6pm.h.
#define SYSCTL_PRTIMER_R (*((volatile uint32_t *)0x400FEA04)) |
Definition at line 2261 of file tm4c123fe6pm.h.
#define SYSCTL_PRTIMER_R0 0x00000001 |
Definition at line 11219 of file tm4c123fe6pm.h.
#define SYSCTL_PRTIMER_R1 0x00000002 |
Definition at line 11217 of file tm4c123fe6pm.h.
#define SYSCTL_PRTIMER_R2 0x00000004 |
Definition at line 11215 of file tm4c123fe6pm.h.
#define SYSCTL_PRTIMER_R3 0x00000008 |
Definition at line 11213 of file tm4c123fe6pm.h.
#define SYSCTL_PRTIMER_R4 0x00000010 |
Definition at line 11211 of file tm4c123fe6pm.h.
#define SYSCTL_PRTIMER_R5 0x00000020 |
Definition at line 11209 of file tm4c123fe6pm.h.
#define SYSCTL_PRUART_R (*((volatile uint32_t *)0x400FEA18)) |
Definition at line 2264 of file tm4c123fe6pm.h.
#define SYSCTL_PRUART_R0 0x00000001 |
Definition at line 11254 of file tm4c123fe6pm.h.
#define SYSCTL_PRUART_R1 0x00000002 |
Definition at line 11253 of file tm4c123fe6pm.h.
#define SYSCTL_PRUART_R2 0x00000004 |
Definition at line 11252 of file tm4c123fe6pm.h.
#define SYSCTL_PRUART_R3 0x00000008 |
Definition at line 11251 of file tm4c123fe6pm.h.
#define SYSCTL_PRUART_R4 0x00000010 |
Definition at line 11250 of file tm4c123fe6pm.h.
#define SYSCTL_PRUART_R5 0x00000020 |
Definition at line 11249 of file tm4c123fe6pm.h.
#define SYSCTL_PRUART_R6 0x00000040 |
Definition at line 11248 of file tm4c123fe6pm.h.
#define SYSCTL_PRUART_R7 0x00000080 |
Definition at line 11247 of file tm4c123fe6pm.h.
#define SYSCTL_PRUSB_R (*((volatile uint32_t *)0x400FEA28)) |
Definition at line 2267 of file tm4c123fe6pm.h.
#define SYSCTL_PRUSB_R0 0x00000001 |
Definition at line 11283 of file tm4c123fe6pm.h.
#define SYSCTL_PRWD_R (*((volatile uint32_t *)0x400FEA00)) |
Definition at line 2260 of file tm4c123fe6pm.h.
#define SYSCTL_PRWD_R0 0x00000001 |
Definition at line 11201 of file tm4c123fe6pm.h.
#define SYSCTL_PRWD_R1 0x00000002 |
Definition at line 11199 of file tm4c123fe6pm.h.
#define SYSCTL_PRWTIMER_R (*((volatile uint32_t *)0x400FEA5C)) |
Definition at line 2274 of file tm4c123fe6pm.h.
#define SYSCTL_PRWTIMER_R0 0x00000001 |
Definition at line 11349 of file tm4c123fe6pm.h.
#define SYSCTL_PRWTIMER_R1 0x00000002 |
Definition at line 11347 of file tm4c123fe6pm.h.
#define SYSCTL_PRWTIMER_R2 0x00000004 |
Definition at line 11345 of file tm4c123fe6pm.h.
#define SYSCTL_PRWTIMER_R3 0x00000008 |
Definition at line 11343 of file tm4c123fe6pm.h.
#define SYSCTL_PRWTIMER_R4 0x00000010 |
Definition at line 11341 of file tm4c123fe6pm.h.
#define SYSCTL_PRWTIMER_R5 0x00000020 |
Definition at line 11339 of file tm4c123fe6pm.h.
#define SYSCTL_RCC2_BYPASS2 0x00000800 |
Definition at line 9883 of file tm4c123fe6pm.h.
#define SYSCTL_RCC2_DIV400 0x40000000 |
Definition at line 9877 of file tm4c123fe6pm.h.
#define SYSCTL_RCC2_OSCSRC2_30 0x00000030 |
Definition at line 9888 of file tm4c123fe6pm.h.
#define SYSCTL_RCC2_OSCSRC2_IO 0x00000010 |
Definition at line 9886 of file tm4c123fe6pm.h.
#define SYSCTL_RCC2_OSCSRC2_IO4 0x00000020 |
Definition at line 9887 of file tm4c123fe6pm.h.
#define SYSCTL_RCC2_OSCSRC2_M 0x00000070 |
Definition at line 9884 of file tm4c123fe6pm.h.
#define SYSCTL_RCC2_OSCSRC2_MO 0x00000000 |
Definition at line 9885 of file tm4c123fe6pm.h.
#define SYSCTL_RCC2_PWRDN2 0x00002000 |
Definition at line 9882 of file tm4c123fe6pm.h.
#define SYSCTL_RCC2_R (*((volatile uint32_t *)0x400FE070)) |
Definition at line 2161 of file tm4c123fe6pm.h.
#define SYSCTL_RCC2_SYSDIV2_M 0x1F800000 |
Definition at line 9879 of file tm4c123fe6pm.h.
#define SYSCTL_RCC2_SYSDIV2_S 23 |
Definition at line 9889 of file tm4c123fe6pm.h.
#define SYSCTL_RCC2_SYSDIV2LSB 0x00400000 |
Definition at line 9880 of file tm4c123fe6pm.h.
#define SYSCTL_RCC2_USBPWRDN 0x00004000 |
Definition at line 9881 of file tm4c123fe6pm.h.
#define SYSCTL_RCC2_USERCC2 0x80000000 |
Definition at line 9876 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_ACG 0x08000000 |
Definition at line 9807 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_BYPASS 0x00000800 |
Definition at line 9819 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_MOSCDIS 0x00000001 |
Definition at line 9847 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_OSCSRC_30 0x00000030 |
Definition at line 9846 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_OSCSRC_INT 0x00000010 |
Definition at line 9844 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_OSCSRC_INT4 0x00000020 |
Definition at line 9845 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_OSCSRC_M 0x00000030 |
Definition at line 9842 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_OSCSRC_MAIN 0x00000000 |
Definition at line 9843 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_PWMDIV_16 0x00060000 |
Definition at line 9815 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_PWMDIV_2 0x00000000 |
Definition at line 9812 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_PWMDIV_32 0x00080000 |
Definition at line 9816 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_PWMDIV_4 0x00020000 |
Definition at line 9813 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_PWMDIV_64 0x000A0000 |
Definition at line 9817 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_PWMDIV_8 0x00040000 |
Definition at line 9814 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_PWMDIV_M 0x000E0000 |
Definition at line 9811 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_PWRDN 0x00002000 |
Definition at line 9818 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_R (*((volatile uint32_t *)0x400FE060)) |
Definition at line 2159 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_SYSDIV_M 0x07800000 |
Definition at line 9808 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_SYSDIV_S 23 |
Definition at line 9848 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_USEPWMDIV 0x00100000 |
Definition at line 9810 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_USESYSDIV 0x00400000 |
Definition at line 9809 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_XTAL_10MHZ 0x00000400 |
Definition at line 9831 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_XTAL_12_2MHZ 0x00000480 |
Definition at line 9833 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_XTAL_12MHZ 0x00000440 |
Definition at line 9832 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_XTAL_13_5MHZ 0x000004C0 |
Definition at line 9834 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_XTAL_14_3MHZ 0x00000500 |
Definition at line 9835 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_XTAL_16_3MHZ 0x00000580 |
Definition at line 9837 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_XTAL_16MHZ 0x00000540 |
Definition at line 9836 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_XTAL_18MHZ 0x000005C0 |
Definition at line 9838 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_XTAL_20MHZ 0x00000600 |
Definition at line 9839 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_XTAL_24MHZ 0x00000640 |
Definition at line 9840 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_XTAL_25MHZ 0x00000680 |
Definition at line 9841 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_XTAL_4_09MHZ 0x000001C0 |
Definition at line 9822 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_XTAL_4_91MHZ 0x00000200 |
Definition at line 9823 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_XTAL_4MHZ 0x00000180 |
Definition at line 9821 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_XTAL_5_12MHZ 0x00000280 |
Definition at line 9825 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_XTAL_5MHZ 0x00000240 |
Definition at line 9824 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_XTAL_6_14MHZ 0x00000300 |
Definition at line 9827 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_XTAL_6MHZ 0x000002C0 |
Definition at line 9826 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_XTAL_7_37MHZ 0x00000340 |
Definition at line 9828 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_XTAL_8_19MHZ 0x000003C0 |
Definition at line 9830 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_XTAL_8MHZ 0x00000380 |
Definition at line 9829 of file tm4c123fe6pm.h.
#define SYSCTL_RCC_XTAL_M 0x000007C0 |
Definition at line 9820 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC0_ADC0 0x00010000 |
Definition at line 9910 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC0_ADC0SPD_125K 0x00000000 |
Definition at line 9920 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC0_ADC0SPD_1M 0x00000300 |
Definition at line 9926 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC0_ADC0SPD_250K 0x00000100 |
Definition at line 9922 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC0_ADC0SPD_500K 0x00000200 |
Definition at line 9924 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC0_ADC0SPD_M 0x00000300 |
Definition at line 9919 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC0_ADC1 0x00020000 |
Definition at line 9909 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC0_ADC1SPD_125K 0x00000000 |
Definition at line 9912 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC0_ADC1SPD_1M 0x00000C00 |
Definition at line 9918 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC0_ADC1SPD_250K 0x00000400 |
Definition at line 9914 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC0_ADC1SPD_500K 0x00000800 |
Definition at line 9916 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC0_ADC1SPD_M 0x00000C00 |
Definition at line 9911 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC0_CAN0 0x01000000 |
Definition at line 9907 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC0_CAN1 0x02000000 |
Definition at line 9906 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC0_PWM0 0x00100000 |
Definition at line 9908 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC0_R (*((volatile uint32_t *)0x400FE100)) |
Definition at line 2163 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC0_WDT0 0x00000008 |
Definition at line 9927 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC0_WDT1 0x10000000 |
Definition at line 9905 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC1_COMP0 0x01000000 |
Definition at line 9935 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC1_COMP1 0x02000000 |
Definition at line 9934 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC1_I2C0 0x00001000 |
Definition at line 9941 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC1_I2C1 0x00004000 |
Definition at line 9940 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC1_QEI0 0x00000100 |
Definition at line 9943 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC1_QEI1 0x00000200 |
Definition at line 9942 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC1_R (*((volatile uint32_t *)0x400FE104)) |
Definition at line 2164 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC1_SSI0 0x00000010 |
Definition at line 9945 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC1_SSI1 0x00000020 |
Definition at line 9944 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC1_TIMER0 0x00010000 |
Definition at line 9939 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC1_TIMER1 0x00020000 |
Definition at line 9938 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC1_TIMER2 0x00040000 |
Definition at line 9937 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC1_TIMER3 0x00080000 |
Definition at line 9936 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC1_UART0 0x00000001 |
Definition at line 9948 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC1_UART1 0x00000002 |
Definition at line 9947 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC1_UART2 0x00000004 |
Definition at line 9946 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC2_GPIOA 0x00000001 |
Definition at line 9963 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC2_GPIOB 0x00000002 |
Definition at line 9962 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC2_GPIOC 0x00000004 |
Definition at line 9961 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC2_GPIOD 0x00000008 |
Definition at line 9960 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC2_GPIOE 0x00000010 |
Definition at line 9959 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC2_GPIOF 0x00000020 |
Definition at line 9958 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC2_GPIOG 0x00000040 |
Definition at line 9957 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC2_R (*((volatile uint32_t *)0x400FE108)) |
Definition at line 2165 of file tm4c123fe6pm.h.
Referenced by main().
#define SYSCTL_RCGC2_UDMA 0x00002000 |
Definition at line 9956 of file tm4c123fe6pm.h.
#define SYSCTL_RCGC2_USB0 0x00010000 |
Definition at line 9955 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCACMP_R (*((volatile uint32_t *)0x400FE63C)) |
Definition at line 2225 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCACMP_R0 0x00000001 |
Definition at line 10716 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCADC_R (*((volatile uint32_t *)0x400FE638)) |
Definition at line 2224 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCADC_R0 0x00000001 |
Definition at line 10707 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCADC_R1 0x00000002 |
Definition at line 10705 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCCAN_R (*((volatile uint32_t *)0x400FE634)) |
Definition at line 2223 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCCAN_R0 0x00000001 |
Definition at line 10697 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCCAN_R1 0x00000002 |
Definition at line 10695 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCDMA_R (*((volatile uint32_t *)0x400FE60C)) |
Definition at line 2218 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCDMA_R0 0x00000001 |
Definition at line 10624 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCEEPROM_R (*((volatile uint32_t *)0x400FE658)) |
Definition at line 2228 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCEEPROM_R0 0x00000001 |
Definition at line 10745 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCGPIO_R (*((volatile uint32_t *)0x400FE608)) |
Definition at line 2217 of file tm4c123fe6pm.h.
Referenced by commonInit().
#define SYSCTL_RCGCGPIO_R0 0x00000001 |
Definition at line 10616 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCGPIO_R1 0x00000002 |
Definition at line 10614 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCGPIO_R2 0x00000004 |
Definition at line 10612 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCGPIO_R3 0x00000008 |
Definition at line 10610 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCGPIO_R4 0x00000010 |
Definition at line 10608 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCGPIO_R5 0x00000020 |
Definition at line 10606 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCGPIO_R6 0x00000040 |
Definition at line 10604 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCI2C_R (*((volatile uint32_t *)0x400FE620)) |
Definition at line 2221 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCI2C_R0 0x00000001 |
Definition at line 10679 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCI2C_R1 0x00000002 |
Definition at line 10677 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCI2C_R2 0x00000004 |
Definition at line 10675 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCI2C_R3 0x00000008 |
Definition at line 10673 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCI2C_R4 0x00000010 |
Definition at line 10671 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCI2C_R5 0x00000020 |
Definition at line 10669 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCPWM_R (*((volatile uint32_t *)0x400FE640)) |
Definition at line 2226 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCPWM_R0 0x00000001 |
Definition at line 10726 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCPWM_R1 0x00000002 |
Definition at line 10724 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCQEI_R (*((volatile uint32_t *)0x400FE644)) |
Definition at line 2227 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCQEI_R0 0x00000001 |
Definition at line 10736 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCQEI_R1 0x00000002 |
Definition at line 10734 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCSSI_R (*((volatile uint32_t *)0x400FE61C)) |
Definition at line 2220 of file tm4c123fe6pm.h.
Referenced by commonInit().
#define SYSCTL_RCGCSSI_R0 0x00000001 |
Definition at line 10661 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCSSI_R1 0x00000002 |
Definition at line 10659 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCSSI_R2 0x00000004 |
Definition at line 10657 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCSSI_R3 0x00000008 |
Definition at line 10655 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCTIMER_R (*((volatile uint32_t *)0x400FE604)) |
Definition at line 2216 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCTIMER_R0 0x00000001 |
Definition at line 10595 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCTIMER_R1 0x00000002 |
Definition at line 10593 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCTIMER_R2 0x00000004 |
Definition at line 10591 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCTIMER_R3 0x00000008 |
Definition at line 10589 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCTIMER_R4 0x00000010 |
Definition at line 10587 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCTIMER_R5 0x00000020 |
Definition at line 10585 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCUART_R (*((volatile uint32_t *)0x400FE618)) |
Definition at line 2219 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCUART_R0 0x00000001 |
Definition at line 10647 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCUART_R1 0x00000002 |
Definition at line 10645 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCUART_R2 0x00000004 |
Definition at line 10643 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCUART_R3 0x00000008 |
Definition at line 10641 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCUART_R4 0x00000010 |
Definition at line 10639 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCUART_R5 0x00000020 |
Definition at line 10637 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCUART_R6 0x00000040 |
Definition at line 10635 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCUART_R7 0x00000080 |
Definition at line 10633 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCUSB_R (*((volatile uint32_t *)0x400FE628)) |
Definition at line 2222 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCUSB_R0 0x00000001 |
Definition at line 10687 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCWD_R (*((volatile uint32_t *)0x400FE600)) |
Definition at line 2215 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCWD_R0 0x00000001 |
Definition at line 10576 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCWD_R1 0x00000002 |
Definition at line 10574 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCWTIMER_R (*((volatile uint32_t *)0x400FE65C)) |
Definition at line 2229 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCWTIMER_R0 0x00000001 |
Definition at line 10769 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCWTIMER_R1 0x00000002 |
Definition at line 10766 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCWTIMER_R2 0x00000004 |
Definition at line 10763 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCWTIMER_R3 0x00000008 |
Definition at line 10760 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCWTIMER_R4 0x00000010 |
Definition at line 10757 of file tm4c123fe6pm.h.
#define SYSCTL_RCGCWTIMER_R5 0x00000020 |
Definition at line 10754 of file tm4c123fe6pm.h.
#define SYSCTL_RESC_BOR 0x00000004 |
Definition at line 9798 of file tm4c123fe6pm.h.
#define SYSCTL_RESC_EXT 0x00000001 |
Definition at line 9800 of file tm4c123fe6pm.h.
#define SYSCTL_RESC_MOSCFAIL 0x00010000 |
Definition at line 9794 of file tm4c123fe6pm.h.
#define SYSCTL_RESC_POR 0x00000002 |
Definition at line 9799 of file tm4c123fe6pm.h.
#define SYSCTL_RESC_R (*((volatile uint32_t *)0x400FE05C)) |
Definition at line 2158 of file tm4c123fe6pm.h.
#define SYSCTL_RESC_SW 0x00000010 |
Definition at line 9796 of file tm4c123fe6pm.h.
#define SYSCTL_RESC_WDT0 0x00000008 |
Definition at line 9797 of file tm4c123fe6pm.h.
#define SYSCTL_RESC_WDT1 0x00000020 |
Definition at line 9795 of file tm4c123fe6pm.h.
#define SYSCTL_RIS_BOR0RIS 0x00000800 |
Definition at line 9742 of file tm4c123fe6pm.h.
#define SYSCTL_RIS_BOR1RIS 0x00000002 |
Definition at line 9753 of file tm4c123fe6pm.h.
#define SYSCTL_RIS_MOFRIS 0x00000008 |
Definition at line 9751 of file tm4c123fe6pm.h.
#define SYSCTL_RIS_MOSCPUPRIS 0x00000100 |
Definition at line 9746 of file tm4c123fe6pm.h.
#define SYSCTL_RIS_PLLLRIS 0x00000040 |
Definition at line 9750 of file tm4c123fe6pm.h.
#define SYSCTL_RIS_R (*((volatile uint32_t *)0x400FE050)) |
Definition at line 2155 of file tm4c123fe6pm.h.
#define SYSCTL_RIS_USBPLLLRIS 0x00000080 |
Definition at line 9748 of file tm4c123fe6pm.h.
#define SYSCTL_RIS_VDDARIS 0x00000400 |
Definition at line 9744 of file tm4c123fe6pm.h.
#define SYSCTL_SCGC0_ADC0 0x00010000 |
Definition at line 9975 of file tm4c123fe6pm.h.
#define SYSCTL_SCGC0_ADC1 0x00020000 |
Definition at line 9974 of file tm4c123fe6pm.h.
#define SYSCTL_SCGC0_CAN0 0x01000000 |
Definition at line 9972 of file tm4c123fe6pm.h.
#define SYSCTL_SCGC0_CAN1 0x02000000 |
Definition at line 9971 of file tm4c123fe6pm.h.
#define SYSCTL_SCGC0_PWM0 0x00100000 |
Definition at line 9973 of file tm4c123fe6pm.h.
#define SYSCTL_SCGC0_R (*((volatile uint32_t *)0x400FE110)) |
Definition at line 2166 of file tm4c123fe6pm.h.
#define SYSCTL_SCGC0_WDT0 0x00000008 |
Definition at line 9976 of file tm4c123fe6pm.h.
#define SYSCTL_SCGC0_WDT1 0x10000000 |
Definition at line 9970 of file tm4c123fe6pm.h.
#define SYSCTL_SCGC1_COMP0 0x01000000 |
Definition at line 9984 of file tm4c123fe6pm.h.
#define SYSCTL_SCGC1_COMP1 0x02000000 |
Definition at line 9983 of file tm4c123fe6pm.h.
#define SYSCTL_SCGC1_I2C0 0x00001000 |
Definition at line 9990 of file tm4c123fe6pm.h.
#define SYSCTL_SCGC1_I2C1 0x00004000 |
Definition at line 9989 of file tm4c123fe6pm.h.
#define SYSCTL_SCGC1_QEI0 0x00000100 |
Definition at line 9992 of file tm4c123fe6pm.h.
#define SYSCTL_SCGC1_QEI1 0x00000200 |
Definition at line 9991 of file tm4c123fe6pm.h.
#define SYSCTL_SCGC1_R (*((volatile uint32_t *)0x400FE114)) |
Definition at line 2167 of file tm4c123fe6pm.h.
#define SYSCTL_SCGC1_SSI0 0x00000010 |
Definition at line 9994 of file tm4c123fe6pm.h.
#define SYSCTL_SCGC1_SSI1 0x00000020 |
Definition at line 9993 of file tm4c123fe6pm.h.
#define SYSCTL_SCGC1_TIMER0 0x00010000 |
Definition at line 9988 of file tm4c123fe6pm.h.
#define SYSCTL_SCGC1_TIMER1 0x00020000 |
Definition at line 9987 of file tm4c123fe6pm.h.
#define SYSCTL_SCGC1_TIMER2 0x00040000 |
Definition at line 9986 of file tm4c123fe6pm.h.
#define SYSCTL_SCGC1_TIMER3 0x00080000 |
Definition at line 9985 of file tm4c123fe6pm.h.
#define SYSCTL_SCGC1_UART0 0x00000001 |
Definition at line 9997 of file tm4c123fe6pm.h.
#define SYSCTL_SCGC1_UART1 0x00000002 |
Definition at line 9996 of file tm4c123fe6pm.h.
#define SYSCTL_SCGC1_UART2 0x00000004 |
Definition at line 9995 of file tm4c123fe6pm.h.
#define SYSCTL_SCGC2_GPIOA 0x00000001 |
Definition at line 10012 of file tm4c123fe6pm.h.
#define SYSCTL_SCGC2_GPIOB 0x00000002 |
Definition at line 10011 of file tm4c123fe6pm.h.
#define SYSCTL_SCGC2_GPIOC 0x00000004 |
Definition at line 10010 of file tm4c123fe6pm.h.
#define SYSCTL_SCGC2_GPIOD 0x00000008 |
Definition at line 10009 of file tm4c123fe6pm.h.
#define SYSCTL_SCGC2_GPIOE 0x00000010 |
Definition at line 10008 of file tm4c123fe6pm.h.
#define SYSCTL_SCGC2_GPIOF 0x00000020 |
Definition at line 10007 of file tm4c123fe6pm.h.
#define SYSCTL_SCGC2_GPIOG 0x00000040 |
Definition at line 10006 of file tm4c123fe6pm.h.
#define SYSCTL_SCGC2_R (*((volatile uint32_t *)0x400FE118)) |
Definition at line 2168 of file tm4c123fe6pm.h.
#define SYSCTL_SCGC2_UDMA 0x00002000 |
Definition at line 10005 of file tm4c123fe6pm.h.
#define SYSCTL_SCGC2_USB0 0x00010000 |
Definition at line 10004 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCACMP_R (*((volatile uint32_t *)0x400FE73C)) |
Definition at line 2240 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCACMP_S0 0x00000001 |
Definition at line 10926 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCADC_R (*((volatile uint32_t *)0x400FE738)) |
Definition at line 2239 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCADC_S0 0x00000001 |
Definition at line 10917 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCADC_S1 0x00000002 |
Definition at line 10915 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCCAN_R (*((volatile uint32_t *)0x400FE734)) |
Definition at line 2238 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCCAN_S0 0x00000001 |
Definition at line 10907 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCCAN_S1 0x00000002 |
Definition at line 10905 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCDMA_R (*((volatile uint32_t *)0x400FE70C)) |
Definition at line 2233 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCDMA_S0 0x00000001 |
Definition at line 10834 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCEEPROM_R (*((volatile uint32_t *)0x400FE758)) |
Definition at line 2243 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCEEPROM_S0 0x00000001 |
Definition at line 10955 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCGPIO_R (*((volatile uint32_t *)0x400FE708)) |
Definition at line 2232 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCGPIO_S0 0x00000001 |
Definition at line 10826 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCGPIO_S1 0x00000002 |
Definition at line 10824 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCGPIO_S2 0x00000004 |
Definition at line 10822 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCGPIO_S3 0x00000008 |
Definition at line 10820 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCGPIO_S4 0x00000010 |
Definition at line 10818 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCGPIO_S5 0x00000020 |
Definition at line 10816 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCGPIO_S6 0x00000040 |
Definition at line 10814 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCI2C_R (*((volatile uint32_t *)0x400FE720)) |
Definition at line 2236 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCI2C_S0 0x00000001 |
Definition at line 10889 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCI2C_S1 0x00000002 |
Definition at line 10887 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCI2C_S2 0x00000004 |
Definition at line 10885 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCI2C_S3 0x00000008 |
Definition at line 10883 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCI2C_S4 0x00000010 |
Definition at line 10881 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCI2C_S5 0x00000020 |
Definition at line 10879 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCPWM_R (*((volatile uint32_t *)0x400FE740)) |
Definition at line 2241 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCPWM_S0 0x00000001 |
Definition at line 10936 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCPWM_S1 0x00000002 |
Definition at line 10934 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCQEI_R (*((volatile uint32_t *)0x400FE744)) |
Definition at line 2242 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCQEI_S0 0x00000001 |
Definition at line 10946 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCQEI_S1 0x00000002 |
Definition at line 10944 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCSSI_R (*((volatile uint32_t *)0x400FE71C)) |
Definition at line 2235 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCSSI_S0 0x00000001 |
Definition at line 10871 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCSSI_S1 0x00000002 |
Definition at line 10869 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCSSI_S2 0x00000004 |
Definition at line 10867 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCSSI_S3 0x00000008 |
Definition at line 10865 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCTIMER_R (*((volatile uint32_t *)0x400FE704)) |
Definition at line 2231 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCTIMER_S0 0x00000001 |
Definition at line 10804 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCTIMER_S1 0x00000002 |
Definition at line 10801 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCTIMER_S2 0x00000004 |
Definition at line 10798 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCTIMER_S3 0x00000008 |
Definition at line 10795 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCTIMER_S4 0x00000010 |
Definition at line 10792 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCTIMER_S5 0x00000020 |
Definition at line 10789 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCUART_R (*((volatile uint32_t *)0x400FE718)) |
Definition at line 2234 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCUART_S0 0x00000001 |
Definition at line 10857 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCUART_S1 0x00000002 |
Definition at line 10855 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCUART_S2 0x00000004 |
Definition at line 10853 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCUART_S3 0x00000008 |
Definition at line 10851 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCUART_S4 0x00000010 |
Definition at line 10849 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCUART_S5 0x00000020 |
Definition at line 10847 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCUART_S6 0x00000040 |
Definition at line 10845 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCUART_S7 0x00000080 |
Definition at line 10843 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCUSB_R (*((volatile uint32_t *)0x400FE728)) |
Definition at line 2237 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCUSB_S0 0x00000001 |
Definition at line 10897 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCWD_R (*((volatile uint32_t *)0x400FE700)) |
Definition at line 2230 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCWD_S0 0x00000001 |
Definition at line 10780 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCWD_S1 0x00000002 |
Definition at line 10778 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCWTIMER_R (*((volatile uint32_t *)0x400FE75C)) |
Definition at line 2244 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCWTIMER_S0 0x00000001 |
Definition at line 10979 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCWTIMER_S1 0x00000002 |
Definition at line 10976 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCWTIMER_S2 0x00000004 |
Definition at line 10973 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCWTIMER_S3 0x00000008 |
Definition at line 10970 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCWTIMER_S4 0x00000010 |
Definition at line 10967 of file tm4c123fe6pm.h.
#define SYSCTL_SCGCWTIMER_S5 0x00000020 |
Definition at line 10964 of file tm4c123fe6pm.h.
#define SYSCTL_SLPPWRCFG_FLASHPM_M 0x00000030 |
Definition at line 10131 of file tm4c123fe6pm.h.
#define SYSCTL_SLPPWRCFG_FLASHPM_NRM 0x00000000 |
Definition at line 10133 of file tm4c123fe6pm.h.
#define SYSCTL_SLPPWRCFG_FLASHPM_SLP 0x00000020 |
Definition at line 10135 of file tm4c123fe6pm.h.
#define SYSCTL_SLPPWRCFG_R (*((volatile uint32_t *)0x400FE188)) |
Definition at line 2178 of file tm4c123fe6pm.h.
#define SYSCTL_SLPPWRCFG_SRAMPM_LP 0x00000003 |
Definition at line 10143 of file tm4c123fe6pm.h.
#define SYSCTL_SLPPWRCFG_SRAMPM_M 0x00000003 |
Definition at line 10137 of file tm4c123fe6pm.h.
#define SYSCTL_SLPPWRCFG_SRAMPM_NRM 0x00000000 |
Definition at line 10139 of file tm4c123fe6pm.h.
#define SYSCTL_SLPPWRCFG_SRAMPM_SBY 0x00000001 |
Definition at line 10141 of file tm4c123fe6pm.h.
#define SYSCTL_SRACMP_R (*((volatile uint32_t *)0x400FE53C)) |
Definition at line 2210 of file tm4c123fe6pm.h.
#define SYSCTL_SRACMP_R0 0x00000001 |
Definition at line 10523 of file tm4c123fe6pm.h.
#define SYSCTL_SRADC_R (*((volatile uint32_t *)0x400FE538)) |
Definition at line 2209 of file tm4c123fe6pm.h.
#define SYSCTL_SRADC_R0 0x00000001 |
Definition at line 10516 of file tm4c123fe6pm.h.
#define SYSCTL_SRADC_R1 0x00000002 |
Definition at line 10515 of file tm4c123fe6pm.h.
#define SYSCTL_SRCAN_R (*((volatile uint32_t *)0x400FE534)) |
Definition at line 2208 of file tm4c123fe6pm.h.
#define SYSCTL_SRCAN_R0 0x00000001 |
Definition at line 10508 of file tm4c123fe6pm.h.
#define SYSCTL_SRCAN_R1 0x00000002 |
Definition at line 10507 of file tm4c123fe6pm.h.
#define SYSCTL_SRCR0_ADC0 0x00010000 |
Definition at line 9698 of file tm4c123fe6pm.h.
#define SYSCTL_SRCR0_ADC1 0x00020000 |
Definition at line 9697 of file tm4c123fe6pm.h.
#define SYSCTL_SRCR0_CAN0 0x01000000 |
Definition at line 9695 of file tm4c123fe6pm.h.
#define SYSCTL_SRCR0_CAN1 0x02000000 |
Definition at line 9694 of file tm4c123fe6pm.h.
#define SYSCTL_SRCR0_PWM0 0x00100000 |
Definition at line 9696 of file tm4c123fe6pm.h.
#define SYSCTL_SRCR0_R (*((volatile uint32_t *)0x400FE040)) |
Definition at line 2152 of file tm4c123fe6pm.h.
#define SYSCTL_SRCR0_WDT0 0x00000008 |
Definition at line 9699 of file tm4c123fe6pm.h.
#define SYSCTL_SRCR0_WDT1 0x10000000 |
Definition at line 9693 of file tm4c123fe6pm.h.
#define SYSCTL_SRCR1_COMP0 0x01000000 |
Definition at line 9707 of file tm4c123fe6pm.h.
#define SYSCTL_SRCR1_COMP1 0x02000000 |
Definition at line 9706 of file tm4c123fe6pm.h.
#define SYSCTL_SRCR1_I2C0 0x00001000 |
Definition at line 9713 of file tm4c123fe6pm.h.
#define SYSCTL_SRCR1_I2C1 0x00004000 |
Definition at line 9712 of file tm4c123fe6pm.h.
#define SYSCTL_SRCR1_QEI0 0x00000100 |
Definition at line 9715 of file tm4c123fe6pm.h.
#define SYSCTL_SRCR1_QEI1 0x00000200 |
Definition at line 9714 of file tm4c123fe6pm.h.
#define SYSCTL_SRCR1_R (*((volatile uint32_t *)0x400FE044)) |
Definition at line 2153 of file tm4c123fe6pm.h.
#define SYSCTL_SRCR1_SSI0 0x00000010 |
Definition at line 9717 of file tm4c123fe6pm.h.
#define SYSCTL_SRCR1_SSI1 0x00000020 |
Definition at line 9716 of file tm4c123fe6pm.h.
#define SYSCTL_SRCR1_TIMER0 0x00010000 |
Definition at line 9711 of file tm4c123fe6pm.h.
#define SYSCTL_SRCR1_TIMER1 0x00020000 |
Definition at line 9710 of file tm4c123fe6pm.h.
#define SYSCTL_SRCR1_TIMER2 0x00040000 |
Definition at line 9709 of file tm4c123fe6pm.h.
#define SYSCTL_SRCR1_TIMER3 0x00080000 |
Definition at line 9708 of file tm4c123fe6pm.h.
#define SYSCTL_SRCR1_UART0 0x00000001 |
Definition at line 9720 of file tm4c123fe6pm.h.
#define SYSCTL_SRCR1_UART1 0x00000002 |
Definition at line 9719 of file tm4c123fe6pm.h.
#define SYSCTL_SRCR1_UART2 0x00000004 |
Definition at line 9718 of file tm4c123fe6pm.h.
#define SYSCTL_SRCR2_GPIOA 0x00000001 |
Definition at line 9735 of file tm4c123fe6pm.h.
#define SYSCTL_SRCR2_GPIOB 0x00000002 |
Definition at line 9734 of file tm4c123fe6pm.h.
#define SYSCTL_SRCR2_GPIOC 0x00000004 |
Definition at line 9733 of file tm4c123fe6pm.h.
#define SYSCTL_SRCR2_GPIOD 0x00000008 |
Definition at line 9732 of file tm4c123fe6pm.h.
#define SYSCTL_SRCR2_GPIOE 0x00000010 |
Definition at line 9731 of file tm4c123fe6pm.h.
#define SYSCTL_SRCR2_GPIOF 0x00000020 |
Definition at line 9730 of file tm4c123fe6pm.h.
#define SYSCTL_SRCR2_GPIOG 0x00000040 |
Definition at line 9729 of file tm4c123fe6pm.h.
#define SYSCTL_SRCR2_R (*((volatile uint32_t *)0x400FE048)) |
Definition at line 2154 of file tm4c123fe6pm.h.
#define SYSCTL_SRCR2_UDMA 0x00002000 |
Definition at line 9728 of file tm4c123fe6pm.h.
#define SYSCTL_SRCR2_USB0 0x00010000 |
Definition at line 9727 of file tm4c123fe6pm.h.
#define SYSCTL_SRDMA_R (*((volatile uint32_t *)0x400FE50C)) |
Definition at line 2203 of file tm4c123fe6pm.h.
#define SYSCTL_SRDMA_R0 0x00000001 |
Definition at line 10457 of file tm4c123fe6pm.h.
#define SYSCTL_SREEPROM_R (*((volatile uint32_t *)0x400FE558)) |
Definition at line 2213 of file tm4c123fe6pm.h.
#define SYSCTL_SREEPROM_R0 0x00000001 |
Definition at line 10548 of file tm4c123fe6pm.h.
#define SYSCTL_SRGPIO_R (*((volatile uint32_t *)0x400FE508)) |
Definition at line 2202 of file tm4c123fe6pm.h.
#define SYSCTL_SRGPIO_R0 0x00000001 |
Definition at line 10450 of file tm4c123fe6pm.h.
#define SYSCTL_SRGPIO_R1 0x00000002 |
Definition at line 10449 of file tm4c123fe6pm.h.
#define SYSCTL_SRGPIO_R2 0x00000004 |
Definition at line 10448 of file tm4c123fe6pm.h.
#define SYSCTL_SRGPIO_R3 0x00000008 |
Definition at line 10447 of file tm4c123fe6pm.h.
#define SYSCTL_SRGPIO_R4 0x00000010 |
Definition at line 10446 of file tm4c123fe6pm.h.
#define SYSCTL_SRGPIO_R5 0x00000020 |
Definition at line 10445 of file tm4c123fe6pm.h.
#define SYSCTL_SRGPIO_R6 0x00000040 |
Definition at line 10444 of file tm4c123fe6pm.h.
#define SYSCTL_SRI2C_R (*((volatile uint32_t *)0x400FE520)) |
Definition at line 2206 of file tm4c123fe6pm.h.
#define SYSCTL_SRI2C_R0 0x00000001 |
Definition at line 10493 of file tm4c123fe6pm.h.
#define SYSCTL_SRI2C_R1 0x00000002 |
Definition at line 10492 of file tm4c123fe6pm.h.
#define SYSCTL_SRI2C_R2 0x00000004 |
Definition at line 10491 of file tm4c123fe6pm.h.
#define SYSCTL_SRI2C_R3 0x00000008 |
Definition at line 10490 of file tm4c123fe6pm.h.
#define SYSCTL_SRI2C_R4 0x00000010 |
Definition at line 10489 of file tm4c123fe6pm.h.
#define SYSCTL_SRI2C_R5 0x00000020 |
Definition at line 10488 of file tm4c123fe6pm.h.
#define SYSCTL_SRPWM_R (*((volatile uint32_t *)0x400FE540)) |
Definition at line 2211 of file tm4c123fe6pm.h.
#define SYSCTL_SRPWM_R0 0x00000001 |
Definition at line 10532 of file tm4c123fe6pm.h.
#define SYSCTL_SRPWM_R1 0x00000002 |
Definition at line 10531 of file tm4c123fe6pm.h.
#define SYSCTL_SRQEI_R (*((volatile uint32_t *)0x400FE544)) |
Definition at line 2212 of file tm4c123fe6pm.h.
#define SYSCTL_SRQEI_R0 0x00000001 |
Definition at line 10540 of file tm4c123fe6pm.h.
#define SYSCTL_SRQEI_R1 0x00000002 |
Definition at line 10539 of file tm4c123fe6pm.h.
#define SYSCTL_SRSSI_R (*((volatile uint32_t *)0x400FE51C)) |
Definition at line 2205 of file tm4c123fe6pm.h.
#define SYSCTL_SRSSI_R0 0x00000001 |
Definition at line 10481 of file tm4c123fe6pm.h.
#define SYSCTL_SRSSI_R1 0x00000002 |
Definition at line 10480 of file tm4c123fe6pm.h.
#define SYSCTL_SRSSI_R2 0x00000004 |
Definition at line 10479 of file tm4c123fe6pm.h.
#define SYSCTL_SRSSI_R3 0x00000008 |
Definition at line 10478 of file tm4c123fe6pm.h.
#define SYSCTL_SRTIMER_R (*((volatile uint32_t *)0x400FE504)) |
Definition at line 2201 of file tm4c123fe6pm.h.
#define SYSCTL_SRTIMER_R0 0x00000001 |
Definition at line 10436 of file tm4c123fe6pm.h.
#define SYSCTL_SRTIMER_R1 0x00000002 |
Definition at line 10434 of file tm4c123fe6pm.h.
#define SYSCTL_SRTIMER_R2 0x00000004 |
Definition at line 10432 of file tm4c123fe6pm.h.
#define SYSCTL_SRTIMER_R3 0x00000008 |
Definition at line 10430 of file tm4c123fe6pm.h.
#define SYSCTL_SRTIMER_R4 0x00000010 |
Definition at line 10428 of file tm4c123fe6pm.h.
#define SYSCTL_SRTIMER_R5 0x00000020 |
Definition at line 10426 of file tm4c123fe6pm.h.
#define SYSCTL_SRUART_R (*((volatile uint32_t *)0x400FE518)) |
Definition at line 2204 of file tm4c123fe6pm.h.
#define SYSCTL_SRUART_R0 0x00000001 |
Definition at line 10471 of file tm4c123fe6pm.h.
#define SYSCTL_SRUART_R1 0x00000002 |
Definition at line 10470 of file tm4c123fe6pm.h.
#define SYSCTL_SRUART_R2 0x00000004 |
Definition at line 10469 of file tm4c123fe6pm.h.
#define SYSCTL_SRUART_R3 0x00000008 |
Definition at line 10468 of file tm4c123fe6pm.h.
#define SYSCTL_SRUART_R4 0x00000010 |
Definition at line 10467 of file tm4c123fe6pm.h.
#define SYSCTL_SRUART_R5 0x00000020 |
Definition at line 10466 of file tm4c123fe6pm.h.
#define SYSCTL_SRUART_R6 0x00000040 |
Definition at line 10465 of file tm4c123fe6pm.h.
#define SYSCTL_SRUART_R7 0x00000080 |
Definition at line 10464 of file tm4c123fe6pm.h.
#define SYSCTL_SRUSB_R (*((volatile uint32_t *)0x400FE528)) |
Definition at line 2207 of file tm4c123fe6pm.h.
#define SYSCTL_SRUSB_R0 0x00000001 |
Definition at line 10500 of file tm4c123fe6pm.h.
#define SYSCTL_SRWD_R (*((volatile uint32_t *)0x400FE500)) |
Definition at line 2200 of file tm4c123fe6pm.h.
#define SYSCTL_SRWD_R0 0x00000001 |
Definition at line 10419 of file tm4c123fe6pm.h.
#define SYSCTL_SRWD_R1 0x00000002 |
Definition at line 10418 of file tm4c123fe6pm.h.
#define SYSCTL_SRWTIMER_R (*((volatile uint32_t *)0x400FE55C)) |
Definition at line 2214 of file tm4c123fe6pm.h.
#define SYSCTL_SRWTIMER_R0 0x00000001 |
Definition at line 10566 of file tm4c123fe6pm.h.
#define SYSCTL_SRWTIMER_R1 0x00000002 |
Definition at line 10564 of file tm4c123fe6pm.h.
#define SYSCTL_SRWTIMER_R2 0x00000004 |
Definition at line 10562 of file tm4c123fe6pm.h.
#define SYSCTL_SRWTIMER_R3 0x00000008 |
Definition at line 10560 of file tm4c123fe6pm.h.
#define SYSCTL_SRWTIMER_R4 0x00000010 |
Definition at line 10558 of file tm4c123fe6pm.h.
#define SYSCTL_SRWTIMER_R5 0x00000020 |
Definition at line 10556 of file tm4c123fe6pm.h.
#define SYSCTL_SYSPROP_FPU 0x00000001 |
Definition at line 10083 of file tm4c123fe6pm.h.
#define SYSCTL_SYSPROP_R (*((volatile uint32_t *)0x400FE14C)) |
Definition at line 2173 of file tm4c123fe6pm.h.
#define SYSEXC_IC_FPDZCIC 0x00000002 |
Definition at line 9166 of file tm4c123fe6pm.h.
#define SYSEXC_IC_FPIDCIC 0x00000001 |
Definition at line 9168 of file tm4c123fe6pm.h.
#define SYSEXC_IC_FPIOCIC 0x00000004 |
Definition at line 9164 of file tm4c123fe6pm.h.
#define SYSEXC_IC_FPIXCIC 0x00000020 |
Definition at line 9158 of file tm4c123fe6pm.h.
#define SYSEXC_IC_FPOFCIC 0x00000010 |
Definition at line 9160 of file tm4c123fe6pm.h.
#define SYSEXC_IC_FPUFCIC 0x00000008 |
Definition at line 9162 of file tm4c123fe6pm.h.
#define SYSEXC_IC_R (*((volatile uint32_t *)0x400F900C)) |
Definition at line 2105 of file tm4c123fe6pm.h.
#define SYSEXC_IM_FPDZCIM 0x00000002 |
Definition at line 9126 of file tm4c123fe6pm.h.
#define SYSEXC_IM_FPIDCIM 0x00000001 |
Definition at line 9128 of file tm4c123fe6pm.h.
#define SYSEXC_IM_FPIOCIM 0x00000004 |
Definition at line 9124 of file tm4c123fe6pm.h.
#define SYSEXC_IM_FPIXCIM 0x00000020 |
Definition at line 9118 of file tm4c123fe6pm.h.
#define SYSEXC_IM_FPOFCIM 0x00000010 |
Definition at line 9120 of file tm4c123fe6pm.h.
#define SYSEXC_IM_FPUFCIM 0x00000008 |
Definition at line 9122 of file tm4c123fe6pm.h.
#define SYSEXC_IM_R (*((volatile uint32_t *)0x400F9004)) |
Definition at line 2103 of file tm4c123fe6pm.h.
#define SYSEXC_MIS_FPDZCMIS 0x00000002 |
Definition at line 9146 of file tm4c123fe6pm.h.
#define SYSEXC_MIS_FPIDCMIS 0x00000001 |
Definition at line 9149 of file tm4c123fe6pm.h.
#define SYSEXC_MIS_FPIOCMIS 0x00000004 |
Definition at line 9144 of file tm4c123fe6pm.h.
#define SYSEXC_MIS_FPIXCMIS 0x00000020 |
Definition at line 9136 of file tm4c123fe6pm.h.
#define SYSEXC_MIS_FPOFCMIS 0x00000010 |
Definition at line 9138 of file tm4c123fe6pm.h.
#define SYSEXC_MIS_FPUFCMIS 0x00000008 |
Definition at line 9141 of file tm4c123fe6pm.h.
#define SYSEXC_MIS_R (*((volatile uint32_t *)0x400F9008)) |
Definition at line 2104 of file tm4c123fe6pm.h.
#define SYSEXC_RIS_FPDZCRIS 0x00000002 |
Definition at line 9108 of file tm4c123fe6pm.h.
#define SYSEXC_RIS_FPIDCRIS 0x00000001 |
Definition at line 9110 of file tm4c123fe6pm.h.
#define SYSEXC_RIS_FPIOCRIS 0x00000004 |
Definition at line 9106 of file tm4c123fe6pm.h.
#define SYSEXC_RIS_FPIXCRIS 0x00000020 |
Definition at line 9100 of file tm4c123fe6pm.h.
#define SYSEXC_RIS_FPOFCRIS 0x00000010 |
Definition at line 9102 of file tm4c123fe6pm.h.
#define SYSEXC_RIS_FPUFCRIS 0x00000008 |
Definition at line 9104 of file tm4c123fe6pm.h.
#define SYSEXC_RIS_R (*((volatile uint32_t *)0x400F9000)) |
Definition at line 2102 of file tm4c123fe6pm.h.
#define TIMER0_CFG_R (*((volatile uint32_t *)0x40030000)) |
Definition at line 986 of file tm4c123fe6pm.h.
#define TIMER0_CTL_R (*((volatile uint32_t *)0x4003000C)) |
Definition at line 989 of file tm4c123fe6pm.h.
#define TIMER0_ICR_R (*((volatile uint32_t *)0x40030024)) |
Definition at line 994 of file tm4c123fe6pm.h.
#define TIMER0_IMR_R (*((volatile uint32_t *)0x40030018)) |
Definition at line 991 of file tm4c123fe6pm.h.
#define TIMER0_MIS_R (*((volatile uint32_t *)0x40030020)) |
Definition at line 993 of file tm4c123fe6pm.h.
#define TIMER0_PP_R (*((volatile uint32_t *)0x40030FC0)) |
Definition at line 1012 of file tm4c123fe6pm.h.
#define TIMER0_RIS_R (*((volatile uint32_t *)0x4003001C)) |
Definition at line 992 of file tm4c123fe6pm.h.
#define TIMER0_RTCPD_R (*((volatile uint32_t *)0x40030058)) |
Definition at line 1007 of file tm4c123fe6pm.h.
#define TIMER0_SYNC_R (*((volatile uint32_t *)0x40030010)) |
Definition at line 990 of file tm4c123fe6pm.h.
#define TIMER0_TAILR_R (*((volatile uint32_t *)0x40030028)) |
Definition at line 995 of file tm4c123fe6pm.h.
#define TIMER0_TAMATCHR_R (*((volatile uint32_t *)0x40030030)) |
Definition at line 997 of file tm4c123fe6pm.h.
#define TIMER0_TAMR_R (*((volatile uint32_t *)0x40030004)) |
Definition at line 987 of file tm4c123fe6pm.h.
#define TIMER0_TAPMR_R (*((volatile uint32_t *)0x40030040)) |
Definition at line 1001 of file tm4c123fe6pm.h.
#define TIMER0_TAPR_R (*((volatile uint32_t *)0x40030038)) |
Definition at line 999 of file tm4c123fe6pm.h.
#define TIMER0_TAPS_R (*((volatile uint32_t *)0x4003005C)) |
Definition at line 1008 of file tm4c123fe6pm.h.
#define TIMER0_TAPV_R (*((volatile uint32_t *)0x40030064)) |
Definition at line 1010 of file tm4c123fe6pm.h.
#define TIMER0_TAR_R (*((volatile uint32_t *)0x40030048)) |
Definition at line 1003 of file tm4c123fe6pm.h.
#define TIMER0_TAV_R (*((volatile uint32_t *)0x40030050)) |
Definition at line 1005 of file tm4c123fe6pm.h.
#define TIMER0_TBILR_R (*((volatile uint32_t *)0x4003002C)) |
Definition at line 996 of file tm4c123fe6pm.h.
#define TIMER0_TBMATCHR_R (*((volatile uint32_t *)0x40030034)) |
Definition at line 998 of file tm4c123fe6pm.h.
#define TIMER0_TBMR_R (*((volatile uint32_t *)0x40030008)) |
Definition at line 988 of file tm4c123fe6pm.h.
#define TIMER0_TBPMR_R (*((volatile uint32_t *)0x40030044)) |
Definition at line 1002 of file tm4c123fe6pm.h.
#define TIMER0_TBPR_R (*((volatile uint32_t *)0x4003003C)) |
Definition at line 1000 of file tm4c123fe6pm.h.
#define TIMER0_TBPS_R (*((volatile uint32_t *)0x40030060)) |
Definition at line 1009 of file tm4c123fe6pm.h.
#define TIMER0_TBPV_R (*((volatile uint32_t *)0x40030068)) |
Definition at line 1011 of file tm4c123fe6pm.h.
#define TIMER0_TBR_R (*((volatile uint32_t *)0x4003004C)) |
Definition at line 1004 of file tm4c123fe6pm.h.
#define TIMER0_TBV_R (*((volatile uint32_t *)0x40030054)) |
Definition at line 1006 of file tm4c123fe6pm.h.
#define TIMER1_CFG_R (*((volatile uint32_t *)0x40031000)) |
Definition at line 1019 of file tm4c123fe6pm.h.
#define TIMER1_CTL_R (*((volatile uint32_t *)0x4003100C)) |
Definition at line 1022 of file tm4c123fe6pm.h.
#define TIMER1_ICR_R (*((volatile uint32_t *)0x40031024)) |
Definition at line 1027 of file tm4c123fe6pm.h.
#define TIMER1_IMR_R (*((volatile uint32_t *)0x40031018)) |
Definition at line 1024 of file tm4c123fe6pm.h.
#define TIMER1_MIS_R (*((volatile uint32_t *)0x40031020)) |
Definition at line 1026 of file tm4c123fe6pm.h.
#define TIMER1_PP_R (*((volatile uint32_t *)0x40031FC0)) |
Definition at line 1045 of file tm4c123fe6pm.h.
#define TIMER1_RIS_R (*((volatile uint32_t *)0x4003101C)) |
Definition at line 1025 of file tm4c123fe6pm.h.
#define TIMER1_RTCPD_R (*((volatile uint32_t *)0x40031058)) |
Definition at line 1040 of file tm4c123fe6pm.h.
#define TIMER1_SYNC_R (*((volatile uint32_t *)0x40031010)) |
Definition at line 1023 of file tm4c123fe6pm.h.
#define TIMER1_TAILR_R (*((volatile uint32_t *)0x40031028)) |
Definition at line 1028 of file tm4c123fe6pm.h.
#define TIMER1_TAMATCHR_R (*((volatile uint32_t *)0x40031030)) |
Definition at line 1030 of file tm4c123fe6pm.h.
#define TIMER1_TAMR_R (*((volatile uint32_t *)0x40031004)) |
Definition at line 1020 of file tm4c123fe6pm.h.
#define TIMER1_TAPMR_R (*((volatile uint32_t *)0x40031040)) |
Definition at line 1034 of file tm4c123fe6pm.h.
#define TIMER1_TAPR_R (*((volatile uint32_t *)0x40031038)) |
Definition at line 1032 of file tm4c123fe6pm.h.
#define TIMER1_TAPS_R (*((volatile uint32_t *)0x4003105C)) |
Definition at line 1041 of file tm4c123fe6pm.h.
#define TIMER1_TAPV_R (*((volatile uint32_t *)0x40031064)) |
Definition at line 1043 of file tm4c123fe6pm.h.
#define TIMER1_TAR_R (*((volatile uint32_t *)0x40031048)) |
Definition at line 1036 of file tm4c123fe6pm.h.
#define TIMER1_TAV_R (*((volatile uint32_t *)0x40031050)) |
Definition at line 1038 of file tm4c123fe6pm.h.
#define TIMER1_TBILR_R (*((volatile uint32_t *)0x4003102C)) |
Definition at line 1029 of file tm4c123fe6pm.h.
#define TIMER1_TBMATCHR_R (*((volatile uint32_t *)0x40031034)) |
Definition at line 1031 of file tm4c123fe6pm.h.
#define TIMER1_TBMR_R (*((volatile uint32_t *)0x40031008)) |
Definition at line 1021 of file tm4c123fe6pm.h.
#define TIMER1_TBPMR_R (*((volatile uint32_t *)0x40031044)) |
Definition at line 1035 of file tm4c123fe6pm.h.
#define TIMER1_TBPR_R (*((volatile uint32_t *)0x4003103C)) |
Definition at line 1033 of file tm4c123fe6pm.h.
#define TIMER1_TBPS_R (*((volatile uint32_t *)0x40031060)) |
Definition at line 1042 of file tm4c123fe6pm.h.
#define TIMER1_TBPV_R (*((volatile uint32_t *)0x40031068)) |
Definition at line 1044 of file tm4c123fe6pm.h.
#define TIMER1_TBR_R (*((volatile uint32_t *)0x4003104C)) |
Definition at line 1037 of file tm4c123fe6pm.h.
#define TIMER1_TBV_R (*((volatile uint32_t *)0x40031054)) |
Definition at line 1039 of file tm4c123fe6pm.h.
#define TIMER2_CFG_R (*((volatile uint32_t *)0x40032000)) |
Definition at line 1052 of file tm4c123fe6pm.h.
#define TIMER2_CTL_R (*((volatile uint32_t *)0x4003200C)) |
Definition at line 1055 of file tm4c123fe6pm.h.
#define TIMER2_ICR_R (*((volatile uint32_t *)0x40032024)) |
Definition at line 1060 of file tm4c123fe6pm.h.
#define TIMER2_IMR_R (*((volatile uint32_t *)0x40032018)) |
Definition at line 1057 of file tm4c123fe6pm.h.
#define TIMER2_MIS_R (*((volatile uint32_t *)0x40032020)) |
Definition at line 1059 of file tm4c123fe6pm.h.
#define TIMER2_PP_R (*((volatile uint32_t *)0x40032FC0)) |
Definition at line 1078 of file tm4c123fe6pm.h.
#define TIMER2_RIS_R (*((volatile uint32_t *)0x4003201C)) |
Definition at line 1058 of file tm4c123fe6pm.h.
#define TIMER2_RTCPD_R (*((volatile uint32_t *)0x40032058)) |
Definition at line 1073 of file tm4c123fe6pm.h.
#define TIMER2_SYNC_R (*((volatile uint32_t *)0x40032010)) |
Definition at line 1056 of file tm4c123fe6pm.h.
#define TIMER2_TAILR_R (*((volatile uint32_t *)0x40032028)) |
Definition at line 1061 of file tm4c123fe6pm.h.
#define TIMER2_TAMATCHR_R (*((volatile uint32_t *)0x40032030)) |
Definition at line 1063 of file tm4c123fe6pm.h.
#define TIMER2_TAMR_R (*((volatile uint32_t *)0x40032004)) |
Definition at line 1053 of file tm4c123fe6pm.h.
#define TIMER2_TAPMR_R (*((volatile uint32_t *)0x40032040)) |
Definition at line 1067 of file tm4c123fe6pm.h.
#define TIMER2_TAPR_R (*((volatile uint32_t *)0x40032038)) |
Definition at line 1065 of file tm4c123fe6pm.h.
#define TIMER2_TAPS_R (*((volatile uint32_t *)0x4003205C)) |
Definition at line 1074 of file tm4c123fe6pm.h.
#define TIMER2_TAPV_R (*((volatile uint32_t *)0x40032064)) |
Definition at line 1076 of file tm4c123fe6pm.h.
#define TIMER2_TAR_R (*((volatile uint32_t *)0x40032048)) |
Definition at line 1069 of file tm4c123fe6pm.h.
#define TIMER2_TAV_R (*((volatile uint32_t *)0x40032050)) |
Definition at line 1071 of file tm4c123fe6pm.h.
#define TIMER2_TBILR_R (*((volatile uint32_t *)0x4003202C)) |
Definition at line 1062 of file tm4c123fe6pm.h.
#define TIMER2_TBMATCHR_R (*((volatile uint32_t *)0x40032034)) |
Definition at line 1064 of file tm4c123fe6pm.h.
#define TIMER2_TBMR_R (*((volatile uint32_t *)0x40032008)) |
Definition at line 1054 of file tm4c123fe6pm.h.
#define TIMER2_TBPMR_R (*((volatile uint32_t *)0x40032044)) |
Definition at line 1068 of file tm4c123fe6pm.h.
#define TIMER2_TBPR_R (*((volatile uint32_t *)0x4003203C)) |
Definition at line 1066 of file tm4c123fe6pm.h.
#define TIMER2_TBPS_R (*((volatile uint32_t *)0x40032060)) |
Definition at line 1075 of file tm4c123fe6pm.h.
#define TIMER2_TBPV_R (*((volatile uint32_t *)0x40032068)) |
Definition at line 1077 of file tm4c123fe6pm.h.
#define TIMER2_TBR_R (*((volatile uint32_t *)0x4003204C)) |
Definition at line 1070 of file tm4c123fe6pm.h.
#define TIMER2_TBV_R (*((volatile uint32_t *)0x40032054)) |
Definition at line 1072 of file tm4c123fe6pm.h.
#define TIMER3_CFG_R (*((volatile uint32_t *)0x40033000)) |
Definition at line 1085 of file tm4c123fe6pm.h.
#define TIMER3_CTL_R (*((volatile uint32_t *)0x4003300C)) |
Definition at line 1088 of file tm4c123fe6pm.h.
#define TIMER3_ICR_R (*((volatile uint32_t *)0x40033024)) |
Definition at line 1093 of file tm4c123fe6pm.h.
#define TIMER3_IMR_R (*((volatile uint32_t *)0x40033018)) |
Definition at line 1090 of file tm4c123fe6pm.h.
#define TIMER3_MIS_R (*((volatile uint32_t *)0x40033020)) |
Definition at line 1092 of file tm4c123fe6pm.h.
#define TIMER3_PP_R (*((volatile uint32_t *)0x40033FC0)) |
Definition at line 1111 of file tm4c123fe6pm.h.
#define TIMER3_RIS_R (*((volatile uint32_t *)0x4003301C)) |
Definition at line 1091 of file tm4c123fe6pm.h.
#define TIMER3_RTCPD_R (*((volatile uint32_t *)0x40033058)) |
Definition at line 1106 of file tm4c123fe6pm.h.
#define TIMER3_SYNC_R (*((volatile uint32_t *)0x40033010)) |
Definition at line 1089 of file tm4c123fe6pm.h.
#define TIMER3_TAILR_R (*((volatile uint32_t *)0x40033028)) |
Definition at line 1094 of file tm4c123fe6pm.h.
#define TIMER3_TAMATCHR_R (*((volatile uint32_t *)0x40033030)) |
Definition at line 1096 of file tm4c123fe6pm.h.
#define TIMER3_TAMR_R (*((volatile uint32_t *)0x40033004)) |
Definition at line 1086 of file tm4c123fe6pm.h.
#define TIMER3_TAPMR_R (*((volatile uint32_t *)0x40033040)) |
Definition at line 1100 of file tm4c123fe6pm.h.
#define TIMER3_TAPR_R (*((volatile uint32_t *)0x40033038)) |
Definition at line 1098 of file tm4c123fe6pm.h.
#define TIMER3_TAPS_R (*((volatile uint32_t *)0x4003305C)) |
Definition at line 1107 of file tm4c123fe6pm.h.
#define TIMER3_TAPV_R (*((volatile uint32_t *)0x40033064)) |
Definition at line 1109 of file tm4c123fe6pm.h.
#define TIMER3_TAR_R (*((volatile uint32_t *)0x40033048)) |
Definition at line 1102 of file tm4c123fe6pm.h.
#define TIMER3_TAV_R (*((volatile uint32_t *)0x40033050)) |
Definition at line 1104 of file tm4c123fe6pm.h.
#define TIMER3_TBILR_R (*((volatile uint32_t *)0x4003302C)) |
Definition at line 1095 of file tm4c123fe6pm.h.
#define TIMER3_TBMATCHR_R (*((volatile uint32_t *)0x40033034)) |
Definition at line 1097 of file tm4c123fe6pm.h.
#define TIMER3_TBMR_R (*((volatile uint32_t *)0x40033008)) |
Definition at line 1087 of file tm4c123fe6pm.h.
#define TIMER3_TBPMR_R (*((volatile uint32_t *)0x40033044)) |
Definition at line 1101 of file tm4c123fe6pm.h.
#define TIMER3_TBPR_R (*((volatile uint32_t *)0x4003303C)) |
Definition at line 1099 of file tm4c123fe6pm.h.
#define TIMER3_TBPS_R (*((volatile uint32_t *)0x40033060)) |
Definition at line 1108 of file tm4c123fe6pm.h.
#define TIMER3_TBPV_R (*((volatile uint32_t *)0x40033068)) |
Definition at line 1110 of file tm4c123fe6pm.h.
#define TIMER3_TBR_R (*((volatile uint32_t *)0x4003304C)) |
Definition at line 1103 of file tm4c123fe6pm.h.
#define TIMER3_TBV_R (*((volatile uint32_t *)0x40033054)) |
Definition at line 1105 of file tm4c123fe6pm.h.
#define TIMER4_CFG_R (*((volatile uint32_t *)0x40034000)) |
Definition at line 1118 of file tm4c123fe6pm.h.
#define TIMER4_CTL_R (*((volatile uint32_t *)0x4003400C)) |
Definition at line 1121 of file tm4c123fe6pm.h.
#define TIMER4_ICR_R (*((volatile uint32_t *)0x40034024)) |
Definition at line 1126 of file tm4c123fe6pm.h.
#define TIMER4_IMR_R (*((volatile uint32_t *)0x40034018)) |
Definition at line 1123 of file tm4c123fe6pm.h.
#define TIMER4_MIS_R (*((volatile uint32_t *)0x40034020)) |
Definition at line 1125 of file tm4c123fe6pm.h.
#define TIMER4_PP_R (*((volatile uint32_t *)0x40034FC0)) |
Definition at line 1144 of file tm4c123fe6pm.h.
#define TIMER4_RIS_R (*((volatile uint32_t *)0x4003401C)) |
Definition at line 1124 of file tm4c123fe6pm.h.
#define TIMER4_RTCPD_R (*((volatile uint32_t *)0x40034058)) |
Definition at line 1139 of file tm4c123fe6pm.h.
#define TIMER4_SYNC_R (*((volatile uint32_t *)0x40034010)) |
Definition at line 1122 of file tm4c123fe6pm.h.
#define TIMER4_TAILR_R (*((volatile uint32_t *)0x40034028)) |
Definition at line 1127 of file tm4c123fe6pm.h.
#define TIMER4_TAMATCHR_R (*((volatile uint32_t *)0x40034030)) |
Definition at line 1129 of file tm4c123fe6pm.h.
#define TIMER4_TAMR_R (*((volatile uint32_t *)0x40034004)) |
Definition at line 1119 of file tm4c123fe6pm.h.
#define TIMER4_TAPMR_R (*((volatile uint32_t *)0x40034040)) |
Definition at line 1133 of file tm4c123fe6pm.h.
#define TIMER4_TAPR_R (*((volatile uint32_t *)0x40034038)) |
Definition at line 1131 of file tm4c123fe6pm.h.
#define TIMER4_TAPS_R (*((volatile uint32_t *)0x4003405C)) |
Definition at line 1140 of file tm4c123fe6pm.h.
#define TIMER4_TAPV_R (*((volatile uint32_t *)0x40034064)) |
Definition at line 1142 of file tm4c123fe6pm.h.
#define TIMER4_TAR_R (*((volatile uint32_t *)0x40034048)) |
Definition at line 1135 of file tm4c123fe6pm.h.
#define TIMER4_TAV_R (*((volatile uint32_t *)0x40034050)) |
Definition at line 1137 of file tm4c123fe6pm.h.
#define TIMER4_TBILR_R (*((volatile uint32_t *)0x4003402C)) |
Definition at line 1128 of file tm4c123fe6pm.h.
#define TIMER4_TBMATCHR_R (*((volatile uint32_t *)0x40034034)) |
Definition at line 1130 of file tm4c123fe6pm.h.
#define TIMER4_TBMR_R (*((volatile uint32_t *)0x40034008)) |
Definition at line 1120 of file tm4c123fe6pm.h.
#define TIMER4_TBPMR_R (*((volatile uint32_t *)0x40034044)) |
Definition at line 1134 of file tm4c123fe6pm.h.
#define TIMER4_TBPR_R (*((volatile uint32_t *)0x4003403C)) |
Definition at line 1132 of file tm4c123fe6pm.h.
#define TIMER4_TBPS_R (*((volatile uint32_t *)0x40034060)) |
Definition at line 1141 of file tm4c123fe6pm.h.
#define TIMER4_TBPV_R (*((volatile uint32_t *)0x40034068)) |
Definition at line 1143 of file tm4c123fe6pm.h.
#define TIMER4_TBR_R (*((volatile uint32_t *)0x4003404C)) |
Definition at line 1136 of file tm4c123fe6pm.h.
#define TIMER4_TBV_R (*((volatile uint32_t *)0x40034054)) |
Definition at line 1138 of file tm4c123fe6pm.h.
#define TIMER5_CFG_R (*((volatile uint32_t *)0x40035000)) |
Definition at line 1151 of file tm4c123fe6pm.h.
#define TIMER5_CTL_R (*((volatile uint32_t *)0x4003500C)) |
Definition at line 1154 of file tm4c123fe6pm.h.
#define TIMER5_ICR_R (*((volatile uint32_t *)0x40035024)) |
Definition at line 1159 of file tm4c123fe6pm.h.
#define TIMER5_IMR_R (*((volatile uint32_t *)0x40035018)) |
Definition at line 1156 of file tm4c123fe6pm.h.
#define TIMER5_MIS_R (*((volatile uint32_t *)0x40035020)) |
Definition at line 1158 of file tm4c123fe6pm.h.
#define TIMER5_PP_R (*((volatile uint32_t *)0x40035FC0)) |
Definition at line 1177 of file tm4c123fe6pm.h.
#define TIMER5_RIS_R (*((volatile uint32_t *)0x4003501C)) |
Definition at line 1157 of file tm4c123fe6pm.h.
#define TIMER5_RTCPD_R (*((volatile uint32_t *)0x40035058)) |
Definition at line 1172 of file tm4c123fe6pm.h.
#define TIMER5_SYNC_R (*((volatile uint32_t *)0x40035010)) |
Definition at line 1155 of file tm4c123fe6pm.h.
#define TIMER5_TAILR_R (*((volatile uint32_t *)0x40035028)) |
Definition at line 1160 of file tm4c123fe6pm.h.
#define TIMER5_TAMATCHR_R (*((volatile uint32_t *)0x40035030)) |
Definition at line 1162 of file tm4c123fe6pm.h.
#define TIMER5_TAMR_R (*((volatile uint32_t *)0x40035004)) |
Definition at line 1152 of file tm4c123fe6pm.h.
#define TIMER5_TAPMR_R (*((volatile uint32_t *)0x40035040)) |
Definition at line 1166 of file tm4c123fe6pm.h.
#define TIMER5_TAPR_R (*((volatile uint32_t *)0x40035038)) |
Definition at line 1164 of file tm4c123fe6pm.h.
#define TIMER5_TAPS_R (*((volatile uint32_t *)0x4003505C)) |
Definition at line 1173 of file tm4c123fe6pm.h.
#define TIMER5_TAPV_R (*((volatile uint32_t *)0x40035064)) |
Definition at line 1175 of file tm4c123fe6pm.h.
#define TIMER5_TAR_R (*((volatile uint32_t *)0x40035048)) |
Definition at line 1168 of file tm4c123fe6pm.h.
#define TIMER5_TAV_R (*((volatile uint32_t *)0x40035050)) |
Definition at line 1170 of file tm4c123fe6pm.h.
#define TIMER5_TBILR_R (*((volatile uint32_t *)0x4003502C)) |
Definition at line 1161 of file tm4c123fe6pm.h.
#define TIMER5_TBMATCHR_R (*((volatile uint32_t *)0x40035034)) |
Definition at line 1163 of file tm4c123fe6pm.h.
#define TIMER5_TBMR_R (*((volatile uint32_t *)0x40035008)) |
Definition at line 1153 of file tm4c123fe6pm.h.
#define TIMER5_TBPMR_R (*((volatile uint32_t *)0x40035044)) |
Definition at line 1167 of file tm4c123fe6pm.h.
#define TIMER5_TBPR_R (*((volatile uint32_t *)0x4003503C)) |
Definition at line 1165 of file tm4c123fe6pm.h.
#define TIMER5_TBPS_R (*((volatile uint32_t *)0x40035060)) |
Definition at line 1174 of file tm4c123fe6pm.h.
#define TIMER5_TBPV_R (*((volatile uint32_t *)0x40035068)) |
Definition at line 1176 of file tm4c123fe6pm.h.
#define TIMER5_TBR_R (*((volatile uint32_t *)0x4003504C)) |
Definition at line 1169 of file tm4c123fe6pm.h.
#define TIMER5_TBV_R (*((volatile uint32_t *)0x40035054)) |
Definition at line 1171 of file tm4c123fe6pm.h.
#define TIMER_CFG_16_BIT 0x00000004 |
Definition at line 4934 of file tm4c123fe6pm.h.
#define TIMER_CFG_32_BIT_RTC 0x00000001 |
Definition at line 4930 of file tm4c123fe6pm.h.
#define TIMER_CFG_32_BIT_TIMER 0x00000000 |
Definition at line 4927 of file tm4c123fe6pm.h.
#define TIMER_CFG_M 0x00000007 |
Definition at line 4926 of file tm4c123fe6pm.h.
#define TIMER_CTL_RTCEN 0x00000010 |
Definition at line 5005 of file tm4c123fe6pm.h.
#define TIMER_CTL_TAEN 0x00000001 |
Definition at line 5011 of file tm4c123fe6pm.h.
#define TIMER_CTL_TAEVENT_BOTH 0x0000000C |
Definition at line 5009 of file tm4c123fe6pm.h.
#define TIMER_CTL_TAEVENT_M 0x0000000C |
Definition at line 5006 of file tm4c123fe6pm.h.
#define TIMER_CTL_TAEVENT_NEG 0x00000004 |
Definition at line 5008 of file tm4c123fe6pm.h.
#define TIMER_CTL_TAEVENT_POS 0x00000000 |
Definition at line 5007 of file tm4c123fe6pm.h.
#define TIMER_CTL_TAOTE 0x00000020 |
Definition at line 5003 of file tm4c123fe6pm.h.
#define TIMER_CTL_TAPWML 0x00000040 |
Definition at line 5002 of file tm4c123fe6pm.h.
#define TIMER_CTL_TASTALL 0x00000002 |
Definition at line 5010 of file tm4c123fe6pm.h.
#define TIMER_CTL_TBEN 0x00000100 |
Definition at line 5001 of file tm4c123fe6pm.h.
#define TIMER_CTL_TBEVENT_BOTH 0x00000C00 |
Definition at line 4999 of file tm4c123fe6pm.h.
#define TIMER_CTL_TBEVENT_M 0x00000C00 |
Definition at line 4996 of file tm4c123fe6pm.h.
#define TIMER_CTL_TBEVENT_NEG 0x00000400 |
Definition at line 4998 of file tm4c123fe6pm.h.
#define TIMER_CTL_TBEVENT_POS 0x00000000 |
Definition at line 4997 of file tm4c123fe6pm.h.
#define TIMER_CTL_TBOTE 0x00002000 |
Definition at line 4994 of file tm4c123fe6pm.h.
#define TIMER_CTL_TBPWML 0x00004000 |
Definition at line 4993 of file tm4c123fe6pm.h.
#define TIMER_CTL_TBSTALL 0x00000200 |
Definition at line 5000 of file tm4c123fe6pm.h.
#define TIMER_ICR_CAECINT 0x00000004 |
Definition at line 5242 of file tm4c123fe6pm.h.
#define TIMER_ICR_CAMCINT 0x00000002 |
Definition at line 5244 of file tm4c123fe6pm.h.
#define TIMER_ICR_CBECINT 0x00000400 |
Definition at line 5233 of file tm4c123fe6pm.h.
#define TIMER_ICR_CBMCINT 0x00000200 |
Definition at line 5235 of file tm4c123fe6pm.h.
#define TIMER_ICR_RTCCINT 0x00000008 |
Definition at line 5241 of file tm4c123fe6pm.h.
#define TIMER_ICR_TAMCINT 0x00000010 |
Definition at line 5239 of file tm4c123fe6pm.h.
#define TIMER_ICR_TATOCINT 0x00000001 |
Definition at line 5246 of file tm4c123fe6pm.h.
#define TIMER_ICR_TBMCINT 0x00000800 |
Definition at line 5231 of file tm4c123fe6pm.h.
#define TIMER_ICR_TBTOCINT 0x00000100 |
Definition at line 5237 of file tm4c123fe6pm.h.
#define TIMER_ICR_WUECINT 0x00010000 |
Definition at line 5229 of file tm4c123fe6pm.h.
#define TIMER_IMR_CAEIM 0x00000004 |
Definition at line 5169 of file tm4c123fe6pm.h.
#define TIMER_IMR_CAMIM 0x00000002 |
Definition at line 5171 of file tm4c123fe6pm.h.
#define TIMER_IMR_CBEIM 0x00000400 |
Definition at line 5160 of file tm4c123fe6pm.h.
#define TIMER_IMR_CBMIM 0x00000200 |
Definition at line 5162 of file tm4c123fe6pm.h.
#define TIMER_IMR_RTCIM 0x00000008 |
Definition at line 5168 of file tm4c123fe6pm.h.
#define TIMER_IMR_TAMIM 0x00000010 |
Definition at line 5166 of file tm4c123fe6pm.h.
#define TIMER_IMR_TATOIM 0x00000001 |
Definition at line 5173 of file tm4c123fe6pm.h.
#define TIMER_IMR_TBMIM 0x00000800 |
Definition at line 5158 of file tm4c123fe6pm.h.
#define TIMER_IMR_TBTOIM 0x00000100 |
Definition at line 5164 of file tm4c123fe6pm.h.
#define TIMER_IMR_WUEIM 0x00010000 |
Definition at line 5156 of file tm4c123fe6pm.h.
#define TIMER_MIS_CAEMIS 0x00000004 |
Definition at line 5217 of file tm4c123fe6pm.h.
#define TIMER_MIS_CAMMIS 0x00000002 |
Definition at line 5219 of file tm4c123fe6pm.h.
#define TIMER_MIS_CBEMIS 0x00000400 |
Definition at line 5208 of file tm4c123fe6pm.h.
#define TIMER_MIS_CBMMIS 0x00000200 |
Definition at line 5210 of file tm4c123fe6pm.h.
#define TIMER_MIS_RTCMIS 0x00000008 |
Definition at line 5216 of file tm4c123fe6pm.h.
#define TIMER_MIS_TAMMIS 0x00000010 |
Definition at line 5214 of file tm4c123fe6pm.h.
#define TIMER_MIS_TATOMIS 0x00000001 |
Definition at line 5221 of file tm4c123fe6pm.h.
#define TIMER_MIS_TBMMIS 0x00000800 |
Definition at line 5206 of file tm4c123fe6pm.h.
#define TIMER_MIS_TBTOMIS 0x00000100 |
Definition at line 5212 of file tm4c123fe6pm.h.
#define TIMER_MIS_WUEMIS 0x00010000 |
Definition at line 5204 of file tm4c123fe6pm.h.
#define TIMER_PP_SIZE_16 0x00000000 |
Definition at line 5405 of file tm4c123fe6pm.h.
#define TIMER_PP_SIZE_32 0x00000001 |
Definition at line 5408 of file tm4c123fe6pm.h.
#define TIMER_PP_SIZE_M 0x0000000F |
Definition at line 5404 of file tm4c123fe6pm.h.
#define TIMER_RIS_CAERIS 0x00000004 |
Definition at line 5192 of file tm4c123fe6pm.h.
#define TIMER_RIS_CAMRIS 0x00000002 |
Definition at line 5194 of file tm4c123fe6pm.h.
#define TIMER_RIS_CBERIS 0x00000400 |
Definition at line 5184 of file tm4c123fe6pm.h.
#define TIMER_RIS_CBMRIS 0x00000200 |
Definition at line 5186 of file tm4c123fe6pm.h.
#define TIMER_RIS_RTCRIS 0x00000008 |
Definition at line 5191 of file tm4c123fe6pm.h.
#define TIMER_RIS_TAMRIS 0x00000010 |
Definition at line 5190 of file tm4c123fe6pm.h.
#define TIMER_RIS_TATORIS 0x00000001 |
Definition at line 5196 of file tm4c123fe6pm.h.
#define TIMER_RIS_TBMRIS 0x00000800 |
Definition at line 5183 of file tm4c123fe6pm.h.
#define TIMER_RIS_TBTORIS 0x00000100 |
Definition at line 5188 of file tm4c123fe6pm.h.
#define TIMER_RIS_WUERIS 0x00010000 |
Definition at line 5181 of file tm4c123fe6pm.h.
#define TIMER_RTCPD_RTCPD_M 0x0000FFFF |
Definition at line 5364 of file tm4c123fe6pm.h.
#define TIMER_RTCPD_RTCPD_S 0 |
Definition at line 5365 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCT0_M 0x00000003 |
Definition at line 5141 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCT0_NONE 0x00000000 |
Definition at line 5142 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCT0_TA 0x00000001 |
Definition at line 5143 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCT0_TATB 0x00000003 |
Definition at line 5147 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCT0_TB 0x00000002 |
Definition at line 5145 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCT1_M 0x0000000C |
Definition at line 5132 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCT1_NONE 0x00000000 |
Definition at line 5133 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCT1_TA 0x00000004 |
Definition at line 5134 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCT1_TATB 0x0000000C |
Definition at line 5138 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCT1_TB 0x00000008 |
Definition at line 5136 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCT2_M 0x00000030 |
Definition at line 5123 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCT2_NONE 0x00000000 |
Definition at line 5124 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCT2_TA 0x00000010 |
Definition at line 5125 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCT2_TATB 0x00000030 |
Definition at line 5129 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCT2_TB 0x00000020 |
Definition at line 5127 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCT3_M 0x000000C0 |
Definition at line 5114 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCT3_NONE 0x00000000 |
Definition at line 5115 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCT3_TA 0x00000040 |
Definition at line 5116 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCT3_TATB 0x000000C0 |
Definition at line 5120 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCT3_TB 0x00000080 |
Definition at line 5118 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCT4_M 0x00000300 |
Definition at line 5105 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCT4_NONE 0x00000000 |
Definition at line 5106 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCT4_TA 0x00000100 |
Definition at line 5107 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCT4_TATB 0x00000300 |
Definition at line 5111 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCT4_TB 0x00000200 |
Definition at line 5109 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCT5_M 0x00000C00 |
Definition at line 5096 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCT5_NONE 0x00000000 |
Definition at line 5097 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCT5_TA 0x00000400 |
Definition at line 5098 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCT5_TATB 0x00000C00 |
Definition at line 5102 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCT5_TB 0x00000800 |
Definition at line 5100 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCWT0_M 0x00003000 |
Definition at line 5083 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCWT0_NONE 0x00000000 |
Definition at line 5085 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCWT0_TA 0x00001000 |
Definition at line 5087 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCWT0_TATB 0x00003000 |
Definition at line 5093 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCWT0_TB 0x00002000 |
Definition at line 5090 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCWT1_M 0x0000C000 |
Definition at line 5070 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCWT1_NONE 0x00000000 |
Definition at line 5072 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCWT1_TA 0x00004000 |
Definition at line 5074 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCWT1_TATB 0x0000C000 |
Definition at line 5080 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCWT1_TB 0x00008000 |
Definition at line 5077 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCWT2_M 0x00030000 |
Definition at line 5057 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCWT2_NONE 0x00000000 |
Definition at line 5059 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCWT2_TA 0x00010000 |
Definition at line 5061 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCWT2_TATB 0x00030000 |
Definition at line 5067 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCWT2_TB 0x00020000 |
Definition at line 5064 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCWT3_M 0x000C0000 |
Definition at line 5044 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCWT3_NONE 0x00000000 |
Definition at line 5046 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCWT3_TA 0x00040000 |
Definition at line 5048 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCWT3_TATB 0x000C0000 |
Definition at line 5054 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCWT3_TB 0x00080000 |
Definition at line 5051 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCWT4_M 0x00300000 |
Definition at line 5031 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCWT4_NONE 0x00000000 |
Definition at line 5033 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCWT4_TA 0x00100000 |
Definition at line 5035 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCWT4_TATB 0x00300000 |
Definition at line 5041 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCWT4_TB 0x00200000 |
Definition at line 5038 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCWT5_M 0x00C00000 |
Definition at line 5018 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCWT5_NONE 0x00000000 |
Definition at line 5020 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCWT5_TA 0x00400000 |
Definition at line 5022 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCWT5_TATB 0x00C00000 |
Definition at line 5028 of file tm4c123fe6pm.h.
#define TIMER_SYNC_SYNCWT5_TB 0x00800000 |
Definition at line 5025 of file tm4c123fe6pm.h.
#define TIMER_TAILR_M 0xFFFFFFFF |
Definition at line 5254 of file tm4c123fe6pm.h.
#define TIMER_TAILR_S 0 |
Definition at line 5256 of file tm4c123fe6pm.h.
#define TIMER_TAMATCHR_TAMR_M 0xFFFFFFFF |
Definition at line 5273 of file tm4c123fe6pm.h.
#define TIMER_TAMATCHR_TAMR_S 0 |
Definition at line 5274 of file tm4c123fe6pm.h.
#define TIMER_TAMR_TAAMS 0x00000008 |
Definition at line 4955 of file tm4c123fe6pm.h.
#define TIMER_TAMR_TACDIR 0x00000010 |
Definition at line 4954 of file tm4c123fe6pm.h.
#define TIMER_TAMR_TACMR 0x00000004 |
Definition at line 4957 of file tm4c123fe6pm.h.
#define TIMER_TAMR_TAILD 0x00000100 |
Definition at line 4949 of file tm4c123fe6pm.h.
#define TIMER_TAMR_TAMIE 0x00000020 |
Definition at line 4952 of file tm4c123fe6pm.h.
#define TIMER_TAMR_TAMR_1_SHOT 0x00000001 |
Definition at line 4959 of file tm4c123fe6pm.h.
#define TIMER_TAMR_TAMR_CAP 0x00000003 |
Definition at line 4961 of file tm4c123fe6pm.h.
#define TIMER_TAMR_TAMR_M 0x00000003 |
Definition at line 4958 of file tm4c123fe6pm.h.
#define TIMER_TAMR_TAMR_PERIOD 0x00000002 |
Definition at line 4960 of file tm4c123fe6pm.h.
#define TIMER_TAMR_TAMRSU 0x00000400 |
Definition at line 4945 of file tm4c123fe6pm.h.
#define TIMER_TAMR_TAPLO 0x00000800 |
Definition at line 4943 of file tm4c123fe6pm.h.
#define TIMER_TAMR_TAPWMIE 0x00000200 |
Definition at line 4947 of file tm4c123fe6pm.h.
#define TIMER_TAMR_TASNAPS 0x00000080 |
Definition at line 4950 of file tm4c123fe6pm.h.
#define TIMER_TAMR_TAWOT 0x00000040 |
Definition at line 4951 of file tm4c123fe6pm.h.
#define TIMER_TAPMR_TAPSMR_M 0x000000FF |
Definition at line 5312 of file tm4c123fe6pm.h.
#define TIMER_TAPMR_TAPSMR_S 0 |
Definition at line 5314 of file tm4c123fe6pm.h.
#define TIMER_TAPMR_TAPSMRH_M 0x0000FF00 |
Definition at line 5310 of file tm4c123fe6pm.h.
#define TIMER_TAPMR_TAPSMRH_S 8 |
Definition at line 5313 of file tm4c123fe6pm.h.
#define TIMER_TAPR_TAPSR_M 0x000000FF |
Definition at line 5291 of file tm4c123fe6pm.h.
#define TIMER_TAPR_TAPSR_S 0 |
Definition at line 5293 of file tm4c123fe6pm.h.
#define TIMER_TAPR_TAPSRH_M 0x0000FF00 |
Definition at line 5290 of file tm4c123fe6pm.h.
#define TIMER_TAPR_TAPSRH_S 8 |
Definition at line 5292 of file tm4c123fe6pm.h.
#define TIMER_TAPS_PSS_M 0x0000FFFF |
Definition at line 5372 of file tm4c123fe6pm.h.
#define TIMER_TAPS_PSS_S 0 |
Definition at line 5373 of file tm4c123fe6pm.h.
#define TIMER_TAPV_PSV_M 0x0000FFFF |
Definition at line 5388 of file tm4c123fe6pm.h.
#define TIMER_TAPV_PSV_S 0 |
Definition at line 5389 of file tm4c123fe6pm.h.
#define TIMER_TAR_M 0xFFFFFFFF |
Definition at line 5332 of file tm4c123fe6pm.h.
#define TIMER_TAR_S 0 |
Definition at line 5333 of file tm4c123fe6pm.h.
#define TIMER_TAV_M 0xFFFFFFFF |
Definition at line 5348 of file tm4c123fe6pm.h.
#define TIMER_TAV_S 0 |
Definition at line 5349 of file tm4c123fe6pm.h.
#define TIMER_TBILR_M 0xFFFFFFFF |
Definition at line 5263 of file tm4c123fe6pm.h.
#define TIMER_TBILR_S 0 |
Definition at line 5265 of file tm4c123fe6pm.h.
#define TIMER_TBMATCHR_TBMR_M 0xFFFFFFFF |
Definition at line 5282 of file tm4c123fe6pm.h.
#define TIMER_TBMATCHR_TBMR_S 0 |
Definition at line 5283 of file tm4c123fe6pm.h.
#define TIMER_TBMR_TBAMS 0x00000008 |
Definition at line 4980 of file tm4c123fe6pm.h.
#define TIMER_TBMR_TBCDIR 0x00000010 |
Definition at line 4979 of file tm4c123fe6pm.h.
#define TIMER_TBMR_TBCMR 0x00000004 |
Definition at line 4982 of file tm4c123fe6pm.h.
#define TIMER_TBMR_TBILD 0x00000100 |
Definition at line 4974 of file tm4c123fe6pm.h.
#define TIMER_TBMR_TBMIE 0x00000020 |
Definition at line 4977 of file tm4c123fe6pm.h.
#define TIMER_TBMR_TBMR_1_SHOT 0x00000001 |
Definition at line 4984 of file tm4c123fe6pm.h.
#define TIMER_TBMR_TBMR_CAP 0x00000003 |
Definition at line 4986 of file tm4c123fe6pm.h.
#define TIMER_TBMR_TBMR_M 0x00000003 |
Definition at line 4983 of file tm4c123fe6pm.h.
#define TIMER_TBMR_TBMR_PERIOD 0x00000002 |
Definition at line 4985 of file tm4c123fe6pm.h.
#define TIMER_TBMR_TBMRSU 0x00000400 |
Definition at line 4970 of file tm4c123fe6pm.h.
#define TIMER_TBMR_TBPLO 0x00000800 |
Definition at line 4968 of file tm4c123fe6pm.h.
#define TIMER_TBMR_TBPWMIE 0x00000200 |
Definition at line 4972 of file tm4c123fe6pm.h.
#define TIMER_TBMR_TBSNAPS 0x00000080 |
Definition at line 4975 of file tm4c123fe6pm.h.
#define TIMER_TBMR_TBWOT 0x00000040 |
Definition at line 4976 of file tm4c123fe6pm.h.
#define TIMER_TBPMR_TBPSMR_M 0x000000FF |
Definition at line 5323 of file tm4c123fe6pm.h.
#define TIMER_TBPMR_TBPSMR_S 0 |
Definition at line 5325 of file tm4c123fe6pm.h.
#define TIMER_TBPMR_TBPSMRH_M 0x0000FF00 |
Definition at line 5321 of file tm4c123fe6pm.h.
#define TIMER_TBPMR_TBPSMRH_S 8 |
Definition at line 5324 of file tm4c123fe6pm.h.
#define TIMER_TBPR_TBPSR_M 0x000000FF |
Definition at line 5301 of file tm4c123fe6pm.h.
#define TIMER_TBPR_TBPSR_S 0 |
Definition at line 5303 of file tm4c123fe6pm.h.
#define TIMER_TBPR_TBPSRH_M 0x0000FF00 |
Definition at line 5300 of file tm4c123fe6pm.h.
#define TIMER_TBPR_TBPSRH_S 8 |
Definition at line 5302 of file tm4c123fe6pm.h.
#define TIMER_TBPS_PSS_M 0x0000FFFF |
Definition at line 5380 of file tm4c123fe6pm.h.
#define TIMER_TBPS_PSS_S 0 |
Definition at line 5381 of file tm4c123fe6pm.h.
#define TIMER_TBPV_PSV_M 0x0000FFFF |
Definition at line 5396 of file tm4c123fe6pm.h.
#define TIMER_TBPV_PSV_S 0 |
Definition at line 5397 of file tm4c123fe6pm.h.
#define TIMER_TBR_M 0xFFFFFFFF |
Definition at line 5340 of file tm4c123fe6pm.h.
#define TIMER_TBR_S 0 |
Definition at line 5341 of file tm4c123fe6pm.h.
#define TIMER_TBV_M 0xFFFFFFFF |
Definition at line 5356 of file tm4c123fe6pm.h.
#define TIMER_TBV_S 0 |
Definition at line 5357 of file tm4c123fe6pm.h.
#define UART0_9BITADDR_R (*((volatile uint32_t *)0x4000C0A4)) |
Definition at line 370 of file tm4c123fe6pm.h.
#define UART0_9BITAMASK_R (*((volatile uint32_t *)0x4000C0A8)) |
Definition at line 371 of file tm4c123fe6pm.h.
#define UART0_CC_R (*((volatile uint32_t *)0x4000CFC8)) |
Definition at line 373 of file tm4c123fe6pm.h.
#define UART0_CTL_R (*((volatile uint32_t *)0x4000C030)) |
Definition at line 363 of file tm4c123fe6pm.h.
#define UART0_DMACTL_R (*((volatile uint32_t *)0x4000C048)) |
Definition at line 369 of file tm4c123fe6pm.h.
#define UART0_DR_R (*((volatile uint32_t *)0x4000C000)) |
Definition at line 355 of file tm4c123fe6pm.h.
#define UART0_ECR_R (*((volatile uint32_t *)0x4000C004)) |
Definition at line 357 of file tm4c123fe6pm.h.
#define UART0_FBRD_R (*((volatile uint32_t *)0x4000C028)) |
Definition at line 361 of file tm4c123fe6pm.h.
#define UART0_FR_R (*((volatile uint32_t *)0x4000C018)) |
Definition at line 358 of file tm4c123fe6pm.h.
#define UART0_IBRD_R (*((volatile uint32_t *)0x4000C024)) |
Definition at line 360 of file tm4c123fe6pm.h.
#define UART0_ICR_R (*((volatile uint32_t *)0x4000C044)) |
Definition at line 368 of file tm4c123fe6pm.h.
#define UART0_IFLS_R (*((volatile uint32_t *)0x4000C034)) |
Definition at line 364 of file tm4c123fe6pm.h.
#define UART0_ILPR_R (*((volatile uint32_t *)0x4000C020)) |
Definition at line 359 of file tm4c123fe6pm.h.
#define UART0_IM_R (*((volatile uint32_t *)0x4000C038)) |
Definition at line 365 of file tm4c123fe6pm.h.
#define UART0_LCRH_R (*((volatile uint32_t *)0x4000C02C)) |
Definition at line 362 of file tm4c123fe6pm.h.
#define UART0_MIS_R (*((volatile uint32_t *)0x4000C040)) |
Definition at line 367 of file tm4c123fe6pm.h.
#define UART0_PP_R (*((volatile uint32_t *)0x4000CFC0)) |
Definition at line 372 of file tm4c123fe6pm.h.
#define UART0_RIS_R (*((volatile uint32_t *)0x4000C03C)) |
Definition at line 366 of file tm4c123fe6pm.h.
#define UART0_RSR_R (*((volatile uint32_t *)0x4000C004)) |
Definition at line 356 of file tm4c123fe6pm.h.
#define UART1_9BITADDR_R (*((volatile uint32_t *)0x4000D0A4)) |
Definition at line 395 of file tm4c123fe6pm.h.
#define UART1_9BITAMASK_R (*((volatile uint32_t *)0x4000D0A8)) |
Definition at line 396 of file tm4c123fe6pm.h.
#define UART1_CC_R (*((volatile uint32_t *)0x4000DFC8)) |
Definition at line 398 of file tm4c123fe6pm.h.
#define UART1_CTL_R (*((volatile uint32_t *)0x4000D030)) |
Definition at line 388 of file tm4c123fe6pm.h.
#define UART1_DMACTL_R (*((volatile uint32_t *)0x4000D048)) |
Definition at line 394 of file tm4c123fe6pm.h.
#define UART1_DR_R (*((volatile uint32_t *)0x4000D000)) |
Definition at line 380 of file tm4c123fe6pm.h.
#define UART1_ECR_R (*((volatile uint32_t *)0x4000D004)) |
Definition at line 382 of file tm4c123fe6pm.h.
#define UART1_FBRD_R (*((volatile uint32_t *)0x4000D028)) |
Definition at line 386 of file tm4c123fe6pm.h.
#define UART1_FR_R (*((volatile uint32_t *)0x4000D018)) |
Definition at line 383 of file tm4c123fe6pm.h.
#define UART1_IBRD_R (*((volatile uint32_t *)0x4000D024)) |
Definition at line 385 of file tm4c123fe6pm.h.
#define UART1_ICR_R (*((volatile uint32_t *)0x4000D044)) |
Definition at line 393 of file tm4c123fe6pm.h.
#define UART1_IFLS_R (*((volatile uint32_t *)0x4000D034)) |
Definition at line 389 of file tm4c123fe6pm.h.
#define UART1_ILPR_R (*((volatile uint32_t *)0x4000D020)) |
Definition at line 384 of file tm4c123fe6pm.h.
#define UART1_IM_R (*((volatile uint32_t *)0x4000D038)) |
Definition at line 390 of file tm4c123fe6pm.h.
#define UART1_LCRH_R (*((volatile uint32_t *)0x4000D02C)) |
Definition at line 387 of file tm4c123fe6pm.h.
#define UART1_MIS_R (*((volatile uint32_t *)0x4000D040)) |
Definition at line 392 of file tm4c123fe6pm.h.
#define UART1_PP_R (*((volatile uint32_t *)0x4000DFC0)) |
Definition at line 397 of file tm4c123fe6pm.h.
#define UART1_RIS_R (*((volatile uint32_t *)0x4000D03C)) |
Definition at line 391 of file tm4c123fe6pm.h.
#define UART1_RSR_R (*((volatile uint32_t *)0x4000D004)) |
Definition at line 381 of file tm4c123fe6pm.h.
#define UART2_9BITADDR_R (*((volatile uint32_t *)0x4000E0A4)) |
Definition at line 420 of file tm4c123fe6pm.h.
#define UART2_9BITAMASK_R (*((volatile uint32_t *)0x4000E0A8)) |
Definition at line 421 of file tm4c123fe6pm.h.
#define UART2_CC_R (*((volatile uint32_t *)0x4000EFC8)) |
Definition at line 423 of file tm4c123fe6pm.h.
#define UART2_CTL_R (*((volatile uint32_t *)0x4000E030)) |
Definition at line 413 of file tm4c123fe6pm.h.
#define UART2_DMACTL_R (*((volatile uint32_t *)0x4000E048)) |
Definition at line 419 of file tm4c123fe6pm.h.
#define UART2_DR_R (*((volatile uint32_t *)0x4000E000)) |
Definition at line 405 of file tm4c123fe6pm.h.
#define UART2_ECR_R (*((volatile uint32_t *)0x4000E004)) |
Definition at line 407 of file tm4c123fe6pm.h.
#define UART2_FBRD_R (*((volatile uint32_t *)0x4000E028)) |
Definition at line 411 of file tm4c123fe6pm.h.
#define UART2_FR_R (*((volatile uint32_t *)0x4000E018)) |
Definition at line 408 of file tm4c123fe6pm.h.
#define UART2_IBRD_R (*((volatile uint32_t *)0x4000E024)) |
Definition at line 410 of file tm4c123fe6pm.h.
#define UART2_ICR_R (*((volatile uint32_t *)0x4000E044)) |
Definition at line 418 of file tm4c123fe6pm.h.
#define UART2_IFLS_R (*((volatile uint32_t *)0x4000E034)) |
Definition at line 414 of file tm4c123fe6pm.h.
#define UART2_ILPR_R (*((volatile uint32_t *)0x4000E020)) |
Definition at line 409 of file tm4c123fe6pm.h.
#define UART2_IM_R (*((volatile uint32_t *)0x4000E038)) |
Definition at line 415 of file tm4c123fe6pm.h.
#define UART2_LCRH_R (*((volatile uint32_t *)0x4000E02C)) |
Definition at line 412 of file tm4c123fe6pm.h.
#define UART2_MIS_R (*((volatile uint32_t *)0x4000E040)) |
Definition at line 417 of file tm4c123fe6pm.h.
#define UART2_PP_R (*((volatile uint32_t *)0x4000EFC0)) |
Definition at line 422 of file tm4c123fe6pm.h.
#define UART2_RIS_R (*((volatile uint32_t *)0x4000E03C)) |
Definition at line 416 of file tm4c123fe6pm.h.
#define UART2_RSR_R (*((volatile uint32_t *)0x4000E004)) |
Definition at line 406 of file tm4c123fe6pm.h.
#define UART3_9BITADDR_R (*((volatile uint32_t *)0x4000F0A4)) |
Definition at line 445 of file tm4c123fe6pm.h.
#define UART3_9BITAMASK_R (*((volatile uint32_t *)0x4000F0A8)) |
Definition at line 446 of file tm4c123fe6pm.h.
#define UART3_CC_R (*((volatile uint32_t *)0x4000FFC8)) |
Definition at line 448 of file tm4c123fe6pm.h.
#define UART3_CTL_R (*((volatile uint32_t *)0x4000F030)) |
Definition at line 438 of file tm4c123fe6pm.h.
#define UART3_DMACTL_R (*((volatile uint32_t *)0x4000F048)) |
Definition at line 444 of file tm4c123fe6pm.h.
#define UART3_DR_R (*((volatile uint32_t *)0x4000F000)) |
Definition at line 430 of file tm4c123fe6pm.h.
#define UART3_ECR_R (*((volatile uint32_t *)0x4000F004)) |
Definition at line 432 of file tm4c123fe6pm.h.
#define UART3_FBRD_R (*((volatile uint32_t *)0x4000F028)) |
Definition at line 436 of file tm4c123fe6pm.h.
#define UART3_FR_R (*((volatile uint32_t *)0x4000F018)) |
Definition at line 433 of file tm4c123fe6pm.h.
#define UART3_IBRD_R (*((volatile uint32_t *)0x4000F024)) |
Definition at line 435 of file tm4c123fe6pm.h.
#define UART3_ICR_R (*((volatile uint32_t *)0x4000F044)) |
Definition at line 443 of file tm4c123fe6pm.h.
#define UART3_IFLS_R (*((volatile uint32_t *)0x4000F034)) |
Definition at line 439 of file tm4c123fe6pm.h.
#define UART3_ILPR_R (*((volatile uint32_t *)0x4000F020)) |
Definition at line 434 of file tm4c123fe6pm.h.
#define UART3_IM_R (*((volatile uint32_t *)0x4000F038)) |
Definition at line 440 of file tm4c123fe6pm.h.
#define UART3_LCRH_R (*((volatile uint32_t *)0x4000F02C)) |
Definition at line 437 of file tm4c123fe6pm.h.
#define UART3_MIS_R (*((volatile uint32_t *)0x4000F040)) |
Definition at line 442 of file tm4c123fe6pm.h.
#define UART3_PP_R (*((volatile uint32_t *)0x4000FFC0)) |
Definition at line 447 of file tm4c123fe6pm.h.
#define UART3_RIS_R (*((volatile uint32_t *)0x4000F03C)) |
Definition at line 441 of file tm4c123fe6pm.h.
#define UART3_RSR_R (*((volatile uint32_t *)0x4000F004)) |
Definition at line 431 of file tm4c123fe6pm.h.
#define UART4_9BITADDR_R (*((volatile uint32_t *)0x400100A4)) |
Definition at line 470 of file tm4c123fe6pm.h.
#define UART4_9BITAMASK_R (*((volatile uint32_t *)0x400100A8)) |
Definition at line 471 of file tm4c123fe6pm.h.
#define UART4_CC_R (*((volatile uint32_t *)0x40010FC8)) |
Definition at line 473 of file tm4c123fe6pm.h.
#define UART4_CTL_R (*((volatile uint32_t *)0x40010030)) |
Definition at line 463 of file tm4c123fe6pm.h.
#define UART4_DMACTL_R (*((volatile uint32_t *)0x40010048)) |
Definition at line 469 of file tm4c123fe6pm.h.
#define UART4_DR_R (*((volatile uint32_t *)0x40010000)) |
Definition at line 455 of file tm4c123fe6pm.h.
#define UART4_ECR_R (*((volatile uint32_t *)0x40010004)) |
Definition at line 457 of file tm4c123fe6pm.h.
#define UART4_FBRD_R (*((volatile uint32_t *)0x40010028)) |
Definition at line 461 of file tm4c123fe6pm.h.
#define UART4_FR_R (*((volatile uint32_t *)0x40010018)) |
Definition at line 458 of file tm4c123fe6pm.h.
#define UART4_IBRD_R (*((volatile uint32_t *)0x40010024)) |
Definition at line 460 of file tm4c123fe6pm.h.
#define UART4_ICR_R (*((volatile uint32_t *)0x40010044)) |
Definition at line 468 of file tm4c123fe6pm.h.
#define UART4_IFLS_R (*((volatile uint32_t *)0x40010034)) |
Definition at line 464 of file tm4c123fe6pm.h.
#define UART4_ILPR_R (*((volatile uint32_t *)0x40010020)) |
Definition at line 459 of file tm4c123fe6pm.h.
#define UART4_IM_R (*((volatile uint32_t *)0x40010038)) |
Definition at line 465 of file tm4c123fe6pm.h.
#define UART4_LCRH_R (*((volatile uint32_t *)0x4001002C)) |
Definition at line 462 of file tm4c123fe6pm.h.
#define UART4_MIS_R (*((volatile uint32_t *)0x40010040)) |
Definition at line 467 of file tm4c123fe6pm.h.
#define UART4_PP_R (*((volatile uint32_t *)0x40010FC0)) |
Definition at line 472 of file tm4c123fe6pm.h.
#define UART4_RIS_R (*((volatile uint32_t *)0x4001003C)) |
Definition at line 466 of file tm4c123fe6pm.h.
#define UART4_RSR_R (*((volatile uint32_t *)0x40010004)) |
Definition at line 456 of file tm4c123fe6pm.h.
#define UART5_9BITADDR_R (*((volatile uint32_t *)0x400110A4)) |
Definition at line 495 of file tm4c123fe6pm.h.
#define UART5_9BITAMASK_R (*((volatile uint32_t *)0x400110A8)) |
Definition at line 496 of file tm4c123fe6pm.h.
#define UART5_CC_R (*((volatile uint32_t *)0x40011FC8)) |
Definition at line 498 of file tm4c123fe6pm.h.
#define UART5_CTL_R (*((volatile uint32_t *)0x40011030)) |
Definition at line 488 of file tm4c123fe6pm.h.
#define UART5_DMACTL_R (*((volatile uint32_t *)0x40011048)) |
Definition at line 494 of file tm4c123fe6pm.h.
#define UART5_DR_R (*((volatile uint32_t *)0x40011000)) |
Definition at line 480 of file tm4c123fe6pm.h.
#define UART5_ECR_R (*((volatile uint32_t *)0x40011004)) |
Definition at line 482 of file tm4c123fe6pm.h.
#define UART5_FBRD_R (*((volatile uint32_t *)0x40011028)) |
Definition at line 486 of file tm4c123fe6pm.h.
#define UART5_FR_R (*((volatile uint32_t *)0x40011018)) |
Definition at line 483 of file tm4c123fe6pm.h.
#define UART5_IBRD_R (*((volatile uint32_t *)0x40011024)) |
Definition at line 485 of file tm4c123fe6pm.h.
#define UART5_ICR_R (*((volatile uint32_t *)0x40011044)) |
Definition at line 493 of file tm4c123fe6pm.h.
#define UART5_IFLS_R (*((volatile uint32_t *)0x40011034)) |
Definition at line 489 of file tm4c123fe6pm.h.
#define UART5_ILPR_R (*((volatile uint32_t *)0x40011020)) |
Definition at line 484 of file tm4c123fe6pm.h.
#define UART5_IM_R (*((volatile uint32_t *)0x40011038)) |
Definition at line 490 of file tm4c123fe6pm.h.
#define UART5_LCRH_R (*((volatile uint32_t *)0x4001102C)) |
Definition at line 487 of file tm4c123fe6pm.h.
#define UART5_MIS_R (*((volatile uint32_t *)0x40011040)) |
Definition at line 492 of file tm4c123fe6pm.h.
#define UART5_PP_R (*((volatile uint32_t *)0x40011FC0)) |
Definition at line 497 of file tm4c123fe6pm.h.
#define UART5_RIS_R (*((volatile uint32_t *)0x4001103C)) |
Definition at line 491 of file tm4c123fe6pm.h.
#define UART5_RSR_R (*((volatile uint32_t *)0x40011004)) |
Definition at line 481 of file tm4c123fe6pm.h.
#define UART6_9BITADDR_R (*((volatile uint32_t *)0x400120A4)) |
Definition at line 520 of file tm4c123fe6pm.h.
#define UART6_9BITAMASK_R (*((volatile uint32_t *)0x400120A8)) |
Definition at line 521 of file tm4c123fe6pm.h.
#define UART6_CC_R (*((volatile uint32_t *)0x40012FC8)) |
Definition at line 523 of file tm4c123fe6pm.h.
#define UART6_CTL_R (*((volatile uint32_t *)0x40012030)) |
Definition at line 513 of file tm4c123fe6pm.h.
#define UART6_DMACTL_R (*((volatile uint32_t *)0x40012048)) |
Definition at line 519 of file tm4c123fe6pm.h.
#define UART6_DR_R (*((volatile uint32_t *)0x40012000)) |
Definition at line 505 of file tm4c123fe6pm.h.
#define UART6_ECR_R (*((volatile uint32_t *)0x40012004)) |
Definition at line 507 of file tm4c123fe6pm.h.
#define UART6_FBRD_R (*((volatile uint32_t *)0x40012028)) |
Definition at line 511 of file tm4c123fe6pm.h.
#define UART6_FR_R (*((volatile uint32_t *)0x40012018)) |
Definition at line 508 of file tm4c123fe6pm.h.
#define UART6_IBRD_R (*((volatile uint32_t *)0x40012024)) |
Definition at line 510 of file tm4c123fe6pm.h.
#define UART6_ICR_R (*((volatile uint32_t *)0x40012044)) |
Definition at line 518 of file tm4c123fe6pm.h.
#define UART6_IFLS_R (*((volatile uint32_t *)0x40012034)) |
Definition at line 514 of file tm4c123fe6pm.h.
#define UART6_ILPR_R (*((volatile uint32_t *)0x40012020)) |
Definition at line 509 of file tm4c123fe6pm.h.
#define UART6_IM_R (*((volatile uint32_t *)0x40012038)) |
Definition at line 515 of file tm4c123fe6pm.h.
#define UART6_LCRH_R (*((volatile uint32_t *)0x4001202C)) |
Definition at line 512 of file tm4c123fe6pm.h.
#define UART6_MIS_R (*((volatile uint32_t *)0x40012040)) |
Definition at line 517 of file tm4c123fe6pm.h.
#define UART6_PP_R (*((volatile uint32_t *)0x40012FC0)) |
Definition at line 522 of file tm4c123fe6pm.h.
#define UART6_RIS_R (*((volatile uint32_t *)0x4001203C)) |
Definition at line 516 of file tm4c123fe6pm.h.
#define UART6_RSR_R (*((volatile uint32_t *)0x40012004)) |
Definition at line 506 of file tm4c123fe6pm.h.
#define UART7_9BITADDR_R (*((volatile uint32_t *)0x400130A4)) |
Definition at line 545 of file tm4c123fe6pm.h.
#define UART7_9BITAMASK_R (*((volatile uint32_t *)0x400130A8)) |
Definition at line 546 of file tm4c123fe6pm.h.
#define UART7_CC_R (*((volatile uint32_t *)0x40013FC8)) |
Definition at line 548 of file tm4c123fe6pm.h.
#define UART7_CTL_R (*((volatile uint32_t *)0x40013030)) |
Definition at line 538 of file tm4c123fe6pm.h.
#define UART7_DMACTL_R (*((volatile uint32_t *)0x40013048)) |
Definition at line 544 of file tm4c123fe6pm.h.
#define UART7_DR_R (*((volatile uint32_t *)0x40013000)) |
Definition at line 530 of file tm4c123fe6pm.h.
#define UART7_ECR_R (*((volatile uint32_t *)0x40013004)) |
Definition at line 532 of file tm4c123fe6pm.h.
#define UART7_FBRD_R (*((volatile uint32_t *)0x40013028)) |
Definition at line 536 of file tm4c123fe6pm.h.
#define UART7_FR_R (*((volatile uint32_t *)0x40013018)) |
Definition at line 533 of file tm4c123fe6pm.h.
#define UART7_IBRD_R (*((volatile uint32_t *)0x40013024)) |
Definition at line 535 of file tm4c123fe6pm.h.
#define UART7_ICR_R (*((volatile uint32_t *)0x40013044)) |
Definition at line 543 of file tm4c123fe6pm.h.
#define UART7_IFLS_R (*((volatile uint32_t *)0x40013034)) |
Definition at line 539 of file tm4c123fe6pm.h.
#define UART7_ILPR_R (*((volatile uint32_t *)0x40013020)) |
Definition at line 534 of file tm4c123fe6pm.h.
#define UART7_IM_R (*((volatile uint32_t *)0x40013038)) |
Definition at line 540 of file tm4c123fe6pm.h.
#define UART7_LCRH_R (*((volatile uint32_t *)0x4001302C)) |
Definition at line 537 of file tm4c123fe6pm.h.
#define UART7_MIS_R (*((volatile uint32_t *)0x40013040)) |
Definition at line 542 of file tm4c123fe6pm.h.
#define UART7_PP_R (*((volatile uint32_t *)0x40013FC0)) |
Definition at line 547 of file tm4c123fe6pm.h.
#define UART7_RIS_R (*((volatile uint32_t *)0x4001303C)) |
Definition at line 541 of file tm4c123fe6pm.h.
#define UART7_RSR_R (*((volatile uint32_t *)0x40013004)) |
Definition at line 531 of file tm4c123fe6pm.h.
#define UART_9BITADDR_9BITEN 0x00008000 |
Definition at line 3166 of file tm4c123fe6pm.h.
#define UART_9BITADDR_ADDR_M 0x000000FF |
Definition at line 3167 of file tm4c123fe6pm.h.
#define UART_9BITADDR_ADDR_S 0 |
Definition at line 3168 of file tm4c123fe6pm.h.
#define UART_9BITAMASK_MASK_M 0x000000FF |
Definition at line 3176 of file tm4c123fe6pm.h.
#define UART_9BITAMASK_MASK_S 0 |
Definition at line 3177 of file tm4c123fe6pm.h.
#define UART_CC_CS_M 0x0000000F |
Definition at line 3192 of file tm4c123fe6pm.h.
#define UART_CC_CS_PIOSC 0x00000005 |
Definition at line 3195 of file tm4c123fe6pm.h.
#define UART_CC_CS_SYSCLK 0x00000000 |
Definition at line 3193 of file tm4c123fe6pm.h.
#define UART_CTL_CTSEN 0x00008000 |
Definition at line 3036 of file tm4c123fe6pm.h.
#define UART_CTL_EOT 0x00000010 |
Definition at line 3043 of file tm4c123fe6pm.h.
#define UART_CTL_HSE 0x00000020 |
Definition at line 3042 of file tm4c123fe6pm.h.
#define UART_CTL_LBE 0x00000080 |
Definition at line 3041 of file tm4c123fe6pm.h.
#define UART_CTL_RTS 0x00000800 |
Definition at line 3038 of file tm4c123fe6pm.h.
#define UART_CTL_RTSEN 0x00004000 |
Definition at line 3037 of file tm4c123fe6pm.h.
#define UART_CTL_RXE 0x00000200 |
Definition at line 3039 of file tm4c123fe6pm.h.
#define UART_CTL_SIREN 0x00000002 |
Definition at line 3046 of file tm4c123fe6pm.h.
#define UART_CTL_SIRLP 0x00000004 |
Definition at line 3045 of file tm4c123fe6pm.h.
#define UART_CTL_SMART 0x00000008 |
Definition at line 3044 of file tm4c123fe6pm.h.
#define UART_CTL_TXE 0x00000100 |
Definition at line 3040 of file tm4c123fe6pm.h.
#define UART_CTL_UARTEN 0x00000001 |
Definition at line 3047 of file tm4c123fe6pm.h.
#define UART_DMACTL_DMAERR 0x00000004 |
Definition at line 3156 of file tm4c123fe6pm.h.
#define UART_DMACTL_RXDMAE 0x00000001 |
Definition at line 3158 of file tm4c123fe6pm.h.
#define UART_DMACTL_TXDMAE 0x00000002 |
Definition at line 3157 of file tm4c123fe6pm.h.
#define UART_DR_BE 0x00000400 |
Definition at line 2954 of file tm4c123fe6pm.h.
#define UART_DR_DATA_M 0x000000FF |
Definition at line 2957 of file tm4c123fe6pm.h.
#define UART_DR_DATA_S 0 |
Definition at line 2958 of file tm4c123fe6pm.h.
#define UART_DR_FE 0x00000100 |
Definition at line 2956 of file tm4c123fe6pm.h.
#define UART_DR_OE 0x00000800 |
Definition at line 2953 of file tm4c123fe6pm.h.
#define UART_DR_PE 0x00000200 |
Definition at line 2955 of file tm4c123fe6pm.h.
#define UART_ECR_DATA_M 0x000000FF |
Definition at line 2975 of file tm4c123fe6pm.h.
#define UART_ECR_DATA_S 0 |
Definition at line 2976 of file tm4c123fe6pm.h.
#define UART_FBRD_DIVFRAC_M 0x0000003F |
Definition at line 3011 of file tm4c123fe6pm.h.
#define UART_FBRD_DIVFRAC_S 0 |
Definition at line 3012 of file tm4c123fe6pm.h.
#define UART_FR_BUSY 0x00000008 |
Definition at line 2987 of file tm4c123fe6pm.h.
#define UART_FR_CTS 0x00000001 |
Definition at line 2988 of file tm4c123fe6pm.h.
#define UART_FR_RXFE 0x00000010 |
Definition at line 2986 of file tm4c123fe6pm.h.
#define UART_FR_RXFF 0x00000040 |
Definition at line 2984 of file tm4c123fe6pm.h.
#define UART_FR_TXFE 0x00000080 |
Definition at line 2983 of file tm4c123fe6pm.h.
#define UART_FR_TXFF 0x00000020 |
Definition at line 2985 of file tm4c123fe6pm.h.
#define UART_IBRD_DIVINT_M 0x0000FFFF |
Definition at line 3003 of file tm4c123fe6pm.h.
#define UART_IBRD_DIVINT_S 0 |
Definition at line 3004 of file tm4c123fe6pm.h.
#define UART_ICR_9BITIC 0x00001000 |
Definition at line 3140 of file tm4c123fe6pm.h.
#define UART_ICR_BEIC 0x00000200 |
Definition at line 3142 of file tm4c123fe6pm.h.
#define UART_ICR_CTSMIC 0x00000002 |
Definition at line 3148 of file tm4c123fe6pm.h.
#define UART_ICR_FEIC 0x00000080 |
Definition at line 3144 of file tm4c123fe6pm.h.
#define UART_ICR_OEIC 0x00000400 |
Definition at line 3141 of file tm4c123fe6pm.h.
#define UART_ICR_PEIC 0x00000100 |
Definition at line 3143 of file tm4c123fe6pm.h.
#define UART_ICR_RTIC 0x00000040 |
Definition at line 3145 of file tm4c123fe6pm.h.
#define UART_ICR_RXIC 0x00000010 |
Definition at line 3147 of file tm4c123fe6pm.h.
#define UART_ICR_TXIC 0x00000020 |
Definition at line 3146 of file tm4c123fe6pm.h.
#define UART_IFLS_RX1_8 0x00000000 |
Definition at line 3056 of file tm4c123fe6pm.h.
#define UART_IFLS_RX2_8 0x00000008 |
Definition at line 3057 of file tm4c123fe6pm.h.
#define UART_IFLS_RX4_8 0x00000010 |
Definition at line 3058 of file tm4c123fe6pm.h.
#define UART_IFLS_RX6_8 0x00000018 |
Definition at line 3059 of file tm4c123fe6pm.h.
#define UART_IFLS_RX7_8 0x00000020 |
Definition at line 3060 of file tm4c123fe6pm.h.
#define UART_IFLS_RX_M 0x00000038 |
Definition at line 3054 of file tm4c123fe6pm.h.
#define UART_IFLS_TX1_8 0x00000000 |
Definition at line 3063 of file tm4c123fe6pm.h.
#define UART_IFLS_TX2_8 0x00000001 |
Definition at line 3064 of file tm4c123fe6pm.h.
#define UART_IFLS_TX4_8 0x00000002 |
Definition at line 3065 of file tm4c123fe6pm.h.
#define UART_IFLS_TX6_8 0x00000003 |
Definition at line 3066 of file tm4c123fe6pm.h.
#define UART_IFLS_TX7_8 0x00000004 |
Definition at line 3067 of file tm4c123fe6pm.h.
#define UART_IFLS_TX_M 0x00000007 |
Definition at line 3061 of file tm4c123fe6pm.h.
#define UART_ILPR_ILPDVSR_M 0x000000FF |
Definition at line 2995 of file tm4c123fe6pm.h.
#define UART_ILPR_ILPDVSR_S 0 |
Definition at line 2996 of file tm4c123fe6pm.h.
#define UART_IM_9BITIM 0x00001000 |
Definition at line 3074 of file tm4c123fe6pm.h.
#define UART_IM_BEIM 0x00000200 |
Definition at line 3077 of file tm4c123fe6pm.h.
#define UART_IM_CTSMIM 0x00000002 |
Definition at line 3085 of file tm4c123fe6pm.h.
#define UART_IM_FEIM 0x00000080 |
Definition at line 3079 of file tm4c123fe6pm.h.
#define UART_IM_OEIM 0x00000400 |
Definition at line 3075 of file tm4c123fe6pm.h.
#define UART_IM_PEIM 0x00000100 |
Definition at line 3078 of file tm4c123fe6pm.h.
#define UART_IM_RTIM 0x00000040 |
Definition at line 3081 of file tm4c123fe6pm.h.
#define UART_IM_RXIM 0x00000010 |
Definition at line 3084 of file tm4c123fe6pm.h.
#define UART_IM_TXIM 0x00000020 |
Definition at line 3083 of file tm4c123fe6pm.h.
#define UART_LCRH_BRK 0x00000001 |
Definition at line 3029 of file tm4c123fe6pm.h.
#define UART_LCRH_EPS 0x00000004 |
Definition at line 3027 of file tm4c123fe6pm.h.
#define UART_LCRH_FEN 0x00000010 |
Definition at line 3025 of file tm4c123fe6pm.h.
#define UART_LCRH_PEN 0x00000002 |
Definition at line 3028 of file tm4c123fe6pm.h.
#define UART_LCRH_SPS 0x00000080 |
Definition at line 3019 of file tm4c123fe6pm.h.
#define UART_LCRH_STP2 0x00000008 |
Definition at line 3026 of file tm4c123fe6pm.h.
#define UART_LCRH_WLEN_5 0x00000000 |
Definition at line 3021 of file tm4c123fe6pm.h.
#define UART_LCRH_WLEN_6 0x00000020 |
Definition at line 3022 of file tm4c123fe6pm.h.
#define UART_LCRH_WLEN_7 0x00000040 |
Definition at line 3023 of file tm4c123fe6pm.h.
#define UART_LCRH_WLEN_8 0x00000060 |
Definition at line 3024 of file tm4c123fe6pm.h.
#define UART_LCRH_WLEN_M 0x00000060 |
Definition at line 3020 of file tm4c123fe6pm.h.
#define UART_MIS_9BITMIS 0x00001000 |
Definition at line 3116 of file tm4c123fe6pm.h.
#define UART_MIS_BEMIS 0x00000200 |
Definition at line 3120 of file tm4c123fe6pm.h.
#define UART_MIS_CTSMIS 0x00000002 |
Definition at line 3132 of file tm4c123fe6pm.h.
#define UART_MIS_FEMIS 0x00000080 |
Definition at line 3124 of file tm4c123fe6pm.h.
#define UART_MIS_OEMIS 0x00000400 |
Definition at line 3118 of file tm4c123fe6pm.h.
#define UART_MIS_PEMIS 0x00000100 |
Definition at line 3122 of file tm4c123fe6pm.h.
#define UART_MIS_RTMIS 0x00000040 |
Definition at line 3126 of file tm4c123fe6pm.h.
#define UART_MIS_RXMIS 0x00000010 |
Definition at line 3130 of file tm4c123fe6pm.h.
#define UART_MIS_TXMIS 0x00000020 |
Definition at line 3128 of file tm4c123fe6pm.h.
#define UART_PP_NB 0x00000002 |
Definition at line 3184 of file tm4c123fe6pm.h.
#define UART_PP_SC 0x00000001 |
Definition at line 3185 of file tm4c123fe6pm.h.
#define UART_RIS_9BITRIS 0x00001000 |
Definition at line 3093 of file tm4c123fe6pm.h.
#define UART_RIS_BERIS 0x00000200 |
Definition at line 3096 of file tm4c123fe6pm.h.
#define UART_RIS_CTSRIS 0x00000002 |
Definition at line 3108 of file tm4c123fe6pm.h.
#define UART_RIS_FERIS 0x00000080 |
Definition at line 3100 of file tm4c123fe6pm.h.
#define UART_RIS_OERIS 0x00000400 |
Definition at line 3094 of file tm4c123fe6pm.h.
#define UART_RIS_PERIS 0x00000100 |
Definition at line 3098 of file tm4c123fe6pm.h.
#define UART_RIS_RTRIS 0x00000040 |
Definition at line 3102 of file tm4c123fe6pm.h.
#define UART_RIS_RXRIS 0x00000010 |
Definition at line 3106 of file tm4c123fe6pm.h.
#define UART_RIS_TXRIS 0x00000020 |
Definition at line 3104 of file tm4c123fe6pm.h.
#define UART_RSR_BE 0x00000004 |
Definition at line 2966 of file tm4c123fe6pm.h.
#define UART_RSR_FE 0x00000001 |
Definition at line 2968 of file tm4c123fe6pm.h.
#define UART_RSR_OE 0x00000008 |
Definition at line 2965 of file tm4c123fe6pm.h.
#define UART_RSR_PE 0x00000002 |
Definition at line 2967 of file tm4c123fe6pm.h.
#define UDMA_ALTBASE_ADDR_M 0xFFFFFFFF |
Definition at line 11398 of file tm4c123fe6pm.h.
#define UDMA_ALTBASE_ADDR_S 0 |
Definition at line 11400 of file tm4c123fe6pm.h.
#define UDMA_ALTBASE_R (*((volatile uint32_t *)0x400FF00C)) |
Definition at line 2284 of file tm4c123fe6pm.h.
#define UDMA_ALTCLR_CLR_M 0xFFFFFFFF |
Definition at line 11474 of file tm4c123fe6pm.h.
#define UDMA_ALTCLR_R (*((volatile uint32_t *)0x400FF034)) |
Definition at line 2294 of file tm4c123fe6pm.h.
#define UDMA_ALTSET_R (*((volatile uint32_t *)0x400FF030)) |
Definition at line 2293 of file tm4c123fe6pm.h.
#define UDMA_ALTSET_SET_M 0xFFFFFFFF |
Definition at line 11467 of file tm4c123fe6pm.h.
#define UDMA_CFG_MASTEN 0x00000001 |
Definition at line 11383 of file tm4c123fe6pm.h.
#define UDMA_CFG_R (*((volatile uint32_t *)0x400FF004)) |
Definition at line 2282 of file tm4c123fe6pm.h.
#define UDMA_CHASGN_M 0xFFFFFFFF |
Definition at line 11502 of file tm4c123fe6pm.h.
#define UDMA_CHASGN_PRIMARY 0x00000000 |
Definition at line 11503 of file tm4c123fe6pm.h.
#define UDMA_CHASGN_R (*((volatile uint32_t *)0x400FF500)) |
Definition at line 2298 of file tm4c123fe6pm.h.
#define UDMA_CHASGN_SECONDARY 0x00000001 |
Definition at line 11505 of file tm4c123fe6pm.h.
#define UDMA_CHCTL 0x00000008 |
Definition at line 2314 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_ARBSIZE_1 0x00000000 |
Definition at line 11643 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_ARBSIZE_1024 0x00028000 |
Definition at line 11653 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_ARBSIZE_128 0x0001C000 |
Definition at line 11650 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_ARBSIZE_16 0x00010000 |
Definition at line 11647 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_ARBSIZE_2 0x00004000 |
Definition at line 11644 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_ARBSIZE_256 0x00020000 |
Definition at line 11651 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_ARBSIZE_32 0x00014000 |
Definition at line 11648 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_ARBSIZE_4 0x00008000 |
Definition at line 11645 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_ARBSIZE_512 0x00024000 |
Definition at line 11652 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_ARBSIZE_64 0x00018000 |
Definition at line 11649 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_ARBSIZE_8 0x0000C000 |
Definition at line 11646 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_ARBSIZE_M 0x0003C000 |
Definition at line 11642 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_DSTINC_16 0x40000000 |
Definition at line 11626 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_DSTINC_32 0x80000000 |
Definition at line 11627 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_DSTINC_8 0x00000000 |
Definition at line 11625 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_DSTINC_M 0xC0000000 |
Definition at line 11624 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_DSTINC_NONE 0xC0000000 |
Definition at line 11628 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_DSTSIZE_16 0x10000000 |
Definition at line 11631 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_DSTSIZE_32 0x20000000 |
Definition at line 11632 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_DSTSIZE_8 0x00000000 |
Definition at line 11630 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_DSTSIZE_M 0x30000000 |
Definition at line 11629 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_NXTUSEBURST 0x00000008 |
Definition at line 11655 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_SRCINC_16 0x04000000 |
Definition at line 11635 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_SRCINC_32 0x08000000 |
Definition at line 11636 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_SRCINC_8 0x00000000 |
Definition at line 11634 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_SRCINC_M 0x0C000000 |
Definition at line 11633 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_SRCINC_NONE 0x0C000000 |
Definition at line 11637 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_SRCSIZE_16 0x01000000 |
Definition at line 11640 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_SRCSIZE_32 0x02000000 |
Definition at line 11641 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_SRCSIZE_8 0x00000000 |
Definition at line 11639 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_SRCSIZE_M 0x03000000 |
Definition at line 11638 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_XFERMODE_AUTO 0x00000002 |
Definition at line 11661 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_XFERMODE_BASIC 0x00000001 |
Definition at line 11659 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_XFERMODE_M 0x00000007 |
Definition at line 11656 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_XFERMODE_MEM_SG 0x00000004 |
Definition at line 11665 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_XFERMODE_MEM_SGA 0x00000005 |
Definition at line 11667 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_XFERMODE_PER_SG 0x00000006 |
Definition at line 11669 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_XFERMODE_PER_SGA 0x00000007 |
Definition at line 11671 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_XFERMODE_PINGPONG 0x00000003 |
Definition at line 11663 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_XFERMODE_STOP 0x00000000 |
Definition at line 11657 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_XFERSIZE_M 0x00003FF0 |
Definition at line 11654 of file tm4c123fe6pm.h.
#define UDMA_CHCTL_XFERSIZE_S 4 |
Definition at line 11674 of file tm4c123fe6pm.h.
#define UDMA_CHIS_M 0xFFFFFFFF |
Definition at line 11513 of file tm4c123fe6pm.h.
#define UDMA_CHIS_R (*((volatile uint32_t *)0x400FF504)) |
Definition at line 2299 of file tm4c123fe6pm.h.
#define UDMA_CHMAP0_CH0SEL_M 0x0000000F |
Definition at line 11527 of file tm4c123fe6pm.h.
#define UDMA_CHMAP0_CH0SEL_S 0 |
Definition at line 11535 of file tm4c123fe6pm.h.
#define UDMA_CHMAP0_CH1SEL_M 0x000000F0 |
Definition at line 11526 of file tm4c123fe6pm.h.
#define UDMA_CHMAP0_CH1SEL_S 4 |
Definition at line 11534 of file tm4c123fe6pm.h.
#define UDMA_CHMAP0_CH2SEL_M 0x00000F00 |
Definition at line 11525 of file tm4c123fe6pm.h.
#define UDMA_CHMAP0_CH2SEL_S 8 |
Definition at line 11533 of file tm4c123fe6pm.h.
#define UDMA_CHMAP0_CH3SEL_M 0x0000F000 |
Definition at line 11524 of file tm4c123fe6pm.h.
#define UDMA_CHMAP0_CH3SEL_S 12 |
Definition at line 11532 of file tm4c123fe6pm.h.
#define UDMA_CHMAP0_CH4SEL_M 0x000F0000 |
Definition at line 11523 of file tm4c123fe6pm.h.
#define UDMA_CHMAP0_CH4SEL_S 16 |
Definition at line 11531 of file tm4c123fe6pm.h.
#define UDMA_CHMAP0_CH5SEL_M 0x00F00000 |
Definition at line 11522 of file tm4c123fe6pm.h.
#define UDMA_CHMAP0_CH5SEL_S 20 |
Definition at line 11530 of file tm4c123fe6pm.h.
#define UDMA_CHMAP0_CH6SEL_M 0x0F000000 |
Definition at line 11521 of file tm4c123fe6pm.h.
#define UDMA_CHMAP0_CH6SEL_S 24 |
Definition at line 11529 of file tm4c123fe6pm.h.
#define UDMA_CHMAP0_CH7SEL_M 0xF0000000 |
Definition at line 11520 of file tm4c123fe6pm.h.
#define UDMA_CHMAP0_CH7SEL_S 28 |
Definition at line 11528 of file tm4c123fe6pm.h.
#define UDMA_CHMAP0_R (*((volatile uint32_t *)0x400FF510)) |
Definition at line 2300 of file tm4c123fe6pm.h.
#define UDMA_CHMAP1_CH10SEL_M 0x00000F00 |
Definition at line 11547 of file tm4c123fe6pm.h.
#define UDMA_CHMAP1_CH10SEL_S 8 |
Definition at line 11555 of file tm4c123fe6pm.h.
#define UDMA_CHMAP1_CH11SEL_M 0x0000F000 |
Definition at line 11546 of file tm4c123fe6pm.h.
#define UDMA_CHMAP1_CH11SEL_S 12 |
Definition at line 11554 of file tm4c123fe6pm.h.
#define UDMA_CHMAP1_CH12SEL_M 0x000F0000 |
Definition at line 11545 of file tm4c123fe6pm.h.
#define UDMA_CHMAP1_CH12SEL_S 16 |
Definition at line 11553 of file tm4c123fe6pm.h.
#define UDMA_CHMAP1_CH13SEL_M 0x00F00000 |
Definition at line 11544 of file tm4c123fe6pm.h.
#define UDMA_CHMAP1_CH13SEL_S 20 |
Definition at line 11552 of file tm4c123fe6pm.h.
#define UDMA_CHMAP1_CH14SEL_M 0x0F000000 |
Definition at line 11543 of file tm4c123fe6pm.h.
#define UDMA_CHMAP1_CH14SEL_S 24 |
Definition at line 11551 of file tm4c123fe6pm.h.
#define UDMA_CHMAP1_CH15SEL_M 0xF0000000 |
Definition at line 11542 of file tm4c123fe6pm.h.
#define UDMA_CHMAP1_CH15SEL_S 28 |
Definition at line 11550 of file tm4c123fe6pm.h.
#define UDMA_CHMAP1_CH8SEL_M 0x0000000F |
Definition at line 11549 of file tm4c123fe6pm.h.
#define UDMA_CHMAP1_CH8SEL_S 0 |
Definition at line 11557 of file tm4c123fe6pm.h.
#define UDMA_CHMAP1_CH9SEL_M 0x000000F0 |
Definition at line 11548 of file tm4c123fe6pm.h.
#define UDMA_CHMAP1_CH9SEL_S 4 |
Definition at line 11556 of file tm4c123fe6pm.h.
#define UDMA_CHMAP1_R (*((volatile uint32_t *)0x400FF514)) |
Definition at line 2301 of file tm4c123fe6pm.h.
#define UDMA_CHMAP2_CH16SEL_M 0x0000000F |
Definition at line 11571 of file tm4c123fe6pm.h.
#define UDMA_CHMAP2_CH16SEL_S 0 |
Definition at line 11579 of file tm4c123fe6pm.h.
#define UDMA_CHMAP2_CH17SEL_M 0x000000F0 |
Definition at line 11570 of file tm4c123fe6pm.h.
#define UDMA_CHMAP2_CH17SEL_S 4 |
Definition at line 11578 of file tm4c123fe6pm.h.
#define UDMA_CHMAP2_CH18SEL_M 0x00000F00 |
Definition at line 11569 of file tm4c123fe6pm.h.
#define UDMA_CHMAP2_CH18SEL_S 8 |
Definition at line 11577 of file tm4c123fe6pm.h.
#define UDMA_CHMAP2_CH19SEL_M 0x0000F000 |
Definition at line 11568 of file tm4c123fe6pm.h.
#define UDMA_CHMAP2_CH19SEL_S 12 |
Definition at line 11576 of file tm4c123fe6pm.h.
#define UDMA_CHMAP2_CH20SEL_M 0x000F0000 |
Definition at line 11567 of file tm4c123fe6pm.h.
#define UDMA_CHMAP2_CH20SEL_S 16 |
Definition at line 11575 of file tm4c123fe6pm.h.
#define UDMA_CHMAP2_CH21SEL_M 0x00F00000 |
Definition at line 11566 of file tm4c123fe6pm.h.
#define UDMA_CHMAP2_CH21SEL_S 20 |
Definition at line 11574 of file tm4c123fe6pm.h.
#define UDMA_CHMAP2_CH22SEL_M 0x0F000000 |
Definition at line 11565 of file tm4c123fe6pm.h.
#define UDMA_CHMAP2_CH22SEL_S 24 |
Definition at line 11573 of file tm4c123fe6pm.h.
#define UDMA_CHMAP2_CH23SEL_M 0xF0000000 |
Definition at line 11564 of file tm4c123fe6pm.h.
#define UDMA_CHMAP2_CH23SEL_S 28 |
Definition at line 11572 of file tm4c123fe6pm.h.
#define UDMA_CHMAP2_R (*((volatile uint32_t *)0x400FF518)) |
Definition at line 2302 of file tm4c123fe6pm.h.
#define UDMA_CHMAP3_CH24SEL_M 0x0000000F |
Definition at line 11593 of file tm4c123fe6pm.h.
#define UDMA_CHMAP3_CH24SEL_S 0 |
Definition at line 11601 of file tm4c123fe6pm.h.
#define UDMA_CHMAP3_CH25SEL_M 0x000000F0 |
Definition at line 11592 of file tm4c123fe6pm.h.
#define UDMA_CHMAP3_CH25SEL_S 4 |
Definition at line 11600 of file tm4c123fe6pm.h.
#define UDMA_CHMAP3_CH26SEL_M 0x00000F00 |
Definition at line 11591 of file tm4c123fe6pm.h.
#define UDMA_CHMAP3_CH26SEL_S 8 |
Definition at line 11599 of file tm4c123fe6pm.h.
#define UDMA_CHMAP3_CH27SEL_M 0x0000F000 |
Definition at line 11590 of file tm4c123fe6pm.h.
#define UDMA_CHMAP3_CH27SEL_S 12 |
Definition at line 11598 of file tm4c123fe6pm.h.
#define UDMA_CHMAP3_CH28SEL_M 0x000F0000 |
Definition at line 11589 of file tm4c123fe6pm.h.
#define UDMA_CHMAP3_CH28SEL_S 16 |
Definition at line 11597 of file tm4c123fe6pm.h.
#define UDMA_CHMAP3_CH29SEL_M 0x00F00000 |
Definition at line 11588 of file tm4c123fe6pm.h.
#define UDMA_CHMAP3_CH29SEL_S 20 |
Definition at line 11596 of file tm4c123fe6pm.h.
#define UDMA_CHMAP3_CH30SEL_M 0x0F000000 |
Definition at line 11587 of file tm4c123fe6pm.h.
#define UDMA_CHMAP3_CH30SEL_S 24 |
Definition at line 11595 of file tm4c123fe6pm.h.
#define UDMA_CHMAP3_CH31SEL_M 0xF0000000 |
Definition at line 11586 of file tm4c123fe6pm.h.
#define UDMA_CHMAP3_CH31SEL_S 28 |
Definition at line 11594 of file tm4c123fe6pm.h.
#define UDMA_CHMAP3_R (*((volatile uint32_t *)0x400FF51C)) |
Definition at line 2303 of file tm4c123fe6pm.h.
#define UDMA_CTLBASE_ADDR_M 0xFFFFFC00 |
Definition at line 11390 of file tm4c123fe6pm.h.
#define UDMA_CTLBASE_ADDR_S 10 |
Definition at line 11391 of file tm4c123fe6pm.h.
#define UDMA_CTLBASE_R (*((volatile uint32_t *)0x400FF008)) |
Definition at line 2283 of file tm4c123fe6pm.h.
#define UDMA_DSTENDP 0x00000004 |
Definition at line 2312 of file tm4c123fe6pm.h.
#define UDMA_DSTENDP_ADDR_M 0xFFFFFFFF |
Definition at line 11616 of file tm4c123fe6pm.h.
#define UDMA_DSTENDP_ADDR_S 0 |
Definition at line 11617 of file tm4c123fe6pm.h.
#define UDMA_ENACLR_CLR_M 0xFFFFFFFF |
Definition at line 11460 of file tm4c123fe6pm.h.
#define UDMA_ENACLR_R (*((volatile uint32_t *)0x400FF02C)) |
Definition at line 2292 of file tm4c123fe6pm.h.
#define UDMA_ENASET_R (*((volatile uint32_t *)0x400FF028)) |
Definition at line 2291 of file tm4c123fe6pm.h.
#define UDMA_ENASET_SET_M 0xFFFFFFFF |
Definition at line 11453 of file tm4c123fe6pm.h.
#define UDMA_ERRCLR_ERRCLR 0x00000001 |
Definition at line 11495 of file tm4c123fe6pm.h.
#define UDMA_ERRCLR_R (*((volatile uint32_t *)0x400FF04C)) |
Definition at line 2297 of file tm4c123fe6pm.h.
#define UDMA_PRIOCLR_CLR_M 0xFFFFFFFF |
Definition at line 11488 of file tm4c123fe6pm.h.
#define UDMA_PRIOCLR_R (*((volatile uint32_t *)0x400FF03C)) |
Definition at line 2296 of file tm4c123fe6pm.h.
#define UDMA_PRIOSET_R (*((volatile uint32_t *)0x400FF038)) |
Definition at line 2295 of file tm4c123fe6pm.h.
#define UDMA_PRIOSET_SET_M 0xFFFFFFFF |
Definition at line 11481 of file tm4c123fe6pm.h.
#define UDMA_REQMASKCLR_CLR_M 0xFFFFFFFF |
Definition at line 11446 of file tm4c123fe6pm.h.
#define UDMA_REQMASKCLR_R (*((volatile uint32_t *)0x400FF024)) |
Definition at line 2290 of file tm4c123fe6pm.h.
#define UDMA_REQMASKSET_R (*((volatile uint32_t *)0x400FF020)) |
Definition at line 2289 of file tm4c123fe6pm.h.
#define UDMA_REQMASKSET_SET_M 0xFFFFFFFF |
Definition at line 11438 of file tm4c123fe6pm.h.
#define UDMA_SRCENDP 0x00000000 |
Definition at line 2310 of file tm4c123fe6pm.h.
#define UDMA_SRCENDP_ADDR_M 0xFFFFFFFF |
Definition at line 11608 of file tm4c123fe6pm.h.
#define UDMA_SRCENDP_ADDR_S 0 |
Definition at line 11609 of file tm4c123fe6pm.h.
#define UDMA_STAT_DMACHANS_M 0x001F0000 |
Definition at line 11357 of file tm4c123fe6pm.h.
#define UDMA_STAT_DMACHANS_S 16 |
Definition at line 11376 of file tm4c123fe6pm.h.
#define UDMA_STAT_MASTEN 0x00000001 |
Definition at line 11375 of file tm4c123fe6pm.h.
#define UDMA_STAT_R (*((volatile uint32_t *)0x400FF000)) |
Definition at line 2281 of file tm4c123fe6pm.h.
#define UDMA_STAT_STATE_DONE 0x00000090 |
Definition at line 11373 of file tm4c123fe6pm.h.
#define UDMA_STAT_STATE_IDLE 0x00000000 |
Definition at line 11359 of file tm4c123fe6pm.h.
#define UDMA_STAT_STATE_M 0x000000F0 |
Definition at line 11358 of file tm4c123fe6pm.h.
#define UDMA_STAT_STATE_RD_CTRL 0x00000010 |
Definition at line 11360 of file tm4c123fe6pm.h.
#define UDMA_STAT_STATE_RD_DSTENDP 0x00000030 |
Definition at line 11363 of file tm4c123fe6pm.h.
#define UDMA_STAT_STATE_RD_SRCDAT 0x00000040 |
Definition at line 11365 of file tm4c123fe6pm.h.
#define UDMA_STAT_STATE_RD_SRCENDP 0x00000020 |
Definition at line 11361 of file tm4c123fe6pm.h.
#define UDMA_STAT_STATE_STALL 0x00000080 |
Definition at line 11372 of file tm4c123fe6pm.h.
#define UDMA_STAT_STATE_UNDEF 0x000000A0 |
Definition at line 11374 of file tm4c123fe6pm.h.
#define UDMA_STAT_STATE_WAIT 0x00000060 |
Definition at line 11369 of file tm4c123fe6pm.h.
#define UDMA_STAT_STATE_WR_CTRL 0x00000070 |
Definition at line 11371 of file tm4c123fe6pm.h.
#define UDMA_STAT_STATE_WR_DSTDAT 0x00000050 |
Definition at line 11367 of file tm4c123fe6pm.h.
#define UDMA_SWREQ_M 0xFFFFFFFF |
Definition at line 11414 of file tm4c123fe6pm.h.
#define UDMA_SWREQ_R (*((volatile uint32_t *)0x400FF014)) |
Definition at line 2286 of file tm4c123fe6pm.h.
#define UDMA_USEBURSTCLR_CLR_M 0xFFFFFFFF |
Definition at line 11430 of file tm4c123fe6pm.h.
#define UDMA_USEBURSTCLR_R (*((volatile uint32_t *)0x400FF01C)) |
Definition at line 2288 of file tm4c123fe6pm.h.
#define UDMA_USEBURSTSET_R (*((volatile uint32_t *)0x400FF018)) |
Definition at line 2287 of file tm4c123fe6pm.h.
#define UDMA_USEBURSTSET_SET_M 0xFFFFFFFF |
Definition at line 11422 of file tm4c123fe6pm.h.
#define UDMA_WAITSTAT_R (*((volatile uint32_t *)0x400FF010)) |
Definition at line 2285 of file tm4c123fe6pm.h.
#define UDMA_WAITSTAT_WAITREQ_M 0xFFFFFFFF |
Definition at line 11407 of file tm4c123fe6pm.h.
#define USB0_CONTIM_R (*((volatile uint8_t *)0x4005007A)) |
Definition at line 1635 of file tm4c123fe6pm.h.
#define USB0_COUNT0_R (*((volatile uint8_t *)0x40050108)) |
Definition at line 1686 of file tm4c123fe6pm.h.
#define USB0_CSRH0_R (*((volatile uint8_t *)0x40050103)) |
Definition at line 1685 of file tm4c123fe6pm.h.
#define USB0_CSRL0_R (*((volatile uint8_t *)0x40050102)) |
Definition at line 1684 of file tm4c123fe6pm.h.
#define USB0_DEVCTL_R (*((volatile uint8_t *)0x40050060)) |
Definition at line 1630 of file tm4c123fe6pm.h.
#define USB0_DMASEL_R (*((volatile uint32_t *)0x40050450)) |
Definition at line 1790 of file tm4c123fe6pm.h.
#define USB0_DRIM_R (*((volatile uint32_t *)0x40050414)) |
Definition at line 1780 of file tm4c123fe6pm.h.
#define USB0_DRISC_R (*((volatile uint32_t *)0x40050418)) |
Definition at line 1781 of file tm4c123fe6pm.h.
#define USB0_DRRIS_R (*((volatile uint32_t *)0x40050410)) |
Definition at line 1779 of file tm4c123fe6pm.h.
#define USB0_EPC_R (*((volatile uint32_t *)0x40050400)) |
Definition at line 1775 of file tm4c123fe6pm.h.
#define USB0_EPCIM_R (*((volatile uint32_t *)0x40050408)) |
Definition at line 1777 of file tm4c123fe6pm.h.
#define USB0_EPCISC_R (*((volatile uint32_t *)0x4005040C)) |
Definition at line 1778 of file tm4c123fe6pm.h.
#define USB0_EPCRIS_R (*((volatile uint32_t *)0x40050404)) |
Definition at line 1776 of file tm4c123fe6pm.h.
#define USB0_EPIDX_R (*((volatile uint8_t *)0x4005000E)) |
Definition at line 1620 of file tm4c123fe6pm.h.
#define USB0_FADDR_R (*((volatile uint8_t *)0x40050000)) |
Definition at line 1611 of file tm4c123fe6pm.h.
#define USB0_FIFO0_R (*((volatile uint32_t *)0x40050020)) |
Definition at line 1622 of file tm4c123fe6pm.h.
#define USB0_FIFO1_R (*((volatile uint32_t *)0x40050024)) |
Definition at line 1623 of file tm4c123fe6pm.h.
#define USB0_FIFO2_R (*((volatile uint32_t *)0x40050028)) |
Definition at line 1624 of file tm4c123fe6pm.h.
#define USB0_FIFO3_R (*((volatile uint32_t *)0x4005002C)) |
Definition at line 1625 of file tm4c123fe6pm.h.
#define USB0_FIFO4_R (*((volatile uint32_t *)0x40050030)) |
Definition at line 1626 of file tm4c123fe6pm.h.
#define USB0_FIFO5_R (*((volatile uint32_t *)0x40050034)) |
Definition at line 1627 of file tm4c123fe6pm.h.
#define USB0_FIFO6_R (*((volatile uint32_t *)0x40050038)) |
Definition at line 1628 of file tm4c123fe6pm.h.
#define USB0_FIFO7_R (*((volatile uint32_t *)0x4005003C)) |
Definition at line 1629 of file tm4c123fe6pm.h.
#define USB0_FRAME_R (*((volatile uint16_t *)0x4005000C)) |
Definition at line 1619 of file tm4c123fe6pm.h.
#define USB0_FSEOF_R (*((volatile uint8_t *)0x4005007D)) |
Definition at line 1637 of file tm4c123fe6pm.h.
#define USB0_GPCS_R (*((volatile uint32_t *)0x4005041C)) |
Definition at line 1782 of file tm4c123fe6pm.h.
#define USB0_IDVIM_R (*((volatile uint32_t *)0x40050448)) |
Definition at line 1788 of file tm4c123fe6pm.h.
#define USB0_IDVISC_R (*((volatile uint32_t *)0x4005044C)) |
Definition at line 1789 of file tm4c123fe6pm.h.
#define USB0_IDVRIS_R (*((volatile uint32_t *)0x40050444)) |
Definition at line 1787 of file tm4c123fe6pm.h.
#define USB0_IE_R (*((volatile uint8_t *)0x4005000B)) |
Definition at line 1618 of file tm4c123fe6pm.h.
#define USB0_IS_R (*((volatile uint8_t *)0x4005000A)) |
Definition at line 1617 of file tm4c123fe6pm.h.
#define USB0_LSEOF_R (*((volatile uint8_t *)0x4005007E)) |
Definition at line 1638 of file tm4c123fe6pm.h.
#define USB0_NAKLMT_R (*((volatile uint8_t *)0x4005010B)) |
Definition at line 1688 of file tm4c123fe6pm.h.
#define USB0_POWER_R (*((volatile uint8_t *)0x40050001)) |
Definition at line 1612 of file tm4c123fe6pm.h.
#define USB0_PP_R (*((volatile uint32_t *)0x40050FC0)) |
Definition at line 1791 of file tm4c123fe6pm.h.
#define USB0_RQPKTCOUNT1_R (*((volatile uint16_t *)0x40050304)) |
Definition at line 1766 of file tm4c123fe6pm.h.
#define USB0_RQPKTCOUNT2_R (*((volatile uint16_t *)0x40050308)) |
Definition at line 1767 of file tm4c123fe6pm.h.
#define USB0_RQPKTCOUNT3_R (*((volatile uint16_t *)0x4005030C)) |
Definition at line 1768 of file tm4c123fe6pm.h.
#define USB0_RQPKTCOUNT4_R (*((volatile uint16_t *)0x40050310)) |
Definition at line 1769 of file tm4c123fe6pm.h.
#define USB0_RQPKTCOUNT5_R (*((volatile uint16_t *)0x40050314)) |
Definition at line 1770 of file tm4c123fe6pm.h.
#define USB0_RQPKTCOUNT6_R (*((volatile uint16_t *)0x40050318)) |
Definition at line 1771 of file tm4c123fe6pm.h.
#define USB0_RQPKTCOUNT7_R (*((volatile uint16_t *)0x4005031C)) |
Definition at line 1772 of file tm4c123fe6pm.h.
#define USB0_RXCOUNT1_R (*((volatile uint16_t *)0x40050118)) |
Definition at line 1695 of file tm4c123fe6pm.h.
#define USB0_RXCOUNT2_R (*((volatile uint16_t *)0x40050128)) |
Definition at line 1706 of file tm4c123fe6pm.h.
#define USB0_RXCOUNT3_R (*((volatile uint16_t *)0x40050138)) |
Definition at line 1717 of file tm4c123fe6pm.h.
#define USB0_RXCOUNT4_R (*((volatile uint16_t *)0x40050148)) |
Definition at line 1728 of file tm4c123fe6pm.h.
#define USB0_RXCOUNT5_R (*((volatile uint16_t *)0x40050158)) |
Definition at line 1739 of file tm4c123fe6pm.h.
#define USB0_RXCOUNT6_R (*((volatile uint16_t *)0x40050168)) |
Definition at line 1750 of file tm4c123fe6pm.h.
#define USB0_RXCOUNT7_R (*((volatile uint16_t *)0x40050178)) |
Definition at line 1761 of file tm4c123fe6pm.h.
#define USB0_RXCSRH1_R (*((volatile uint8_t *)0x40050117)) |
Definition at line 1694 of file tm4c123fe6pm.h.
#define USB0_RXCSRH2_R (*((volatile uint8_t *)0x40050127)) |
Definition at line 1705 of file tm4c123fe6pm.h.
#define USB0_RXCSRH3_R (*((volatile uint8_t *)0x40050137)) |
Definition at line 1716 of file tm4c123fe6pm.h.
#define USB0_RXCSRH4_R (*((volatile uint8_t *)0x40050147)) |
Definition at line 1727 of file tm4c123fe6pm.h.
#define USB0_RXCSRH5_R (*((volatile uint8_t *)0x40050157)) |
Definition at line 1738 of file tm4c123fe6pm.h.
#define USB0_RXCSRH6_R (*((volatile uint8_t *)0x40050167)) |
Definition at line 1749 of file tm4c123fe6pm.h.
#define USB0_RXCSRH7_R (*((volatile uint8_t *)0x40050177)) |
Definition at line 1760 of file tm4c123fe6pm.h.
#define USB0_RXCSRL1_R (*((volatile uint8_t *)0x40050116)) |
Definition at line 1693 of file tm4c123fe6pm.h.
#define USB0_RXCSRL2_R (*((volatile uint8_t *)0x40050126)) |
Definition at line 1704 of file tm4c123fe6pm.h.
#define USB0_RXCSRL3_R (*((volatile uint8_t *)0x40050136)) |
Definition at line 1715 of file tm4c123fe6pm.h.
#define USB0_RXCSRL4_R (*((volatile uint8_t *)0x40050146)) |
Definition at line 1726 of file tm4c123fe6pm.h.
#define USB0_RXCSRL5_R (*((volatile uint8_t *)0x40050156)) |
Definition at line 1737 of file tm4c123fe6pm.h.
#define USB0_RXCSRL6_R (*((volatile uint8_t *)0x40050166)) |
Definition at line 1748 of file tm4c123fe6pm.h.
#define USB0_RXCSRL7_R (*((volatile uint8_t *)0x40050176)) |
Definition at line 1759 of file tm4c123fe6pm.h.
#define USB0_RXDPKTBUFDIS_R (*((volatile uint16_t *)0x40050340)) |
Definition at line 1773 of file tm4c123fe6pm.h.
#define USB0_RXFIFOADD_R (*((volatile uint16_t *)0x40050066)) |
Definition at line 1634 of file tm4c123fe6pm.h.
#define USB0_RXFIFOSZ_R (*((volatile uint8_t *)0x40050063)) |
Definition at line 1632 of file tm4c123fe6pm.h.
#define USB0_RXFUNCADDR1_R (*((volatile uint8_t *)0x4005008C)) |
Definition at line 1645 of file tm4c123fe6pm.h.
#define USB0_RXFUNCADDR2_R (*((volatile uint8_t *)0x40050094)) |
Definition at line 1651 of file tm4c123fe6pm.h.
#define USB0_RXFUNCADDR3_R (*((volatile uint8_t *)0x4005009C)) |
Definition at line 1657 of file tm4c123fe6pm.h.
#define USB0_RXFUNCADDR4_R (*((volatile uint8_t *)0x400500A4)) |
Definition at line 1663 of file tm4c123fe6pm.h.
#define USB0_RXFUNCADDR5_R (*((volatile uint8_t *)0x400500AC)) |
Definition at line 1669 of file tm4c123fe6pm.h.
#define USB0_RXFUNCADDR6_R (*((volatile uint8_t *)0x400500B4)) |
Definition at line 1675 of file tm4c123fe6pm.h.
#define USB0_RXFUNCADDR7_R (*((volatile uint8_t *)0x400500BC)) |
Definition at line 1681 of file tm4c123fe6pm.h.
#define USB0_RXHUBADDR1_R (*((volatile uint8_t *)0x4005008E)) |
Definition at line 1646 of file tm4c123fe6pm.h.
#define USB0_RXHUBADDR2_R (*((volatile uint8_t *)0x40050096)) |
Definition at line 1652 of file tm4c123fe6pm.h.
#define USB0_RXHUBADDR3_R (*((volatile uint8_t *)0x4005009E)) |
Definition at line 1658 of file tm4c123fe6pm.h.
#define USB0_RXHUBADDR4_R (*((volatile uint8_t *)0x400500A6)) |
Definition at line 1664 of file tm4c123fe6pm.h.
#define USB0_RXHUBADDR5_R (*((volatile uint8_t *)0x400500AE)) |
Definition at line 1670 of file tm4c123fe6pm.h.
#define USB0_RXHUBADDR6_R (*((volatile uint8_t *)0x400500B6)) |
Definition at line 1676 of file tm4c123fe6pm.h.
#define USB0_RXHUBADDR7_R (*((volatile uint8_t *)0x400500BE)) |
Definition at line 1682 of file tm4c123fe6pm.h.
#define USB0_RXHUBPORT1_R (*((volatile uint8_t *)0x4005008F)) |
Definition at line 1647 of file tm4c123fe6pm.h.
#define USB0_RXHUBPORT2_R (*((volatile uint8_t *)0x40050097)) |
Definition at line 1653 of file tm4c123fe6pm.h.
#define USB0_RXHUBPORT3_R (*((volatile uint8_t *)0x4005009F)) |
Definition at line 1659 of file tm4c123fe6pm.h.
#define USB0_RXHUBPORT4_R (*((volatile uint8_t *)0x400500A7)) |
Definition at line 1665 of file tm4c123fe6pm.h.
#define USB0_RXHUBPORT5_R (*((volatile uint8_t *)0x400500AF)) |
Definition at line 1671 of file tm4c123fe6pm.h.
#define USB0_RXHUBPORT6_R (*((volatile uint8_t *)0x400500B7)) |
Definition at line 1677 of file tm4c123fe6pm.h.
#define USB0_RXHUBPORT7_R (*((volatile uint8_t *)0x400500BF)) |
Definition at line 1683 of file tm4c123fe6pm.h.
#define USB0_RXIE_R (*((volatile uint16_t *)0x40050008)) |
Definition at line 1616 of file tm4c123fe6pm.h.
#define USB0_RXINTERVAL1_R (*((volatile uint8_t *)0x4005011D)) |
Definition at line 1699 of file tm4c123fe6pm.h.
#define USB0_RXINTERVAL2_R (*((volatile uint8_t *)0x4005012D)) |
Definition at line 1710 of file tm4c123fe6pm.h.
#define USB0_RXINTERVAL3_R (*((volatile uint8_t *)0x4005013D)) |
Definition at line 1721 of file tm4c123fe6pm.h.
#define USB0_RXINTERVAL4_R (*((volatile uint8_t *)0x4005014D)) |
Definition at line 1732 of file tm4c123fe6pm.h.
#define USB0_RXINTERVAL5_R (*((volatile uint8_t *)0x4005015D)) |
Definition at line 1743 of file tm4c123fe6pm.h.
#define USB0_RXINTERVAL6_R (*((volatile uint8_t *)0x4005016D)) |
Definition at line 1754 of file tm4c123fe6pm.h.
#define USB0_RXINTERVAL7_R (*((volatile uint8_t *)0x4005017D)) |
Definition at line 1765 of file tm4c123fe6pm.h.
#define USB0_RXIS_R (*((volatile uint16_t *)0x40050004)) |
Definition at line 1614 of file tm4c123fe6pm.h.
#define USB0_RXMAXP1_R (*((volatile uint16_t *)0x40050114)) |
Definition at line 1692 of file tm4c123fe6pm.h.
#define USB0_RXMAXP2_R (*((volatile uint16_t *)0x40050124)) |
Definition at line 1703 of file tm4c123fe6pm.h.
#define USB0_RXMAXP3_R (*((volatile uint16_t *)0x40050134)) |
Definition at line 1714 of file tm4c123fe6pm.h.
#define USB0_RXMAXP4_R (*((volatile uint16_t *)0x40050144)) |
Definition at line 1725 of file tm4c123fe6pm.h.
#define USB0_RXMAXP5_R (*((volatile uint16_t *)0x40050154)) |
Definition at line 1736 of file tm4c123fe6pm.h.
#define USB0_RXMAXP6_R (*((volatile uint16_t *)0x40050164)) |
Definition at line 1747 of file tm4c123fe6pm.h.
#define USB0_RXMAXP7_R (*((volatile uint16_t *)0x40050174)) |
Definition at line 1758 of file tm4c123fe6pm.h.
#define USB0_RXTYPE1_R (*((volatile uint8_t *)0x4005011C)) |
Definition at line 1698 of file tm4c123fe6pm.h.
#define USB0_RXTYPE2_R (*((volatile uint8_t *)0x4005012C)) |
Definition at line 1709 of file tm4c123fe6pm.h.
#define USB0_RXTYPE3_R (*((volatile uint8_t *)0x4005013C)) |
Definition at line 1720 of file tm4c123fe6pm.h.
#define USB0_RXTYPE4_R (*((volatile uint8_t *)0x4005014C)) |
Definition at line 1731 of file tm4c123fe6pm.h.
#define USB0_RXTYPE5_R (*((volatile uint8_t *)0x4005015C)) |
Definition at line 1742 of file tm4c123fe6pm.h.
#define USB0_RXTYPE6_R (*((volatile uint8_t *)0x4005016C)) |
Definition at line 1753 of file tm4c123fe6pm.h.
#define USB0_RXTYPE7_R (*((volatile uint8_t *)0x4005017C)) |
Definition at line 1764 of file tm4c123fe6pm.h.
#define USB0_TEST_R (*((volatile uint8_t *)0x4005000F)) |
Definition at line 1621 of file tm4c123fe6pm.h.
#define USB0_TXCSRH1_R (*((volatile uint8_t *)0x40050113)) |
Definition at line 1691 of file tm4c123fe6pm.h.
#define USB0_TXCSRH2_R (*((volatile uint8_t *)0x40050123)) |
Definition at line 1702 of file tm4c123fe6pm.h.
#define USB0_TXCSRH3_R (*((volatile uint8_t *)0x40050133)) |
Definition at line 1713 of file tm4c123fe6pm.h.
#define USB0_TXCSRH4_R (*((volatile uint8_t *)0x40050143)) |
Definition at line 1724 of file tm4c123fe6pm.h.
#define USB0_TXCSRH5_R (*((volatile uint8_t *)0x40050153)) |
Definition at line 1735 of file tm4c123fe6pm.h.
#define USB0_TXCSRH6_R (*((volatile uint8_t *)0x40050163)) |
Definition at line 1746 of file tm4c123fe6pm.h.
#define USB0_TXCSRH7_R (*((volatile uint8_t *)0x40050173)) |
Definition at line 1757 of file tm4c123fe6pm.h.
#define USB0_TXCSRL1_R (*((volatile uint8_t *)0x40050112)) |
Definition at line 1690 of file tm4c123fe6pm.h.
#define USB0_TXCSRL2_R (*((volatile uint8_t *)0x40050122)) |
Definition at line 1701 of file tm4c123fe6pm.h.
#define USB0_TXCSRL3_R (*((volatile uint8_t *)0x40050132)) |
Definition at line 1712 of file tm4c123fe6pm.h.
#define USB0_TXCSRL4_R (*((volatile uint8_t *)0x40050142)) |
Definition at line 1723 of file tm4c123fe6pm.h.
#define USB0_TXCSRL5_R (*((volatile uint8_t *)0x40050152)) |
Definition at line 1734 of file tm4c123fe6pm.h.
#define USB0_TXCSRL6_R (*((volatile uint8_t *)0x40050162)) |
Definition at line 1745 of file tm4c123fe6pm.h.
#define USB0_TXCSRL7_R (*((volatile uint8_t *)0x40050172)) |
Definition at line 1756 of file tm4c123fe6pm.h.
#define USB0_TXDPKTBUFDIS_R (*((volatile uint16_t *)0x40050342)) |
Definition at line 1774 of file tm4c123fe6pm.h.
#define USB0_TXFIFOADD_R (*((volatile uint16_t *)0x40050064)) |
Definition at line 1633 of file tm4c123fe6pm.h.
#define USB0_TXFIFOSZ_R (*((volatile uint8_t *)0x40050062)) |
Definition at line 1631 of file tm4c123fe6pm.h.
#define USB0_TXFUNCADDR0_R (*((volatile uint8_t *)0x40050080)) |
Definition at line 1639 of file tm4c123fe6pm.h.
#define USB0_TXFUNCADDR1_R (*((volatile uint8_t *)0x40050088)) |
Definition at line 1642 of file tm4c123fe6pm.h.
#define USB0_TXFUNCADDR2_R (*((volatile uint8_t *)0x40050090)) |
Definition at line 1648 of file tm4c123fe6pm.h.
#define USB0_TXFUNCADDR3_R (*((volatile uint8_t *)0x40050098)) |
Definition at line 1654 of file tm4c123fe6pm.h.
#define USB0_TXFUNCADDR4_R (*((volatile uint8_t *)0x400500A0)) |
Definition at line 1660 of file tm4c123fe6pm.h.
#define USB0_TXFUNCADDR5_R (*((volatile uint8_t *)0x400500A8)) |
Definition at line 1666 of file tm4c123fe6pm.h.
#define USB0_TXFUNCADDR6_R (*((volatile uint8_t *)0x400500B0)) |
Definition at line 1672 of file tm4c123fe6pm.h.
#define USB0_TXFUNCADDR7_R (*((volatile uint8_t *)0x400500B8)) |
Definition at line 1678 of file tm4c123fe6pm.h.
#define USB0_TXHUBADDR0_R (*((volatile uint8_t *)0x40050082)) |
Definition at line 1640 of file tm4c123fe6pm.h.
#define USB0_TXHUBADDR1_R (*((volatile uint8_t *)0x4005008A)) |
Definition at line 1643 of file tm4c123fe6pm.h.
#define USB0_TXHUBADDR2_R (*((volatile uint8_t *)0x40050092)) |
Definition at line 1649 of file tm4c123fe6pm.h.
#define USB0_TXHUBADDR3_R (*((volatile uint8_t *)0x4005009A)) |
Definition at line 1655 of file tm4c123fe6pm.h.
#define USB0_TXHUBADDR4_R (*((volatile uint8_t *)0x400500A2)) |
Definition at line 1661 of file tm4c123fe6pm.h.
#define USB0_TXHUBADDR5_R (*((volatile uint8_t *)0x400500AA)) |
Definition at line 1667 of file tm4c123fe6pm.h.
#define USB0_TXHUBADDR6_R (*((volatile uint8_t *)0x400500B2)) |
Definition at line 1673 of file tm4c123fe6pm.h.
#define USB0_TXHUBADDR7_R (*((volatile uint8_t *)0x400500BA)) |
Definition at line 1679 of file tm4c123fe6pm.h.
#define USB0_TXHUBPORT0_R (*((volatile uint8_t *)0x40050083)) |
Definition at line 1641 of file tm4c123fe6pm.h.
#define USB0_TXHUBPORT1_R (*((volatile uint8_t *)0x4005008B)) |
Definition at line 1644 of file tm4c123fe6pm.h.
#define USB0_TXHUBPORT2_R (*((volatile uint8_t *)0x40050093)) |
Definition at line 1650 of file tm4c123fe6pm.h.
#define USB0_TXHUBPORT3_R (*((volatile uint8_t *)0x4005009B)) |
Definition at line 1656 of file tm4c123fe6pm.h.
#define USB0_TXHUBPORT4_R (*((volatile uint8_t *)0x400500A3)) |
Definition at line 1662 of file tm4c123fe6pm.h.
#define USB0_TXHUBPORT5_R (*((volatile uint8_t *)0x400500AB)) |
Definition at line 1668 of file tm4c123fe6pm.h.
#define USB0_TXHUBPORT6_R (*((volatile uint8_t *)0x400500B3)) |
Definition at line 1674 of file tm4c123fe6pm.h.
#define USB0_TXHUBPORT7_R (*((volatile uint8_t *)0x400500BB)) |
Definition at line 1680 of file tm4c123fe6pm.h.
#define USB0_TXIE_R (*((volatile uint16_t *)0x40050006)) |
Definition at line 1615 of file tm4c123fe6pm.h.
#define USB0_TXINTERVAL1_R (*((volatile uint8_t *)0x4005011B)) |
Definition at line 1697 of file tm4c123fe6pm.h.
#define USB0_TXINTERVAL2_R (*((volatile uint8_t *)0x4005012B)) |
Definition at line 1708 of file tm4c123fe6pm.h.
#define USB0_TXINTERVAL3_R (*((volatile uint8_t *)0x4005013B)) |
Definition at line 1719 of file tm4c123fe6pm.h.
#define USB0_TXINTERVAL4_R (*((volatile uint8_t *)0x4005014B)) |
Definition at line 1730 of file tm4c123fe6pm.h.
#define USB0_TXINTERVAL5_R (*((volatile uint8_t *)0x4005015B)) |
Definition at line 1741 of file tm4c123fe6pm.h.
#define USB0_TXINTERVAL6_R (*((volatile uint8_t *)0x4005016B)) |
Definition at line 1752 of file tm4c123fe6pm.h.
#define USB0_TXINTERVAL7_R (*((volatile uint8_t *)0x4005017B)) |
Definition at line 1763 of file tm4c123fe6pm.h.
#define USB0_TXIS_R (*((volatile uint16_t *)0x40050002)) |
Definition at line 1613 of file tm4c123fe6pm.h.
#define USB0_TXMAXP1_R (*((volatile uint16_t *)0x40050110)) |
Definition at line 1689 of file tm4c123fe6pm.h.
#define USB0_TXMAXP2_R (*((volatile uint16_t *)0x40050120)) |
Definition at line 1700 of file tm4c123fe6pm.h.
#define USB0_TXMAXP3_R (*((volatile uint16_t *)0x40050130)) |
Definition at line 1711 of file tm4c123fe6pm.h.
#define USB0_TXMAXP4_R (*((volatile uint16_t *)0x40050140)) |
Definition at line 1722 of file tm4c123fe6pm.h.
#define USB0_TXMAXP5_R (*((volatile uint16_t *)0x40050150)) |
Definition at line 1733 of file tm4c123fe6pm.h.
#define USB0_TXMAXP6_R (*((volatile uint16_t *)0x40050160)) |
Definition at line 1744 of file tm4c123fe6pm.h.
#define USB0_TXMAXP7_R (*((volatile uint16_t *)0x40050170)) |
Definition at line 1755 of file tm4c123fe6pm.h.
#define USB0_TXTYPE1_R (*((volatile uint8_t *)0x4005011A)) |
Definition at line 1696 of file tm4c123fe6pm.h.
#define USB0_TXTYPE2_R (*((volatile uint8_t *)0x4005012A)) |
Definition at line 1707 of file tm4c123fe6pm.h.
#define USB0_TXTYPE3_R (*((volatile uint8_t *)0x4005013A)) |
Definition at line 1718 of file tm4c123fe6pm.h.
#define USB0_TXTYPE4_R (*((volatile uint8_t *)0x4005014A)) |
Definition at line 1729 of file tm4c123fe6pm.h.
#define USB0_TXTYPE5_R (*((volatile uint8_t *)0x4005015A)) |
Definition at line 1740 of file tm4c123fe6pm.h.
#define USB0_TXTYPE6_R (*((volatile uint8_t *)0x4005016A)) |
Definition at line 1751 of file tm4c123fe6pm.h.
#define USB0_TXTYPE7_R (*((volatile uint8_t *)0x4005017A)) |
Definition at line 1762 of file tm4c123fe6pm.h.
#define USB0_TYPE0_R (*((volatile uint8_t *)0x4005010A)) |
Definition at line 1687 of file tm4c123fe6pm.h.
#define USB0_VDC_R (*((volatile uint32_t *)0x40050430)) |
Definition at line 1783 of file tm4c123fe6pm.h.
#define USB0_VDCIM_R (*((volatile uint32_t *)0x40050438)) |
Definition at line 1785 of file tm4c123fe6pm.h.
#define USB0_VDCISC_R (*((volatile uint32_t *)0x4005043C)) |
Definition at line 1786 of file tm4c123fe6pm.h.
#define USB0_VDCRIS_R (*((volatile uint32_t *)0x40050434)) |
Definition at line 1784 of file tm4c123fe6pm.h.
#define USB0_VPLEN_R (*((volatile uint8_t *)0x4005007B)) |
Definition at line 1636 of file tm4c123fe6pm.h.
#define USB_CONTIM_WTCON_M 0x000000F0 |
Definition at line 7141 of file tm4c123fe6pm.h.
#define USB_CONTIM_WTCON_S 4 |
Definition at line 7143 of file tm4c123fe6pm.h.
#define USB_CONTIM_WTID_M 0x0000000F |
Definition at line 7142 of file tm4c123fe6pm.h.
#define USB_CONTIM_WTID_S 0 |
Definition at line 7144 of file tm4c123fe6pm.h.
#define USB_COUNT0_COUNT_M 0x0000007F |
Definition at line 7608 of file tm4c123fe6pm.h.
#define USB_COUNT0_COUNT_S 0 |
Definition at line 7609 of file tm4c123fe6pm.h.
#define USB_CSRH0_DT 0x00000002 |
Definition at line 7600 of file tm4c123fe6pm.h.
#define USB_CSRH0_DTWE 0x00000004 |
Definition at line 7599 of file tm4c123fe6pm.h.
#define USB_CSRH0_FLUSH 0x00000001 |
Definition at line 7601 of file tm4c123fe6pm.h.
#define USB_CSRL0_DATAEND 0x00000008 |
Definition at line 7588 of file tm4c123fe6pm.h.
#define USB_CSRL0_ERROR 0x00000010 |
Definition at line 7587 of file tm4c123fe6pm.h.
#define USB_CSRL0_NAKTO 0x00000080 |
Definition at line 7580 of file tm4c123fe6pm.h.
#define USB_CSRL0_REQPKT 0x00000020 |
Definition at line 7584 of file tm4c123fe6pm.h.
#define USB_CSRL0_RXRDY 0x00000001 |
Definition at line 7592 of file tm4c123fe6pm.h.
#define USB_CSRL0_RXRDYC 0x00000040 |
Definition at line 7583 of file tm4c123fe6pm.h.
#define USB_CSRL0_SETEND 0x00000010 |
Definition at line 7586 of file tm4c123fe6pm.h.
#define USB_CSRL0_SETENDC 0x00000080 |
Definition at line 7581 of file tm4c123fe6pm.h.
#define USB_CSRL0_SETUP 0x00000008 |
Definition at line 7589 of file tm4c123fe6pm.h.
#define USB_CSRL0_STALL 0x00000020 |
Definition at line 7585 of file tm4c123fe6pm.h.
#define USB_CSRL0_STALLED 0x00000004 |
Definition at line 7590 of file tm4c123fe6pm.h.
#define USB_CSRL0_STATUS 0x00000040 |
Definition at line 7582 of file tm4c123fe6pm.h.
#define USB_CSRL0_TXRDY 0x00000002 |
Definition at line 7591 of file tm4c123fe6pm.h.
#define USB_DEVCTL_DEV 0x00000080 |
Definition at line 7072 of file tm4c123fe6pm.h.
#define USB_DEVCTL_FSDEV 0x00000040 |
Definition at line 7073 of file tm4c123fe6pm.h.
#define USB_DEVCTL_HOST 0x00000004 |
Definition at line 7080 of file tm4c123fe6pm.h.
#define USB_DEVCTL_HOSTREQ 0x00000002 |
Definition at line 7081 of file tm4c123fe6pm.h.
#define USB_DEVCTL_LSDEV 0x00000020 |
Definition at line 7074 of file tm4c123fe6pm.h.
#define USB_DEVCTL_SESSION 0x00000001 |
Definition at line 7082 of file tm4c123fe6pm.h.
#define USB_DEVCTL_VBUS_AVALID 0x00000010 |
Definition at line 7078 of file tm4c123fe6pm.h.
#define USB_DEVCTL_VBUS_M 0x00000018 |
Definition at line 7075 of file tm4c123fe6pm.h.
#define USB_DEVCTL_VBUS_NONE 0x00000000 |
Definition at line 7076 of file tm4c123fe6pm.h.
#define USB_DEVCTL_VBUS_SEND 0x00000008 |
Definition at line 7077 of file tm4c123fe6pm.h.
#define USB_DEVCTL_VBUS_VALID 0x00000018 |
Definition at line 7079 of file tm4c123fe6pm.h.
#define USB_DMASEL_DMAARX_M 0x0000000F |
Definition at line 8920 of file tm4c123fe6pm.h.
#define USB_DMASEL_DMAARX_S 0 |
Definition at line 8926 of file tm4c123fe6pm.h.
#define USB_DMASEL_DMAATX_M 0x000000F0 |
Definition at line 8919 of file tm4c123fe6pm.h.
#define USB_DMASEL_DMAATX_S 4 |
Definition at line 8925 of file tm4c123fe6pm.h.
#define USB_DMASEL_DMABRX_M 0x00000F00 |
Definition at line 8918 of file tm4c123fe6pm.h.
#define USB_DMASEL_DMABRX_S 8 |
Definition at line 8924 of file tm4c123fe6pm.h.
#define USB_DMASEL_DMABTX_M 0x0000F000 |
Definition at line 8917 of file tm4c123fe6pm.h.
#define USB_DMASEL_DMABTX_S 12 |
Definition at line 8923 of file tm4c123fe6pm.h.
#define USB_DMASEL_DMACRX_M 0x000F0000 |
Definition at line 8916 of file tm4c123fe6pm.h.
#define USB_DMASEL_DMACRX_S 16 |
Definition at line 8922 of file tm4c123fe6pm.h.
#define USB_DMASEL_DMACTX_M 0x00F00000 |
Definition at line 8915 of file tm4c123fe6pm.h.
#define USB_DMASEL_DMACTX_S 20 |
Definition at line 8921 of file tm4c123fe6pm.h.
#define USB_DRIM_RESUME 0x00000001 |
Definition at line 8840 of file tm4c123fe6pm.h.
#define USB_DRISC_RESUME 0x00000001 |
Definition at line 8847 of file tm4c123fe6pm.h.
#define USB_DRRIS_RESUME 0x00000001 |
Definition at line 8833 of file tm4c123fe6pm.h.
#define USB_EPC_EPEN_HIGH 0x00000001 |
Definition at line 8800 of file tm4c123fe6pm.h.
#define USB_EPC_EPEN_LOW 0x00000000 |
Definition at line 8799 of file tm4c123fe6pm.h.
#define USB_EPC_EPEN_M 0x00000003 |
Definition at line 8797 of file tm4c123fe6pm.h.
#define USB_EPC_EPEN_VBHIGH 0x00000003 |
Definition at line 8803 of file tm4c123fe6pm.h.
#define USB_EPC_EPEN_VBLOW 0x00000002 |
Definition at line 8801 of file tm4c123fe6pm.h.
#define USB_EPC_EPENDE 0x00000004 |
Definition at line 8796 of file tm4c123fe6pm.h.
#define USB_EPC_PFLTACT_HIGH 0x00000300 |
Definition at line 8792 of file tm4c123fe6pm.h.
#define USB_EPC_PFLTACT_LOW 0x00000200 |
Definition at line 8791 of file tm4c123fe6pm.h.
#define USB_EPC_PFLTACT_M 0x00000300 |
Definition at line 8788 of file tm4c123fe6pm.h.
#define USB_EPC_PFLTACT_TRIS 0x00000100 |
Definition at line 8790 of file tm4c123fe6pm.h.
#define USB_EPC_PFLTACT_UNCHG 0x00000000 |
Definition at line 8789 of file tm4c123fe6pm.h.
#define USB_EPC_PFLTAEN 0x00000040 |
Definition at line 8793 of file tm4c123fe6pm.h.
#define USB_EPC_PFLTEN 0x00000010 |
Definition at line 8795 of file tm4c123fe6pm.h.
#define USB_EPC_PFLTSEN_HIGH 0x00000020 |
Definition at line 8794 of file tm4c123fe6pm.h.
#define USB_EPCIM_PF 0x00000001 |
Definition at line 8818 of file tm4c123fe6pm.h.
#define USB_EPCISC_PF 0x00000001 |
Definition at line 8825 of file tm4c123fe6pm.h.
#define USB_EPCRIS_PF 0x00000001 |
Definition at line 8811 of file tm4c123fe6pm.h.
#define USB_EPIDX_EPIDX_M 0x0000000F |
Definition at line 6991 of file tm4c123fe6pm.h.
#define USB_EPIDX_EPIDX_S 0 |
Definition at line 6992 of file tm4c123fe6pm.h.
#define USB_FADDR_M 0x0000007F |
Definition at line 6876 of file tm4c123fe6pm.h.
#define USB_FADDR_S 0 |
Definition at line 6877 of file tm4c123fe6pm.h.
#define USB_FIFO0_EPDATA_M 0xFFFFFFFF |
Definition at line 7008 of file tm4c123fe6pm.h.
#define USB_FIFO0_EPDATA_S 0 |
Definition at line 7009 of file tm4c123fe6pm.h.
#define USB_FIFO1_EPDATA_M 0xFFFFFFFF |
Definition at line 7016 of file tm4c123fe6pm.h.
#define USB_FIFO1_EPDATA_S 0 |
Definition at line 7017 of file tm4c123fe6pm.h.
#define USB_FIFO2_EPDATA_M 0xFFFFFFFF |
Definition at line 7024 of file tm4c123fe6pm.h.
#define USB_FIFO2_EPDATA_S 0 |
Definition at line 7025 of file tm4c123fe6pm.h.
#define USB_FIFO3_EPDATA_M 0xFFFFFFFF |
Definition at line 7032 of file tm4c123fe6pm.h.
#define USB_FIFO3_EPDATA_S 0 |
Definition at line 7033 of file tm4c123fe6pm.h.
#define USB_FIFO4_EPDATA_M 0xFFFFFFFF |
Definition at line 7040 of file tm4c123fe6pm.h.
#define USB_FIFO4_EPDATA_S 0 |
Definition at line 7041 of file tm4c123fe6pm.h.
#define USB_FIFO5_EPDATA_M 0xFFFFFFFF |
Definition at line 7048 of file tm4c123fe6pm.h.
#define USB_FIFO5_EPDATA_S 0 |
Definition at line 7049 of file tm4c123fe6pm.h.
#define USB_FIFO6_EPDATA_M 0xFFFFFFFF |
Definition at line 7056 of file tm4c123fe6pm.h.
#define USB_FIFO6_EPDATA_S 0 |
Definition at line 7057 of file tm4c123fe6pm.h.
#define USB_FIFO7_EPDATA_M 0xFFFFFFFF |
Definition at line 7064 of file tm4c123fe6pm.h.
#define USB_FIFO7_EPDATA_S 0 |
Definition at line 7065 of file tm4c123fe6pm.h.
#define USB_FRAME_M 0x000007FF |
Definition at line 6983 of file tm4c123fe6pm.h.
#define USB_FRAME_S 0 |
Definition at line 6984 of file tm4c123fe6pm.h.
#define USB_FSEOF_FSEOFG_M 0x000000FF |
Definition at line 7159 of file tm4c123fe6pm.h.
#define USB_FSEOF_FSEOFG_S 0 |
Definition at line 7160 of file tm4c123fe6pm.h.
#define USB_GPCS_DEVMOD 0x00000001 |
Definition at line 8856 of file tm4c123fe6pm.h.
#define USB_GPCS_DEVMODOTG 0x00000002 |
Definition at line 8855 of file tm4c123fe6pm.h.
#define USB_IDVIM_ID 0x00000001 |
Definition at line 8900 of file tm4c123fe6pm.h.
#define USB_IDVISC_ID 0x00000001 |
Definition at line 8907 of file tm4c123fe6pm.h.
#define USB_IDVRIS_ID 0x00000001 |
Definition at line 8892 of file tm4c123fe6pm.h.
#define USB_IE_BABBLE 0x00000004 |
Definition at line 6973 of file tm4c123fe6pm.h.
#define USB_IE_CONN 0x00000010 |
Definition at line 6971 of file tm4c123fe6pm.h.
#define USB_IE_DISCON 0x00000020 |
Definition at line 6970 of file tm4c123fe6pm.h.
#define USB_IE_RESET 0x00000004 |
Definition at line 6974 of file tm4c123fe6pm.h.
#define USB_IE_RESUME 0x00000002 |
Definition at line 6975 of file tm4c123fe6pm.h.
#define USB_IE_SESREQ 0x00000040 |
Definition at line 6968 of file tm4c123fe6pm.h.
#define USB_IE_SOF 0x00000008 |
Definition at line 6972 of file tm4c123fe6pm.h.
#define USB_IE_SUSPND 0x00000001 |
Definition at line 6976 of file tm4c123fe6pm.h.
#define USB_IE_VBUSERR 0x00000080 |
Definition at line 6966 of file tm4c123fe6pm.h.
#define USB_IS_BABBLE 0x00000004 |
Definition at line 6956 of file tm4c123fe6pm.h.
#define USB_IS_CONN 0x00000010 |
Definition at line 6954 of file tm4c123fe6pm.h.
#define USB_IS_DISCON 0x00000020 |
Definition at line 6953 of file tm4c123fe6pm.h.
#define USB_IS_RESET 0x00000004 |
Definition at line 6957 of file tm4c123fe6pm.h.
#define USB_IS_RESUME 0x00000002 |
Definition at line 6958 of file tm4c123fe6pm.h.
#define USB_IS_SESREQ 0x00000040 |
Definition at line 6952 of file tm4c123fe6pm.h.
#define USB_IS_SOF 0x00000008 |
Definition at line 6955 of file tm4c123fe6pm.h.
#define USB_IS_SUSPEND 0x00000001 |
Definition at line 6959 of file tm4c123fe6pm.h.
#define USB_IS_VBUSERR 0x00000080 |
Definition at line 6951 of file tm4c123fe6pm.h.
#define USB_LSEOF_LSEOFG_M 0x000000FF |
Definition at line 7167 of file tm4c123fe6pm.h.
#define USB_LSEOF_LSEOFG_S 0 |
Definition at line 7168 of file tm4c123fe6pm.h.
#define USB_NAKLMT_NAKLMT_M 0x0000001F |
Definition at line 7625 of file tm4c123fe6pm.h.
#define USB_NAKLMT_NAKLMT_S 0 |
Definition at line 7626 of file tm4c123fe6pm.h.
#define USB_POWER_ISOUP 0x00000080 |
Definition at line 6884 of file tm4c123fe6pm.h.
#define USB_POWER_PWRDNPHY 0x00000001 |
Definition at line 6889 of file tm4c123fe6pm.h.
#define USB_POWER_RESET 0x00000008 |
Definition at line 6886 of file tm4c123fe6pm.h.
#define USB_POWER_RESUME 0x00000004 |
Definition at line 6887 of file tm4c123fe6pm.h.
#define USB_POWER_SOFTCONN 0x00000040 |
Definition at line 6885 of file tm4c123fe6pm.h.
#define USB_POWER_SUSPEND 0x00000002 |
Definition at line 6888 of file tm4c123fe6pm.h.
#define USB_PP_ECNT_M 0x0000FF00 |
Definition at line 8933 of file tm4c123fe6pm.h.
#define USB_PP_ECNT_S 8 |
Definition at line 8942 of file tm4c123fe6pm.h.
#define USB_PP_PHY 0x00000010 |
Definition at line 8938 of file tm4c123fe6pm.h.
#define USB_PP_TYPE_0 0x00000000 |
Definition at line 8940 of file tm4c123fe6pm.h.
#define USB_PP_TYPE_M 0x0000000F |
Definition at line 8939 of file tm4c123fe6pm.h.
#define USB_PP_USB_DEVICE 0x00000040 |
Definition at line 8935 of file tm4c123fe6pm.h.
#define USB_PP_USB_HOSTDEVICE 0x00000080 |
Definition at line 8936 of file tm4c123fe6pm.h.
#define USB_PP_USB_M 0x000000C0 |
Definition at line 8934 of file tm4c123fe6pm.h.
#define USB_PP_USB_OTG 0x000000C0 |
Definition at line 8937 of file tm4c123fe6pm.h.
#define USB_RQPKTCOUNT1_M 0x0000FFFF |
Definition at line 8684 of file tm4c123fe6pm.h.
#define USB_RQPKTCOUNT1_S 0 |
Definition at line 8685 of file tm4c123fe6pm.h.
#define USB_RQPKTCOUNT2_M 0x0000FFFF |
Definition at line 8693 of file tm4c123fe6pm.h.
#define USB_RQPKTCOUNT2_S 0 |
Definition at line 8694 of file tm4c123fe6pm.h.
#define USB_RQPKTCOUNT3_M 0x0000FFFF |
Definition at line 8702 of file tm4c123fe6pm.h.
#define USB_RQPKTCOUNT3_S 0 |
Definition at line 8703 of file tm4c123fe6pm.h.
#define USB_RQPKTCOUNT4_COUNT_M 0x0000FFFF |
Definition at line 8711 of file tm4c123fe6pm.h.
#define USB_RQPKTCOUNT4_COUNT_S 0 |
Definition at line 8712 of file tm4c123fe6pm.h.
#define USB_RQPKTCOUNT5_COUNT_M 0x0000FFFF |
Definition at line 8720 of file tm4c123fe6pm.h.
#define USB_RQPKTCOUNT5_COUNT_S 0 |
Definition at line 8721 of file tm4c123fe6pm.h.
#define USB_RQPKTCOUNT6_COUNT_M 0x0000FFFF |
Definition at line 8729 of file tm4c123fe6pm.h.
#define USB_RQPKTCOUNT6_COUNT_S 0 |
Definition at line 8730 of file tm4c123fe6pm.h.
#define USB_RQPKTCOUNT7_COUNT_M 0x0000FFFF |
Definition at line 8738 of file tm4c123fe6pm.h.
#define USB_RQPKTCOUNT7_COUNT_S 0 |
Definition at line 8739 of file tm4c123fe6pm.h.
#define USB_RXCOUNT1_COUNT_M 0x00001FFF |
Definition at line 7711 of file tm4c123fe6pm.h.
#define USB_RXCOUNT1_COUNT_S 0 |
Definition at line 7712 of file tm4c123fe6pm.h.
#define USB_RXCOUNT2_COUNT_M 0x00001FFF |
Definition at line 7861 of file tm4c123fe6pm.h.
#define USB_RXCOUNT2_COUNT_S 0 |
Definition at line 7862 of file tm4c123fe6pm.h.
#define USB_RXCOUNT3_COUNT_M 0x00001FFF |
Definition at line 8011 of file tm4c123fe6pm.h.
#define USB_RXCOUNT3_COUNT_S 0 |
Definition at line 8012 of file tm4c123fe6pm.h.
#define USB_RXCOUNT4_COUNT_M 0x00001FFF |
Definition at line 8161 of file tm4c123fe6pm.h.
#define USB_RXCOUNT4_COUNT_S 0 |
Definition at line 8162 of file tm4c123fe6pm.h.
#define USB_RXCOUNT5_COUNT_M 0x00001FFF |
Definition at line 8311 of file tm4c123fe6pm.h.
#define USB_RXCOUNT5_COUNT_S 0 |
Definition at line 8312 of file tm4c123fe6pm.h.
#define USB_RXCOUNT6_COUNT_M 0x00001FFF |
Definition at line 8461 of file tm4c123fe6pm.h.
#define USB_RXCOUNT6_COUNT_S 0 |
Definition at line 8462 of file tm4c123fe6pm.h.
#define USB_RXCOUNT7_COUNT_M 0x00001FFF |
Definition at line 8611 of file tm4c123fe6pm.h.
#define USB_RXCOUNT7_COUNT_S 0 |
Definition at line 8612 of file tm4c123fe6pm.h.
#define USB_RXCSRH1_AUTOCL 0x00000080 |
Definition at line 7696 of file tm4c123fe6pm.h.
#define USB_RXCSRH1_AUTORQ 0x00000040 |
Definition at line 7697 of file tm4c123fe6pm.h.
#define USB_RXCSRH1_DISNYET 0x00000010 |
Definition at line 7700 of file tm4c123fe6pm.h.
#define USB_RXCSRH1_DMAEN 0x00000020 |
Definition at line 7699 of file tm4c123fe6pm.h.
#define USB_RXCSRH1_DMAMOD 0x00000008 |
Definition at line 7702 of file tm4c123fe6pm.h.
#define USB_RXCSRH1_DT 0x00000002 |
Definition at line 7704 of file tm4c123fe6pm.h.
#define USB_RXCSRH1_DTWE 0x00000004 |
Definition at line 7703 of file tm4c123fe6pm.h.
#define USB_RXCSRH1_ISO 0x00000040 |
Definition at line 7698 of file tm4c123fe6pm.h.
#define USB_RXCSRH1_PIDERR 0x00000010 |
Definition at line 7701 of file tm4c123fe6pm.h.
#define USB_RXCSRH2_AUTOCL 0x00000080 |
Definition at line 7846 of file tm4c123fe6pm.h.
#define USB_RXCSRH2_AUTORQ 0x00000040 |
Definition at line 7847 of file tm4c123fe6pm.h.
#define USB_RXCSRH2_DISNYET 0x00000010 |
Definition at line 7850 of file tm4c123fe6pm.h.
#define USB_RXCSRH2_DMAEN 0x00000020 |
Definition at line 7849 of file tm4c123fe6pm.h.
#define USB_RXCSRH2_DMAMOD 0x00000008 |
Definition at line 7852 of file tm4c123fe6pm.h.
#define USB_RXCSRH2_DT 0x00000002 |
Definition at line 7854 of file tm4c123fe6pm.h.
#define USB_RXCSRH2_DTWE 0x00000004 |
Definition at line 7853 of file tm4c123fe6pm.h.
#define USB_RXCSRH2_ISO 0x00000040 |
Definition at line 7848 of file tm4c123fe6pm.h.
#define USB_RXCSRH2_PIDERR 0x00000010 |
Definition at line 7851 of file tm4c123fe6pm.h.
#define USB_RXCSRH3_AUTOCL 0x00000080 |
Definition at line 7996 of file tm4c123fe6pm.h.
#define USB_RXCSRH3_AUTORQ 0x00000040 |
Definition at line 7997 of file tm4c123fe6pm.h.
#define USB_RXCSRH3_DISNYET 0x00000010 |
Definition at line 8000 of file tm4c123fe6pm.h.
#define USB_RXCSRH3_DMAEN 0x00000020 |
Definition at line 7999 of file tm4c123fe6pm.h.
#define USB_RXCSRH3_DMAMOD 0x00000008 |
Definition at line 8002 of file tm4c123fe6pm.h.
#define USB_RXCSRH3_DT 0x00000002 |
Definition at line 8004 of file tm4c123fe6pm.h.
#define USB_RXCSRH3_DTWE 0x00000004 |
Definition at line 8003 of file tm4c123fe6pm.h.
#define USB_RXCSRH3_ISO 0x00000040 |
Definition at line 7998 of file tm4c123fe6pm.h.
#define USB_RXCSRH3_PIDERR 0x00000010 |
Definition at line 8001 of file tm4c123fe6pm.h.
#define USB_RXCSRH4_AUTOCL 0x00000080 |
Definition at line 8146 of file tm4c123fe6pm.h.
#define USB_RXCSRH4_AUTORQ 0x00000040 |
Definition at line 8147 of file tm4c123fe6pm.h.
#define USB_RXCSRH4_DISNYET 0x00000010 |
Definition at line 8150 of file tm4c123fe6pm.h.
#define USB_RXCSRH4_DMAEN 0x00000020 |
Definition at line 8149 of file tm4c123fe6pm.h.
#define USB_RXCSRH4_DMAMOD 0x00000008 |
Definition at line 8152 of file tm4c123fe6pm.h.
#define USB_RXCSRH4_DT 0x00000002 |
Definition at line 8154 of file tm4c123fe6pm.h.
#define USB_RXCSRH4_DTWE 0x00000004 |
Definition at line 8153 of file tm4c123fe6pm.h.
#define USB_RXCSRH4_ISO 0x00000040 |
Definition at line 8148 of file tm4c123fe6pm.h.
#define USB_RXCSRH4_PIDERR 0x00000010 |
Definition at line 8151 of file tm4c123fe6pm.h.
#define USB_RXCSRH5_AUTOCL 0x00000080 |
Definition at line 8296 of file tm4c123fe6pm.h.
#define USB_RXCSRH5_AUTORQ 0x00000040 |
Definition at line 8297 of file tm4c123fe6pm.h.
#define USB_RXCSRH5_DISNYET 0x00000010 |
Definition at line 8300 of file tm4c123fe6pm.h.
#define USB_RXCSRH5_DMAEN 0x00000020 |
Definition at line 8299 of file tm4c123fe6pm.h.
#define USB_RXCSRH5_DMAMOD 0x00000008 |
Definition at line 8302 of file tm4c123fe6pm.h.
#define USB_RXCSRH5_DT 0x00000002 |
Definition at line 8304 of file tm4c123fe6pm.h.
#define USB_RXCSRH5_DTWE 0x00000004 |
Definition at line 8303 of file tm4c123fe6pm.h.
#define USB_RXCSRH5_ISO 0x00000040 |
Definition at line 8298 of file tm4c123fe6pm.h.
#define USB_RXCSRH5_PIDERR 0x00000010 |
Definition at line 8301 of file tm4c123fe6pm.h.
#define USB_RXCSRH6_AUTOCL 0x00000080 |
Definition at line 8446 of file tm4c123fe6pm.h.
#define USB_RXCSRH6_AUTORQ 0x00000040 |
Definition at line 8447 of file tm4c123fe6pm.h.
#define USB_RXCSRH6_DISNYET 0x00000010 |
Definition at line 8450 of file tm4c123fe6pm.h.
#define USB_RXCSRH6_DMAEN 0x00000020 |
Definition at line 8449 of file tm4c123fe6pm.h.
#define USB_RXCSRH6_DMAMOD 0x00000008 |
Definition at line 8452 of file tm4c123fe6pm.h.
#define USB_RXCSRH6_DT 0x00000002 |
Definition at line 8454 of file tm4c123fe6pm.h.
#define USB_RXCSRH6_DTWE 0x00000004 |
Definition at line 8453 of file tm4c123fe6pm.h.
#define USB_RXCSRH6_ISO 0x00000040 |
Definition at line 8448 of file tm4c123fe6pm.h.
#define USB_RXCSRH6_PIDERR 0x00000010 |
Definition at line 8451 of file tm4c123fe6pm.h.
#define USB_RXCSRH7_AUTOCL 0x00000080 |
Definition at line 8596 of file tm4c123fe6pm.h.
#define USB_RXCSRH7_AUTORQ 0x00000040 |
Definition at line 8598 of file tm4c123fe6pm.h.
#define USB_RXCSRH7_DISNYET 0x00000010 |
Definition at line 8601 of file tm4c123fe6pm.h.
#define USB_RXCSRH7_DMAEN 0x00000020 |
Definition at line 8599 of file tm4c123fe6pm.h.
#define USB_RXCSRH7_DMAMOD 0x00000008 |
Definition at line 8602 of file tm4c123fe6pm.h.
#define USB_RXCSRH7_DT 0x00000002 |
Definition at line 8604 of file tm4c123fe6pm.h.
#define USB_RXCSRH7_DTWE 0x00000004 |
Definition at line 8603 of file tm4c123fe6pm.h.
#define USB_RXCSRH7_ISO 0x00000040 |
Definition at line 8597 of file tm4c123fe6pm.h.
#define USB_RXCSRH7_PIDERR 0x00000010 |
Definition at line 8600 of file tm4c123fe6pm.h.
#define USB_RXCSRL1_CLRDT 0x00000080 |
Definition at line 7679 of file tm4c123fe6pm.h.
#define USB_RXCSRL1_DATAERR 0x00000008 |
Definition at line 7684 of file tm4c123fe6pm.h.
#define USB_RXCSRL1_ERROR 0x00000004 |
Definition at line 7687 of file tm4c123fe6pm.h.
#define USB_RXCSRL1_FLUSH 0x00000010 |
Definition at line 7683 of file tm4c123fe6pm.h.
#define USB_RXCSRL1_FULL 0x00000002 |
Definition at line 7688 of file tm4c123fe6pm.h.
#define USB_RXCSRL1_NAKTO 0x00000008 |
Definition at line 7685 of file tm4c123fe6pm.h.
#define USB_RXCSRL1_OVER 0x00000004 |
Definition at line 7686 of file tm4c123fe6pm.h.
#define USB_RXCSRL1_REQPKT 0x00000020 |
Definition at line 7682 of file tm4c123fe6pm.h.
#define USB_RXCSRL1_RXRDY 0x00000001 |
Definition at line 7689 of file tm4c123fe6pm.h.
#define USB_RXCSRL1_STALL 0x00000020 |
Definition at line 7681 of file tm4c123fe6pm.h.
#define USB_RXCSRL1_STALLED 0x00000040 |
Definition at line 7680 of file tm4c123fe6pm.h.
#define USB_RXCSRL2_CLRDT 0x00000080 |
Definition at line 7829 of file tm4c123fe6pm.h.
#define USB_RXCSRL2_DATAERR 0x00000008 |
Definition at line 7834 of file tm4c123fe6pm.h.
#define USB_RXCSRL2_ERROR 0x00000004 |
Definition at line 7836 of file tm4c123fe6pm.h.
#define USB_RXCSRL2_FLUSH 0x00000010 |
Definition at line 7833 of file tm4c123fe6pm.h.
#define USB_RXCSRL2_FULL 0x00000002 |
Definition at line 7838 of file tm4c123fe6pm.h.
#define USB_RXCSRL2_NAKTO 0x00000008 |
Definition at line 7835 of file tm4c123fe6pm.h.
#define USB_RXCSRL2_OVER 0x00000004 |
Definition at line 7837 of file tm4c123fe6pm.h.
#define USB_RXCSRL2_REQPKT 0x00000020 |
Definition at line 7831 of file tm4c123fe6pm.h.
#define USB_RXCSRL2_RXRDY 0x00000001 |
Definition at line 7839 of file tm4c123fe6pm.h.
#define USB_RXCSRL2_STALL 0x00000020 |
Definition at line 7832 of file tm4c123fe6pm.h.
#define USB_RXCSRL2_STALLED 0x00000040 |
Definition at line 7830 of file tm4c123fe6pm.h.
#define USB_RXCSRL3_CLRDT 0x00000080 |
Definition at line 7979 of file tm4c123fe6pm.h.
#define USB_RXCSRL3_DATAERR 0x00000008 |
Definition at line 7984 of file tm4c123fe6pm.h.
#define USB_RXCSRL3_ERROR 0x00000004 |
Definition at line 7986 of file tm4c123fe6pm.h.
#define USB_RXCSRL3_FLUSH 0x00000010 |
Definition at line 7983 of file tm4c123fe6pm.h.
#define USB_RXCSRL3_FULL 0x00000002 |
Definition at line 7988 of file tm4c123fe6pm.h.
#define USB_RXCSRL3_NAKTO 0x00000008 |
Definition at line 7985 of file tm4c123fe6pm.h.
#define USB_RXCSRL3_OVER 0x00000004 |
Definition at line 7987 of file tm4c123fe6pm.h.
#define USB_RXCSRL3_REQPKT 0x00000020 |
Definition at line 7982 of file tm4c123fe6pm.h.
#define USB_RXCSRL3_RXRDY 0x00000001 |
Definition at line 7989 of file tm4c123fe6pm.h.
#define USB_RXCSRL3_STALL 0x00000020 |
Definition at line 7981 of file tm4c123fe6pm.h.
#define USB_RXCSRL3_STALLED 0x00000040 |
Definition at line 7980 of file tm4c123fe6pm.h.
#define USB_RXCSRL4_CLRDT 0x00000080 |
Definition at line 8129 of file tm4c123fe6pm.h.
#define USB_RXCSRL4_DATAERR 0x00000008 |
Definition at line 8135 of file tm4c123fe6pm.h.
#define USB_RXCSRL4_ERROR 0x00000004 |
Definition at line 8137 of file tm4c123fe6pm.h.
#define USB_RXCSRL4_FLUSH 0x00000010 |
Definition at line 8133 of file tm4c123fe6pm.h.
#define USB_RXCSRL4_FULL 0x00000002 |
Definition at line 8138 of file tm4c123fe6pm.h.
#define USB_RXCSRL4_NAKTO 0x00000008 |
Definition at line 8134 of file tm4c123fe6pm.h.
#define USB_RXCSRL4_OVER 0x00000004 |
Definition at line 8136 of file tm4c123fe6pm.h.
#define USB_RXCSRL4_REQPKT 0x00000020 |
Definition at line 8132 of file tm4c123fe6pm.h.
#define USB_RXCSRL4_RXRDY 0x00000001 |
Definition at line 8139 of file tm4c123fe6pm.h.
#define USB_RXCSRL4_STALL 0x00000020 |
Definition at line 8131 of file tm4c123fe6pm.h.
#define USB_RXCSRL4_STALLED 0x00000040 |
Definition at line 8130 of file tm4c123fe6pm.h.
#define USB_RXCSRL5_CLRDT 0x00000080 |
Definition at line 8279 of file tm4c123fe6pm.h.
#define USB_RXCSRL5_DATAERR 0x00000008 |
Definition at line 8285 of file tm4c123fe6pm.h.
#define USB_RXCSRL5_ERROR 0x00000004 |
Definition at line 8286 of file tm4c123fe6pm.h.
#define USB_RXCSRL5_FLUSH 0x00000010 |
Definition at line 8283 of file tm4c123fe6pm.h.
#define USB_RXCSRL5_FULL 0x00000002 |
Definition at line 8288 of file tm4c123fe6pm.h.
#define USB_RXCSRL5_NAKTO 0x00000008 |
Definition at line 8284 of file tm4c123fe6pm.h.
#define USB_RXCSRL5_OVER 0x00000004 |
Definition at line 8287 of file tm4c123fe6pm.h.
#define USB_RXCSRL5_REQPKT 0x00000020 |
Definition at line 8282 of file tm4c123fe6pm.h.
#define USB_RXCSRL5_RXRDY 0x00000001 |
Definition at line 8289 of file tm4c123fe6pm.h.
#define USB_RXCSRL5_STALL 0x00000020 |
Definition at line 8281 of file tm4c123fe6pm.h.
#define USB_RXCSRL5_STALLED 0x00000040 |
Definition at line 8280 of file tm4c123fe6pm.h.
#define USB_RXCSRL6_CLRDT 0x00000080 |
Definition at line 8429 of file tm4c123fe6pm.h.
#define USB_RXCSRL6_DATAERR 0x00000008 |
Definition at line 8435 of file tm4c123fe6pm.h.
#define USB_RXCSRL6_ERROR 0x00000004 |
Definition at line 8436 of file tm4c123fe6pm.h.
#define USB_RXCSRL6_FLUSH 0x00000010 |
Definition at line 8433 of file tm4c123fe6pm.h.
#define USB_RXCSRL6_FULL 0x00000002 |
Definition at line 8438 of file tm4c123fe6pm.h.
#define USB_RXCSRL6_NAKTO 0x00000008 |
Definition at line 8434 of file tm4c123fe6pm.h.
#define USB_RXCSRL6_OVER 0x00000004 |
Definition at line 8437 of file tm4c123fe6pm.h.
#define USB_RXCSRL6_REQPKT 0x00000020 |
Definition at line 8431 of file tm4c123fe6pm.h.
#define USB_RXCSRL6_RXRDY 0x00000001 |
Definition at line 8439 of file tm4c123fe6pm.h.
#define USB_RXCSRL6_STALL 0x00000020 |
Definition at line 8432 of file tm4c123fe6pm.h.
#define USB_RXCSRL6_STALLED 0x00000040 |
Definition at line 8430 of file tm4c123fe6pm.h.
#define USB_RXCSRL7_CLRDT 0x00000080 |
Definition at line 8579 of file tm4c123fe6pm.h.
#define USB_RXCSRL7_DATAERR 0x00000008 |
Definition at line 8584 of file tm4c123fe6pm.h.
#define USB_RXCSRL7_ERROR 0x00000004 |
Definition at line 8586 of file tm4c123fe6pm.h.
#define USB_RXCSRL7_FLUSH 0x00000010 |
Definition at line 8583 of file tm4c123fe6pm.h.
#define USB_RXCSRL7_FULL 0x00000002 |
Definition at line 8588 of file tm4c123fe6pm.h.
#define USB_RXCSRL7_NAKTO 0x00000008 |
Definition at line 8585 of file tm4c123fe6pm.h.
#define USB_RXCSRL7_OVER 0x00000004 |
Definition at line 8587 of file tm4c123fe6pm.h.
#define USB_RXCSRL7_REQPKT 0x00000020 |
Definition at line 8581 of file tm4c123fe6pm.h.
#define USB_RXCSRL7_RXRDY 0x00000001 |
Definition at line 8589 of file tm4c123fe6pm.h.
#define USB_RXCSRL7_STALL 0x00000020 |
Definition at line 8582 of file tm4c123fe6pm.h.
#define USB_RXCSRL7_STALLED 0x00000040 |
Definition at line 8580 of file tm4c123fe6pm.h.
#define USB_RXDPKTBUFDIS_EP1 0x00000002 |
Definition at line 8759 of file tm4c123fe6pm.h.
#define USB_RXDPKTBUFDIS_EP2 0x00000004 |
Definition at line 8757 of file tm4c123fe6pm.h.
#define USB_RXDPKTBUFDIS_EP3 0x00000008 |
Definition at line 8755 of file tm4c123fe6pm.h.
#define USB_RXDPKTBUFDIS_EP4 0x00000010 |
Definition at line 8753 of file tm4c123fe6pm.h.
#define USB_RXDPKTBUFDIS_EP5 0x00000020 |
Definition at line 8751 of file tm4c123fe6pm.h.
#define USB_RXDPKTBUFDIS_EP6 0x00000040 |
Definition at line 8749 of file tm4c123fe6pm.h.
#define USB_RXDPKTBUFDIS_EP7 0x00000080 |
Definition at line 8747 of file tm4c123fe6pm.h.
#define USB_RXFIFOADD_ADDR_M 0x000001FF |
Definition at line 7133 of file tm4c123fe6pm.h.
#define USB_RXFIFOADD_ADDR_S 0 |
Definition at line 7134 of file tm4c123fe6pm.h.
#define USB_RXFIFOSZ_DPB 0x00000010 |
Definition at line 7106 of file tm4c123fe6pm.h.
#define USB_RXFIFOSZ_SIZE_1024 0x00000007 |
Definition at line 7115 of file tm4c123fe6pm.h.
#define USB_RXFIFOSZ_SIZE_128 0x00000004 |
Definition at line 7112 of file tm4c123fe6pm.h.
#define USB_RXFIFOSZ_SIZE_16 0x00000001 |
Definition at line 7109 of file tm4c123fe6pm.h.
#define USB_RXFIFOSZ_SIZE_2048 0x00000008 |
Definition at line 7116 of file tm4c123fe6pm.h.
#define USB_RXFIFOSZ_SIZE_256 0x00000005 |
Definition at line 7113 of file tm4c123fe6pm.h.
#define USB_RXFIFOSZ_SIZE_32 0x00000002 |
Definition at line 7110 of file tm4c123fe6pm.h.
#define USB_RXFIFOSZ_SIZE_512 0x00000006 |
Definition at line 7114 of file tm4c123fe6pm.h.
#define USB_RXFIFOSZ_SIZE_64 0x00000003 |
Definition at line 7111 of file tm4c123fe6pm.h.
#define USB_RXFIFOSZ_SIZE_8 0x00000000 |
Definition at line 7108 of file tm4c123fe6pm.h.
#define USB_RXFIFOSZ_SIZE_M 0x0000000F |
Definition at line 7107 of file tm4c123fe6pm.h.
#define USB_RXFUNCADDR1_ADDR_M 0x0000007F |
Definition at line 7230 of file tm4c123fe6pm.h.
#define USB_RXFUNCADDR1_ADDR_S 0 |
Definition at line 7231 of file tm4c123fe6pm.h.
#define USB_RXFUNCADDR2_ADDR_M 0x0000007F |
Definition at line 7284 of file tm4c123fe6pm.h.
#define USB_RXFUNCADDR2_ADDR_S 0 |
Definition at line 7285 of file tm4c123fe6pm.h.
#define USB_RXFUNCADDR3_ADDR_M 0x0000007F |
Definition at line 7338 of file tm4c123fe6pm.h.
#define USB_RXFUNCADDR3_ADDR_S 0 |
Definition at line 7339 of file tm4c123fe6pm.h.
#define USB_RXFUNCADDR4_ADDR_M 0x0000007F |
Definition at line 7392 of file tm4c123fe6pm.h.
#define USB_RXFUNCADDR4_ADDR_S 0 |
Definition at line 7393 of file tm4c123fe6pm.h.
#define USB_RXFUNCADDR5_ADDR_M 0x0000007F |
Definition at line 7446 of file tm4c123fe6pm.h.
#define USB_RXFUNCADDR5_ADDR_S 0 |
Definition at line 7447 of file tm4c123fe6pm.h.
#define USB_RXFUNCADDR6_ADDR_M 0x0000007F |
Definition at line 7500 of file tm4c123fe6pm.h.
#define USB_RXFUNCADDR6_ADDR_S 0 |
Definition at line 7501 of file tm4c123fe6pm.h.
#define USB_RXFUNCADDR7_ADDR_M 0x0000007F |
Definition at line 7554 of file tm4c123fe6pm.h.
#define USB_RXFUNCADDR7_ADDR_S 0 |
Definition at line 7555 of file tm4c123fe6pm.h.
#define USB_RXHUBADDR1_ADDR_M 0x0000007F |
Definition at line 7239 of file tm4c123fe6pm.h.
#define USB_RXHUBADDR1_ADDR_S 0 |
Definition at line 7240 of file tm4c123fe6pm.h.
#define USB_RXHUBADDR2_ADDR_M 0x0000007F |
Definition at line 7293 of file tm4c123fe6pm.h.
#define USB_RXHUBADDR2_ADDR_S 0 |
Definition at line 7294 of file tm4c123fe6pm.h.
#define USB_RXHUBADDR3_ADDR_M 0x0000007F |
Definition at line 7347 of file tm4c123fe6pm.h.
#define USB_RXHUBADDR3_ADDR_S 0 |
Definition at line 7348 of file tm4c123fe6pm.h.
#define USB_RXHUBADDR4_ADDR_M 0x0000007F |
Definition at line 7401 of file tm4c123fe6pm.h.
#define USB_RXHUBADDR4_ADDR_S 0 |
Definition at line 7402 of file tm4c123fe6pm.h.
#define USB_RXHUBADDR5_ADDR_M 0x0000007F |
Definition at line 7455 of file tm4c123fe6pm.h.
#define USB_RXHUBADDR5_ADDR_S 0 |
Definition at line 7456 of file tm4c123fe6pm.h.
#define USB_RXHUBADDR6_ADDR_M 0x0000007F |
Definition at line 7509 of file tm4c123fe6pm.h.
#define USB_RXHUBADDR6_ADDR_S 0 |
Definition at line 7510 of file tm4c123fe6pm.h.
#define USB_RXHUBADDR7_ADDR_M 0x0000007F |
Definition at line 7563 of file tm4c123fe6pm.h.
#define USB_RXHUBADDR7_ADDR_S 0 |
Definition at line 7564 of file tm4c123fe6pm.h.
#define USB_RXHUBPORT1_PORT_M 0x0000007F |
Definition at line 7248 of file tm4c123fe6pm.h.
#define USB_RXHUBPORT1_PORT_S 0 |
Definition at line 7249 of file tm4c123fe6pm.h.
#define USB_RXHUBPORT2_PORT_M 0x0000007F |
Definition at line 7302 of file tm4c123fe6pm.h.
#define USB_RXHUBPORT2_PORT_S 0 |
Definition at line 7303 of file tm4c123fe6pm.h.
#define USB_RXHUBPORT3_PORT_M 0x0000007F |
Definition at line 7356 of file tm4c123fe6pm.h.
#define USB_RXHUBPORT3_PORT_S 0 |
Definition at line 7357 of file tm4c123fe6pm.h.
#define USB_RXHUBPORT4_PORT_M 0x0000007F |
Definition at line 7410 of file tm4c123fe6pm.h.
#define USB_RXHUBPORT4_PORT_S 0 |
Definition at line 7411 of file tm4c123fe6pm.h.
#define USB_RXHUBPORT5_PORT_M 0x0000007F |
Definition at line 7464 of file tm4c123fe6pm.h.
#define USB_RXHUBPORT5_PORT_S 0 |
Definition at line 7465 of file tm4c123fe6pm.h.
#define USB_RXHUBPORT6_PORT_M 0x0000007F |
Definition at line 7518 of file tm4c123fe6pm.h.
#define USB_RXHUBPORT6_PORT_S 0 |
Definition at line 7519 of file tm4c123fe6pm.h.
#define USB_RXHUBPORT7_PORT_M 0x0000007F |
Definition at line 7572 of file tm4c123fe6pm.h.
#define USB_RXHUBPORT7_PORT_S 0 |
Definition at line 7573 of file tm4c123fe6pm.h.
#define USB_RXIE_EP1 0x00000002 |
Definition at line 6944 of file tm4c123fe6pm.h.
#define USB_RXIE_EP2 0x00000004 |
Definition at line 6943 of file tm4c123fe6pm.h.
#define USB_RXIE_EP3 0x00000008 |
Definition at line 6942 of file tm4c123fe6pm.h.
#define USB_RXIE_EP4 0x00000010 |
Definition at line 6941 of file tm4c123fe6pm.h.
#define USB_RXIE_EP5 0x00000020 |
Definition at line 6940 of file tm4c123fe6pm.h.
#define USB_RXIE_EP6 0x00000040 |
Definition at line 6939 of file tm4c123fe6pm.h.
#define USB_RXIE_EP7 0x00000080 |
Definition at line 6938 of file tm4c123fe6pm.h.
#define USB_RXINTERVAL1_NAKLMT_M 0x000000FF |
Definition at line 7771 of file tm4c123fe6pm.h.
#define USB_RXINTERVAL1_NAKLMT_S 0 |
Definition at line 7775 of file tm4c123fe6pm.h.
#define USB_RXINTERVAL1_TXPOLL_M 0x000000FF |
Definition at line 7769 of file tm4c123fe6pm.h.
#define USB_RXINTERVAL1_TXPOLL_S 0 |
Definition at line 7773 of file tm4c123fe6pm.h.
#define USB_RXINTERVAL2_NAKLMT_M 0x000000FF |
Definition at line 7921 of file tm4c123fe6pm.h.
#define USB_RXINTERVAL2_NAKLMT_S 0 |
Definition at line 7925 of file tm4c123fe6pm.h.
#define USB_RXINTERVAL2_TXPOLL_M 0x000000FF |
Definition at line 7919 of file tm4c123fe6pm.h.
#define USB_RXINTERVAL2_TXPOLL_S 0 |
Definition at line 7923 of file tm4c123fe6pm.h.
#define USB_RXINTERVAL3_NAKLMT_M 0x000000FF |
Definition at line 8071 of file tm4c123fe6pm.h.
#define USB_RXINTERVAL3_NAKLMT_S 0 |
Definition at line 8075 of file tm4c123fe6pm.h.
#define USB_RXINTERVAL3_TXPOLL_M 0x000000FF |
Definition at line 8069 of file tm4c123fe6pm.h.
#define USB_RXINTERVAL3_TXPOLL_S 0 |
Definition at line 8073 of file tm4c123fe6pm.h.
#define USB_RXINTERVAL4_NAKLMT_M 0x000000FF |
Definition at line 8221 of file tm4c123fe6pm.h.
#define USB_RXINTERVAL4_NAKLMT_S 0 |
Definition at line 8223 of file tm4c123fe6pm.h.
#define USB_RXINTERVAL4_TXPOLL_M 0x000000FF |
Definition at line 8219 of file tm4c123fe6pm.h.
#define USB_RXINTERVAL4_TXPOLL_S 0 |
Definition at line 8225 of file tm4c123fe6pm.h.
#define USB_RXINTERVAL5_NAKLMT_M 0x000000FF |
Definition at line 8371 of file tm4c123fe6pm.h.
#define USB_RXINTERVAL5_NAKLMT_S 0 |
Definition at line 8375 of file tm4c123fe6pm.h.
#define USB_RXINTERVAL5_TXPOLL_M 0x000000FF |
Definition at line 8369 of file tm4c123fe6pm.h.
#define USB_RXINTERVAL5_TXPOLL_S 0 |
Definition at line 8373 of file tm4c123fe6pm.h.
#define USB_RXINTERVAL6_NAKLMT_M 0x000000FF |
Definition at line 8521 of file tm4c123fe6pm.h.
#define USB_RXINTERVAL6_NAKLMT_S 0 |
Definition at line 8523 of file tm4c123fe6pm.h.
#define USB_RXINTERVAL6_TXPOLL_M 0x000000FF |
Definition at line 8519 of file tm4c123fe6pm.h.
#define USB_RXINTERVAL6_TXPOLL_S 0 |
Definition at line 8525 of file tm4c123fe6pm.h.
#define USB_RXINTERVAL7_NAKLMT_M 0x000000FF |
Definition at line 8671 of file tm4c123fe6pm.h.
#define USB_RXINTERVAL7_NAKLMT_S 0 |
Definition at line 8673 of file tm4c123fe6pm.h.
#define USB_RXINTERVAL7_TXPOLL_M 0x000000FF |
Definition at line 8669 of file tm4c123fe6pm.h.
#define USB_RXINTERVAL7_TXPOLL_S 0 |
Definition at line 8675 of file tm4c123fe6pm.h.
#define USB_RXIS_EP1 0x00000002 |
Definition at line 6916 of file tm4c123fe6pm.h.
#define USB_RXIS_EP2 0x00000004 |
Definition at line 6915 of file tm4c123fe6pm.h.
#define USB_RXIS_EP3 0x00000008 |
Definition at line 6914 of file tm4c123fe6pm.h.
#define USB_RXIS_EP4 0x00000010 |
Definition at line 6913 of file tm4c123fe6pm.h.
#define USB_RXIS_EP5 0x00000020 |
Definition at line 6912 of file tm4c123fe6pm.h.
#define USB_RXIS_EP6 0x00000040 |
Definition at line 6911 of file tm4c123fe6pm.h.
#define USB_RXIS_EP7 0x00000080 |
Definition at line 6910 of file tm4c123fe6pm.h.
#define USB_RXMAXP1_MAXLOAD_M 0x000007FF |
Definition at line 7671 of file tm4c123fe6pm.h.
#define USB_RXMAXP1_MAXLOAD_S 0 |
Definition at line 7672 of file tm4c123fe6pm.h.
#define USB_RXMAXP2_MAXLOAD_M 0x000007FF |
Definition at line 7821 of file tm4c123fe6pm.h.
#define USB_RXMAXP2_MAXLOAD_S 0 |
Definition at line 7822 of file tm4c123fe6pm.h.
#define USB_RXMAXP3_MAXLOAD_M 0x000007FF |
Definition at line 7971 of file tm4c123fe6pm.h.
#define USB_RXMAXP3_MAXLOAD_S 0 |
Definition at line 7972 of file tm4c123fe6pm.h.
#define USB_RXMAXP4_MAXLOAD_M 0x000007FF |
Definition at line 8121 of file tm4c123fe6pm.h.
#define USB_RXMAXP4_MAXLOAD_S 0 |
Definition at line 8122 of file tm4c123fe6pm.h.
#define USB_RXMAXP5_MAXLOAD_M 0x000007FF |
Definition at line 8271 of file tm4c123fe6pm.h.
#define USB_RXMAXP5_MAXLOAD_S 0 |
Definition at line 8272 of file tm4c123fe6pm.h.
#define USB_RXMAXP6_MAXLOAD_M 0x000007FF |
Definition at line 8421 of file tm4c123fe6pm.h.
#define USB_RXMAXP6_MAXLOAD_S 0 |
Definition at line 8422 of file tm4c123fe6pm.h.
#define USB_RXMAXP7_MAXLOAD_M 0x000007FF |
Definition at line 8571 of file tm4c123fe6pm.h.
#define USB_RXMAXP7_MAXLOAD_S 0 |
Definition at line 8572 of file tm4c123fe6pm.h.
#define USB_RXTYPE1_PROTO_BULK 0x00000020 |
Definition at line 7758 of file tm4c123fe6pm.h.
#define USB_RXTYPE1_PROTO_CTRL 0x00000000 |
Definition at line 7756 of file tm4c123fe6pm.h.
#define USB_RXTYPE1_PROTO_INT 0x00000030 |
Definition at line 7759 of file tm4c123fe6pm.h.
#define USB_RXTYPE1_PROTO_ISOC 0x00000010 |
Definition at line 7757 of file tm4c123fe6pm.h.
#define USB_RXTYPE1_PROTO_M 0x00000030 |
Definition at line 7755 of file tm4c123fe6pm.h.
#define USB_RXTYPE1_SPEED_DFLT 0x00000000 |
Definition at line 7752 of file tm4c123fe6pm.h.
#define USB_RXTYPE1_SPEED_FULL 0x00000080 |
Definition at line 7753 of file tm4c123fe6pm.h.
#define USB_RXTYPE1_SPEED_LOW 0x000000C0 |
Definition at line 7754 of file tm4c123fe6pm.h.
#define USB_RXTYPE1_SPEED_M 0x000000C0 |
Definition at line 7751 of file tm4c123fe6pm.h.
#define USB_RXTYPE1_TEP_M 0x0000000F |
Definition at line 7760 of file tm4c123fe6pm.h.
#define USB_RXTYPE1_TEP_S 0 |
Definition at line 7761 of file tm4c123fe6pm.h.
#define USB_RXTYPE2_PROTO_BULK 0x00000020 |
Definition at line 7908 of file tm4c123fe6pm.h.
#define USB_RXTYPE2_PROTO_CTRL 0x00000000 |
Definition at line 7906 of file tm4c123fe6pm.h.
#define USB_RXTYPE2_PROTO_INT 0x00000030 |
Definition at line 7909 of file tm4c123fe6pm.h.
#define USB_RXTYPE2_PROTO_ISOC 0x00000010 |
Definition at line 7907 of file tm4c123fe6pm.h.
#define USB_RXTYPE2_PROTO_M 0x00000030 |
Definition at line 7905 of file tm4c123fe6pm.h.
#define USB_RXTYPE2_SPEED_DFLT 0x00000000 |
Definition at line 7902 of file tm4c123fe6pm.h.
#define USB_RXTYPE2_SPEED_FULL 0x00000080 |
Definition at line 7903 of file tm4c123fe6pm.h.
#define USB_RXTYPE2_SPEED_LOW 0x000000C0 |
Definition at line 7904 of file tm4c123fe6pm.h.
#define USB_RXTYPE2_SPEED_M 0x000000C0 |
Definition at line 7901 of file tm4c123fe6pm.h.
#define USB_RXTYPE2_TEP_M 0x0000000F |
Definition at line 7910 of file tm4c123fe6pm.h.
#define USB_RXTYPE2_TEP_S 0 |
Definition at line 7911 of file tm4c123fe6pm.h.
#define USB_RXTYPE3_PROTO_BULK 0x00000020 |
Definition at line 8058 of file tm4c123fe6pm.h.
#define USB_RXTYPE3_PROTO_CTRL 0x00000000 |
Definition at line 8056 of file tm4c123fe6pm.h.
#define USB_RXTYPE3_PROTO_INT 0x00000030 |
Definition at line 8059 of file tm4c123fe6pm.h.
#define USB_RXTYPE3_PROTO_ISOC 0x00000010 |
Definition at line 8057 of file tm4c123fe6pm.h.
#define USB_RXTYPE3_PROTO_M 0x00000030 |
Definition at line 8055 of file tm4c123fe6pm.h.
#define USB_RXTYPE3_SPEED_DFLT 0x00000000 |
Definition at line 8052 of file tm4c123fe6pm.h.
#define USB_RXTYPE3_SPEED_FULL 0x00000080 |
Definition at line 8053 of file tm4c123fe6pm.h.
#define USB_RXTYPE3_SPEED_LOW 0x000000C0 |
Definition at line 8054 of file tm4c123fe6pm.h.
#define USB_RXTYPE3_SPEED_M 0x000000C0 |
Definition at line 8051 of file tm4c123fe6pm.h.
#define USB_RXTYPE3_TEP_M 0x0000000F |
Definition at line 8060 of file tm4c123fe6pm.h.
#define USB_RXTYPE3_TEP_S 0 |
Definition at line 8061 of file tm4c123fe6pm.h.
#define USB_RXTYPE4_PROTO_BULK 0x00000020 |
Definition at line 8208 of file tm4c123fe6pm.h.
#define USB_RXTYPE4_PROTO_CTRL 0x00000000 |
Definition at line 8206 of file tm4c123fe6pm.h.
#define USB_RXTYPE4_PROTO_INT 0x00000030 |
Definition at line 8209 of file tm4c123fe6pm.h.
#define USB_RXTYPE4_PROTO_ISOC 0x00000010 |
Definition at line 8207 of file tm4c123fe6pm.h.
#define USB_RXTYPE4_PROTO_M 0x00000030 |
Definition at line 8205 of file tm4c123fe6pm.h.
#define USB_RXTYPE4_SPEED_DFLT 0x00000000 |
Definition at line 8202 of file tm4c123fe6pm.h.
#define USB_RXTYPE4_SPEED_FULL 0x00000080 |
Definition at line 8203 of file tm4c123fe6pm.h.
#define USB_RXTYPE4_SPEED_LOW 0x000000C0 |
Definition at line 8204 of file tm4c123fe6pm.h.
#define USB_RXTYPE4_SPEED_M 0x000000C0 |
Definition at line 8201 of file tm4c123fe6pm.h.
#define USB_RXTYPE4_TEP_M 0x0000000F |
Definition at line 8210 of file tm4c123fe6pm.h.
#define USB_RXTYPE4_TEP_S 0 |
Definition at line 8211 of file tm4c123fe6pm.h.
#define USB_RXTYPE5_PROTO_BULK 0x00000020 |
Definition at line 8358 of file tm4c123fe6pm.h.
#define USB_RXTYPE5_PROTO_CTRL 0x00000000 |
Definition at line 8356 of file tm4c123fe6pm.h.
#define USB_RXTYPE5_PROTO_INT 0x00000030 |
Definition at line 8359 of file tm4c123fe6pm.h.
#define USB_RXTYPE5_PROTO_ISOC 0x00000010 |
Definition at line 8357 of file tm4c123fe6pm.h.
#define USB_RXTYPE5_PROTO_M 0x00000030 |
Definition at line 8355 of file tm4c123fe6pm.h.
#define USB_RXTYPE5_SPEED_DFLT 0x00000000 |
Definition at line 8352 of file tm4c123fe6pm.h.
#define USB_RXTYPE5_SPEED_FULL 0x00000080 |
Definition at line 8353 of file tm4c123fe6pm.h.
#define USB_RXTYPE5_SPEED_LOW 0x000000C0 |
Definition at line 8354 of file tm4c123fe6pm.h.
#define USB_RXTYPE5_SPEED_M 0x000000C0 |
Definition at line 8351 of file tm4c123fe6pm.h.
#define USB_RXTYPE5_TEP_M 0x0000000F |
Definition at line 8360 of file tm4c123fe6pm.h.
#define USB_RXTYPE5_TEP_S 0 |
Definition at line 8361 of file tm4c123fe6pm.h.
#define USB_RXTYPE6_PROTO_BULK 0x00000020 |
Definition at line 8508 of file tm4c123fe6pm.h.
#define USB_RXTYPE6_PROTO_CTRL 0x00000000 |
Definition at line 8506 of file tm4c123fe6pm.h.
#define USB_RXTYPE6_PROTO_INT 0x00000030 |
Definition at line 8509 of file tm4c123fe6pm.h.
#define USB_RXTYPE6_PROTO_ISOC 0x00000010 |
Definition at line 8507 of file tm4c123fe6pm.h.
#define USB_RXTYPE6_PROTO_M 0x00000030 |
Definition at line 8505 of file tm4c123fe6pm.h.
#define USB_RXTYPE6_SPEED_DFLT 0x00000000 |
Definition at line 8502 of file tm4c123fe6pm.h.
#define USB_RXTYPE6_SPEED_FULL 0x00000080 |
Definition at line 8503 of file tm4c123fe6pm.h.
#define USB_RXTYPE6_SPEED_LOW 0x000000C0 |
Definition at line 8504 of file tm4c123fe6pm.h.
#define USB_RXTYPE6_SPEED_M 0x000000C0 |
Definition at line 8501 of file tm4c123fe6pm.h.
#define USB_RXTYPE6_TEP_M 0x0000000F |
Definition at line 8510 of file tm4c123fe6pm.h.
#define USB_RXTYPE6_TEP_S 0 |
Definition at line 8511 of file tm4c123fe6pm.h.
#define USB_RXTYPE7_PROTO_BULK 0x00000020 |
Definition at line 8658 of file tm4c123fe6pm.h.
#define USB_RXTYPE7_PROTO_CTRL 0x00000000 |
Definition at line 8656 of file tm4c123fe6pm.h.
#define USB_RXTYPE7_PROTO_INT 0x00000030 |
Definition at line 8659 of file tm4c123fe6pm.h.
#define USB_RXTYPE7_PROTO_ISOC 0x00000010 |
Definition at line 8657 of file tm4c123fe6pm.h.
#define USB_RXTYPE7_PROTO_M 0x00000030 |
Definition at line 8655 of file tm4c123fe6pm.h.
#define USB_RXTYPE7_SPEED_DFLT 0x00000000 |
Definition at line 8652 of file tm4c123fe6pm.h.
#define USB_RXTYPE7_SPEED_FULL 0x00000080 |
Definition at line 8653 of file tm4c123fe6pm.h.
#define USB_RXTYPE7_SPEED_LOW 0x000000C0 |
Definition at line 8654 of file tm4c123fe6pm.h.
#define USB_RXTYPE7_SPEED_M 0x000000C0 |
Definition at line 8651 of file tm4c123fe6pm.h.
#define USB_RXTYPE7_TEP_M 0x0000000F |
Definition at line 8660 of file tm4c123fe6pm.h.
#define USB_RXTYPE7_TEP_S 0 |
Definition at line 8661 of file tm4c123fe6pm.h.
#define USB_TEST_FIFOACC 0x00000040 |
Definition at line 7000 of file tm4c123fe6pm.h.
#define USB_TEST_FORCEFS 0x00000020 |
Definition at line 7001 of file tm4c123fe6pm.h.
#define USB_TEST_FORCEH 0x00000080 |
Definition at line 6999 of file tm4c123fe6pm.h.
#define USB_TXCSRH1_AUTOSET 0x00000080 |
Definition at line 7657 of file tm4c123fe6pm.h.
#define USB_TXCSRH1_DMAEN 0x00000010 |
Definition at line 7660 of file tm4c123fe6pm.h.
#define USB_TXCSRH1_DMAMOD 0x00000004 |
Definition at line 7662 of file tm4c123fe6pm.h.
#define USB_TXCSRH1_DT 0x00000001 |
Definition at line 7664 of file tm4c123fe6pm.h.
#define USB_TXCSRH1_DTWE 0x00000002 |
Definition at line 7663 of file tm4c123fe6pm.h.
#define USB_TXCSRH1_FDT 0x00000008 |
Definition at line 7661 of file tm4c123fe6pm.h.
#define USB_TXCSRH1_ISO 0x00000040 |
Definition at line 7658 of file tm4c123fe6pm.h.
#define USB_TXCSRH1_MODE 0x00000020 |
Definition at line 7659 of file tm4c123fe6pm.h.
#define USB_TXCSRH2_AUTOSET 0x00000080 |
Definition at line 7807 of file tm4c123fe6pm.h.
#define USB_TXCSRH2_DMAEN 0x00000010 |
Definition at line 7810 of file tm4c123fe6pm.h.
#define USB_TXCSRH2_DMAMOD 0x00000004 |
Definition at line 7812 of file tm4c123fe6pm.h.
#define USB_TXCSRH2_DT 0x00000001 |
Definition at line 7814 of file tm4c123fe6pm.h.
#define USB_TXCSRH2_DTWE 0x00000002 |
Definition at line 7813 of file tm4c123fe6pm.h.
#define USB_TXCSRH2_FDT 0x00000008 |
Definition at line 7811 of file tm4c123fe6pm.h.
#define USB_TXCSRH2_ISO 0x00000040 |
Definition at line 7808 of file tm4c123fe6pm.h.
#define USB_TXCSRH2_MODE 0x00000020 |
Definition at line 7809 of file tm4c123fe6pm.h.
#define USB_TXCSRH3_AUTOSET 0x00000080 |
Definition at line 7957 of file tm4c123fe6pm.h.
#define USB_TXCSRH3_DMAEN 0x00000010 |
Definition at line 7960 of file tm4c123fe6pm.h.
#define USB_TXCSRH3_DMAMOD 0x00000004 |
Definition at line 7962 of file tm4c123fe6pm.h.
#define USB_TXCSRH3_DT 0x00000001 |
Definition at line 7964 of file tm4c123fe6pm.h.
#define USB_TXCSRH3_DTWE 0x00000002 |
Definition at line 7963 of file tm4c123fe6pm.h.
#define USB_TXCSRH3_FDT 0x00000008 |
Definition at line 7961 of file tm4c123fe6pm.h.
#define USB_TXCSRH3_ISO 0x00000040 |
Definition at line 7958 of file tm4c123fe6pm.h.
#define USB_TXCSRH3_MODE 0x00000020 |
Definition at line 7959 of file tm4c123fe6pm.h.
#define USB_TXCSRH4_AUTOSET 0x00000080 |
Definition at line 8107 of file tm4c123fe6pm.h.
#define USB_TXCSRH4_DMAEN 0x00000010 |
Definition at line 8110 of file tm4c123fe6pm.h.
#define USB_TXCSRH4_DMAMOD 0x00000004 |
Definition at line 8112 of file tm4c123fe6pm.h.
#define USB_TXCSRH4_DT 0x00000001 |
Definition at line 8114 of file tm4c123fe6pm.h.
#define USB_TXCSRH4_DTWE 0x00000002 |
Definition at line 8113 of file tm4c123fe6pm.h.
#define USB_TXCSRH4_FDT 0x00000008 |
Definition at line 8111 of file tm4c123fe6pm.h.
#define USB_TXCSRH4_ISO 0x00000040 |
Definition at line 8108 of file tm4c123fe6pm.h.
#define USB_TXCSRH4_MODE 0x00000020 |
Definition at line 8109 of file tm4c123fe6pm.h.
#define USB_TXCSRH5_AUTOSET 0x00000080 |
Definition at line 8257 of file tm4c123fe6pm.h.
#define USB_TXCSRH5_DMAEN 0x00000010 |
Definition at line 8260 of file tm4c123fe6pm.h.
#define USB_TXCSRH5_DMAMOD 0x00000004 |
Definition at line 8262 of file tm4c123fe6pm.h.
#define USB_TXCSRH5_DT 0x00000001 |
Definition at line 8264 of file tm4c123fe6pm.h.
#define USB_TXCSRH5_DTWE 0x00000002 |
Definition at line 8263 of file tm4c123fe6pm.h.
#define USB_TXCSRH5_FDT 0x00000008 |
Definition at line 8261 of file tm4c123fe6pm.h.
#define USB_TXCSRH5_ISO 0x00000040 |
Definition at line 8258 of file tm4c123fe6pm.h.
#define USB_TXCSRH5_MODE 0x00000020 |
Definition at line 8259 of file tm4c123fe6pm.h.
#define USB_TXCSRH6_AUTOSET 0x00000080 |
Definition at line 8407 of file tm4c123fe6pm.h.
#define USB_TXCSRH6_DMAEN 0x00000010 |
Definition at line 8410 of file tm4c123fe6pm.h.
#define USB_TXCSRH6_DMAMOD 0x00000004 |
Definition at line 8412 of file tm4c123fe6pm.h.
#define USB_TXCSRH6_DT 0x00000001 |
Definition at line 8414 of file tm4c123fe6pm.h.
#define USB_TXCSRH6_DTWE 0x00000002 |
Definition at line 8413 of file tm4c123fe6pm.h.
#define USB_TXCSRH6_FDT 0x00000008 |
Definition at line 8411 of file tm4c123fe6pm.h.
#define USB_TXCSRH6_ISO 0x00000040 |
Definition at line 8408 of file tm4c123fe6pm.h.
#define USB_TXCSRH6_MODE 0x00000020 |
Definition at line 8409 of file tm4c123fe6pm.h.
#define USB_TXCSRH7_AUTOSET 0x00000080 |
Definition at line 8557 of file tm4c123fe6pm.h.
#define USB_TXCSRH7_DMAEN 0x00000010 |
Definition at line 8560 of file tm4c123fe6pm.h.
#define USB_TXCSRH7_DMAMOD 0x00000004 |
Definition at line 8562 of file tm4c123fe6pm.h.
#define USB_TXCSRH7_DT 0x00000001 |
Definition at line 8564 of file tm4c123fe6pm.h.
#define USB_TXCSRH7_DTWE 0x00000002 |
Definition at line 8563 of file tm4c123fe6pm.h.
#define USB_TXCSRH7_FDT 0x00000008 |
Definition at line 8561 of file tm4c123fe6pm.h.
#define USB_TXCSRH7_ISO 0x00000040 |
Definition at line 8558 of file tm4c123fe6pm.h.
#define USB_TXCSRH7_MODE 0x00000020 |
Definition at line 8559 of file tm4c123fe6pm.h.
#define USB_TXCSRL1_CLRDT 0x00000040 |
Definition at line 7642 of file tm4c123fe6pm.h.
#define USB_TXCSRL1_ERROR 0x00000004 |
Definition at line 7647 of file tm4c123fe6pm.h.
#define USB_TXCSRL1_FIFONE 0x00000002 |
Definition at line 7649 of file tm4c123fe6pm.h.
#define USB_TXCSRL1_FLUSH 0x00000008 |
Definition at line 7646 of file tm4c123fe6pm.h.
#define USB_TXCSRL1_NAKTO 0x00000080 |
Definition at line 7641 of file tm4c123fe6pm.h.
#define USB_TXCSRL1_SETUP 0x00000010 |
Definition at line 7645 of file tm4c123fe6pm.h.
#define USB_TXCSRL1_STALL 0x00000010 |
Definition at line 7644 of file tm4c123fe6pm.h.
#define USB_TXCSRL1_STALLED 0x00000020 |
Definition at line 7643 of file tm4c123fe6pm.h.
#define USB_TXCSRL1_TXRDY 0x00000001 |
Definition at line 7650 of file tm4c123fe6pm.h.
#define USB_TXCSRL1_UNDRN 0x00000004 |
Definition at line 7648 of file tm4c123fe6pm.h.
#define USB_TXCSRL2_CLRDT 0x00000040 |
Definition at line 7792 of file tm4c123fe6pm.h.
#define USB_TXCSRL2_ERROR 0x00000004 |
Definition at line 7797 of file tm4c123fe6pm.h.
#define USB_TXCSRL2_FIFONE 0x00000002 |
Definition at line 7799 of file tm4c123fe6pm.h.
#define USB_TXCSRL2_FLUSH 0x00000008 |
Definition at line 7796 of file tm4c123fe6pm.h.
#define USB_TXCSRL2_NAKTO 0x00000080 |
Definition at line 7791 of file tm4c123fe6pm.h.
#define USB_TXCSRL2_SETUP 0x00000010 |
Definition at line 7794 of file tm4c123fe6pm.h.
#define USB_TXCSRL2_STALL 0x00000010 |
Definition at line 7795 of file tm4c123fe6pm.h.
#define USB_TXCSRL2_STALLED 0x00000020 |
Definition at line 7793 of file tm4c123fe6pm.h.
#define USB_TXCSRL2_TXRDY 0x00000001 |
Definition at line 7800 of file tm4c123fe6pm.h.
#define USB_TXCSRL2_UNDRN 0x00000004 |
Definition at line 7798 of file tm4c123fe6pm.h.
#define USB_TXCSRL3_CLRDT 0x00000040 |
Definition at line 7942 of file tm4c123fe6pm.h.
#define USB_TXCSRL3_ERROR 0x00000004 |
Definition at line 7947 of file tm4c123fe6pm.h.
#define USB_TXCSRL3_FIFONE 0x00000002 |
Definition at line 7949 of file tm4c123fe6pm.h.
#define USB_TXCSRL3_FLUSH 0x00000008 |
Definition at line 7946 of file tm4c123fe6pm.h.
#define USB_TXCSRL3_NAKTO 0x00000080 |
Definition at line 7941 of file tm4c123fe6pm.h.
#define USB_TXCSRL3_SETUP 0x00000010 |
Definition at line 7944 of file tm4c123fe6pm.h.
#define USB_TXCSRL3_STALL 0x00000010 |
Definition at line 7945 of file tm4c123fe6pm.h.
#define USB_TXCSRL3_STALLED 0x00000020 |
Definition at line 7943 of file tm4c123fe6pm.h.
#define USB_TXCSRL3_TXRDY 0x00000001 |
Definition at line 7950 of file tm4c123fe6pm.h.
#define USB_TXCSRL3_UNDRN 0x00000004 |
Definition at line 7948 of file tm4c123fe6pm.h.
#define USB_TXCSRL4_CLRDT 0x00000040 |
Definition at line 8092 of file tm4c123fe6pm.h.
#define USB_TXCSRL4_ERROR 0x00000004 |
Definition at line 8097 of file tm4c123fe6pm.h.
#define USB_TXCSRL4_FIFONE 0x00000002 |
Definition at line 8099 of file tm4c123fe6pm.h.
#define USB_TXCSRL4_FLUSH 0x00000008 |
Definition at line 8096 of file tm4c123fe6pm.h.
#define USB_TXCSRL4_NAKTO 0x00000080 |
Definition at line 8091 of file tm4c123fe6pm.h.
#define USB_TXCSRL4_SETUP 0x00000010 |
Definition at line 8094 of file tm4c123fe6pm.h.
#define USB_TXCSRL4_STALL 0x00000010 |
Definition at line 8095 of file tm4c123fe6pm.h.
#define USB_TXCSRL4_STALLED 0x00000020 |
Definition at line 8093 of file tm4c123fe6pm.h.
#define USB_TXCSRL4_TXRDY 0x00000001 |
Definition at line 8100 of file tm4c123fe6pm.h.
#define USB_TXCSRL4_UNDRN 0x00000004 |
Definition at line 8098 of file tm4c123fe6pm.h.
#define USB_TXCSRL5_CLRDT 0x00000040 |
Definition at line 8242 of file tm4c123fe6pm.h.
#define USB_TXCSRL5_ERROR 0x00000004 |
Definition at line 8247 of file tm4c123fe6pm.h.
#define USB_TXCSRL5_FIFONE 0x00000002 |
Definition at line 8249 of file tm4c123fe6pm.h.
#define USB_TXCSRL5_FLUSH 0x00000008 |
Definition at line 8246 of file tm4c123fe6pm.h.
#define USB_TXCSRL5_NAKTO 0x00000080 |
Definition at line 8241 of file tm4c123fe6pm.h.
#define USB_TXCSRL5_SETUP 0x00000010 |
Definition at line 8244 of file tm4c123fe6pm.h.
#define USB_TXCSRL5_STALL 0x00000010 |
Definition at line 8245 of file tm4c123fe6pm.h.
#define USB_TXCSRL5_STALLED 0x00000020 |
Definition at line 8243 of file tm4c123fe6pm.h.
#define USB_TXCSRL5_TXRDY 0x00000001 |
Definition at line 8250 of file tm4c123fe6pm.h.
#define USB_TXCSRL5_UNDRN 0x00000004 |
Definition at line 8248 of file tm4c123fe6pm.h.
#define USB_TXCSRL6_CLRDT 0x00000040 |
Definition at line 8392 of file tm4c123fe6pm.h.
#define USB_TXCSRL6_ERROR 0x00000004 |
Definition at line 8397 of file tm4c123fe6pm.h.
#define USB_TXCSRL6_FIFONE 0x00000002 |
Definition at line 8399 of file tm4c123fe6pm.h.
#define USB_TXCSRL6_FLUSH 0x00000008 |
Definition at line 8396 of file tm4c123fe6pm.h.
#define USB_TXCSRL6_NAKTO 0x00000080 |
Definition at line 8391 of file tm4c123fe6pm.h.
#define USB_TXCSRL6_SETUP 0x00000010 |
Definition at line 8395 of file tm4c123fe6pm.h.
#define USB_TXCSRL6_STALL 0x00000010 |
Definition at line 8394 of file tm4c123fe6pm.h.
#define USB_TXCSRL6_STALLED 0x00000020 |
Definition at line 8393 of file tm4c123fe6pm.h.
#define USB_TXCSRL6_TXRDY 0x00000001 |
Definition at line 8400 of file tm4c123fe6pm.h.
#define USB_TXCSRL6_UNDRN 0x00000004 |
Definition at line 8398 of file tm4c123fe6pm.h.
#define USB_TXCSRL7_CLRDT 0x00000040 |
Definition at line 8542 of file tm4c123fe6pm.h.
#define USB_TXCSRL7_ERROR 0x00000004 |
Definition at line 8547 of file tm4c123fe6pm.h.
#define USB_TXCSRL7_FIFONE 0x00000002 |
Definition at line 8549 of file tm4c123fe6pm.h.
#define USB_TXCSRL7_FLUSH 0x00000008 |
Definition at line 8546 of file tm4c123fe6pm.h.
#define USB_TXCSRL7_NAKTO 0x00000080 |
Definition at line 8541 of file tm4c123fe6pm.h.
#define USB_TXCSRL7_SETUP 0x00000010 |
Definition at line 8545 of file tm4c123fe6pm.h.
#define USB_TXCSRL7_STALL 0x00000010 |
Definition at line 8544 of file tm4c123fe6pm.h.
#define USB_TXCSRL7_STALLED 0x00000020 |
Definition at line 8543 of file tm4c123fe6pm.h.
#define USB_TXCSRL7_TXRDY 0x00000001 |
Definition at line 8550 of file tm4c123fe6pm.h.
#define USB_TXCSRL7_UNDRN 0x00000004 |
Definition at line 8548 of file tm4c123fe6pm.h.
#define USB_TXDPKTBUFDIS_EP1 0x00000002 |
Definition at line 8780 of file tm4c123fe6pm.h.
#define USB_TXDPKTBUFDIS_EP2 0x00000004 |
Definition at line 8778 of file tm4c123fe6pm.h.
#define USB_TXDPKTBUFDIS_EP3 0x00000008 |
Definition at line 8776 of file tm4c123fe6pm.h.
#define USB_TXDPKTBUFDIS_EP4 0x00000010 |
Definition at line 8774 of file tm4c123fe6pm.h.
#define USB_TXDPKTBUFDIS_EP5 0x00000020 |
Definition at line 8772 of file tm4c123fe6pm.h.
#define USB_TXDPKTBUFDIS_EP6 0x00000040 |
Definition at line 8770 of file tm4c123fe6pm.h.
#define USB_TXDPKTBUFDIS_EP7 0x00000080 |
Definition at line 8768 of file tm4c123fe6pm.h.
#define USB_TXFIFOADD_ADDR_M 0x000001FF |
Definition at line 7124 of file tm4c123fe6pm.h.
#define USB_TXFIFOADD_ADDR_S 0 |
Definition at line 7125 of file tm4c123fe6pm.h.
#define USB_TXFIFOSZ_DPB 0x00000010 |
Definition at line 7089 of file tm4c123fe6pm.h.
#define USB_TXFIFOSZ_SIZE_1024 0x00000007 |
Definition at line 7098 of file tm4c123fe6pm.h.
#define USB_TXFIFOSZ_SIZE_128 0x00000004 |
Definition at line 7095 of file tm4c123fe6pm.h.
#define USB_TXFIFOSZ_SIZE_16 0x00000001 |
Definition at line 7092 of file tm4c123fe6pm.h.
#define USB_TXFIFOSZ_SIZE_2048 0x00000008 |
Definition at line 7099 of file tm4c123fe6pm.h.
#define USB_TXFIFOSZ_SIZE_256 0x00000005 |
Definition at line 7096 of file tm4c123fe6pm.h.
#define USB_TXFIFOSZ_SIZE_32 0x00000002 |
Definition at line 7093 of file tm4c123fe6pm.h.
#define USB_TXFIFOSZ_SIZE_512 0x00000006 |
Definition at line 7097 of file tm4c123fe6pm.h.
#define USB_TXFIFOSZ_SIZE_64 0x00000003 |
Definition at line 7094 of file tm4c123fe6pm.h.
#define USB_TXFIFOSZ_SIZE_8 0x00000000 |
Definition at line 7091 of file tm4c123fe6pm.h.
#define USB_TXFIFOSZ_SIZE_M 0x0000000F |
Definition at line 7090 of file tm4c123fe6pm.h.
#define USB_TXFUNCADDR0_ADDR_M 0x0000007F |
Definition at line 7176 of file tm4c123fe6pm.h.
#define USB_TXFUNCADDR0_ADDR_S 0 |
Definition at line 7177 of file tm4c123fe6pm.h.
#define USB_TXFUNCADDR1_ADDR_M 0x0000007F |
Definition at line 7203 of file tm4c123fe6pm.h.
#define USB_TXFUNCADDR1_ADDR_S 0 |
Definition at line 7204 of file tm4c123fe6pm.h.
#define USB_TXFUNCADDR2_ADDR_M 0x0000007F |
Definition at line 7257 of file tm4c123fe6pm.h.
#define USB_TXFUNCADDR2_ADDR_S 0 |
Definition at line 7258 of file tm4c123fe6pm.h.
#define USB_TXFUNCADDR3_ADDR_M 0x0000007F |
Definition at line 7311 of file tm4c123fe6pm.h.
#define USB_TXFUNCADDR3_ADDR_S 0 |
Definition at line 7312 of file tm4c123fe6pm.h.
#define USB_TXFUNCADDR4_ADDR_M 0x0000007F |
Definition at line 7365 of file tm4c123fe6pm.h.
#define USB_TXFUNCADDR4_ADDR_S 0 |
Definition at line 7366 of file tm4c123fe6pm.h.
#define USB_TXFUNCADDR5_ADDR_M 0x0000007F |
Definition at line 7419 of file tm4c123fe6pm.h.
#define USB_TXFUNCADDR5_ADDR_S 0 |
Definition at line 7420 of file tm4c123fe6pm.h.
#define USB_TXFUNCADDR6_ADDR_M 0x0000007F |
Definition at line 7473 of file tm4c123fe6pm.h.
#define USB_TXFUNCADDR6_ADDR_S 0 |
Definition at line 7474 of file tm4c123fe6pm.h.
#define USB_TXFUNCADDR7_ADDR_M 0x0000007F |
Definition at line 7527 of file tm4c123fe6pm.h.
#define USB_TXFUNCADDR7_ADDR_S 0 |
Definition at line 7528 of file tm4c123fe6pm.h.
#define USB_TXHUBADDR0_ADDR_M 0x0000007F |
Definition at line 7185 of file tm4c123fe6pm.h.
#define USB_TXHUBADDR0_ADDR_S 0 |
Definition at line 7186 of file tm4c123fe6pm.h.
#define USB_TXHUBADDR1_ADDR_M 0x0000007F |
Definition at line 7212 of file tm4c123fe6pm.h.
#define USB_TXHUBADDR1_ADDR_S 0 |
Definition at line 7213 of file tm4c123fe6pm.h.
#define USB_TXHUBADDR2_ADDR_M 0x0000007F |
Definition at line 7266 of file tm4c123fe6pm.h.
#define USB_TXHUBADDR2_ADDR_S 0 |
Definition at line 7267 of file tm4c123fe6pm.h.
#define USB_TXHUBADDR3_ADDR_M 0x0000007F |
Definition at line 7320 of file tm4c123fe6pm.h.
#define USB_TXHUBADDR3_ADDR_S 0 |
Definition at line 7321 of file tm4c123fe6pm.h.
#define USB_TXHUBADDR4_ADDR_M 0x0000007F |
Definition at line 7374 of file tm4c123fe6pm.h.
#define USB_TXHUBADDR4_ADDR_S 0 |
Definition at line 7375 of file tm4c123fe6pm.h.
#define USB_TXHUBADDR5_ADDR_M 0x0000007F |
Definition at line 7428 of file tm4c123fe6pm.h.
#define USB_TXHUBADDR5_ADDR_S 0 |
Definition at line 7429 of file tm4c123fe6pm.h.
#define USB_TXHUBADDR6_ADDR_M 0x0000007F |
Definition at line 7482 of file tm4c123fe6pm.h.
#define USB_TXHUBADDR6_ADDR_S 0 |
Definition at line 7483 of file tm4c123fe6pm.h.
#define USB_TXHUBADDR7_ADDR_M 0x0000007F |
Definition at line 7536 of file tm4c123fe6pm.h.
#define USB_TXHUBADDR7_ADDR_S 0 |
Definition at line 7537 of file tm4c123fe6pm.h.
#define USB_TXHUBPORT0_PORT_M 0x0000007F |
Definition at line 7194 of file tm4c123fe6pm.h.
#define USB_TXHUBPORT0_PORT_S 0 |
Definition at line 7195 of file tm4c123fe6pm.h.
#define USB_TXHUBPORT1_PORT_M 0x0000007F |
Definition at line 7221 of file tm4c123fe6pm.h.
#define USB_TXHUBPORT1_PORT_S 0 |
Definition at line 7222 of file tm4c123fe6pm.h.
#define USB_TXHUBPORT2_PORT_M 0x0000007F |
Definition at line 7275 of file tm4c123fe6pm.h.
#define USB_TXHUBPORT2_PORT_S 0 |
Definition at line 7276 of file tm4c123fe6pm.h.
#define USB_TXHUBPORT3_PORT_M 0x0000007F |
Definition at line 7329 of file tm4c123fe6pm.h.
#define USB_TXHUBPORT3_PORT_S 0 |
Definition at line 7330 of file tm4c123fe6pm.h.
#define USB_TXHUBPORT4_PORT_M 0x0000007F |
Definition at line 7383 of file tm4c123fe6pm.h.
#define USB_TXHUBPORT4_PORT_S 0 |
Definition at line 7384 of file tm4c123fe6pm.h.
#define USB_TXHUBPORT5_PORT_M 0x0000007F |
Definition at line 7437 of file tm4c123fe6pm.h.
#define USB_TXHUBPORT5_PORT_S 0 |
Definition at line 7438 of file tm4c123fe6pm.h.
#define USB_TXHUBPORT6_PORT_M 0x0000007F |
Definition at line 7491 of file tm4c123fe6pm.h.
#define USB_TXHUBPORT6_PORT_S 0 |
Definition at line 7492 of file tm4c123fe6pm.h.
#define USB_TXHUBPORT7_PORT_M 0x0000007F |
Definition at line 7545 of file tm4c123fe6pm.h.
#define USB_TXHUBPORT7_PORT_S 0 |
Definition at line 7546 of file tm4c123fe6pm.h.
#define USB_TXIE_EP0 0x00000001 |
Definition at line 6930 of file tm4c123fe6pm.h.
#define USB_TXIE_EP1 0x00000002 |
Definition at line 6929 of file tm4c123fe6pm.h.
#define USB_TXIE_EP2 0x00000004 |
Definition at line 6928 of file tm4c123fe6pm.h.
#define USB_TXIE_EP3 0x00000008 |
Definition at line 6927 of file tm4c123fe6pm.h.
#define USB_TXIE_EP4 0x00000010 |
Definition at line 6926 of file tm4c123fe6pm.h.
#define USB_TXIE_EP5 0x00000020 |
Definition at line 6925 of file tm4c123fe6pm.h.
#define USB_TXIE_EP6 0x00000040 |
Definition at line 6924 of file tm4c123fe6pm.h.
#define USB_TXIE_EP7 0x00000080 |
Definition at line 6923 of file tm4c123fe6pm.h.
#define USB_TXINTERVAL1_NAKLMT_M 0x000000FF |
Definition at line 7737 of file tm4c123fe6pm.h.
#define USB_TXINTERVAL1_NAKLMT_S 0 |
Definition at line 7743 of file tm4c123fe6pm.h.
#define USB_TXINTERVAL1_TXPOLL_M 0x000000FF |
Definition at line 7739 of file tm4c123fe6pm.h.
#define USB_TXINTERVAL1_TXPOLL_S 0 |
Definition at line 7741 of file tm4c123fe6pm.h.
#define USB_TXINTERVAL2_NAKLMT_M 0x000000FF |
Definition at line 7889 of file tm4c123fe6pm.h.
#define USB_TXINTERVAL2_NAKLMT_S 0 |
Definition at line 7891 of file tm4c123fe6pm.h.
#define USB_TXINTERVAL2_TXPOLL_M 0x000000FF |
Definition at line 7887 of file tm4c123fe6pm.h.
#define USB_TXINTERVAL2_TXPOLL_S 0 |
Definition at line 7893 of file tm4c123fe6pm.h.
#define USB_TXINTERVAL3_NAKLMT_M 0x000000FF |
Definition at line 8039 of file tm4c123fe6pm.h.
#define USB_TXINTERVAL3_NAKLMT_S 0 |
Definition at line 8043 of file tm4c123fe6pm.h.
#define USB_TXINTERVAL3_TXPOLL_M 0x000000FF |
Definition at line 8037 of file tm4c123fe6pm.h.
#define USB_TXINTERVAL3_TXPOLL_S 0 |
Definition at line 8041 of file tm4c123fe6pm.h.
#define USB_TXINTERVAL4_NAKLMT_M 0x000000FF |
Definition at line 8189 of file tm4c123fe6pm.h.
#define USB_TXINTERVAL4_NAKLMT_S 0 |
Definition at line 8191 of file tm4c123fe6pm.h.
#define USB_TXINTERVAL4_TXPOLL_M 0x000000FF |
Definition at line 8187 of file tm4c123fe6pm.h.
#define USB_TXINTERVAL4_TXPOLL_S 0 |
Definition at line 8193 of file tm4c123fe6pm.h.
#define USB_TXINTERVAL5_NAKLMT_M 0x000000FF |
Definition at line 8339 of file tm4c123fe6pm.h.
#define USB_TXINTERVAL5_NAKLMT_S 0 |
Definition at line 8341 of file tm4c123fe6pm.h.
#define USB_TXINTERVAL5_TXPOLL_M 0x000000FF |
Definition at line 8337 of file tm4c123fe6pm.h.
#define USB_TXINTERVAL5_TXPOLL_S 0 |
Definition at line 8343 of file tm4c123fe6pm.h.
#define USB_TXINTERVAL6_NAKLMT_M 0x000000FF |
Definition at line 8489 of file tm4c123fe6pm.h.
#define USB_TXINTERVAL6_NAKLMT_S 0 |
Definition at line 8493 of file tm4c123fe6pm.h.
#define USB_TXINTERVAL6_TXPOLL_M 0x000000FF |
Definition at line 8487 of file tm4c123fe6pm.h.
#define USB_TXINTERVAL6_TXPOLL_S 0 |
Definition at line 8491 of file tm4c123fe6pm.h.
#define USB_TXINTERVAL7_NAKLMT_M 0x000000FF |
Definition at line 8639 of file tm4c123fe6pm.h.
#define USB_TXINTERVAL7_NAKLMT_S 0 |
Definition at line 8641 of file tm4c123fe6pm.h.
#define USB_TXINTERVAL7_TXPOLL_M 0x000000FF |
Definition at line 8637 of file tm4c123fe6pm.h.
#define USB_TXINTERVAL7_TXPOLL_S 0 |
Definition at line 8643 of file tm4c123fe6pm.h.
#define USB_TXIS_EP0 0x00000001 |
Definition at line 6903 of file tm4c123fe6pm.h.
#define USB_TXIS_EP1 0x00000002 |
Definition at line 6902 of file tm4c123fe6pm.h.
#define USB_TXIS_EP2 0x00000004 |
Definition at line 6901 of file tm4c123fe6pm.h.
#define USB_TXIS_EP3 0x00000008 |
Definition at line 6900 of file tm4c123fe6pm.h.
#define USB_TXIS_EP4 0x00000010 |
Definition at line 6899 of file tm4c123fe6pm.h.
#define USB_TXIS_EP5 0x00000020 |
Definition at line 6898 of file tm4c123fe6pm.h.
#define USB_TXIS_EP6 0x00000040 |
Definition at line 6897 of file tm4c123fe6pm.h.
#define USB_TXIS_EP7 0x00000080 |
Definition at line 6896 of file tm4c123fe6pm.h.
#define USB_TXMAXP1_MAXLOAD_M 0x000007FF |
Definition at line 7633 of file tm4c123fe6pm.h.
#define USB_TXMAXP1_MAXLOAD_S 0 |
Definition at line 7634 of file tm4c123fe6pm.h.
#define USB_TXMAXP2_MAXLOAD_M 0x000007FF |
Definition at line 7783 of file tm4c123fe6pm.h.
#define USB_TXMAXP2_MAXLOAD_S 0 |
Definition at line 7784 of file tm4c123fe6pm.h.
#define USB_TXMAXP3_MAXLOAD_M 0x000007FF |
Definition at line 7933 of file tm4c123fe6pm.h.
#define USB_TXMAXP3_MAXLOAD_S 0 |
Definition at line 7934 of file tm4c123fe6pm.h.
#define USB_TXMAXP4_MAXLOAD_M 0x000007FF |
Definition at line 8083 of file tm4c123fe6pm.h.
#define USB_TXMAXP4_MAXLOAD_S 0 |
Definition at line 8084 of file tm4c123fe6pm.h.
#define USB_TXMAXP5_MAXLOAD_M 0x000007FF |
Definition at line 8233 of file tm4c123fe6pm.h.
#define USB_TXMAXP5_MAXLOAD_S 0 |
Definition at line 8234 of file tm4c123fe6pm.h.
#define USB_TXMAXP6_MAXLOAD_M 0x000007FF |
Definition at line 8383 of file tm4c123fe6pm.h.
#define USB_TXMAXP6_MAXLOAD_S 0 |
Definition at line 8384 of file tm4c123fe6pm.h.
#define USB_TXMAXP7_MAXLOAD_M 0x000007FF |
Definition at line 8533 of file tm4c123fe6pm.h.
#define USB_TXMAXP7_MAXLOAD_S 0 |
Definition at line 8534 of file tm4c123fe6pm.h.
#define USB_TXTYPE1_PROTO_BULK 0x00000020 |
Definition at line 7726 of file tm4c123fe6pm.h.
#define USB_TXTYPE1_PROTO_CTRL 0x00000000 |
Definition at line 7724 of file tm4c123fe6pm.h.
#define USB_TXTYPE1_PROTO_INT 0x00000030 |
Definition at line 7727 of file tm4c123fe6pm.h.
#define USB_TXTYPE1_PROTO_ISOC 0x00000010 |
Definition at line 7725 of file tm4c123fe6pm.h.
#define USB_TXTYPE1_PROTO_M 0x00000030 |
Definition at line 7723 of file tm4c123fe6pm.h.
#define USB_TXTYPE1_SPEED_DFLT 0x00000000 |
Definition at line 7720 of file tm4c123fe6pm.h.
#define USB_TXTYPE1_SPEED_FULL 0x00000080 |
Definition at line 7721 of file tm4c123fe6pm.h.
#define USB_TXTYPE1_SPEED_LOW 0x000000C0 |
Definition at line 7722 of file tm4c123fe6pm.h.
#define USB_TXTYPE1_SPEED_M 0x000000C0 |
Definition at line 7719 of file tm4c123fe6pm.h.
#define USB_TXTYPE1_TEP_M 0x0000000F |
Definition at line 7728 of file tm4c123fe6pm.h.
#define USB_TXTYPE1_TEP_S 0 |
Definition at line 7729 of file tm4c123fe6pm.h.
#define USB_TXTYPE2_PROTO_BULK 0x00000020 |
Definition at line 7876 of file tm4c123fe6pm.h.
#define USB_TXTYPE2_PROTO_CTRL 0x00000000 |
Definition at line 7874 of file tm4c123fe6pm.h.
#define USB_TXTYPE2_PROTO_INT 0x00000030 |
Definition at line 7877 of file tm4c123fe6pm.h.
#define USB_TXTYPE2_PROTO_ISOC 0x00000010 |
Definition at line 7875 of file tm4c123fe6pm.h.
#define USB_TXTYPE2_PROTO_M 0x00000030 |
Definition at line 7873 of file tm4c123fe6pm.h.
#define USB_TXTYPE2_SPEED_DFLT 0x00000000 |
Definition at line 7870 of file tm4c123fe6pm.h.
#define USB_TXTYPE2_SPEED_FULL 0x00000080 |
Definition at line 7871 of file tm4c123fe6pm.h.
#define USB_TXTYPE2_SPEED_LOW 0x000000C0 |
Definition at line 7872 of file tm4c123fe6pm.h.
#define USB_TXTYPE2_SPEED_M 0x000000C0 |
Definition at line 7869 of file tm4c123fe6pm.h.
#define USB_TXTYPE2_TEP_M 0x0000000F |
Definition at line 7878 of file tm4c123fe6pm.h.
#define USB_TXTYPE2_TEP_S 0 |
Definition at line 7879 of file tm4c123fe6pm.h.
#define USB_TXTYPE3_PROTO_BULK 0x00000020 |
Definition at line 8026 of file tm4c123fe6pm.h.
#define USB_TXTYPE3_PROTO_CTRL 0x00000000 |
Definition at line 8024 of file tm4c123fe6pm.h.
#define USB_TXTYPE3_PROTO_INT 0x00000030 |
Definition at line 8027 of file tm4c123fe6pm.h.
#define USB_TXTYPE3_PROTO_ISOC 0x00000010 |
Definition at line 8025 of file tm4c123fe6pm.h.
#define USB_TXTYPE3_PROTO_M 0x00000030 |
Definition at line 8023 of file tm4c123fe6pm.h.
#define USB_TXTYPE3_SPEED_DFLT 0x00000000 |
Definition at line 8020 of file tm4c123fe6pm.h.
#define USB_TXTYPE3_SPEED_FULL 0x00000080 |
Definition at line 8021 of file tm4c123fe6pm.h.
#define USB_TXTYPE3_SPEED_LOW 0x000000C0 |
Definition at line 8022 of file tm4c123fe6pm.h.
#define USB_TXTYPE3_SPEED_M 0x000000C0 |
Definition at line 8019 of file tm4c123fe6pm.h.
#define USB_TXTYPE3_TEP_M 0x0000000F |
Definition at line 8028 of file tm4c123fe6pm.h.
#define USB_TXTYPE3_TEP_S 0 |
Definition at line 8029 of file tm4c123fe6pm.h.
#define USB_TXTYPE4_PROTO_BULK 0x00000020 |
Definition at line 8176 of file tm4c123fe6pm.h.
#define USB_TXTYPE4_PROTO_CTRL 0x00000000 |
Definition at line 8174 of file tm4c123fe6pm.h.
#define USB_TXTYPE4_PROTO_INT 0x00000030 |
Definition at line 8177 of file tm4c123fe6pm.h.
#define USB_TXTYPE4_PROTO_ISOC 0x00000010 |
Definition at line 8175 of file tm4c123fe6pm.h.
#define USB_TXTYPE4_PROTO_M 0x00000030 |
Definition at line 8173 of file tm4c123fe6pm.h.
#define USB_TXTYPE4_SPEED_DFLT 0x00000000 |
Definition at line 8170 of file tm4c123fe6pm.h.
#define USB_TXTYPE4_SPEED_FULL 0x00000080 |
Definition at line 8171 of file tm4c123fe6pm.h.
#define USB_TXTYPE4_SPEED_LOW 0x000000C0 |
Definition at line 8172 of file tm4c123fe6pm.h.
#define USB_TXTYPE4_SPEED_M 0x000000C0 |
Definition at line 8169 of file tm4c123fe6pm.h.
#define USB_TXTYPE4_TEP_M 0x0000000F |
Definition at line 8178 of file tm4c123fe6pm.h.
#define USB_TXTYPE4_TEP_S 0 |
Definition at line 8179 of file tm4c123fe6pm.h.
#define USB_TXTYPE5_PROTO_BULK 0x00000020 |
Definition at line 8326 of file tm4c123fe6pm.h.
#define USB_TXTYPE5_PROTO_CTRL 0x00000000 |
Definition at line 8324 of file tm4c123fe6pm.h.
#define USB_TXTYPE5_PROTO_INT 0x00000030 |
Definition at line 8327 of file tm4c123fe6pm.h.
#define USB_TXTYPE5_PROTO_ISOC 0x00000010 |
Definition at line 8325 of file tm4c123fe6pm.h.
#define USB_TXTYPE5_PROTO_M 0x00000030 |
Definition at line 8323 of file tm4c123fe6pm.h.
#define USB_TXTYPE5_SPEED_DFLT 0x00000000 |
Definition at line 8320 of file tm4c123fe6pm.h.
#define USB_TXTYPE5_SPEED_FULL 0x00000080 |
Definition at line 8321 of file tm4c123fe6pm.h.
#define USB_TXTYPE5_SPEED_LOW 0x000000C0 |
Definition at line 8322 of file tm4c123fe6pm.h.
#define USB_TXTYPE5_SPEED_M 0x000000C0 |
Definition at line 8319 of file tm4c123fe6pm.h.
#define USB_TXTYPE5_TEP_M 0x0000000F |
Definition at line 8328 of file tm4c123fe6pm.h.
#define USB_TXTYPE5_TEP_S 0 |
Definition at line 8329 of file tm4c123fe6pm.h.
#define USB_TXTYPE6_PROTO_BULK 0x00000020 |
Definition at line 8476 of file tm4c123fe6pm.h.
#define USB_TXTYPE6_PROTO_CTRL 0x00000000 |
Definition at line 8474 of file tm4c123fe6pm.h.
#define USB_TXTYPE6_PROTO_INT 0x00000030 |
Definition at line 8477 of file tm4c123fe6pm.h.
#define USB_TXTYPE6_PROTO_ISOC 0x00000010 |
Definition at line 8475 of file tm4c123fe6pm.h.
#define USB_TXTYPE6_PROTO_M 0x00000030 |
Definition at line 8473 of file tm4c123fe6pm.h.
#define USB_TXTYPE6_SPEED_DFLT 0x00000000 |
Definition at line 8470 of file tm4c123fe6pm.h.
#define USB_TXTYPE6_SPEED_FULL 0x00000080 |
Definition at line 8471 of file tm4c123fe6pm.h.
#define USB_TXTYPE6_SPEED_LOW 0x000000C0 |
Definition at line 8472 of file tm4c123fe6pm.h.
#define USB_TXTYPE6_SPEED_M 0x000000C0 |
Definition at line 8469 of file tm4c123fe6pm.h.
#define USB_TXTYPE6_TEP_M 0x0000000F |
Definition at line 8478 of file tm4c123fe6pm.h.
#define USB_TXTYPE6_TEP_S 0 |
Definition at line 8479 of file tm4c123fe6pm.h.
#define USB_TXTYPE7_PROTO_BULK 0x00000020 |
Definition at line 8626 of file tm4c123fe6pm.h.
#define USB_TXTYPE7_PROTO_CTRL 0x00000000 |
Definition at line 8624 of file tm4c123fe6pm.h.
#define USB_TXTYPE7_PROTO_INT 0x00000030 |
Definition at line 8627 of file tm4c123fe6pm.h.
#define USB_TXTYPE7_PROTO_ISOC 0x00000010 |
Definition at line 8625 of file tm4c123fe6pm.h.
#define USB_TXTYPE7_PROTO_M 0x00000030 |
Definition at line 8623 of file tm4c123fe6pm.h.
#define USB_TXTYPE7_SPEED_DFLT 0x00000000 |
Definition at line 8620 of file tm4c123fe6pm.h.
#define USB_TXTYPE7_SPEED_FULL 0x00000080 |
Definition at line 8621 of file tm4c123fe6pm.h.
#define USB_TXTYPE7_SPEED_LOW 0x000000C0 |
Definition at line 8622 of file tm4c123fe6pm.h.
#define USB_TXTYPE7_SPEED_M 0x000000C0 |
Definition at line 8619 of file tm4c123fe6pm.h.
#define USB_TXTYPE7_TEP_M 0x0000000F |
Definition at line 8628 of file tm4c123fe6pm.h.
#define USB_TXTYPE7_TEP_S 0 |
Definition at line 8629 of file tm4c123fe6pm.h.
#define USB_TYPE0_SPEED_FULL 0x00000080 |
Definition at line 7617 of file tm4c123fe6pm.h.
#define USB_TYPE0_SPEED_LOW 0x000000C0 |
Definition at line 7618 of file tm4c123fe6pm.h.
#define USB_TYPE0_SPEED_M 0x000000C0 |
Definition at line 7616 of file tm4c123fe6pm.h.
#define USB_VDC_VBDEN 0x00000001 |
Definition at line 8863 of file tm4c123fe6pm.h.
#define USB_VDCIM_VD 0x00000001 |
Definition at line 8877 of file tm4c123fe6pm.h.
#define USB_VDCISC_VD 0x00000001 |
Definition at line 8884 of file tm4c123fe6pm.h.
#define USB_VDCRIS_VD 0x00000001 |
Definition at line 8870 of file tm4c123fe6pm.h.
#define USB_VPLEN_VPLEN_M 0x000000FF |
Definition at line 7151 of file tm4c123fe6pm.h.
#define USB_VPLEN_VPLEN_S 0 |
Definition at line 7152 of file tm4c123fe6pm.h.
#define WATCHDOG0_CTL_R (*((volatile uint32_t *)0x40000008)) |
Definition at line 137 of file tm4c123fe6pm.h.
#define WATCHDOG0_ICR_R (*((volatile uint32_t *)0x4000000C)) |
Definition at line 138 of file tm4c123fe6pm.h.
#define WATCHDOG0_LOAD_R (*((volatile uint32_t *)0x40000000)) |
Definition at line 135 of file tm4c123fe6pm.h.
#define WATCHDOG0_LOCK_R (*((volatile uint32_t *)0x40000C00)) |
Definition at line 142 of file tm4c123fe6pm.h.
#define WATCHDOG0_MIS_R (*((volatile uint32_t *)0x40000014)) |
Definition at line 140 of file tm4c123fe6pm.h.
#define WATCHDOG0_RIS_R (*((volatile uint32_t *)0x40000010)) |
Definition at line 139 of file tm4c123fe6pm.h.
#define WATCHDOG0_TEST_R (*((volatile uint32_t *)0x40000418)) |
Definition at line 141 of file tm4c123fe6pm.h.
#define WATCHDOG0_VALUE_R (*((volatile uint32_t *)0x40000004)) |
Definition at line 136 of file tm4c123fe6pm.h.
#define WATCHDOG1_CTL_R (*((volatile uint32_t *)0x40001008)) |
Definition at line 151 of file tm4c123fe6pm.h.
#define WATCHDOG1_ICR_R (*((volatile uint32_t *)0x4000100C)) |
Definition at line 152 of file tm4c123fe6pm.h.
#define WATCHDOG1_LOAD_R (*((volatile uint32_t *)0x40001000)) |
Definition at line 149 of file tm4c123fe6pm.h.
#define WATCHDOG1_LOCK_R (*((volatile uint32_t *)0x40001C00)) |
Definition at line 156 of file tm4c123fe6pm.h.
#define WATCHDOG1_MIS_R (*((volatile uint32_t *)0x40001014)) |
Definition at line 154 of file tm4c123fe6pm.h.
#define WATCHDOG1_RIS_R (*((volatile uint32_t *)0x40001010)) |
Definition at line 153 of file tm4c123fe6pm.h.
#define WATCHDOG1_TEST_R (*((volatile uint32_t *)0x40001418)) |
Definition at line 155 of file tm4c123fe6pm.h.
#define WATCHDOG1_VALUE_R (*((volatile uint32_t *)0x40001004)) |
Definition at line 150 of file tm4c123fe6pm.h.
#define WDT_CTL_INTEN 0x00000001 |
Definition at line 2445 of file tm4c123fe6pm.h.
#define WDT_CTL_INTTYPE 0x00000004 |
Definition at line 2443 of file tm4c123fe6pm.h.
#define WDT_CTL_RESEN 0x00000002 |
Definition at line 2444 of file tm4c123fe6pm.h.
#define WDT_CTL_WRC 0x80000000 |
Definition at line 2442 of file tm4c123fe6pm.h.
#define WDT_ICR_M 0xFFFFFFFF |
Definition at line 2452 of file tm4c123fe6pm.h.
#define WDT_ICR_S 0 |
Definition at line 2453 of file tm4c123fe6pm.h.
#define WDT_LOAD_M 0xFFFFFFFF |
Definition at line 2426 of file tm4c123fe6pm.h.
#define WDT_LOAD_S 0 |
Definition at line 2427 of file tm4c123fe6pm.h.
#define WDT_LOCK_LOCKED 0x00000001 |
Definition at line 2483 of file tm4c123fe6pm.h.
#define WDT_LOCK_M 0xFFFFFFFF |
Definition at line 2481 of file tm4c123fe6pm.h.
#define WDT_LOCK_UNLOCK 0x1ACCE551 |
Definition at line 2484 of file tm4c123fe6pm.h.
#define WDT_LOCK_UNLOCKED 0x00000000 |
Definition at line 2482 of file tm4c123fe6pm.h.
#define WDT_MIS_WDTMIS 0x00000001 |
Definition at line 2467 of file tm4c123fe6pm.h.
#define WDT_RIS_WDTRIS 0x00000001 |
Definition at line 2460 of file tm4c123fe6pm.h.
#define WDT_TEST_STALL 0x00000100 |
Definition at line 2474 of file tm4c123fe6pm.h.
#define WDT_VALUE_M 0xFFFFFFFF |
Definition at line 2434 of file tm4c123fe6pm.h.
#define WDT_VALUE_S 0 |
Definition at line 2435 of file tm4c123fe6pm.h.
#define WTIMER0_CFG_R (*((volatile uint32_t *)0x40036000)) |
Definition at line 1184 of file tm4c123fe6pm.h.
#define WTIMER0_CTL_R (*((volatile uint32_t *)0x4003600C)) |
Definition at line 1187 of file tm4c123fe6pm.h.
#define WTIMER0_ICR_R (*((volatile uint32_t *)0x40036024)) |
Definition at line 1192 of file tm4c123fe6pm.h.
#define WTIMER0_IMR_R (*((volatile uint32_t *)0x40036018)) |
Definition at line 1189 of file tm4c123fe6pm.h.
#define WTIMER0_MIS_R (*((volatile uint32_t *)0x40036020)) |
Definition at line 1191 of file tm4c123fe6pm.h.
#define WTIMER0_PP_R (*((volatile uint32_t *)0x40036FC0)) |
Definition at line 1210 of file tm4c123fe6pm.h.
#define WTIMER0_RIS_R (*((volatile uint32_t *)0x4003601C)) |
Definition at line 1190 of file tm4c123fe6pm.h.
#define WTIMER0_RTCPD_R (*((volatile uint32_t *)0x40036058)) |
Definition at line 1205 of file tm4c123fe6pm.h.
#define WTIMER0_SYNC_R (*((volatile uint32_t *)0x40036010)) |
Definition at line 1188 of file tm4c123fe6pm.h.
#define WTIMER0_TAILR_R (*((volatile uint32_t *)0x40036028)) |
Definition at line 1193 of file tm4c123fe6pm.h.
#define WTIMER0_TAMATCHR_R (*((volatile uint32_t *)0x40036030)) |
Definition at line 1195 of file tm4c123fe6pm.h.
#define WTIMER0_TAMR_R (*((volatile uint32_t *)0x40036004)) |
Definition at line 1185 of file tm4c123fe6pm.h.
#define WTIMER0_TAPMR_R (*((volatile uint32_t *)0x40036040)) |
Definition at line 1199 of file tm4c123fe6pm.h.
#define WTIMER0_TAPR_R (*((volatile uint32_t *)0x40036038)) |
Definition at line 1197 of file tm4c123fe6pm.h.
#define WTIMER0_TAPS_R (*((volatile uint32_t *)0x4003605C)) |
Definition at line 1206 of file tm4c123fe6pm.h.
#define WTIMER0_TAPV_R (*((volatile uint32_t *)0x40036064)) |
Definition at line 1208 of file tm4c123fe6pm.h.
#define WTIMER0_TAR_R (*((volatile uint32_t *)0x40036048)) |
Definition at line 1201 of file tm4c123fe6pm.h.
#define WTIMER0_TAV_R (*((volatile uint32_t *)0x40036050)) |
Definition at line 1203 of file tm4c123fe6pm.h.
#define WTIMER0_TBILR_R (*((volatile uint32_t *)0x4003602C)) |
Definition at line 1194 of file tm4c123fe6pm.h.
#define WTIMER0_TBMATCHR_R (*((volatile uint32_t *)0x40036034)) |
Definition at line 1196 of file tm4c123fe6pm.h.
#define WTIMER0_TBMR_R (*((volatile uint32_t *)0x40036008)) |
Definition at line 1186 of file tm4c123fe6pm.h.
#define WTIMER0_TBPMR_R (*((volatile uint32_t *)0x40036044)) |
Definition at line 1200 of file tm4c123fe6pm.h.
#define WTIMER0_TBPR_R (*((volatile uint32_t *)0x4003603C)) |
Definition at line 1198 of file tm4c123fe6pm.h.
#define WTIMER0_TBPS_R (*((volatile uint32_t *)0x40036060)) |
Definition at line 1207 of file tm4c123fe6pm.h.
#define WTIMER0_TBPV_R (*((volatile uint32_t *)0x40036068)) |
Definition at line 1209 of file tm4c123fe6pm.h.
#define WTIMER0_TBR_R (*((volatile uint32_t *)0x4003604C)) |
Definition at line 1202 of file tm4c123fe6pm.h.
#define WTIMER0_TBV_R (*((volatile uint32_t *)0x40036054)) |
Definition at line 1204 of file tm4c123fe6pm.h.
#define WTIMER1_CFG_R (*((volatile uint32_t *)0x40037000)) |
Definition at line 1217 of file tm4c123fe6pm.h.
#define WTIMER1_CTL_R (*((volatile uint32_t *)0x4003700C)) |
Definition at line 1220 of file tm4c123fe6pm.h.
#define WTIMER1_ICR_R (*((volatile uint32_t *)0x40037024)) |
Definition at line 1225 of file tm4c123fe6pm.h.
#define WTIMER1_IMR_R (*((volatile uint32_t *)0x40037018)) |
Definition at line 1222 of file tm4c123fe6pm.h.
#define WTIMER1_MIS_R (*((volatile uint32_t *)0x40037020)) |
Definition at line 1224 of file tm4c123fe6pm.h.
#define WTIMER1_PP_R (*((volatile uint32_t *)0x40037FC0)) |
Definition at line 1243 of file tm4c123fe6pm.h.
#define WTIMER1_RIS_R (*((volatile uint32_t *)0x4003701C)) |
Definition at line 1223 of file tm4c123fe6pm.h.
#define WTIMER1_RTCPD_R (*((volatile uint32_t *)0x40037058)) |
Definition at line 1238 of file tm4c123fe6pm.h.
#define WTIMER1_SYNC_R (*((volatile uint32_t *)0x40037010)) |
Definition at line 1221 of file tm4c123fe6pm.h.
#define WTIMER1_TAILR_R (*((volatile uint32_t *)0x40037028)) |
Definition at line 1226 of file tm4c123fe6pm.h.
#define WTIMER1_TAMATCHR_R (*((volatile uint32_t *)0x40037030)) |
Definition at line 1228 of file tm4c123fe6pm.h.
#define WTIMER1_TAMR_R (*((volatile uint32_t *)0x40037004)) |
Definition at line 1218 of file tm4c123fe6pm.h.
#define WTIMER1_TAPMR_R (*((volatile uint32_t *)0x40037040)) |
Definition at line 1232 of file tm4c123fe6pm.h.
#define WTIMER1_TAPR_R (*((volatile uint32_t *)0x40037038)) |
Definition at line 1230 of file tm4c123fe6pm.h.
#define WTIMER1_TAPS_R (*((volatile uint32_t *)0x4003705C)) |
Definition at line 1239 of file tm4c123fe6pm.h.
#define WTIMER1_TAPV_R (*((volatile uint32_t *)0x40037064)) |
Definition at line 1241 of file tm4c123fe6pm.h.
#define WTIMER1_TAR_R (*((volatile uint32_t *)0x40037048)) |
Definition at line 1234 of file tm4c123fe6pm.h.
#define WTIMER1_TAV_R (*((volatile uint32_t *)0x40037050)) |
Definition at line 1236 of file tm4c123fe6pm.h.
#define WTIMER1_TBILR_R (*((volatile uint32_t *)0x4003702C)) |
Definition at line 1227 of file tm4c123fe6pm.h.
#define WTIMER1_TBMATCHR_R (*((volatile uint32_t *)0x40037034)) |
Definition at line 1229 of file tm4c123fe6pm.h.
#define WTIMER1_TBMR_R (*((volatile uint32_t *)0x40037008)) |
Definition at line 1219 of file tm4c123fe6pm.h.
#define WTIMER1_TBPMR_R (*((volatile uint32_t *)0x40037044)) |
Definition at line 1233 of file tm4c123fe6pm.h.
#define WTIMER1_TBPR_R (*((volatile uint32_t *)0x4003703C)) |
Definition at line 1231 of file tm4c123fe6pm.h.
#define WTIMER1_TBPS_R (*((volatile uint32_t *)0x40037060)) |
Definition at line 1240 of file tm4c123fe6pm.h.
#define WTIMER1_TBPV_R (*((volatile uint32_t *)0x40037068)) |
Definition at line 1242 of file tm4c123fe6pm.h.
#define WTIMER1_TBR_R (*((volatile uint32_t *)0x4003704C)) |
Definition at line 1235 of file tm4c123fe6pm.h.
#define WTIMER1_TBV_R (*((volatile uint32_t *)0x40037054)) |
Definition at line 1237 of file tm4c123fe6pm.h.
#define WTIMER2_CFG_R (*((volatile uint32_t *)0x4004C000)) |
Definition at line 1479 of file tm4c123fe6pm.h.
#define WTIMER2_CTL_R (*((volatile uint32_t *)0x4004C00C)) |
Definition at line 1482 of file tm4c123fe6pm.h.
#define WTIMER2_ICR_R (*((volatile uint32_t *)0x4004C024)) |
Definition at line 1487 of file tm4c123fe6pm.h.
#define WTIMER2_IMR_R (*((volatile uint32_t *)0x4004C018)) |
Definition at line 1484 of file tm4c123fe6pm.h.
#define WTIMER2_MIS_R (*((volatile uint32_t *)0x4004C020)) |
Definition at line 1486 of file tm4c123fe6pm.h.
#define WTIMER2_PP_R (*((volatile uint32_t *)0x4004CFC0)) |
Definition at line 1505 of file tm4c123fe6pm.h.
#define WTIMER2_RIS_R (*((volatile uint32_t *)0x4004C01C)) |
Definition at line 1485 of file tm4c123fe6pm.h.
#define WTIMER2_RTCPD_R (*((volatile uint32_t *)0x4004C058)) |
Definition at line 1500 of file tm4c123fe6pm.h.
#define WTIMER2_SYNC_R (*((volatile uint32_t *)0x4004C010)) |
Definition at line 1483 of file tm4c123fe6pm.h.
#define WTIMER2_TAILR_R (*((volatile uint32_t *)0x4004C028)) |
Definition at line 1488 of file tm4c123fe6pm.h.
#define WTIMER2_TAMATCHR_R (*((volatile uint32_t *)0x4004C030)) |
Definition at line 1490 of file tm4c123fe6pm.h.
#define WTIMER2_TAMR_R (*((volatile uint32_t *)0x4004C004)) |
Definition at line 1480 of file tm4c123fe6pm.h.
#define WTIMER2_TAPMR_R (*((volatile uint32_t *)0x4004C040)) |
Definition at line 1494 of file tm4c123fe6pm.h.
#define WTIMER2_TAPR_R (*((volatile uint32_t *)0x4004C038)) |
Definition at line 1492 of file tm4c123fe6pm.h.
#define WTIMER2_TAPS_R (*((volatile uint32_t *)0x4004C05C)) |
Definition at line 1501 of file tm4c123fe6pm.h.
#define WTIMER2_TAPV_R (*((volatile uint32_t *)0x4004C064)) |
Definition at line 1503 of file tm4c123fe6pm.h.
#define WTIMER2_TAR_R (*((volatile uint32_t *)0x4004C048)) |
Definition at line 1496 of file tm4c123fe6pm.h.
#define WTIMER2_TAV_R (*((volatile uint32_t *)0x4004C050)) |
Definition at line 1498 of file tm4c123fe6pm.h.
#define WTIMER2_TBILR_R (*((volatile uint32_t *)0x4004C02C)) |
Definition at line 1489 of file tm4c123fe6pm.h.
#define WTIMER2_TBMATCHR_R (*((volatile uint32_t *)0x4004C034)) |
Definition at line 1491 of file tm4c123fe6pm.h.
#define WTIMER2_TBMR_R (*((volatile uint32_t *)0x4004C008)) |
Definition at line 1481 of file tm4c123fe6pm.h.
#define WTIMER2_TBPMR_R (*((volatile uint32_t *)0x4004C044)) |
Definition at line 1495 of file tm4c123fe6pm.h.
#define WTIMER2_TBPR_R (*((volatile uint32_t *)0x4004C03C)) |
Definition at line 1493 of file tm4c123fe6pm.h.
#define WTIMER2_TBPS_R (*((volatile uint32_t *)0x4004C060)) |
Definition at line 1502 of file tm4c123fe6pm.h.
#define WTIMER2_TBPV_R (*((volatile uint32_t *)0x4004C068)) |
Definition at line 1504 of file tm4c123fe6pm.h.
#define WTIMER2_TBR_R (*((volatile uint32_t *)0x4004C04C)) |
Definition at line 1497 of file tm4c123fe6pm.h.
#define WTIMER2_TBV_R (*((volatile uint32_t *)0x4004C054)) |
Definition at line 1499 of file tm4c123fe6pm.h.
#define WTIMER3_CFG_R (*((volatile uint32_t *)0x4004D000)) |
Definition at line 1512 of file tm4c123fe6pm.h.
#define WTIMER3_CTL_R (*((volatile uint32_t *)0x4004D00C)) |
Definition at line 1515 of file tm4c123fe6pm.h.
#define WTIMER3_ICR_R (*((volatile uint32_t *)0x4004D024)) |
Definition at line 1520 of file tm4c123fe6pm.h.
#define WTIMER3_IMR_R (*((volatile uint32_t *)0x4004D018)) |
Definition at line 1517 of file tm4c123fe6pm.h.
#define WTIMER3_MIS_R (*((volatile uint32_t *)0x4004D020)) |
Definition at line 1519 of file tm4c123fe6pm.h.
#define WTIMER3_PP_R (*((volatile uint32_t *)0x4004DFC0)) |
Definition at line 1538 of file tm4c123fe6pm.h.
#define WTIMER3_RIS_R (*((volatile uint32_t *)0x4004D01C)) |
Definition at line 1518 of file tm4c123fe6pm.h.
#define WTIMER3_RTCPD_R (*((volatile uint32_t *)0x4004D058)) |
Definition at line 1533 of file tm4c123fe6pm.h.
#define WTIMER3_SYNC_R (*((volatile uint32_t *)0x4004D010)) |
Definition at line 1516 of file tm4c123fe6pm.h.
#define WTIMER3_TAILR_R (*((volatile uint32_t *)0x4004D028)) |
Definition at line 1521 of file tm4c123fe6pm.h.
#define WTIMER3_TAMATCHR_R (*((volatile uint32_t *)0x4004D030)) |
Definition at line 1523 of file tm4c123fe6pm.h.
#define WTIMER3_TAMR_R (*((volatile uint32_t *)0x4004D004)) |
Definition at line 1513 of file tm4c123fe6pm.h.
#define WTIMER3_TAPMR_R (*((volatile uint32_t *)0x4004D040)) |
Definition at line 1527 of file tm4c123fe6pm.h.
#define WTIMER3_TAPR_R (*((volatile uint32_t *)0x4004D038)) |
Definition at line 1525 of file tm4c123fe6pm.h.
#define WTIMER3_TAPS_R (*((volatile uint32_t *)0x4004D05C)) |
Definition at line 1534 of file tm4c123fe6pm.h.
#define WTIMER3_TAPV_R (*((volatile uint32_t *)0x4004D064)) |
Definition at line 1536 of file tm4c123fe6pm.h.
#define WTIMER3_TAR_R (*((volatile uint32_t *)0x4004D048)) |
Definition at line 1529 of file tm4c123fe6pm.h.
#define WTIMER3_TAV_R (*((volatile uint32_t *)0x4004D050)) |
Definition at line 1531 of file tm4c123fe6pm.h.
#define WTIMER3_TBILR_R (*((volatile uint32_t *)0x4004D02C)) |
Definition at line 1522 of file tm4c123fe6pm.h.
#define WTIMER3_TBMATCHR_R (*((volatile uint32_t *)0x4004D034)) |
Definition at line 1524 of file tm4c123fe6pm.h.
#define WTIMER3_TBMR_R (*((volatile uint32_t *)0x4004D008)) |
Definition at line 1514 of file tm4c123fe6pm.h.
#define WTIMER3_TBPMR_R (*((volatile uint32_t *)0x4004D044)) |
Definition at line 1528 of file tm4c123fe6pm.h.
#define WTIMER3_TBPR_R (*((volatile uint32_t *)0x4004D03C)) |
Definition at line 1526 of file tm4c123fe6pm.h.
#define WTIMER3_TBPS_R (*((volatile uint32_t *)0x4004D060)) |
Definition at line 1535 of file tm4c123fe6pm.h.
#define WTIMER3_TBPV_R (*((volatile uint32_t *)0x4004D068)) |
Definition at line 1537 of file tm4c123fe6pm.h.
#define WTIMER3_TBR_R (*((volatile uint32_t *)0x4004D04C)) |
Definition at line 1530 of file tm4c123fe6pm.h.
#define WTIMER3_TBV_R (*((volatile uint32_t *)0x4004D054)) |
Definition at line 1532 of file tm4c123fe6pm.h.
#define WTIMER4_CFG_R (*((volatile uint32_t *)0x4004E000)) |
Definition at line 1545 of file tm4c123fe6pm.h.
#define WTIMER4_CTL_R (*((volatile uint32_t *)0x4004E00C)) |
Definition at line 1548 of file tm4c123fe6pm.h.
#define WTIMER4_ICR_R (*((volatile uint32_t *)0x4004E024)) |
Definition at line 1553 of file tm4c123fe6pm.h.
#define WTIMER4_IMR_R (*((volatile uint32_t *)0x4004E018)) |
Definition at line 1550 of file tm4c123fe6pm.h.
#define WTIMER4_MIS_R (*((volatile uint32_t *)0x4004E020)) |
Definition at line 1552 of file tm4c123fe6pm.h.
#define WTIMER4_PP_R (*((volatile uint32_t *)0x4004EFC0)) |
Definition at line 1571 of file tm4c123fe6pm.h.
#define WTIMER4_RIS_R (*((volatile uint32_t *)0x4004E01C)) |
Definition at line 1551 of file tm4c123fe6pm.h.
#define WTIMER4_RTCPD_R (*((volatile uint32_t *)0x4004E058)) |
Definition at line 1566 of file tm4c123fe6pm.h.
#define WTIMER4_SYNC_R (*((volatile uint32_t *)0x4004E010)) |
Definition at line 1549 of file tm4c123fe6pm.h.
#define WTIMER4_TAILR_R (*((volatile uint32_t *)0x4004E028)) |
Definition at line 1554 of file tm4c123fe6pm.h.
#define WTIMER4_TAMATCHR_R (*((volatile uint32_t *)0x4004E030)) |
Definition at line 1556 of file tm4c123fe6pm.h.
#define WTIMER4_TAMR_R (*((volatile uint32_t *)0x4004E004)) |
Definition at line 1546 of file tm4c123fe6pm.h.
#define WTIMER4_TAPMR_R (*((volatile uint32_t *)0x4004E040)) |
Definition at line 1560 of file tm4c123fe6pm.h.
#define WTIMER4_TAPR_R (*((volatile uint32_t *)0x4004E038)) |
Definition at line 1558 of file tm4c123fe6pm.h.
#define WTIMER4_TAPS_R (*((volatile uint32_t *)0x4004E05C)) |
Definition at line 1567 of file tm4c123fe6pm.h.
#define WTIMER4_TAPV_R (*((volatile uint32_t *)0x4004E064)) |
Definition at line 1569 of file tm4c123fe6pm.h.
#define WTIMER4_TAR_R (*((volatile uint32_t *)0x4004E048)) |
Definition at line 1562 of file tm4c123fe6pm.h.
#define WTIMER4_TAV_R (*((volatile uint32_t *)0x4004E050)) |
Definition at line 1564 of file tm4c123fe6pm.h.
#define WTIMER4_TBILR_R (*((volatile uint32_t *)0x4004E02C)) |
Definition at line 1555 of file tm4c123fe6pm.h.
#define WTIMER4_TBMATCHR_R (*((volatile uint32_t *)0x4004E034)) |
Definition at line 1557 of file tm4c123fe6pm.h.
#define WTIMER4_TBMR_R (*((volatile uint32_t *)0x4004E008)) |
Definition at line 1547 of file tm4c123fe6pm.h.
#define WTIMER4_TBPMR_R (*((volatile uint32_t *)0x4004E044)) |
Definition at line 1561 of file tm4c123fe6pm.h.
#define WTIMER4_TBPR_R (*((volatile uint32_t *)0x4004E03C)) |
Definition at line 1559 of file tm4c123fe6pm.h.
#define WTIMER4_TBPS_R (*((volatile uint32_t *)0x4004E060)) |
Definition at line 1568 of file tm4c123fe6pm.h.
#define WTIMER4_TBPV_R (*((volatile uint32_t *)0x4004E068)) |
Definition at line 1570 of file tm4c123fe6pm.h.
#define WTIMER4_TBR_R (*((volatile uint32_t *)0x4004E04C)) |
Definition at line 1563 of file tm4c123fe6pm.h.
#define WTIMER4_TBV_R (*((volatile uint32_t *)0x4004E054)) |
Definition at line 1565 of file tm4c123fe6pm.h.
#define WTIMER5_CFG_R (*((volatile uint32_t *)0x4004F000)) |
Definition at line 1578 of file tm4c123fe6pm.h.
#define WTIMER5_CTL_R (*((volatile uint32_t *)0x4004F00C)) |
Definition at line 1581 of file tm4c123fe6pm.h.
#define WTIMER5_ICR_R (*((volatile uint32_t *)0x4004F024)) |
Definition at line 1586 of file tm4c123fe6pm.h.
#define WTIMER5_IMR_R (*((volatile uint32_t *)0x4004F018)) |
Definition at line 1583 of file tm4c123fe6pm.h.
#define WTIMER5_MIS_R (*((volatile uint32_t *)0x4004F020)) |
Definition at line 1585 of file tm4c123fe6pm.h.
#define WTIMER5_PP_R (*((volatile uint32_t *)0x4004FFC0)) |
Definition at line 1604 of file tm4c123fe6pm.h.
#define WTIMER5_RIS_R (*((volatile uint32_t *)0x4004F01C)) |
Definition at line 1584 of file tm4c123fe6pm.h.
#define WTIMER5_RTCPD_R (*((volatile uint32_t *)0x4004F058)) |
Definition at line 1599 of file tm4c123fe6pm.h.
#define WTIMER5_SYNC_R (*((volatile uint32_t *)0x4004F010)) |
Definition at line 1582 of file tm4c123fe6pm.h.
#define WTIMER5_TAILR_R (*((volatile uint32_t *)0x4004F028)) |
Definition at line 1587 of file tm4c123fe6pm.h.
#define WTIMER5_TAMATCHR_R (*((volatile uint32_t *)0x4004F030)) |
Definition at line 1589 of file tm4c123fe6pm.h.
#define WTIMER5_TAMR_R (*((volatile uint32_t *)0x4004F004)) |
Definition at line 1579 of file tm4c123fe6pm.h.
#define WTIMER5_TAPMR_R (*((volatile uint32_t *)0x4004F040)) |
Definition at line 1593 of file tm4c123fe6pm.h.
#define WTIMER5_TAPR_R (*((volatile uint32_t *)0x4004F038)) |
Definition at line 1591 of file tm4c123fe6pm.h.
#define WTIMER5_TAPS_R (*((volatile uint32_t *)0x4004F05C)) |
Definition at line 1600 of file tm4c123fe6pm.h.
#define WTIMER5_TAPV_R (*((volatile uint32_t *)0x4004F064)) |
Definition at line 1602 of file tm4c123fe6pm.h.
#define WTIMER5_TAR_R (*((volatile uint32_t *)0x4004F048)) |
Definition at line 1595 of file tm4c123fe6pm.h.
#define WTIMER5_TAV_R (*((volatile uint32_t *)0x4004F050)) |
Definition at line 1597 of file tm4c123fe6pm.h.
#define WTIMER5_TBILR_R (*((volatile uint32_t *)0x4004F02C)) |
Definition at line 1588 of file tm4c123fe6pm.h.
#define WTIMER5_TBMATCHR_R (*((volatile uint32_t *)0x4004F034)) |
Definition at line 1590 of file tm4c123fe6pm.h.
#define WTIMER5_TBMR_R (*((volatile uint32_t *)0x4004F008)) |
Definition at line 1580 of file tm4c123fe6pm.h.
#define WTIMER5_TBPMR_R (*((volatile uint32_t *)0x4004F044)) |
Definition at line 1594 of file tm4c123fe6pm.h.
#define WTIMER5_TBPR_R (*((volatile uint32_t *)0x4004F03C)) |
Definition at line 1592 of file tm4c123fe6pm.h.
#define WTIMER5_TBPS_R (*((volatile uint32_t *)0x4004F060)) |
Definition at line 1601 of file tm4c123fe6pm.h.
#define WTIMER5_TBPV_R (*((volatile uint32_t *)0x4004F068)) |
Definition at line 1603 of file tm4c123fe6pm.h.
#define WTIMER5_TBR_R (*((volatile uint32_t *)0x4004F04C)) |
Definition at line 1596 of file tm4c123fe6pm.h.
#define WTIMER5_TBV_R (*((volatile uint32_t *)0x4004F054)) |
Definition at line 1598 of file tm4c123fe6pm.h.