EE445M RTOS
Taken at the University of Texas Spring 2015
Eeprom_api

Macros

#define BLOCKS_FROM_EESIZE(x)
 
#define SIZE_FROM_EESIZE(x)
 
#define OFFSET_FROM_ADDR(x)   (((x) >> 2) & 0x0F)
 
#define EEPROM_MASS_ERASE_KEY   ((uint32_t)0xE37B << EEPROM_EEDBGME_KEY_S)
 
#define EEPROM_INIT_OK   0
 
#define EEPROM_INIT_ERROR   2
 
#define EEPROM_RC_WRBUSY   0x00000020
 
#define EEPROM_RC_NOPERM   0x00000010
 
#define EEPROM_RC_WKCOPY   0x00000008
 
#define EEPROM_RC_WKERASE   0x00000004
 
#define EEPROM_RC_WORKING   0x00000001
 
#define EEPROM_PROT_SUPERVISOR_ONLY   0x00000008
 
#define EEPROM_PROT_RW_LRO_URW   0x00000000
 
#define EEPROM_PROT_NA_LNA_URW   0x00000001
 
#define EEPROM_PROT_RO_LNA_URO   0x00000002
 
#define EEPROM_INT_PROGRAM   0x00000004
 
#define EEPROMBlockFromAddr(ui32Addr)   ((ui32Addr) >> 6)
 
#define EEPROMAddrFromBlock(ui32Block)   ((ui32Block) << 6)
 

Functions

static void _EEPROMSectorMaskSet (uint32_t ui32Address)
 
static void _EEPROMSectorMaskClear (void)
 
static void _EEPROMWaitForDone (void)
 
uint32_t EEPROMInit (void)
 
uint32_t EEPROMSizeGet (void)
 
uint32_t EEPROMBlockCountGet (void)
 
void EEPROMRead (uint32_t *pui32Data, uint32_t ui32Address, uint32_t ui32Count)
 
uint32_t EEPROMProgram (uint32_t *pui32Data, uint32_t ui32Address, uint32_t ui32Count)
 
uint32_t EEPROMProgramNonBlocking (uint32_t ui32Data, uint32_t ui32Address)
 
uint32_t EEPROMMassErase (void)
 
uint32_t EEPROMBlockProtectGet (uint32_t ui32Block)
 
uint32_t EEPROMBlockProtectSet (uint32_t ui32Block, uint32_t ui32Protect)
 
uint32_t EEPROMBlockPasswordSet (uint32_t ui32Block, uint32_t *pui32Password, uint32_t ui32Count)
 
uint32_t EEPROMBlockLock (uint32_t ui32Block)
 
uint32_t EEPROMBlockUnlock (uint32_t ui32Block, uint32_t *pui32Password, uint32_t ui32Count)
 
void EEPROMBlockHide (uint32_t ui32Block)
 
void EEPROMIntEnable (uint32_t ui32IntFlags)
 
void EEPROMIntDisable (uint32_t ui32IntFlags)
 
uint32_t EEPROMIntStatus (bool bMasked)
 
void EEPROMIntClear (uint32_t ui32IntFlags)
 
uint32_t EEPROMStatusGet (void)
 

Detailed Description

Macro Definition Documentation

#define BLOCKS_FROM_EESIZE (   x)
#define EEPROM_INIT_ERROR   2

This value may be returned from a call to EEPROMInit(). It indicates that a previous data or protection write operation was interrupted by a reset event and that the EEPROM peripheral was unable to clean up after the problem. This situation may be resolved with another reset or may be fatal depending upon the cause of the problem. For example, if the voltage to the part is unstable, retrying once the voltage has stabilized may clear the error.

Definition at line 83 of file eeprom.h.

Referenced by EEPROMInit().

#define EEPROM_INIT_OK   0

This value may be returned from a call to EEPROMInit(). It indicates that no previous write operations were interrupted by a reset event and that the EEPROM peripheral is ready for use.

Definition at line 72 of file eeprom.h.

Referenced by EEPROMInit().

#define EEPROM_INT_PROGRAM   0x00000004

This value may be passed to EEPROMIntEnable() and EEPROMIntDisable() and is returned by EEPROMIntStatus() if an EEPROM interrupt is currently being signaled.

Definition at line 176 of file eeprom.h.

Referenced by EEPROMIntDisable(), EEPROMIntEnable(), and EEPROMIntStatus().

#define EEPROM_MASS_ERASE_KEY   ((uint32_t)0xE37B << EEPROM_EEDBGME_KEY_S)

Definition at line 83 of file eeprom.c.

Referenced by EEPROMMassErase().

#define EEPROM_PROT_NA_LNA_URW   0x00000001

This value may be passed to EEPROMBlockProtectSet() or returned from EEPROMBlockProtectGet(). It indicates that the block should offer neither read nor write access unless it is protected by a password and unlocked.

Definition at line 158 of file eeprom.h.

#define EEPROM_PROT_RO_LNA_URO   0x00000002

This value may be passed to EEPROMBlockProtectSet() or returned from EEPROMBlockProtectGet(). It indicates that the block should offer read-only access when no password is set or when a password is set and the block is unlocked. When a password is set and the block is locked, neither read nor write access is permitted.

Definition at line 167 of file eeprom.h.

#define EEPROM_PROT_RW_LRO_URW   0x00000000

This value may be passed to EEPROMBlockProtectSet() or returned from EEPROMBlockProtectGet(). It indicates that the block should offer read/write access when no password is set or when a password is set and the block is unlocked, and read-only access when a password is set but the block is locked.

Definition at line 151 of file eeprom.h.

#define EEPROM_PROT_SUPERVISOR_ONLY   0x00000008

This bit may be ORed with the protection option passed to EEPROMBlockProtectSet() or returned from EEPROMBlockProtectGet(). It restricts EEPROM access to threads running in supervisor mode and prevents access to an EEPROM block when the CPU is in user mode.

Definition at line 142 of file eeprom.h.

#define EEPROM_RC_NOPERM   0x00000010

This return code bit indicates that an attempt was made to write a value but the destination permissions disallow write operations. This may be due to the destination block being locked, access protection set to prohibit writes or an attempt to write a password when one is already written.

Definition at line 105 of file eeprom.h.

#define EEPROM_RC_WKCOPY   0x00000008

This return code bit indicates that the EEPROM programming state machine is currently copying to or from the internal copy buffer to make room for a newly written value. It is provided as a status indicator and does not indicate an error.

Definition at line 113 of file eeprom.h.

#define EEPROM_RC_WKERASE   0x00000004

This return code bit indicates that the EEPROM programming state machine is currently erasing the internal copy buffer. It is provided as a status indicator and does not indicate an error.

Definition at line 120 of file eeprom.h.

#define EEPROM_RC_WORKING   0x00000001

This return code bit indicates that the EEPROM programming state machine is currently working. No new write operations should be attempted until this bit is clear.

Definition at line 127 of file eeprom.h.

#define EEPROM_RC_WRBUSY   0x00000020

This return code bit indicates that an attempt was made to read from the EEPROM while a write operation was in progress.

Definition at line 96 of file eeprom.h.

#define EEPROMAddrFromBlock (   ui32Block)    ((ui32Block) << 6)

Returns the offset address of the first word in an EEPROM block.

Parameters
ui32Blockis the index of the EEPROM block whose first word address is to be returned.

This macro may be used to determine the address of the first word in a given EEPROM block. The address returned is expressed as a byte offset from the base of EEPROM storage.

Returns
Returns the address of the first word in the given EEPROM block.

Definition at line 211 of file eeprom.h.

#define EEPROMBlockFromAddr (   ui32Addr)    ((ui32Addr) >> 6)

Returns the EEPROM block number containing a given offset address.

Parameters
ui32Addris the linear, byte address of the EEPROM location whose block number is to be returned. This is a zero-based offset from the start of the EEPROM storage.

This macro may be used to translate an EEPROM address offset into a block number suitable for use in any of the driver's block protection functions. The address provided is expressed as a byte offset from the base of the EEPROM.

Returns
Returns the zero-based block number which contains the passed address.

Definition at line 195 of file eeprom.h.

Referenced by EEPROMProgram(), EEPROMProgramNonBlocking(), and EEPROMRead().

#define OFFSET_FROM_ADDR (   x)    (((x) >> 2) & 0x0F)

Definition at line 76 of file eeprom.c.

Referenced by EEPROMProgram(), EEPROMProgramNonBlocking(), and EEPROMRead().

#define SIZE_FROM_EESIZE (   x)
Value:
#define EEPROM_EESIZE_WORDCNT_M
Definition: hw_eeprom.h:74
#define EEPROM_EESIZE_WORDCNT_S
Definition: hw_eeprom.h:76

Definition at line 68 of file eeprom.c.

Referenced by EEPROMProgram(), EEPROMProgramNonBlocking(), EEPROMRead(), and EEPROMSizeGet().

Function Documentation

static void _EEPROMSectorMaskClear ( void  )
static

Definition at line 121 of file eeprom.c.

References HWREG, and SysCtlDelay().

Referenced by EEPROMIntClear(), EEPROMMassErase(), and EEPROMProgram().

122 {
123  SysCtlDelay(10);
124  HWREG(0x400FD0FC) = 3;
125  SysCtlDelay(10);
126  HWREG(0x400AE2C0) = 0;
127  SysCtlDelay(10);
128  HWREG(0x400FD0FC) = 0;
129  SysCtlDelay(10);
130 }
#define HWREG(x)
Definition: hw_types.h:48
void SysCtlDelay(uint32_t ui32Count)

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static void _EEPROMSectorMaskSet ( uint32_t  ui32Address)
static

Definition at line 94 of file eeprom.c.

References HWREG, and SysCtlDelay().

Referenced by EEPROMProgram(), and EEPROMProgramNonBlocking().

95 {
96  uint32_t ui32Mask;
97 
98  //
99  // Determine which page contains the passed EEPROM address. The 2KB EEPROM
100  // is implemented in 16KB of flash with each 1KB sector of flash holding
101  // values for 32 consecutive EEPROM words (or 128 bytes).
102  //
103  ui32Mask = ~(1 << (ui32Address >> 7));
104 
105  SysCtlDelay(10);
106  HWREG(0x400FD0FC) = 3;
107  SysCtlDelay(10);
108  HWREG(0x400AE2C0) = ui32Mask;
109  SysCtlDelay(10);
110  HWREG(0x400FD0FC) = 0;
111  SysCtlDelay(10);
112 }
#define HWREG(x)
Definition: hw_types.h:48
void SysCtlDelay(uint32_t ui32Count)

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static void _EEPROMWaitForDone ( void  )
static

Definition at line 138 of file eeprom.c.

References EEPROM_EEDONE, EEPROM_EEDONE_WORKING, and HWREG.

Referenced by EEPROMInit(), and EEPROMMassErase().

139 {
140  //
141  // Is the EEPROM still busy?
142  //
144  {
145  //
146  // Spin while EEPROM is busy.
147  //
148  }
149 }
#define HWREG(x)
Definition: hw_types.h:48
#define EEPROM_EEDONE
Definition: hw_eeprom.h:53
#define EEPROM_EEDONE_WORKING
Definition: hw_eeprom.h:123

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uint32_t EEPROMBlockCountGet ( void  )

Determines the number of blocks in the EEPROM.

This function may be called to determine the number of blocks in the EEPROM. Each block is the same size and the number of bytes of storage contained in a block may be determined by dividing the size of the device, obtained via a call to the EEPROMSizeGet() function, by the number of blocks returned by this function.

Returns
Returns the total number of blocks in the device EEPROM.

Definition at line 270 of file eeprom.c.

References BLOCKS_FROM_EESIZE, EEPROM_EESIZE, and HWREG.

271 {
272  //
273  // Extract the number of blocks and return it to the caller.
274  //
275 #ifdef EEPROM_SIZE_LIMIT
276  //
277  // If a size limit has been specified, fake the number of blocks to match.
278  //
279  return(EEPROM_SIZE_LIMIT / 48);
280 #else
281  //
282  // Return the actual number of blocks supported by the hardware.
283  //
285 #endif
286 }
#define HWREG(x)
Definition: hw_types.h:48
#define EEPROM_EESIZE
Definition: hw_eeprom.h:48
#define BLOCKS_FROM_EESIZE(x)
Definition: eeprom.c:66
void EEPROMBlockHide ( uint32_t  ui32Block)

Hides an EEPROM block until the next reset.

Parameters
ui32Blockis the EEPROM block number which is to be hidden.

This function hides an EEPROM block other than block 0. Once hidden, a block is completely inaccessible until the next reset. This mechanism allows initialization code to have access to data which is to be hidden from the rest of the application. Unlike applications using passwords, an application making using of block hiding need not contain any embedded passwords which could be found through disassembly.

Returns
None.

Definition at line 960 of file eeprom.c.

References ASSERT, BLOCKS_FROM_EESIZE, EEPROM_EEHIDE, EEPROM_EESIZE, and HWREG.

961 {
962  //
963  // Check parameters in a debug build.
964  //
965  ASSERT(!ui32Block);
967 
968  //
969  // Hide the requested block.
970  //
971  HWREG(EEPROM_EEHIDE) = (1 << ui32Block);
972 }
#define HWREG(x)
Definition: hw_types.h:48
#define EEPROM_EEHIDE
Definition: hw_eeprom.h:63
#define ASSERT(expr)
Definition: debug.h:67
#define EEPROM_EESIZE
Definition: hw_eeprom.h:48
#define BLOCKS_FROM_EESIZE(x)
Definition: eeprom.c:66
uint32_t EEPROMBlockLock ( uint32_t  ui32Block)

Locks a password-protected EEPROM block.

Parameters
ui32Blockis the EEPROM block number which is to be locked.

This function locks an EEPROM block that has previously been protected by writing a password. Access to the block once it is locked is determined by the protection settings applied via a previous call to the EEPROMBlockProtectSet() function. If no password has previously been set for the block, this function has no effect.

Locking block 0 has the effect of making all other blocks in the EEPROM inaccessible.

Returns
Returns the lock state for the block on exit, 1 if unlocked (as would be the case if no password was set) or 0 if locked.

Definition at line 847 of file eeprom.c.

References ASSERT, BLOCKS_FROM_EESIZE, EEPROM_EEBLOCK, EEPROM_EESIZE, EEPROM_EEUNLOCK, and HWREG.

848 {
849  //
850  // Check parameters in a debug build.
851  //
853 
854  //
855  // Select the block we are going to lock.
856  //
857  HWREG(EEPROM_EEBLOCK) = ui32Block;
858 
859  //
860  // Lock the block.
861  //
862  HWREG(EEPROM_EEUNLOCK) = 0xFFFFFFFF;
863 
864  //
865  // Return the current lock state.
866  //
867  return(HWREG(EEPROM_EEUNLOCK));
868 }
#define HWREG(x)
Definition: hw_types.h:48
#define EEPROM_EEBLOCK
Definition: hw_eeprom.h:49
#define ASSERT(expr)
Definition: debug.h:67
#define EEPROM_EESIZE
Definition: hw_eeprom.h:48
#define BLOCKS_FROM_EESIZE(x)
Definition: eeprom.c:66
#define EEPROM_EEUNLOCK
Definition: hw_eeprom.h:56
uint32_t EEPROMBlockPasswordSet ( uint32_t  ui32Block,
uint32_t *  pui32Password,
uint32_t  ui32Count 
)

Sets the password used to protect an EEPROM block.

Parameters
ui32Blockis the EEPROM block number for which the password is to be set.
pui32Passwordpoints to an array of uint32_t values comprising the password to set. Each element may be any 32-bit value other than 0xFFFFFFFF. This array must contain the number of elements given by the ui32Count parameter.
ui32Countprovides the number of uint32_ts in the ui32Password. Valid values are 1, 2 and 3.

This function allows the password used to unlock an EEPROM block to be set. Valid passwords may be either 32, 64 or 96 bits comprising words with any value other than 0xFFFFFFFF. The password may only be set once. Any further attempts to set the password result in an error. Once the password is set, the block remains unlocked until EEPROMBlockLock() is called for that block or block 0, or a reset occurs.

If a password is set on block 0, this affects locking of the peripheral as a whole. When block 0 is locked, all other EEPROM blocks are inaccessible until block 0 is unlocked. Once block 0 is unlocked, other blocks become accessible according to any passwords set on those blocks and the protection set for that block via a call to EEPROMBlockProtectSet().

Returns
Returns a logical OR combination of EEPROM_RC_WRBUSY, EEPROM_RC_NOPERM, EEPROM_RC_WKCOPY, EEPROM_RC_WKERASE, and EEPROM_RC_WORKING to indicate status and error conditions.

Definition at line 771 of file eeprom.c.

References ASSERT, BLOCKS_FROM_EESIZE, EEPROM_EEBLOCK, EEPROM_EEDONE, EEPROM_EEDONE_WORKING, EEPROM_EEPASS0, EEPROM_EESIZE, and HWREG.

773 {
774  uint32_t ui32Reg;
775 
776  //
777  // Check parameters in a debug build.
778  //
779  ASSERT(pui32Password);
781  ASSERT(ui32Count <= 3);
782 
783  //
784  // Set the block number whose password we are about to write.
785  //
786  HWREG(EEPROM_EEBLOCK) = ui32Block;
787 
788  //
789  // Start with the first password word.
790  //
791  ui32Reg = EEPROM_EEPASS0;
792 
793  //
794  // Write the password.
795  //
796  while(ui32Count)
797  {
798  //
799  // Start the process of writing the password.
800  //
801  HWREG(ui32Reg) = *pui32Password;
802 
803  //
804  // Update values in preparation for writing the next word.
805  //
806  pui32Password++;
807  ui32Reg += 4;
808  ui32Count--;
809 
810  //
811  // Wait for the last word write to complete or an error to be reported.
812  //
814  {
815  //
816  // Still working.
817  //
818  }
819  }
820 
821  //
822  // Return the final write status.
823  //
824  return(HWREG(EEPROM_EEDONE));
825 }
#define HWREG(x)
Definition: hw_types.h:48
#define EEPROM_EEBLOCK
Definition: hw_eeprom.h:49
#define ASSERT(expr)
Definition: debug.h:67
#define EEPROM_EESIZE
Definition: hw_eeprom.h:48
#define EEPROM_EEDONE
Definition: hw_eeprom.h:53
#define EEPROM_EEDONE_WORKING
Definition: hw_eeprom.h:123
#define EEPROM_EEPASS0
Definition: hw_eeprom.h:58
#define BLOCKS_FROM_EESIZE(x)
Definition: eeprom.c:66
uint32_t EEPROMBlockProtectGet ( uint32_t  ui32Block)

Returns the current protection level for an EEPROM block.

Parameters
ui32Blockis the block number for which the protection level is to be queried.

This function returns the current protection settings for a given EEPROM block. If block 0 is currently locked, it must be unlocked prior to calling this function to query the protection setting for other blocks.

Returns
Returns one of EEPROM_PROT_RW_LRO_URW, EEPROM_PROT_NA_LNA_URW or EEPROM_PROT_RO_LNA_URO optionally OR-ed with EEPROM_PROT_SUPERVISOR_ONLY.

Definition at line 643 of file eeprom.c.

References ASSERT, BLOCKS_FROM_EESIZE, EEPROM_EEBLOCK, EEPROM_EEPROT, EEPROM_EESIZE, and HWREG.

644 {
645  //
646  // Parameter validity check.
647  //
649 
650  //
651  // Set the current block.
652  //
653  HWREG(EEPROM_EEBLOCK) = ui32Block;
654 
655  //
656  // Return the protection flags for this block.
657  //
658  return(HWREG(EEPROM_EEPROT));
659 }
#define HWREG(x)
Definition: hw_types.h:48
#define EEPROM_EEBLOCK
Definition: hw_eeprom.h:49
#define ASSERT(expr)
Definition: debug.h:67
#define EEPROM_EESIZE
Definition: hw_eeprom.h:48
#define BLOCKS_FROM_EESIZE(x)
Definition: eeprom.c:66
#define EEPROM_EEPROT
Definition: hw_eeprom.h:57
uint32_t EEPROMBlockProtectSet ( uint32_t  ui32Block,
uint32_t  ui32Protect 
)

Set the current protection options for an EEPROM block.

Parameters
ui32Blockis the block number for which the protection options are to be set.
ui32Protectconsists of one of the values EEPROM_PROT_RW_LRO_URW, EEPROM_PROT_NA_LNA_URW or EEPROM_PROT_RO_LNA_URO optionally ORed with EEPROM_PROT_SUPERVISOR_ONLY.

This function sets the protection settings for a given EEPROM block assuming no protection settings have previously been written. Note that protection settings applied to block 0 have special meaning and control access to the EEPROM peripheral as a whole. Protection settings applied to blocks numbered 1 and above are layered above any protection set on block 0 such that the effective protection on each block is the logical OR of the protection flags set for block 0 and for the target block. This protocol allows global protection options to be set for the whole device via block 0 and more restrictive protection settings to be set on a block-by-block basis.

The protection flags indicate access permissions as follow:

EEPROM_PROT_SUPERVISOR_ONLY restricts access to the block to threads running in supervisor mode. If clear, both user and supervisor threads can access the block.

EEPROM_PROT_RW_LRO_URW provides read/write access to the block if no password is set or if a password is set and the block is unlocked. If the block is locked, only read access is permitted.

EEPROM_PROT_NA_LNA_URW provides neither read nor write access unless a password is set and the block is unlocked. If the block is unlocked, both read and write access are permitted.

EEPROM_PROT_RO_LNA_URO provides read access to the block if no password is set or if a password is set and the block is unlocked. If the block is password protected and locked, neither read nor write access is permitted.

Returns
Returns a logical OR combination of EEPROM_RC_WRBUSY, EEPROM_RC_NOPERM, EEPROM_RC_WKCOPY, EEPROM_RC_WKERASE, and EEPROM_RC_WORKING to indicate status and error conditions.

Definition at line 706 of file eeprom.c.

References ASSERT, BLOCKS_FROM_EESIZE, EEPROM_EEBLOCK, EEPROM_EEDONE, EEPROM_EEDONE_WORKING, EEPROM_EEPROT, EEPROM_EESIZE, and HWREG.

707 {
708  //
709  // Parameter validity check.
710  //
712 
713  //
714  // Set the current block.
715  //
716  HWREG(EEPROM_EEBLOCK) = ui32Block;
717 
718  //
719  // Set the protection options for this block.
720  //
721  HWREG(EEPROM_EEPROT) = ui32Protect;
722 
723  //
724  // Wait for the write to complete.
725  //
727  {
728  //
729  // Still working.
730  //
731  }
732 
733  //
734  // Pass any error codes back to the caller.
735  //
736  return(HWREG(EEPROM_EEDONE));
737 }
#define HWREG(x)
Definition: hw_types.h:48
#define EEPROM_EEBLOCK
Definition: hw_eeprom.h:49
#define ASSERT(expr)
Definition: debug.h:67
#define EEPROM_EESIZE
Definition: hw_eeprom.h:48
#define EEPROM_EEDONE
Definition: hw_eeprom.h:53
#define EEPROM_EEDONE_WORKING
Definition: hw_eeprom.h:123
#define BLOCKS_FROM_EESIZE(x)
Definition: eeprom.c:66
#define EEPROM_EEPROT
Definition: hw_eeprom.h:57
uint32_t EEPROMBlockUnlock ( uint32_t  ui32Block,
uint32_t *  pui32Password,
uint32_t  ui32Count 
)

Unlocks a password-protected EEPROM block.

Parameters
ui32Blockis the EEPROM block number which is to be unlocked.
pui32Passwordpoints to an array of uint32_t values containing the password for the block. Each element must match the password originally set via a call to EEPROMBlockPasswordSet().
ui32Countprovides the number of elements in the pui32Password array and must match the value originally passed to EEPROMBlockPasswordSet(). Valid values are 1, 2 and 3.

This function unlocks an EEPROM block that has previously been protected by writing a password. Access to the block once it is unlocked is determined by the protection settings applied via a previous call to the EEPROMBlockProtectSet() function.

To successfully unlock an EEPROM block, the password provided must match the password provided on the original call to EEPROMBlockPasswordSet(). If an incorrect password is provided, the block remains locked.

Unlocking block 0 has the effect of making all other blocks in the device accessible according to their own access protection settings. When block 0 is locked, all other EEPROM blocks are inaccessible.

Returns
Returns the lock state for the block on exit, 1 if unlocked or 0 if locked.

Definition at line 900 of file eeprom.c.

References ASSERT, BLOCKS_FROM_EESIZE, EEPROM_EEBLOCK, EEPROM_EESIZE, EEPROM_EEUNLOCK, and HWREG.

902 {
903  //
904  // Check parameters in a debug build.
905  //
906  ASSERT(pui32Password);
908  ASSERT(ui32Count <= 3);
909 
910  //
911  // Set the block that we are trying to unlock.
912  //
913  HWREG(EEPROM_EEBLOCK) = ui32Block;
914 
915  //
916  // Write the unlock register with 0xFFFFFFFF to reset the unlock
917  // sequence just in case a short password was previously used to try to
918  // unlock the block.
919  //
920  HWREG(EEPROM_EEUNLOCK) = 0xFFFFFFFF;
921 
922  //
923  // We need to write the password words in the opposite order when unlocking
924  // compared to locking so start at the end of the array.
925  //
926  pui32Password += (ui32Count - 1);
927 
928  //
929  // Write the supplied password to unlock the block.
930  //
931  while(ui32Count)
932  {
933  HWREG(EEPROM_EEUNLOCK) = *pui32Password--;
934  ui32Count--;
935  }
936 
937  //
938  // Let the caller know if their password worked.
939  //
940  return(HWREG(EEPROM_EEUNLOCK));
941 }
#define HWREG(x)
Definition: hw_types.h:48
#define EEPROM_EEBLOCK
Definition: hw_eeprom.h:49
#define ASSERT(expr)
Definition: debug.h:67
#define EEPROM_EESIZE
Definition: hw_eeprom.h:48
#define BLOCKS_FROM_EESIZE(x)
Definition: eeprom.c:66
#define EEPROM_EEUNLOCK
Definition: hw_eeprom.h:56
uint32_t EEPROMInit ( void  )

Performs any necessary recovery in case of power failures during write.

This function must be called after SysCtlPeripheralEnable() and before the EEPROM is accessed. It is used to check for errors in the EEPROM state such as from power failure during a previous write operation. The function detects these errors and performs as much recovery as possible.

If EEPROM_INIT_ERROR is returned, the EEPROM was unable to recover its state. If power is stable when this occurs, this indicates a fatal error and is likely an indication that the EEPROM memory has exceeded its specified lifetime write/erase specification. If the supply voltage is unstable when this return code is observed, retrying the operation once the voltage is stabilized may clear the error.

Failure to call this function after a reset may lead to incorrect operation or permanent data loss if the EEPROM is later written.

Returns
Returns EEPROM_INIT_OK if no errors were detected or EEPROM_INIT_ERROR if the EEPROM peripheral cannot currently recover from an interrupted write or erase operation.

Definition at line 176 of file eeprom.c.

References _EEPROMWaitForDone(), EEPROM_EESUPP, EEPROM_EESUPP_ERETRY, EEPROM_EESUPP_PRETRY, EEPROM_INIT_ERROR, EEPROM_INIT_OK, HWREG, SYSCTL_PERIPH_EEPROM0, SysCtlDelay(), and SysCtlPeripheralReset().

177 {
178  uint32_t ui32Status;
179 
180  //
181  // Insert a small delay (6 cycles + call overhead) to guard against the
182  // possibility that this function is called immediately after the EEPROM
183  // peripheral is enabled. Without this delay, there is a slight chance
184  // that the first EEPROM register read will fault if you are using a
185  // compiler with a ridiculously good optimizer!
186  //
187  SysCtlDelay(2);
188 
189  //
190  // Make sure the EEPROM has finished any ongoing processing.
191  //
193 
194  //
195  // Read the EESUPP register to see if any errors have been reported.
196  //
197  ui32Status = HWREG(EEPROM_EESUPP);
198 
199  //
200  // Did an error of some sort occur during initialization?
201  //
202  if(ui32Status & (EEPROM_EESUPP_PRETRY | EEPROM_EESUPP_ERETRY))
203  {
204  return(EEPROM_INIT_ERROR);
205  }
206 
207  //
208  // Perform a second EEPROM reset.
209  //
211 
212  //
213  // Wait for the EEPROM to complete its reset processing once again.
214  //
215  SysCtlDelay(2);
217 
218  //
219  // Read EESUPP once again to determine if any error occurred.
220  //
221  ui32Status = HWREG(EEPROM_EESUPP);
222 
223  //
224  // Was an error reported following the second reset?
225  //
226  if(ui32Status & (EEPROM_EESUPP_PRETRY | EEPROM_EESUPP_ERETRY))
227  {
228  return(EEPROM_INIT_ERROR);
229  }
230 
231  //
232  // The EEPROM does not indicate that any error occurred.
233  //
234  return(EEPROM_INIT_OK);
235 }
#define EEPROM_EESUPP_ERETRY
Definition: hw_eeprom.h:134
#define EEPROM_INIT_OK
Definition: eeprom.h:72
#define HWREG(x)
Definition: hw_types.h:48
static void _EEPROMWaitForDone(void)
Definition: eeprom.c:138
void SysCtlDelay(uint32_t ui32Count)
#define SYSCTL_PERIPH_EEPROM0
Definition: sysctl.h:82
void SysCtlPeripheralReset(uint32_t ui32Peripheral)
Definition: sysctl.c:762
#define EEPROM_EESUPP_PRETRY
Definition: hw_eeprom.h:135
#define EEPROM_EESUPP
Definition: hw_eeprom.h:54
#define EEPROM_INIT_ERROR
Definition: eeprom.h:83

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void EEPROMIntClear ( uint32_t  ui32IntFlags)

Clears the EEPROM interrupt.

Parameters
ui32IntFlagsindicates which interrupt sources to clear. Currently, the only valid value is EEPROM_INT_PROGRAM.

This function allows an application to clear the EEPROM interrupt.

Note
Because there is a write buffer in the Cortex-M processor, it may take several clock cycles before the interrupt source is actually cleared. Therefore, it is recommended that the interrupt source be cleared early in the interrupt handler (as opposed to the very last action) to avoid returning from the interrupt handler before the interrupt source is actually cleared. Failure to do so may result in the interrupt handler being immediately reentered (because the interrupt controller still sees the interrupt source asserted).
Returns
None.

Definition at line 1112 of file eeprom.c.

References _EEPROMSectorMaskClear(), CLASS_IS_TM4C123, FLASH_FCMISC, FLASH_FCMISC_EMISC, HWREG, and REVISION_IS_A0.

1113 {
1114  //
1115  // Clear the flash interrupt.
1116  //
1118 
1119  //
1120  // Clear the sector protection bits to prevent possible problems when
1121  // programming the main flash array later.
1122  //
1124  {
1126  }
1127 }
#define FLASH_FCMISC_EMISC
Definition: hw_flash.h:209
#define HWREG(x)
Definition: hw_types.h:48
static void _EEPROMSectorMaskClear(void)
Definition: eeprom.c:121
#define REVISION_IS_A0
Definition: hw_types.h:105
#define CLASS_IS_TM4C123
Definition: hw_types.h:93
#define FLASH_FCMISC
Definition: hw_flash.h:54

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void EEPROMIntDisable ( uint32_t  ui32IntFlags)

Disables the EEPROM interrupt.

Parameters
ui32IntFlagsindicates which EEPROM interrupt source to disable. This must be EEPROM_INT_PROGRAM currently.

This function disables the EEPROM interrupt and prevents calls to the interrupt vector when any EEPROM write or erase operation completes. The EEPROM peripheral shares a single interrupt vector with the flash memory subsystem, INT_FLASH. This function is provided as a convenience but the EEPROM interrupt can also be disabled using a call to FlashIntDisable() passing FLASH_INT_EEPROM in the ui32IntFlags parameter.

Returns
None.

Definition at line 1028 of file eeprom.c.

References ASSERT, EEPROM_EEINT, EEPROM_EEINT_INT, EEPROM_INT_PROGRAM, FLASH_FCIM, FLASH_FCIM_EMASK, and HWREG.

1029 {
1030  //
1031  // Look for valid interrupt sources.
1032  //
1033  ASSERT(ui32IntFlags == EEPROM_INT_PROGRAM);
1034 
1035  //
1036  // Disable the EEPROM interrupt in the flash controller module.
1037  //
1039 
1040  //
1041  // Disable interrupts from the EEPROM module.
1042  //
1044 }
#define EEPROM_EEINT
Definition: hw_eeprom.h:61
#define EEPROM_EEINT_INT
Definition: hw_eeprom.h:194
#define HWREG(x)
Definition: hw_types.h:48
#define FLASH_FCIM
Definition: hw_flash.h:53
#define ASSERT(expr)
Definition: debug.h:67
#define FLASH_FCIM_EMASK
Definition: hw_flash.h:192
#define EEPROM_INT_PROGRAM
Definition: eeprom.h:176
void EEPROMIntEnable ( uint32_t  ui32IntFlags)

Enables the EEPROM interrupt.

Parameters
ui32IntFlagsindicates which EEPROM interrupt source to enable. This must be EEPROM_INT_PROGRAM currently.

This function enables the EEPROM interrupt. When enabled, an interrupt is generated when any EEPROM write or erase operation completes. The EEPROM peripheral shares a single interrupt vector with the flash memory subsystem, INT_FLASH. This function is provided as a convenience but the EEPROM interrupt can also be enabled using a call to FlashIntEnable() passing FLASH_INT_EEPROM in the ui32IntFlags parameter.

Returns
None.

Definition at line 992 of file eeprom.c.

References ASSERT, EEPROM_EEINT, EEPROM_EEINT_INT, EEPROM_INT_PROGRAM, FLASH_FCIM, FLASH_FCRIS_ERIS, and HWREG.

993 {
994  //
995  // Look for valid interrupt sources.
996  //
997  ASSERT(ui32IntFlags == EEPROM_INT_PROGRAM);
998 
999  //
1000  // Enable interrupts from the EEPROM module.
1001  //
1003 
1004  //
1005  // Enable the EEPROM interrupt in the flash controller module.
1006  //
1008 }
#define EEPROM_EEINT
Definition: hw_eeprom.h:61
#define EEPROM_EEINT_INT
Definition: hw_eeprom.h:194
#define HWREG(x)
Definition: hw_types.h:48
#define FLASH_FCIM
Definition: hw_flash.h:53
#define FLASH_FCRIS_ERIS
Definition: hw_flash.h:179
#define ASSERT(expr)
Definition: debug.h:67
#define EEPROM_INT_PROGRAM
Definition: eeprom.h:176
uint32_t EEPROMIntStatus ( bool  bMasked)

Reports the state of the EEPROM interrupt.

Parameters
bMaskeddetermines whether the masked or unmasked state of the interrupt is to be returned. If bMasked is true, the masked state is returned, otherwise the unmasked state is returned.

This function allows an application to query the state of the EEPROM interrupt. If active, the interrupt may be cleared by calling EEPROMIntClear().

Returns
Returns EEPROM_INT_PROGRAM if an interrupt is being signaled or 0 otherwise.

Definition at line 1063 of file eeprom.c.

References EEPROM_EEDONE, EEPROM_EEDONE_WORKING, EEPROM_INT_PROGRAM, FLASH_FCMISC, FLASH_FCMISC_EMISC, and HWREG.

1064 {
1065  if(bMasked)
1066  {
1067  //
1068  // If asked for the masked interrupt status, we check to see if the
1069  // relevant interrupt is pending in the flash controller then return
1070  // the appropriate EEPROM flag if it is.
1071  //
1072  return((HWREG(FLASH_FCMISC) & FLASH_FCMISC_EMISC) ?
1073  EEPROM_INT_PROGRAM : 0);
1074  }
1075  else
1076  {
1077  //
1078  // If asked for the unmasked interrupt status, infer that an interrupt
1079  // is pending if the WORKING bit of the EEDONE register is clear. The
1080  // actual interrupt fires on the high to low transition of this bit
1081  // but we don't have access to an unmasked interrupt status for the
1082  // EEPROM because it's handled via the flash controller so we have to
1083  // make do with this instead.
1084  //
1086  0 : EEPROM_INT_PROGRAM);
1087  }
1088 }
#define FLASH_FCMISC_EMISC
Definition: hw_flash.h:209
#define HWREG(x)
Definition: hw_types.h:48
#define EEPROM_EEDONE
Definition: hw_eeprom.h:53
#define EEPROM_EEDONE_WORKING
Definition: hw_eeprom.h:123
#define FLASH_FCMISC
Definition: hw_flash.h:54
#define EEPROM_INT_PROGRAM
Definition: eeprom.h:176
uint32_t EEPROMMassErase ( void  )

Erases the EEPROM and returns it to the factory default condition.

This function completely erases the EEPROM and removes any and all access protection on its blocks, leaving the device in the factory default condition. After this operation, all EEPROM words contain the value 0xFFFFFFFF and all blocks are accessible for both read and write operations in all CPU modes. No passwords are active.

The function is synchronous and does not return until the erase operation has completed.

Returns
Returns 0 on success or non-zero values on failure. Failure codes are logical OR combinations of EEPROM_RC_WRBUSY, EEPROM_RC_NOPERM, EEPROM_RC_WKCOPY, EEPROM_RC_WKERASE, and EEPROM_RC_WORKING.

Definition at line 587 of file eeprom.c.

References _EEPROMSectorMaskClear(), _EEPROMWaitForDone(), CLASS_IS_TM4C123, EEPROM_EEDBGME, EEPROM_EEDBGME_ME, EEPROM_EEDONE, EEPROM_MASS_ERASE_KEY, HWREG, REVISION_IS_A0, SYSCTL_PERIPH_EEPROM0, SysCtlDelay(), and SysCtlPeripheralReset().

588 {
589  //
590  // This is a workaround for a silicon problem on Blizzard rev A.
591  //
593  {
595  }
596 
597  //
598  // Start the mass erase processing
599  //
601 
602  //
603  // Wait for completion.
604  //
606 
607  //
608  // Reset the peripheral. This is required so that all protection
609  // mechanisms and passwords are reset now that the EEPROM data has been
610  // scrubbed.
611  //
613 
614  //
615  // Wait for completion again.
616  //
617  SysCtlDelay(2);
619 
620  //
621  // Pass any error codes back to the caller.
622  //
623  return(HWREG(EEPROM_EEDONE));
624 }
#define HWREG(x)
Definition: hw_types.h:48
static void _EEPROMWaitForDone(void)
Definition: eeprom.c:138
static void _EEPROMSectorMaskClear(void)
Definition: eeprom.c:121
void SysCtlDelay(uint32_t ui32Count)
#define EEPROM_EEDONE
Definition: hw_eeprom.h:53
#define EEPROM_MASS_ERASE_KEY
Definition: eeprom.c:83
#define SYSCTL_PERIPH_EEPROM0
Definition: sysctl.h:82
#define REVISION_IS_A0
Definition: hw_types.h:105
void SysCtlPeripheralReset(uint32_t ui32Peripheral)
Definition: sysctl.c:762
#define CLASS_IS_TM4C123
Definition: hw_types.h:93
#define EEPROM_EEDBGME
Definition: hw_eeprom.h:66
#define EEPROM_EEDBGME_ME
Definition: hw_eeprom.h:229

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uint32_t EEPROMProgram ( uint32_t *  pui32Data,
uint32_t  ui32Address,
uint32_t  ui32Count 
)

Writes data to the EEPROM.

Parameters
pui32Datapoints to the first word of data to write to the EEPROM.
ui32Addressdefines the byte address within the EEPROM that the data is to be written to. This value must be a multiple of 4.
ui32Countdefines the number of bytes of data that is to be written. This value must be a multiple of 4.

This function may be called to write data into the EEPROM at a given word-aligned address. The call is synchronous and returns only after all data has been written or an error occurs.

Returns
Returns 0 on success or non-zero values on failure. Failure codes are logical OR combinations of EEPROM_RC_WRBUSY, EEPROM_RC_NOPERM, EEPROM_RC_WKCOPY, EEPROM_RC_WKERASE, and EEPROM_RC_WORKING.

Definition at line 381 of file eeprom.c.

References _EEPROMSectorMaskClear(), _EEPROMSectorMaskSet(), ASSERT, CLASS_IS_TM4C123, EEPROM_EEBLOCK, EEPROM_EEDONE, EEPROM_EEDONE_NOPERM, EEPROM_EEDONE_WORKING, EEPROM_EEOFFSET, EEPROM_EERDWRINC, EEPROM_EESIZE, EEPROMBlockFromAddr, HWREG, OFFSET_FROM_ADDR, REVISION_IS_A0, SIZE_FROM_EESIZE, and SysCtlDelay().

382 {
383  uint32_t ui32Status;
384 
385  //
386  // Check parameters in a debug build.
387  //
388  ASSERT(pui32Data);
389  ASSERT(ui32Address < SIZE_FROM_EESIZE(HWREG(EEPROM_EESIZE)));
390  ASSERT((ui32Address + ui32Count) <=
392  ASSERT((ui32Address & 3) == 0);
393  ASSERT((ui32Count & 3) == 0);
394 
395  //
396  // Make sure the EEPROM is idle before we start.
397  //
398  do
399  {
400  //
401  // Read the status.
402  //
403  ui32Status = HWREG(EEPROM_EEDONE);
404  }
405  while(ui32Status & EEPROM_EEDONE_WORKING);
406 
407  //
408  // Set the block and offset appropriately to program the first word.
409  //
410  HWREG(EEPROM_EEBLOCK) = EEPROMBlockFromAddr(ui32Address);
411  HWREG(EEPROM_EEOFFSET) = OFFSET_FROM_ADDR(ui32Address);
412 
413  //
414  // Convert the byte count to a word count.
415  //
416  ui32Count /= 4;
417 
418  //
419  // Write each word in turn.
420  //
421  while(ui32Count)
422  {
423  //
424  // This is a workaround for a silicon problem on Blizzard rev A. We
425  // need to do this before every word write to ensure that we don't
426  // have problems in multi-word writes that span multiple flash sectors.
427  //
429  {
430  _EEPROMSectorMaskSet(ui32Address);
431  }
432 
433  //
434  // Write the next word through the autoincrementing register.
435  //
436  HWREG(EEPROM_EERDWRINC) = *pui32Data;
437 
438  //
439  // Wait a few cycles. In some cases, the WRBUSY bit is not set
440  // immediately and this prevents us from dropping through the polling
441  // loop before the bit is set.
442  //
443  SysCtlDelay(10);
444 
445  //
446  // Wait for the write to complete.
447  //
448  do
449  {
450  //
451  // Read the status.
452  //
453  ui32Status = HWREG(EEPROM_EEDONE);
454  }
455  while(ui32Status & EEPROM_EEDONE_WORKING);
456 
457  //
458  // Make sure we completed the write without errors. Note that we
459  // must check this per-word because write permission can be set per
460  // block resulting in only a section of the write not being performed.
461  //
462  if(ui32Status & EEPROM_EEDONE_NOPERM)
463  {
464  //
465  // An error was reported that would prevent the values from
466  // being written correctly.
467  //
469  {
471  }
472  return(ui32Status);
473  }
474 
475  //
476  // Move on to the next word.
477  //
478  pui32Data++;
479  ui32Count--;
480 
481  //
482  // Do we need to move to the next block? This is the case if the
483  // offset register has just wrapped back to 0. Note that we only
484  // write the block register if we have more data to read. If this
485  // register is written, the hardware expects a read or write operation
486  // next. If a mass erase is requested instead, the mass erase will
487  // fail.
488  //
489  if(ui32Count && (HWREG(EEPROM_EEOFFSET) == 0))
490  {
491  HWREG(EEPROM_EEBLOCK) += 1;
492  }
493  }
494 
495  //
496  // Clear the sector protection bits to prevent possible problems when
497  // programming the main flash array later.
498  //
500  {
502  }
503 
504  //
505  // Return the current status to the caller.
506  //
507  return(HWREG(EEPROM_EEDONE));
508 }
#define HWREG(x)
Definition: hw_types.h:48
static void _EEPROMSectorMaskClear(void)
Definition: eeprom.c:121
#define EEPROM_EEBLOCK
Definition: hw_eeprom.h:49
#define ASSERT(expr)
Definition: debug.h:67
void SysCtlDelay(uint32_t ui32Count)
#define EEPROM_EESIZE
Definition: hw_eeprom.h:48
#define EEPROM_EEDONE
Definition: hw_eeprom.h:53
#define EEPROM_EEDONE_NOPERM
Definition: hw_eeprom.h:126
#define EEPROM_EEDONE_WORKING
Definition: hw_eeprom.h:123
#define EEPROM_EEOFFSET
Definition: hw_eeprom.h:50
#define REVISION_IS_A0
Definition: hw_types.h:105
static void _EEPROMSectorMaskSet(uint32_t ui32Address)
Definition: eeprom.c:94
#define CLASS_IS_TM4C123
Definition: hw_types.h:93
#define SIZE_FROM_EESIZE(x)
Definition: eeprom.c:68
#define EEPROM_EERDWRINC
Definition: hw_eeprom.h:52
#define EEPROMBlockFromAddr(ui32Addr)
Definition: eeprom.h:195
#define OFFSET_FROM_ADDR(x)
Definition: eeprom.c:76

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uint32_t EEPROMProgramNonBlocking ( uint32_t  ui32Data,
uint32_t  ui32Address 
)

Writes a word to the EEPROM.

Parameters
ui32Datais the word to write to the EEPROM.
ui32Addressdefines the byte address within the EEPROM to which the data is to be written. This value must be a multiple of 4.

This function is intended to allow EEPROM programming under interrupt control. It may be called to start the process of writing a single word of data into the EEPROM at a given word-aligned address. The call is asynchronous and returns immediately without waiting for the write to complete. Completion of the operation is signaled by means of an interrupt from the EEPROM module. The EEPROM peripheral shares a single interrupt vector with the flash memory subsystem, INT_FLASH.

Returns
Returns status and error information in the form of a logical OR combinations of EEPROM_RC_WRBUSY, EEPROM_RC_NOPERM, EEPROM_RC_WKCOPY, EEPROM_RC_WKERASE and EEPROM_RC_WORKING. Flags EEPROM_RC_WKCOPY, EEPROM_RC_WKERASE, and EEPROM_RC_WORKING are expected in normal operation and do not indicate an error.

Definition at line 534 of file eeprom.c.

References _EEPROMSectorMaskSet(), ASSERT, CLASS_IS_TM4C123, EEPROM_EEBLOCK, EEPROM_EEDONE, EEPROM_EEOFFSET, EEPROM_EERDWRINC, EEPROM_EESIZE, EEPROMBlockFromAddr, HWREG, OFFSET_FROM_ADDR, REVISION_IS_A0, and SIZE_FROM_EESIZE.

535 {
536  //
537  // Check parameters in a debug build.
538  //
539  ASSERT(ui32Address < SIZE_FROM_EESIZE(HWREG(EEPROM_EESIZE)));
540  ASSERT((ui32Address & 3) == 0);
541 
542  //
543  // This is a workaround for a silicon problem on Blizzard rev A.
544  //
546  {
547  _EEPROMSectorMaskSet(ui32Address);
548  }
549 
550  //
551  // Set the block and offset appropriately to program the desired word.
552  //
553  HWREG(EEPROM_EEBLOCK) = EEPROMBlockFromAddr(ui32Address);
554  HWREG(EEPROM_EEOFFSET) = OFFSET_FROM_ADDR(ui32Address);
555 
556  //
557  // Write the new word using the auto-incrementing register just in case
558  // the caller wants to write follow-on words using direct register access
559  //
560  HWREG(EEPROM_EERDWRINC) = ui32Data;
561 
562  //
563  // Return the current status to the caller.
564  //
565  return(HWREG(EEPROM_EEDONE));
566 }
#define HWREG(x)
Definition: hw_types.h:48
#define EEPROM_EEBLOCK
Definition: hw_eeprom.h:49
#define ASSERT(expr)
Definition: debug.h:67
#define EEPROM_EESIZE
Definition: hw_eeprom.h:48
#define EEPROM_EEDONE
Definition: hw_eeprom.h:53
#define EEPROM_EEOFFSET
Definition: hw_eeprom.h:50
#define REVISION_IS_A0
Definition: hw_types.h:105
static void _EEPROMSectorMaskSet(uint32_t ui32Address)
Definition: eeprom.c:94
#define CLASS_IS_TM4C123
Definition: hw_types.h:93
#define SIZE_FROM_EESIZE(x)
Definition: eeprom.c:68
#define EEPROM_EERDWRINC
Definition: hw_eeprom.h:52
#define EEPROMBlockFromAddr(ui32Addr)
Definition: eeprom.h:195
#define OFFSET_FROM_ADDR(x)
Definition: eeprom.c:76

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void EEPROMRead ( uint32_t *  pui32Data,
uint32_t  ui32Address,
uint32_t  ui32Count 
)

Reads data from the EEPROM.

Parameters
pui32Datais a pointer to storage for the data read from the EEPROM. This pointer must point to at least ui32Count bytes of available memory.
ui32Addressis the byte address within the EEPROM from which data is to be read. This value must be a multiple of 4.
ui32Countis the number of bytes of data to read from the EEPROM. This value must be a multiple of 4.

This function may be called to read a number of words of data from a word-aligned address within the EEPROM. Data read is copied into the buffer pointed to by the pui32Data parameter.

Returns
None.

Definition at line 307 of file eeprom.c.

References ASSERT, EEPROM_EEBLOCK, EEPROM_EEOFFSET, EEPROM_EERDWRINC, EEPROM_EESIZE, EEPROMBlockFromAddr, HWREG, OFFSET_FROM_ADDR, and SIZE_FROM_EESIZE.

308 {
309  //
310  // Check parameters in a debug build.
311  //
312  ASSERT(pui32Data);
313  ASSERT(ui32Address < SIZE_FROM_EESIZE(HWREG(EEPROM_EESIZE)));
314  ASSERT((ui32Address + ui32Count) <=
316  ASSERT((ui32Address & 3) == 0);
317  ASSERT((ui32Count & 3) == 0);
318 
319  //
320  // Set the block and offset appropriately to read the first word.
321  //
322  HWREG(EEPROM_EEBLOCK) = EEPROMBlockFromAddr(ui32Address);
323  HWREG(EEPROM_EEOFFSET) = OFFSET_FROM_ADDR(ui32Address);
324 
325  //
326  // Convert the byte count to a word count.
327  //
328  ui32Count /= 4;
329 
330  //
331  // Read each word in turn.
332  //
333  while(ui32Count)
334  {
335  //
336  // Read the next word through the autoincrementing register.
337  //
338  *pui32Data = HWREG(EEPROM_EERDWRINC);
339 
340  //
341  // Move on to the next word.
342  //
343  pui32Data++;
344  ui32Count--;
345 
346  //
347  // Do we need to move to the next block? This is the case if the
348  // offset register has just wrapped back to 0. Note that we only
349  // write the block register if we have more data to read. If this
350  // register is written, the hardware expects a read or write operation
351  // next. If a mass erase is requested instead, the mass erase will
352  // fail.
353  //
354  if(ui32Count && (HWREG(EEPROM_EEOFFSET) == 0))
355  {
356  HWREG(EEPROM_EEBLOCK) += 1;
357  }
358  }
359 }
#define HWREG(x)
Definition: hw_types.h:48
#define EEPROM_EEBLOCK
Definition: hw_eeprom.h:49
#define ASSERT(expr)
Definition: debug.h:67
#define EEPROM_EESIZE
Definition: hw_eeprom.h:48
#define EEPROM_EEOFFSET
Definition: hw_eeprom.h:50
#define SIZE_FROM_EESIZE(x)
Definition: eeprom.c:68
#define EEPROM_EERDWRINC
Definition: hw_eeprom.h:52
#define EEPROMBlockFromAddr(ui32Addr)
Definition: eeprom.h:195
#define OFFSET_FROM_ADDR(x)
Definition: eeprom.c:76
uint32_t EEPROMSizeGet ( void  )

Determines the size of the EEPROM.

This function returns the size of the EEPROM in bytes.

Returns
Returns the total number of bytes in the EEPROM.

Definition at line 248 of file eeprom.c.

References EEPROM_EESIZE, HWREG, and SIZE_FROM_EESIZE.

249 {
250  //
251  // Return the size of the EEPROM in bytes.
252  //
254 }
#define HWREG(x)
Definition: hw_types.h:48
#define EEPROM_EESIZE
Definition: hw_eeprom.h:48
#define SIZE_FROM_EESIZE(x)
Definition: eeprom.c:68
uint32_t EEPROMStatusGet ( void  )

Returns status on the last EEPROM program or erase operation.

This function returns the current status of the last program or erase operation performed by the EEPROM. It is intended to provide error information to applications programming or setting EEPROM protection options under interrupt control.

Returns
Returns 0 if the last program or erase operation completed without any errors. If an operation is ongoing or an error occurred, the return value is a logical OR combination of EEPROM_RC_WRBUSY, EEPROM_RC_NOPERM, EEPROM_RC_WKCOPY, EEPROM_RC_WKERASE, and EEPROM_RC_WORKING.

Definition at line 1146 of file eeprom.c.

References EEPROM_EEDONE, and HWREG.

1147 {
1148  return(HWREG(EEPROM_EEDONE));
1149 }
#define HWREG(x)
Definition: hw_types.h:48
#define EEPROM_EEDONE
Definition: hw_eeprom.h:53