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EE445M RTOS
Taken at the University of Texas Spring 2015
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EE445M RTOS
Taken at the University of Texas Spring 2015
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Go to the source code of this file.
Macros | |
| #define | SYSCTL_PERIPH_ADC0 0xf0003800 |
| #define | SYSCTL_PERIPH_ADC1 0xf0003801 |
| #define | SYSCTL_PERIPH_CAN0 0xf0003400 |
| #define | SYSCTL_PERIPH_CAN1 0xf0003401 |
| #define | SYSCTL_PERIPH_COMP0 0xf0003c00 |
| #define | SYSCTL_PERIPH_EMAC0 0xf0009c00 |
| #define | SYSCTL_PERIPH_EPHY0 0xf0003000 |
| #define | SYSCTL_PERIPH_EPI0 0xf0001000 |
| #define | SYSCTL_PERIPH_GPIOA 0xf0000800 |
| #define | SYSCTL_PERIPH_GPIOB 0xf0000801 |
| #define | SYSCTL_PERIPH_GPIOC 0xf0000802 |
| #define | SYSCTL_PERIPH_GPIOD 0xf0000803 |
| #define | SYSCTL_PERIPH_GPIOE 0xf0000804 |
| #define | SYSCTL_PERIPH_GPIOF 0xf0000805 |
| #define | SYSCTL_PERIPH_GPIOG 0xf0000806 |
| #define | SYSCTL_PERIPH_GPIOH 0xf0000807 |
| #define | SYSCTL_PERIPH_GPIOJ 0xf0000808 |
| #define | SYSCTL_PERIPH_HIBERNATE 0xf0001400 |
| #define | SYSCTL_PERIPH_CCM0 0xf0007400 |
| #define | SYSCTL_PERIPH_EEPROM0 0xf0005800 |
| #define | SYSCTL_PERIPH_FAN0 0xf0005400 |
| #define | SYSCTL_PERIPH_FAN1 0xf0005401 |
| #define | SYSCTL_PERIPH_GPIOK 0xf0000809 |
| #define | SYSCTL_PERIPH_GPIOL 0xf000080a |
| #define | SYSCTL_PERIPH_GPIOM 0xf000080b |
| #define | SYSCTL_PERIPH_GPION 0xf000080c |
| #define | SYSCTL_PERIPH_GPIOP 0xf000080d |
| #define | SYSCTL_PERIPH_GPIOQ 0xf000080e |
| #define | SYSCTL_PERIPH_GPIOR 0xf000080f |
| #define | SYSCTL_PERIPH_GPIOS 0xf0000810 |
| #define | SYSCTL_PERIPH_GPIOT 0xf0000811 |
| #define | SYSCTL_PERIPH_I2C0 0xf0002000 |
| #define | SYSCTL_PERIPH_I2C1 0xf0002001 |
| #define | SYSCTL_PERIPH_I2C2 0xf0002002 |
| #define | SYSCTL_PERIPH_I2C3 0xf0002003 |
| #define | SYSCTL_PERIPH_I2C4 0xf0002004 |
| #define | SYSCTL_PERIPH_I2C5 0xf0002005 |
| #define | SYSCTL_PERIPH_I2C6 0xf0002006 |
| #define | SYSCTL_PERIPH_I2C7 0xf0002007 |
| #define | SYSCTL_PERIPH_I2C8 0xf0002008 |
| #define | SYSCTL_PERIPH_I2C9 0xf0002009 |
| #define | SYSCTL_PERIPH_LCD0 0xf0009000 |
| #define | SYSCTL_PERIPH_ONEWIRE0 0xf0009800 |
| #define | SYSCTL_PERIPH_PWM0 0xf0004000 |
| #define | SYSCTL_PERIPH_PWM1 0xf0004001 |
| #define | SYSCTL_PERIPH_QEI0 0xf0004400 |
| #define | SYSCTL_PERIPH_QEI1 0xf0004401 |
| #define | SYSCTL_PERIPH_SSI0 0xf0001c00 |
| #define | SYSCTL_PERIPH_SSI1 0xf0001c01 |
| #define | SYSCTL_PERIPH_SSI2 0xf0001c02 |
| #define | SYSCTL_PERIPH_SSI3 0xf0001c03 |
| #define | SYSCTL_PERIPH_TIMER0 0xf0000400 |
| #define | SYSCTL_PERIPH_TIMER1 0xf0000401 |
| #define | SYSCTL_PERIPH_TIMER2 0xf0000402 |
| #define | SYSCTL_PERIPH_TIMER3 0xf0000403 |
| #define | SYSCTL_PERIPH_TIMER4 0xf0000404 |
| #define | SYSCTL_PERIPH_TIMER5 0xf0000405 |
| #define | SYSCTL_PERIPH_TIMER6 0xf0000406 |
| #define | SYSCTL_PERIPH_TIMER7 0xf0000407 |
| #define | SYSCTL_PERIPH_UART0 0xf0001800 |
| #define | SYSCTL_PERIPH_UART1 0xf0001801 |
| #define | SYSCTL_PERIPH_UART2 0xf0001802 |
| #define | SYSCTL_PERIPH_UART3 0xf0001803 |
| #define | SYSCTL_PERIPH_UART4 0xf0001804 |
| #define | SYSCTL_PERIPH_UART5 0xf0001805 |
| #define | SYSCTL_PERIPH_UART6 0xf0001806 |
| #define | SYSCTL_PERIPH_UART7 0xf0001807 |
| #define | SYSCTL_PERIPH_UDMA 0xf0000c00 |
| #define | SYSCTL_PERIPH_USB0 0xf0002800 |
| #define | SYSCTL_PERIPH_WDOG0 0xf0000000 |
| #define | SYSCTL_PERIPH_WDOG1 0xf0000001 |
| #define | SYSCTL_PERIPH_WTIMER0 0xf0005c00 |
| #define | SYSCTL_PERIPH_WTIMER1 0xf0005c01 |
| #define | SYSCTL_PERIPH_WTIMER2 0xf0005c02 |
| #define | SYSCTL_PERIPH_WTIMER3 0xf0005c03 |
| #define | SYSCTL_PERIPH_WTIMER4 0xf0005c04 |
| #define | SYSCTL_PERIPH_WTIMER5 0xf0005c05 |
| #define | SYSCTL_LDO_0_90V 0x80000012 |
| #define | SYSCTL_LDO_0_95V 0x80000013 |
| #define | SYSCTL_LDO_1_00V 0x80000014 |
| #define | SYSCTL_LDO_1_05V 0x80000015 |
| #define | SYSCTL_LDO_1_10V 0x80000016 |
| #define | SYSCTL_LDO_1_15V 0x80000017 |
| #define | SYSCTL_LDO_1_20V 0x80000018 |
| #define | SYSCTL_INT_BOR0 0x00000800 |
| #define | SYSCTL_INT_VDDA_OK 0x00000400 |
| #define | SYSCTL_INT_MOSC_PUP 0x00000100 |
| #define | SYSCTL_INT_USBPLL_LOCK 0x00000080 |
| #define | SYSCTL_INT_PLL_LOCK 0x00000040 |
| #define | SYSCTL_INT_MOSC_FAIL 0x00000008 |
| #define | SYSCTL_INT_BOR1 0x00000002 |
| #define | SYSCTL_INT_BOR 0x00000002 |
| #define | SYSCTL_CAUSE_HSRVREQ 0x00001000 |
| #define | SYSCTL_CAUSE_HIB 0x00000040 |
| #define | SYSCTL_CAUSE_WDOG1 0x00000020 |
| #define | SYSCTL_CAUSE_SW 0x00000010 |
| #define | SYSCTL_CAUSE_WDOG0 0x00000008 |
| #define | SYSCTL_CAUSE_WDOG SYSCTL_CAUSE_WDOG0 |
| #define | SYSCTL_CAUSE_BOR 0x00000004 |
| #define | SYSCTL_CAUSE_POR 0x00000002 |
| #define | SYSCTL_CAUSE_EXT 0x00000001 |
| #define | SYSCTL_BOR_RESET 0x00000002 |
| #define | SYSCTL_BOR_RESAMPLE 0x00000001 |
| #define | SYSCTL_PWMDIV_1 0x00000000 |
| #define | SYSCTL_PWMDIV_2 0x00100000 |
| #define | SYSCTL_PWMDIV_4 0x00120000 |
| #define | SYSCTL_PWMDIV_8 0x00140000 |
| #define | SYSCTL_PWMDIV_16 0x00160000 |
| #define | SYSCTL_PWMDIV_32 0x00180000 |
| #define | SYSCTL_PWMDIV_64 0x001A0000 |
| #define | SYSCTL_SYSDIV_1 0x07800000 |
| #define | SYSCTL_SYSDIV_2 0x00C00000 |
| #define | SYSCTL_SYSDIV_3 0x01400000 |
| #define | SYSCTL_SYSDIV_4 0x01C00000 |
| #define | SYSCTL_SYSDIV_5 0x02400000 |
| #define | SYSCTL_SYSDIV_6 0x02C00000 |
| #define | SYSCTL_SYSDIV_7 0x03400000 |
| #define | SYSCTL_SYSDIV_8 0x03C00000 |
| #define | SYSCTL_SYSDIV_9 0x04400000 |
| #define | SYSCTL_SYSDIV_10 0x04C00000 |
| #define | SYSCTL_SYSDIV_11 0x05400000 |
| #define | SYSCTL_SYSDIV_12 0x05C00000 |
| #define | SYSCTL_SYSDIV_13 0x06400000 |
| #define | SYSCTL_SYSDIV_14 0x06C00000 |
| #define | SYSCTL_SYSDIV_15 0x07400000 |
| #define | SYSCTL_SYSDIV_16 0x07C00000 |
| #define | SYSCTL_SYSDIV_17 0x88400000 |
| #define | SYSCTL_SYSDIV_18 0x88C00000 |
| #define | SYSCTL_SYSDIV_19 0x89400000 |
| #define | SYSCTL_SYSDIV_20 0x89C00000 |
| #define | SYSCTL_SYSDIV_21 0x8A400000 |
| #define | SYSCTL_SYSDIV_22 0x8AC00000 |
| #define | SYSCTL_SYSDIV_23 0x8B400000 |
| #define | SYSCTL_SYSDIV_24 0x8BC00000 |
| #define | SYSCTL_SYSDIV_25 0x8C400000 |
| #define | SYSCTL_SYSDIV_26 0x8CC00000 |
| #define | SYSCTL_SYSDIV_27 0x8D400000 |
| #define | SYSCTL_SYSDIV_28 0x8DC00000 |
| #define | SYSCTL_SYSDIV_29 0x8E400000 |
| #define | SYSCTL_SYSDIV_30 0x8EC00000 |
| #define | SYSCTL_SYSDIV_31 0x8F400000 |
| #define | SYSCTL_SYSDIV_32 0x8FC00000 |
| #define | SYSCTL_SYSDIV_33 0x90400000 |
| #define | SYSCTL_SYSDIV_34 0x90C00000 |
| #define | SYSCTL_SYSDIV_35 0x91400000 |
| #define | SYSCTL_SYSDIV_36 0x91C00000 |
| #define | SYSCTL_SYSDIV_37 0x92400000 |
| #define | SYSCTL_SYSDIV_38 0x92C00000 |
| #define | SYSCTL_SYSDIV_39 0x93400000 |
| #define | SYSCTL_SYSDIV_40 0x93C00000 |
| #define | SYSCTL_SYSDIV_41 0x94400000 |
| #define | SYSCTL_SYSDIV_42 0x94C00000 |
| #define | SYSCTL_SYSDIV_43 0x95400000 |
| #define | SYSCTL_SYSDIV_44 0x95C00000 |
| #define | SYSCTL_SYSDIV_45 0x96400000 |
| #define | SYSCTL_SYSDIV_46 0x96C00000 |
| #define | SYSCTL_SYSDIV_47 0x97400000 |
| #define | SYSCTL_SYSDIV_48 0x97C00000 |
| #define | SYSCTL_SYSDIV_49 0x98400000 |
| #define | SYSCTL_SYSDIV_50 0x98C00000 |
| #define | SYSCTL_SYSDIV_51 0x99400000 |
| #define | SYSCTL_SYSDIV_52 0x99C00000 |
| #define | SYSCTL_SYSDIV_53 0x9A400000 |
| #define | SYSCTL_SYSDIV_54 0x9AC00000 |
| #define | SYSCTL_SYSDIV_55 0x9B400000 |
| #define | SYSCTL_SYSDIV_56 0x9BC00000 |
| #define | SYSCTL_SYSDIV_57 0x9C400000 |
| #define | SYSCTL_SYSDIV_58 0x9CC00000 |
| #define | SYSCTL_SYSDIV_59 0x9D400000 |
| #define | SYSCTL_SYSDIV_60 0x9DC00000 |
| #define | SYSCTL_SYSDIV_61 0x9E400000 |
| #define | SYSCTL_SYSDIV_62 0x9EC00000 |
| #define | SYSCTL_SYSDIV_63 0x9F400000 |
| #define | SYSCTL_SYSDIV_64 0x9FC00000 |
| #define | SYSCTL_SYSDIV_2_5 0xC1000000 |
| #define | SYSCTL_SYSDIV_3_5 0xC1800000 |
| #define | SYSCTL_SYSDIV_4_5 0xC2000000 |
| #define | SYSCTL_SYSDIV_5_5 0xC2800000 |
| #define | SYSCTL_SYSDIV_6_5 0xC3000000 |
| #define | SYSCTL_SYSDIV_7_5 0xC3800000 |
| #define | SYSCTL_SYSDIV_8_5 0xC4000000 |
| #define | SYSCTL_SYSDIV_9_5 0xC4800000 |
| #define | SYSCTL_SYSDIV_10_5 0xC5000000 |
| #define | SYSCTL_SYSDIV_11_5 0xC5800000 |
| #define | SYSCTL_SYSDIV_12_5 0xC6000000 |
| #define | SYSCTL_SYSDIV_13_5 0xC6800000 |
| #define | SYSCTL_SYSDIV_14_5 0xC7000000 |
| #define | SYSCTL_SYSDIV_15_5 0xC7800000 |
| #define | SYSCTL_SYSDIV_16_5 0xC8000000 |
| #define | SYSCTL_SYSDIV_17_5 0xC8800000 |
| #define | SYSCTL_SYSDIV_18_5 0xC9000000 |
| #define | SYSCTL_SYSDIV_19_5 0xC9800000 |
| #define | SYSCTL_SYSDIV_20_5 0xCA000000 |
| #define | SYSCTL_SYSDIV_21_5 0xCA800000 |
| #define | SYSCTL_SYSDIV_22_5 0xCB000000 |
| #define | SYSCTL_SYSDIV_23_5 0xCB800000 |
| #define | SYSCTL_SYSDIV_24_5 0xCC000000 |
| #define | SYSCTL_SYSDIV_25_5 0xCC800000 |
| #define | SYSCTL_SYSDIV_26_5 0xCD000000 |
| #define | SYSCTL_SYSDIV_27_5 0xCD800000 |
| #define | SYSCTL_SYSDIV_28_5 0xCE000000 |
| #define | SYSCTL_SYSDIV_29_5 0xCE800000 |
| #define | SYSCTL_SYSDIV_30_5 0xCF000000 |
| #define | SYSCTL_SYSDIV_31_5 0xCF800000 |
| #define | SYSCTL_SYSDIV_32_5 0xD0000000 |
| #define | SYSCTL_SYSDIV_33_5 0xD0800000 |
| #define | SYSCTL_SYSDIV_34_5 0xD1000000 |
| #define | SYSCTL_SYSDIV_35_5 0xD1800000 |
| #define | SYSCTL_SYSDIV_36_5 0xD2000000 |
| #define | SYSCTL_SYSDIV_37_5 0xD2800000 |
| #define | SYSCTL_SYSDIV_38_5 0xD3000000 |
| #define | SYSCTL_SYSDIV_39_5 0xD3800000 |
| #define | SYSCTL_SYSDIV_40_5 0xD4000000 |
| #define | SYSCTL_SYSDIV_41_5 0xD4800000 |
| #define | SYSCTL_SYSDIV_42_5 0xD5000000 |
| #define | SYSCTL_SYSDIV_43_5 0xD5800000 |
| #define | SYSCTL_SYSDIV_44_5 0xD6000000 |
| #define | SYSCTL_SYSDIV_45_5 0xD6800000 |
| #define | SYSCTL_SYSDIV_46_5 0xD7000000 |
| #define | SYSCTL_SYSDIV_47_5 0xD7800000 |
| #define | SYSCTL_SYSDIV_48_5 0xD8000000 |
| #define | SYSCTL_SYSDIV_49_5 0xD8800000 |
| #define | SYSCTL_SYSDIV_50_5 0xD9000000 |
| #define | SYSCTL_SYSDIV_51_5 0xD9800000 |
| #define | SYSCTL_SYSDIV_52_5 0xDA000000 |
| #define | SYSCTL_SYSDIV_53_5 0xDA800000 |
| #define | SYSCTL_SYSDIV_54_5 0xDB000000 |
| #define | SYSCTL_SYSDIV_55_5 0xDB800000 |
| #define | SYSCTL_SYSDIV_56_5 0xDC000000 |
| #define | SYSCTL_SYSDIV_57_5 0xDC800000 |
| #define | SYSCTL_SYSDIV_58_5 0xDD000000 |
| #define | SYSCTL_SYSDIV_59_5 0xDD800000 |
| #define | SYSCTL_SYSDIV_60_5 0xDE000000 |
| #define | SYSCTL_SYSDIV_61_5 0xDE800000 |
| #define | SYSCTL_SYSDIV_62_5 0xDF000000 |
| #define | SYSCTL_SYSDIV_63_5 0xDF800000 |
| #define | SYSCTL_CFG_VCO_480 0xF1000000 |
| #define | SYSCTL_CFG_VCO_320 0xF0000000 |
| #define | SYSCTL_USE_PLL 0x00000000 |
| #define | SYSCTL_USE_OSC 0x00003800 |
| #define | SYSCTL_XTAL_1MHZ 0x00000000 |
| #define | SYSCTL_XTAL_1_84MHZ 0x00000040 |
| #define | SYSCTL_XTAL_2MHZ 0x00000080 |
| #define | SYSCTL_XTAL_2_45MHZ 0x000000C0 |
| #define | SYSCTL_XTAL_3_57MHZ 0x00000100 |
| #define | SYSCTL_XTAL_3_68MHZ 0x00000140 |
| #define | SYSCTL_XTAL_4MHZ 0x00000180 |
| #define | SYSCTL_XTAL_4_09MHZ 0x000001C0 |
| #define | SYSCTL_XTAL_4_91MHZ 0x00000200 |
| #define | SYSCTL_XTAL_5MHZ 0x00000240 |
| #define | SYSCTL_XTAL_5_12MHZ 0x00000280 |
| #define | SYSCTL_XTAL_6MHZ 0x000002C0 |
| #define | SYSCTL_XTAL_6_14MHZ 0x00000300 |
| #define | SYSCTL_XTAL_7_37MHZ 0x00000340 |
| #define | SYSCTL_XTAL_8MHZ 0x00000380 |
| #define | SYSCTL_XTAL_8_19MHZ 0x000003C0 |
| #define | SYSCTL_XTAL_10MHZ 0x00000400 |
| #define | SYSCTL_XTAL_12MHZ 0x00000440 |
| #define | SYSCTL_XTAL_12_2MHZ 0x00000480 |
| #define | SYSCTL_XTAL_13_5MHZ 0x000004C0 |
| #define | SYSCTL_XTAL_14_3MHZ 0x00000500 |
| #define | SYSCTL_XTAL_16MHZ 0x00000540 |
| #define | SYSCTL_XTAL_16_3MHZ 0x00000580 |
| #define | SYSCTL_XTAL_18MHZ 0x000005C0 |
| #define | SYSCTL_XTAL_20MHZ 0x00000600 |
| #define | SYSCTL_XTAL_24MHZ 0x00000640 |
| #define | SYSCTL_XTAL_25MHZ 0x00000680 |
| #define | SYSCTL_OSC_MAIN 0x00000000 |
| #define | SYSCTL_OSC_INT 0x00000010 |
| #define | SYSCTL_OSC_INT4 0x00000020 |
| #define | SYSCTL_OSC_INT30 0x00000030 |
| #define | SYSCTL_OSC_EXT32 0x80000038 |
| #define | SYSCTL_INT_OSC_DIS 0x00000002 |
| #define | SYSCTL_MAIN_OSC_DIS 0x00000001 |
| #define | SYSCTL_DSLP_DIV_1 0x00000000 |
| #define | SYSCTL_DSLP_DIV_2 0x00800000 |
| #define | SYSCTL_DSLP_DIV_3 0x01000000 |
| #define | SYSCTL_DSLP_DIV_4 0x01800000 |
| #define | SYSCTL_DSLP_DIV_5 0x02000000 |
| #define | SYSCTL_DSLP_DIV_6 0x02800000 |
| #define | SYSCTL_DSLP_DIV_7 0x03000000 |
| #define | SYSCTL_DSLP_DIV_8 0x03800000 |
| #define | SYSCTL_DSLP_DIV_9 0x04000000 |
| #define | SYSCTL_DSLP_DIV_10 0x04800000 |
| #define | SYSCTL_DSLP_DIV_11 0x05000000 |
| #define | SYSCTL_DSLP_DIV_12 0x05800000 |
| #define | SYSCTL_DSLP_DIV_13 0x06000000 |
| #define | SYSCTL_DSLP_DIV_14 0x06800000 |
| #define | SYSCTL_DSLP_DIV_15 0x07000000 |
| #define | SYSCTL_DSLP_DIV_16 0x07800000 |
| #define | SYSCTL_DSLP_DIV_17 0x08000000 |
| #define | SYSCTL_DSLP_DIV_18 0x08800000 |
| #define | SYSCTL_DSLP_DIV_19 0x09000000 |
| #define | SYSCTL_DSLP_DIV_20 0x09800000 |
| #define | SYSCTL_DSLP_DIV_21 0x0A000000 |
| #define | SYSCTL_DSLP_DIV_22 0x0A800000 |
| #define | SYSCTL_DSLP_DIV_23 0x0B000000 |
| #define | SYSCTL_DSLP_DIV_24 0x0B800000 |
| #define | SYSCTL_DSLP_DIV_25 0x0C000000 |
| #define | SYSCTL_DSLP_DIV_26 0x0C800000 |
| #define | SYSCTL_DSLP_DIV_27 0x0D000000 |
| #define | SYSCTL_DSLP_DIV_28 0x0D800000 |
| #define | SYSCTL_DSLP_DIV_29 0x0E000000 |
| #define | SYSCTL_DSLP_DIV_30 0x0E800000 |
| #define | SYSCTL_DSLP_DIV_31 0x0F000000 |
| #define | SYSCTL_DSLP_DIV_32 0x0F800000 |
| #define | SYSCTL_DSLP_DIV_33 0x10000000 |
| #define | SYSCTL_DSLP_DIV_34 0x10800000 |
| #define | SYSCTL_DSLP_DIV_35 0x11000000 |
| #define | SYSCTL_DSLP_DIV_36 0x11800000 |
| #define | SYSCTL_DSLP_DIV_37 0x12000000 |
| #define | SYSCTL_DSLP_DIV_38 0x12800000 |
| #define | SYSCTL_DSLP_DIV_39 0x13000000 |
| #define | SYSCTL_DSLP_DIV_40 0x13800000 |
| #define | SYSCTL_DSLP_DIV_41 0x14000000 |
| #define | SYSCTL_DSLP_DIV_42 0x14800000 |
| #define | SYSCTL_DSLP_DIV_43 0x15000000 |
| #define | SYSCTL_DSLP_DIV_44 0x15800000 |
| #define | SYSCTL_DSLP_DIV_45 0x16000000 |
| #define | SYSCTL_DSLP_DIV_46 0x16800000 |
| #define | SYSCTL_DSLP_DIV_47 0x17000000 |
| #define | SYSCTL_DSLP_DIV_48 0x17800000 |
| #define | SYSCTL_DSLP_DIV_49 0x18000000 |
| #define | SYSCTL_DSLP_DIV_50 0x18800000 |
| #define | SYSCTL_DSLP_DIV_51 0x19000000 |
| #define | SYSCTL_DSLP_DIV_52 0x19800000 |
| #define | SYSCTL_DSLP_DIV_53 0x1A000000 |
| #define | SYSCTL_DSLP_DIV_54 0x1A800000 |
| #define | SYSCTL_DSLP_DIV_55 0x1B000000 |
| #define | SYSCTL_DSLP_DIV_56 0x1B800000 |
| #define | SYSCTL_DSLP_DIV_57 0x1C000000 |
| #define | SYSCTL_DSLP_DIV_58 0x1C800000 |
| #define | SYSCTL_DSLP_DIV_59 0x1D000000 |
| #define | SYSCTL_DSLP_DIV_60 0x1D800000 |
| #define | SYSCTL_DSLP_DIV_61 0x1E000000 |
| #define | SYSCTL_DSLP_DIV_62 0x1E800000 |
| #define | SYSCTL_DSLP_DIV_63 0x1F000000 |
| #define | SYSCTL_DSLP_DIV_64 0x1F800000 |
| #define | SYSCTL_DSLP_OSC_MAIN 0x00000000 |
| #define | SYSCTL_DSLP_OSC_INT 0x00000010 |
| #define | SYSCTL_DSLP_OSC_INT30 0x00000030 |
| #define | SYSCTL_DSLP_OSC_EXT32 0x00000070 |
| #define | SYSCTL_DSLP_PIOSC_PD 0x00000002 |
| #define | SYSCTL_DSLP_MOSC_PD 0x40000000 |
| #define | SYSCTL_PIOSC_CAL_AUTO 0x00000200 |
| #define | SYSCTL_PIOSC_CAL_FACT 0x00000100 |
| #define | SYSCTL_PIOSC_CAL_USER 0x80000100 |
| #define | SYSCTL_MOSC_VALIDATE 0x00000001 |
| #define | SYSCTL_MOSC_INTERRUPT 0x00000002 |
| #define | SYSCTL_MOSC_NO_XTAL 0x00000004 |
| #define | SYSCTL_MOSC_PWR_DIS 0x00000008 |
| #define | SYSCTL_MOSC_LOWFREQ 0x00000000 |
| #define | SYSCTL_MOSC_HIGHFREQ 0x00000010 |
| #define | SYSCTL_MOSC_SESRC 0x00000020 |
| #define | SYSCTL_LDO_SLEEP 0x00000200 |
| #define | SYSCTL_TEMP_LOW_POWER 0x00000100 |
| #define | SYSCTL_FLASH_NORMAL 0x00000000 |
| #define | SYSCTL_FLASH_LOW_POWER 0x00000020 |
| #define | SYSCTL_SRAM_NORMAL 0x00000000 |
| #define | SYSCTL_SRAM_STANDBY 0x00000001 |
| #define | SYSCTL_SRAM_LOW_POWER 0x00000003 |
| #define | SYSCTL_ONRST_WDOG0_POR 0x00000030 |
| #define | SYSCTL_ONRST_WDOG0_SYS 0x00000020 |
| #define | SYSCTL_ONRST_WDOG1_POR 0x000000C0 |
| #define | SYSCTL_ONRST_WDOG1_SYS 0x00000080 |
| #define | SYSCTL_ONRST_BOR_POR 0x0000000C |
| #define | SYSCTL_ONRST_BOR_SYS 0x00000008 |
| #define | SYSCTL_ONRST_EXT_POR 0x00000003 |
| #define | SYSCTL_ONRST_EXT_SYS 0x00000002 |
| #define | SYSCTL_VEVENT_VDDABO_NONE 0x00000000 |
| #define | SYSCTL_VEVENT_VDDABO_INT 0x00000100 |
| #define | SYSCTL_VEVENT_VDDABO_NMI 0x00000200 |
| #define | SYSCTL_VEVENT_VDDABO_RST 0x00000300 |
| #define | SYSCTL_VEVENT_VDDBO_NONE 0x00000000 |
| #define | SYSCTL_VEVENT_VDDBO_INT 0x00000001 |
| #define | SYSCTL_VEVENT_VDDBO_NMI 0x00000002 |
| #define | SYSCTL_VEVENT_VDDBO_RST 0x00000003 |
| #define | SYSCTL_VESTAT_VDDBOR 0x00000040 |
| #define | SYSCTL_VESTAT_VDDABOR 0x00000010 |
| #define | SYSCTL_NMI_MOSCFAIL 0x00010000 |
| #define | SYSCTL_NMI_TAMPER 0x00000200 |
| #define | SYSCTL_NMI_WDT1 0x00000020 |
| #define | SYSCTL_NMI_WDT0 0x00000008 |
| #define | SYSCTL_NMI_POWER 0x00000004 |
| #define | SYSCTL_NMI_EXTERNAL 0x00000001 |
| #define | SYSCTL_CLKOUT_EN 0x80000000 |
| #define | SYSCTL_CLKOUT_DIS 0x00000000 |
| #define | SYSCTL_CLKOUT_SYSCLK 0x00000000 |
| #define | SYSCTL_CLKOUT_PIOSC 0x00010000 |
| #define | SYSCTL_CLKOUT_MOSC 0x00020000 |
| #define | SYSCTL_ALTCLK_PIOSC 0x00000000 |
| #define | SYSCTL_ALTCLK_RTCOSC 0x00000003 |
| #define | SYSCTL_ALTCLK_LFIOSC 0x00000004 |
Functions | |
| uint32_t | SysCtlSRAMSizeGet (void) |
| uint32_t | SysCtlFlashSizeGet (void) |
| uint32_t | SysCtlFlashSectorSizeGet (void) |
| bool | SysCtlPeripheralPresent (uint32_t ui32Peripheral) |
| bool | SysCtlPeripheralReady (uint32_t ui32Peripheral) |
| void | SysCtlPeripheralPowerOn (uint32_t ui32Peripheral) |
| void | SysCtlPeripheralPowerOff (uint32_t ui32Peripheral) |
| void | SysCtlPeripheralReset (uint32_t ui32Peripheral) |
| void | SysCtlPeripheralEnable (uint32_t ui32Peripheral) |
| void | SysCtlPeripheralDisable (uint32_t ui32Peripheral) |
| void | SysCtlPeripheralSleepEnable (uint32_t ui32Peripheral) |
| void | SysCtlPeripheralSleepDisable (uint32_t ui32Peripheral) |
| void | SysCtlPeripheralDeepSleepEnable (uint32_t ui32Peripheral) |
| void | SysCtlPeripheralDeepSleepDisable (uint32_t ui32Peripheral) |
| void | SysCtlPeripheralClockGating (bool bEnable) |
| void | SysCtlIntRegister (void(*pfnHandler)(void)) |
| void | SysCtlIntUnregister (void) |
| void | SysCtlIntEnable (uint32_t ui32Ints) |
| void | SysCtlIntDisable (uint32_t ui32Ints) |
| void | SysCtlIntClear (uint32_t ui32Ints) |
| uint32_t | SysCtlIntStatus (bool bMasked) |
| void | SysCtlLDOSleepSet (uint32_t ui32Voltage) |
| uint32_t | SysCtlLDOSleepGet (void) |
| void | SysCtlLDODeepSleepSet (uint32_t ui32Voltage) |
| uint32_t | SysCtlLDODeepSleepGet (void) |
| void | SysCtlSleepPowerSet (uint32_t ui32Config) |
| void | SysCtlDeepSleepPowerSet (uint32_t ui32Config) |
| void | SysCtlReset (void) |
| void | SysCtlSleep (void) |
| void | SysCtlDeepSleep (void) |
| uint32_t | SysCtlResetCauseGet (void) |
| void | SysCtlResetCauseClear (uint32_t ui32Causes) |
| void | SysCtlBrownOutConfigSet (uint32_t ui32Config, uint32_t ui32Delay) |
| void | SysCtlDelay (uint32_t ui32Count) |
| void | SysCtlMOSCConfigSet (uint32_t ui32Config) |
| uint32_t | SysCtlPIOSCCalibrate (uint32_t ui32Type) |
| void | SysCtlClockSet (uint32_t ui32Config) |
| uint32_t | SysCtlClockGet (void) |
| void | SysCtlDeepSleepClockSet (uint32_t ui32Config) |
| void | SysCtlDeepSleepClockConfigSet (uint32_t ui32Div, uint32_t ui32Config) |
| void | SysCtlPWMClockSet (uint32_t ui32Config) |
| uint32_t | SysCtlPWMClockGet (void) |
| void | SysCtlIOSCVerificationSet (bool bEnable) |
| void | SysCtlMOSCVerificationSet (bool bEnable) |
| void | SysCtlPLLVerificationSet (bool bEnable) |
| void | SysCtlClkVerificationClear (void) |
| void | SysCtlGPIOAHBEnable (uint32_t ui32GPIOPeripheral) |
| void | SysCtlGPIOAHBDisable (uint32_t ui32GPIOPeripheral) |
| void | SysCtlUSBPLLEnable (void) |
| void | SysCtlUSBPLLDisable (void) |
| uint32_t | SysCtlClockFreqSet (uint32_t ui32Config, uint32_t ui32SysClock) |
| void | SysCtlResetBehaviorSet (uint32_t ui32Behavior) |
| uint32_t | SysCtlResetBehaviorGet (void) |
| void | SysCtlClockOutConfig (uint32_t ui32Config, uint32_t ui32Div) |
| void | SysCtlAltClkConfig (uint32_t ui32Config) |
| uint32_t | SysCtlNMIStatus (void) |
| void | SysCtlNMIClear (uint32_t ui32Status) |
| void | SysCtlVoltageEventConfig (uint32_t ui32Config) |
| uint32_t | SysCtlVoltageEventStatus (void) |
| void | SysCtlVoltageEventClear (uint32_t ui32Status) |
| #define SYSCTL_CAUSE_WDOG SYSCTL_CAUSE_WDOG0 |
| #define SYSCTL_CLKOUT_DIS 0x00000000 |
Definition at line 563 of file sysctl.h.
Referenced by SysCtlClockOutConfig().
| #define SYSCTL_CLKOUT_EN 0x80000000 |
Definition at line 562 of file sysctl.h.
Referenced by SysCtlClockOutConfig().
| #define SYSCTL_CLKOUT_MOSC 0x00020000 |
Definition at line 566 of file sysctl.h.
Referenced by SysCtlClockOutConfig().
| #define SYSCTL_CLKOUT_PIOSC 0x00010000 |
Definition at line 565 of file sysctl.h.
Referenced by SysCtlClockOutConfig().
| #define SYSCTL_CLKOUT_SYSCLK 0x00000000 |
Definition at line 564 of file sysctl.h.
Referenced by SysCtlClockOutConfig().
| #define SYSCTL_DSLP_MOSC_PD 0x40000000 |
Definition at line 461 of file sysctl.h.
Referenced by SysCtlDeepSleepClockConfigSet().
| #define SYSCTL_DSLP_OSC_EXT32 0x00000070 |
Definition at line 459 of file sysctl.h.
Referenced by SysCtlDeepSleepClockConfigSet().
| #define SYSCTL_DSLP_OSC_INT 0x00000010 |
Definition at line 457 of file sysctl.h.
Referenced by SysCtlDeepSleepClockConfigSet().
| #define SYSCTL_DSLP_OSC_INT30 0x00000030 |
Definition at line 458 of file sysctl.h.
Referenced by SysCtlDeepSleepClockConfigSet().
| #define SYSCTL_DSLP_OSC_MAIN 0x00000000 |
Definition at line 456 of file sysctl.h.
Referenced by SysCtlDeepSleepClockConfigSet().
| #define SYSCTL_DSLP_PIOSC_PD 0x00000002 |
Definition at line 460 of file sysctl.h.
Referenced by SysCtlDeepSleepClockConfigSet().
| #define SYSCTL_LDO_0_90V 0x80000012 |
Definition at line 148 of file sysctl.h.
Referenced by SysCtlLDODeepSleepSet(), and SysCtlLDOSleepSet().
| #define SYSCTL_LDO_0_95V 0x80000013 |
Definition at line 149 of file sysctl.h.
Referenced by SysCtlLDODeepSleepSet(), and SysCtlLDOSleepSet().
| #define SYSCTL_LDO_1_00V 0x80000014 |
Definition at line 150 of file sysctl.h.
Referenced by SysCtlLDODeepSleepSet(), and SysCtlLDOSleepSet().
| #define SYSCTL_LDO_1_05V 0x80000015 |
Definition at line 151 of file sysctl.h.
Referenced by SysCtlLDODeepSleepSet(), and SysCtlLDOSleepSet().
| #define SYSCTL_LDO_1_10V 0x80000016 |
Definition at line 152 of file sysctl.h.
Referenced by SysCtlLDODeepSleepSet(), and SysCtlLDOSleepSet().
| #define SYSCTL_LDO_1_15V 0x80000017 |
Definition at line 153 of file sysctl.h.
Referenced by SysCtlLDODeepSleepSet(), and SysCtlLDOSleepSet().
| #define SYSCTL_LDO_1_20V 0x80000018 |
Definition at line 154 of file sysctl.h.
Referenced by SysCtlLDODeepSleepSet(), and SysCtlLDOSleepSet().
| #define SYSCTL_MAIN_OSC_DIS 0x00000001 |
Definition at line 384 of file sysctl.h.
Referenced by SysCtlClockSet().
| #define SYSCTL_OSC_EXT32 0x80000038 |
Definition at line 382 of file sysctl.h.
Referenced by SysCtlClockFreqSet().
| #define SYSCTL_OSC_INT 0x00000010 |
Definition at line 379 of file sysctl.h.
Referenced by SysCtlClockFreqSet().
| #define SYSCTL_OSC_INT30 0x00000030 |
Definition at line 381 of file sysctl.h.
Referenced by SysCtlClockFreqSet().
| #define SYSCTL_OSC_MAIN 0x00000000 |
Definition at line 378 of file sysctl.h.
Referenced by main(), and SysCtlClockFreqSet().
| #define SYSCTL_PERIPH_ADC0 0xf0003800 |
Definition at line 63 of file sysctl.h.
Referenced by adc_init().
| #define SYSCTL_PERIPH_EEPROM0 0xf0005800 |
Definition at line 82 of file sysctl.h.
Referenced by EEPROMInit(), and EEPROMMassErase().
| #define SYSCTL_PERIPH_EPHY0 0xf0003000 |
Definition at line 69 of file sysctl.h.
Referenced by EMACPHYConfigSet().
| #define SYSCTL_PERIPH_GPIOA 0xf0000800 |
Definition at line 71 of file sysctl.h.
Referenced by hw_driver_init(), main(), SysCtlGPIOAHBDisable(), and SysCtlGPIOAHBEnable().
| #define SYSCTL_PERIPH_GPIOB 0xf0000801 |
Definition at line 72 of file sysctl.h.
Referenced by SysCtlGPIOAHBDisable(), and SysCtlGPIOAHBEnable().
| #define SYSCTL_PERIPH_GPIOC 0xf0000802 |
Definition at line 73 of file sysctl.h.
Referenced by SysCtlGPIOAHBDisable(), and SysCtlGPIOAHBEnable().
| #define SYSCTL_PERIPH_GPIOD 0xf0000803 |
Definition at line 74 of file sysctl.h.
Referenced by SysCtlGPIOAHBDisable(), and SysCtlGPIOAHBEnable().
| #define SYSCTL_PERIPH_GPIOE 0xf0000804 |
Definition at line 75 of file sysctl.h.
Referenced by adc_init(), SysCtlGPIOAHBDisable(), and SysCtlGPIOAHBEnable().
| #define SYSCTL_PERIPH_GPIOF 0xf0000805 |
Definition at line 76 of file sysctl.h.
Referenced by heart_init(), hw_driver_init(), main(), SysCtlGPIOAHBDisable(), and SysCtlGPIOAHBEnable().
| #define SYSCTL_PERIPH_GPIOG 0xf0000806 |
Definition at line 77 of file sysctl.h.
Referenced by SysCtlGPIOAHBDisable(), and SysCtlGPIOAHBEnable().
| #define SYSCTL_PERIPH_GPIOH 0xf0000807 |
Definition at line 78 of file sysctl.h.
Referenced by SysCtlGPIOAHBDisable(), and SysCtlGPIOAHBEnable().
| #define SYSCTL_PERIPH_GPIOJ 0xf0000808 |
Definition at line 79 of file sysctl.h.
Referenced by SysCtlGPIOAHBDisable(), and SysCtlGPIOAHBEnable().
| #define SYSCTL_PERIPH_TIMER0 0xf0000400 |
Definition at line 114 of file sysctl.h.
Referenced by hw_driver_init(), and main().
| #define SYSCTL_PERIPH_UART0 0xf0001800 |
Definition at line 122 of file sysctl.h.
Referenced by hw_driver_init(), and main().
| #define SYSCTL_PWMDIV_1 0x00000000 |
Definition at line 207 of file sysctl.h.
Referenced by SysCtlPWMClockGet(), and SysCtlPWMClockSet().
| #define SYSCTL_PWMDIV_16 0x00160000 |
Definition at line 211 of file sysctl.h.
Referenced by SysCtlPWMClockSet().
| #define SYSCTL_PWMDIV_2 0x00100000 |
Definition at line 208 of file sysctl.h.
Referenced by SysCtlPWMClockSet().
| #define SYSCTL_PWMDIV_32 0x00180000 |
Definition at line 212 of file sysctl.h.
Referenced by SysCtlPWMClockSet().
| #define SYSCTL_PWMDIV_4 0x00120000 |
Definition at line 209 of file sysctl.h.
Referenced by SysCtlPWMClockSet().
| #define SYSCTL_PWMDIV_64 0x001A0000 |
Definition at line 213 of file sysctl.h.
Referenced by SysCtlPWMClockSet().
| #define SYSCTL_PWMDIV_8 0x00140000 |
Definition at line 210 of file sysctl.h.
Referenced by SysCtlPWMClockSet().
| #define SYSCTL_USE_OSC 0x00003800 |
Definition at line 350 of file sysctl.h.
Referenced by main(), and SysCtlClockFreqSet().
| #define SYSCTL_USE_PLL 0x00000000 |
Definition at line 349 of file sysctl.h.
Referenced by SysCtlClockFreqSet().
| #define SYSCTL_XTAL_10MHZ 0x00000400 |
Definition at line 367 of file sysctl.h.
Referenced by SysCtlClockFreqSet().
| #define SYSCTL_XTAL_16MHZ 0x00000540 |
Definition at line 372 of file sysctl.h.
Referenced by main(), and SysCtlClockFreqSet().
| #define SYSCTL_XTAL_25MHZ 0x00000680 |
Definition at line 377 of file sysctl.h.
Referenced by SysCtlClockFreqSet().
| #define SYSCTL_XTAL_5MHZ 0x00000240 |
Definition at line 360 of file sysctl.h.
Referenced by SysCtlClockFreqSet().
| void SysCtlBrownOutConfigSet | ( | uint32_t | ui32Config, |
| uint32_t | ui32Delay | ||
| ) |
| void SysCtlClkVerificationClear | ( | void | ) |
| void SysCtlDelay | ( | uint32_t | ui32Count | ) |
Referenced by _EEPROMSectorMaskClear(), _EEPROMSectorMaskSet(), EEPROMInit(), EEPROMMassErase(), EEPROMProgram(), EMACPHYConfigSet(), LCDClockReset(), and SysCtlClockSet().
| void SysCtlIOSCVerificationSet | ( | bool | bEnable | ) |
| void SysCtlMOSCVerificationSet | ( | bool | bEnable | ) |
| void SysCtlPLLVerificationSet | ( | bool | bEnable | ) |
1.8.9.1 
