Uart_api

Macros
#define	UART_CLK_DIVIDER   8

Functions
static uint32_t	_UARTIntNumberGet (uint32_t ui32Base)
void	UARTParityModeSet (uint32_t ui32Base, uint32_t ui32Parity)
uint32_t	UARTParityModeGet (uint32_t ui32Base)
void	UARTFIFOLevelSet (uint32_t ui32Base, uint32_t ui32TxLevel, uint32_t ui32RxLevel)
void	UARTFIFOLevelGet (uint32_t ui32Base, uint32_t *pui32TxLevel, uint32_t *pui32RxLevel)
void	UARTConfigSetExpClk (uint32_t ui32Base, uint32_t ui32UARTClk, uint32_t ui32Baud, uint32_t ui32Config)
void	UARTConfigGetExpClk (uint32_t ui32Base, uint32_t ui32UARTClk, uint32_t *pui32Baud, uint32_t *pui32Config)
void	UARTEnable (uint32_t ui32Base)
void	UARTDisable (uint32_t ui32Base)
void	UARTFIFOEnable (uint32_t ui32Base)
void	UARTFIFODisable (uint32_t ui32Base)
void	UARTEnableSIR (uint32_t ui32Base, bool bLowPower)
void	UARTDisableSIR (uint32_t ui32Base)
void	UARTSmartCardEnable (uint32_t ui32Base)
void	UARTSmartCardDisable (uint32_t ui32Base)
void	UARTModemControlSet (uint32_t ui32Base, uint32_t ui32Control)
void	UARTModemControlClear (uint32_t ui32Base, uint32_t ui32Control)
uint32_t	UARTModemControlGet (uint32_t ui32Base)
uint32_t	UARTModemStatusGet (uint32_t ui32Base)
void	UARTFlowControlSet (uint32_t ui32Base, uint32_t ui32Mode)
uint32_t	UARTFlowControlGet (uint32_t ui32Base)
void	UARTTxIntModeSet (uint32_t ui32Base, uint32_t ui32Mode)
uint32_t	UARTTxIntModeGet (uint32_t ui32Base)
bool	UARTCharsAvail (uint32_t ui32Base)
bool	UARTSpaceAvail (uint32_t ui32Base)
int32_t	UARTCharGetNonBlocking (uint32_t ui32Base)
int32_t	UARTCharGet (uint32_t ui32Base)
bool	UARTCharPutNonBlocking (uint32_t ui32Base, unsigned char ucData)
void	UARTCharPut (uint32_t ui32Base, unsigned char ucData)
void	UARTBreakCtl (uint32_t ui32Base, bool bBreakState)
bool	UARTBusy (uint32_t ui32Base)
void	UARTIntRegister (uint32_t ui32Base, void(*pfnHandler)(void))
void	UARTIntUnregister (uint32_t ui32Base)
void	UARTIntEnable (uint32_t ui32Base, uint32_t ui32IntFlags)
void	UARTIntDisable (uint32_t ui32Base, uint32_t ui32IntFlags)
uint32_t	UARTIntStatus (uint32_t ui32Base, bool bMasked)
void	UARTIntClear (uint32_t ui32Base, uint32_t ui32IntFlags)
void	UARTDMAEnable (uint32_t ui32Base, uint32_t ui32DMAFlags)
void	UARTDMADisable (uint32_t ui32Base, uint32_t ui32DMAFlags)
uint32_t	UARTRxErrorGet (uint32_t ui32Base)
void	UARTRxErrorClear (uint32_t ui32Base)
void	UARTClockSourceSet (uint32_t ui32Base, uint32_t ui32Source)
uint32_t	UARTClockSourceGet (uint32_t ui32Base)
void	UART9BitEnable (uint32_t ui32Base)
void	UART9BitDisable (uint32_t ui32Base)
void	UART9BitAddrSet (uint32_t ui32Base, uint8_t ui8Addr, uint8_t ui8Mask)
void	UART9BitAddrSend (uint32_t ui32Base, uint8_t ui8Addr)

Variables
static const uint32_t	g_ppui32UARTIntMap [][2]
static const uint_fast8_t	g_ui8UARTIntMapRows
static const uint32_t	g_ppui32UARTIntMapSnowflake [][2]
static const uint_fast8_t	g_ui8UARTIntMapRowsSnowflake

Detailed Description

Macro Definition Documentation

#define UART_CLK_DIVIDER   8

Definition at line 64 of file uart.c.

Referenced by UARTConfigSetExpClk().

Function Documentation

static uint32_t _UARTIntNumberGet ( uint32_t  ui32Base )

static

Definition at line 137 of file uart.c.

References CLASS_IS_TM4C129, g_ppui32UARTIntMap, g_ppui32UARTIntMapSnowflake, g_ui8UARTIntMapRows, and g_ui8UARTIntMapRowsSnowflake.

Referenced by UARTIntRegister(), and UARTIntUnregister().

{
    uint_fast8_t ui8Idx, ui8Rows;
    const uint32_t (*ppui32UARTIntMap)[2];

    //
    // Default interrupt map.
    //
    ppui32UARTIntMap = g_ppui32UARTIntMap;
    ui8Rows = g_ui8UARTIntMapRows;

    if(CLASS_IS_TM4C129)
    {
        ppui32UARTIntMap = g_ppui32UARTIntMapSnowflake;
        ui8Rows = g_ui8UARTIntMapRowsSnowflake;
    }

    //
    // Loop through the table that maps UART base addresses to interrupt
    // numbers.
    //
    for(ui8Idx = 0; ui8Idx < ui8Rows; ui8Idx++)
    {
        //
        // See if this base address matches.
        //
        if(ppui32UARTIntMap[ui8Idx][0] == ui32Base)
        {
            //
            // Return the corresponding interrupt number.
            //
            return(ppui32UARTIntMap[ui8Idx][1]);
        }
    }

    //
    // The base address could not be found, so return an error.
    //
    return(0);
}

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void UART9BitAddrSend	(	uint32_t	ui32Base,
		uint8_t	ui8Addr
	)

Sends an address character from the specified port when operating in 9-bit mode.

Parameters

ui32Base	is the base address of the UART port.
ui8Addr	is the address to be transmitted.

This function waits until all data has been sent from the specified port and then sends the given address as an address byte. It then waits until the address byte has been transmitted before returning.

The normal data functions (UARTCharPut(), UARTCharPutNonBlocking(), UARTCharGet(), and UARTCharGetNonBlocking()) are used to send and receive data characters in 9-bit mode.

Note

The availability of 9-bit mode varies with the Tiva part in use. Please consult the datasheet for the part you are using to determine whether this support is available.

Returns

None.

Definition at line 1910 of file uart.c.

References ASSERT, HWREG, UART_FR_BUSY, UART_FR_TXFE, UART_LCRH_EPS, UART_LCRH_PEN, UART_LCRH_SPS, UART_O_DR, UART_O_FR, and UART_O_LCRH.

{
    uint32_t ui32LCRH;

    //
    // Check the arguments.
    //
    ASSERT(_UARTBaseValid(ui32Base));

    //
    // Wait until the FIFO is empty and the UART is not busy.
    //
    while((HWREG(ui32Base + UART_O_FR) & (UART_FR_TXFE | UART_FR_BUSY)) !=
          UART_FR_TXFE)
    {
    }

    //
    // Force the address/data bit to 1 to indicate this is an address byte.
    //
    ui32LCRH = HWREG(ui32Base + UART_O_LCRH);
    HWREG(ui32Base + UART_O_LCRH) = ((ui32LCRH & ~UART_LCRH_EPS) |
                                     UART_LCRH_SPS | UART_LCRH_PEN);

    //
    // Send the address.
    //
    HWREG(ui32Base + UART_O_DR) = ui8Addr;

    //
    // Wait until the address has been sent.
    //
    while((HWREG(ui32Base + UART_O_FR) & (UART_FR_TXFE | UART_FR_BUSY)) !=
          UART_FR_TXFE)
    {
    }

    //
    // Restore the address/data setting.
    //
    HWREG(ui32Base + UART_O_LCRH) = ui32LCRH;
}

void UART9BitAddrSet	(	uint32_t	ui32Base,
		uint8_t	ui8Addr,
		uint8_t	ui8Mask
	)

Sets the device address(es) for 9-bit mode.

Parameters

ui32Base	is the base address of the UART port.
ui8Addr	is the device address.
ui8Mask	is the device address mask.

This function configures the device address or range of device addresses that respond to requests on the 9-bit UART port. The received address is masked with the mask and then compared against the given address, allowing either a single address (if ui8Mask is 0xff) or a set of addresses to be matched.

Note

The availability of 9-bit mode varies with the Tiva part in use. Please consult the datasheet for the part you are using to determine whether this support is available.

Returns

None.

Definition at line 1871 of file uart.c.

References ASSERT, HWREG, UART_9BITADDR_ADDR_S, UART_9BITAMASK_MASK_S, UART_O_9BITADDR, and UART_O_9BITAMASK.

{
    //
    // Check the arguments.
    //
    ASSERT(_UARTBaseValid(ui32Base));

    //
    // Set the address and mask.
    //
    HWREG(ui32Base + UART_O_9BITADDR) = ui8Addr << UART_9BITADDR_ADDR_S;
    HWREG(ui32Base + UART_O_9BITAMASK) = ui8Mask << UART_9BITAMASK_MASK_S;
}

void UART9BitDisable

(

uint32_t

ui32Base

)

Disables 9-bit mode on the specified UART.

Parameters

ui32Base

is the base address of the UART port.

This function disables the 9-bit operational mode of the UART.

Note

The availability of 9-bit mode varies with the Tiva part in use. Please consult the datasheet for the part you are using to determine whether this support is available.

Returns

None.

Definition at line 1836 of file uart.c.

References ASSERT, HWREG, UART_9BITADDR_9BITEN, and UART_O_9BITADDR.

{
    //
    // Check the arguments.
    //
    ASSERT(_UARTBaseValid(ui32Base));

    //
    // Disable 9-bit mode.
    //
    HWREG(ui32Base + UART_O_9BITADDR) &= ~UART_9BITADDR_9BITEN;
}

void UART9BitEnable

(

uint32_t

ui32Base

)

Enables 9-bit mode on the specified UART.

Parameters

ui32Base

is the base address of the UART port.

This function enables the 9-bit operational mode of the UART.

Note

The availability of 9-bit mode varies with the Tiva part in use. Please consult the datasheet for the part you are using to determine whether this support is available.

Returns

None.

Definition at line 1807 of file uart.c.

References ASSERT, HWREG, UART_9BITADDR_9BITEN, and UART_O_9BITADDR.

{
    //
    // Check the arguments.
    //
    ASSERT(_UARTBaseValid(ui32Base));

    //
    // Enable 9-bit mode.
    //
    HWREG(ui32Base + UART_O_9BITADDR) |= UART_9BITADDR_9BITEN;
}

void UARTBreakCtl	(	uint32_t	ui32Base,
		bool	bBreakState
	)

Causes a BREAK to be sent.

Parameters

ui32Base	is the base address of the UART port.
bBreakState	controls the output level.

Calling this function with bBreakState set to true asserts a break condition on the UART. Calling this function with bBreakState set to false removes the break condition. For proper transmission of a break command, the break must be asserted for at least two complete frames.

Returns

None.

Definition at line 1304 of file uart.c.

References ASSERT, HWREG, UART_LCRH_BRK, and UART_O_LCRH.

{
    //
    // Check the arguments.
    //
    ASSERT(_UARTBaseValid(ui32Base));

    //
    // Set the break condition as requested.
    //
    HWREG(ui32Base + UART_O_LCRH) =
        (bBreakState ?
         (HWREG(ui32Base + UART_O_LCRH) | UART_LCRH_BRK) :
         (HWREG(ui32Base + UART_O_LCRH) & ~(UART_LCRH_BRK)));
}

bool UARTBusy

(

uint32_t

ui32Base

)

Determines whether the UART transmitter is busy or not.

Parameters

ui32Base

is the base address of the UART port.

This function allows the caller to determine whether all transmitted bytes have cleared the transmitter hardware. If false is returned, the transmit FIFO is empty and all bits of the last transmitted character, including all stop bits, have left the hardware shift register.

Returns

Returns true if the UART is transmitting or false if all transmissions are complete.

Definition at line 1336 of file uart.c.

References ASSERT, HWREG, UART_FR_BUSY, and UART_O_FR.

{
    //
    // Check the argument.
    //
    ASSERT(_UARTBaseValid(ui32Base));

    //
    // Determine if the UART is busy.
    //
    return((HWREG(ui32Base + UART_O_FR) & UART_FR_BUSY) ? true : false);
}

int32_t UARTCharGet

(

uint32_t

ui32Base

)

Waits for a character from the specified port.

Parameters

ui32Base

is the base address of the UART port.

This function gets a character from the receive FIFO for the specified port. If there are no characters available, this function waits until a character is received before returning.

Returns

Returns the character read from the specified port, cast as a int32_t.

Definition at line 1184 of file uart.c.

References ASSERT, HWREG, UART_FR_RXFE, UART_O_DR, and UART_O_FR.

Referenced by uart_get_string_().

{
    //
    // Check the arguments.
    //
    ASSERT(_UARTBaseValid(ui32Base));

    //
    // Wait until a char is available.
    //
    while(HWREG(ui32Base + UART_O_FR) & UART_FR_RXFE)
    {
    }

    //
    // Now get the char.
    //
    return(HWREG(ui32Base + UART_O_DR));
}

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int32_t UARTCharGetNonBlocking

(

uint32_t

ui32Base

)

Receives a character from the specified port.

Parameters

ui32Base

is the base address of the UART port.

This function gets a character from the receive FIFO for the specified port.

Returns

Returns the character read from the specified port, cast as a int32_t. A -1 is returned if there are no characters present in the receive FIFO. The UARTCharsAvail() function should be called before attempting to call this function.

Definition at line 1143 of file uart.c.

References ASSERT, HWREG, UART_FR_RXFE, UART_O_DR, and UART_O_FR.

Referenced by UART0_Handler(), and uart_get_char_().

{
    //
    // Check the arguments.
    //
    ASSERT(_UARTBaseValid(ui32Base));

    //
    // See if there are any characters in the receive FIFO.
    //
    if(!(HWREG(ui32Base + UART_O_FR) & UART_FR_RXFE))
    {
        //
        // Read and return the next character.
        //
        return(HWREG(ui32Base + UART_O_DR));
    }
    else
    {
        //
        // There are no characters, so return a failure.
        //
        return(-1);
    }
}

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void UARTCharPut	(	uint32_t	ui32Base,
		unsigned char	ucData
	)

Waits to send a character from the specified port.

Parameters

ui32Base	is the base address of the UART port.
ucData	is the character to be transmitted.

This function sends the character ucData to the transmit FIFO for the specified port. If there is no space available in the transmit FIFO, this function waits until there is space available before returning.

Returns

None.

Definition at line 1268 of file uart.c.

References ASSERT, HWREG, UART_FR_TXFF, UART_O_DR, and UART_O_FR.

Referenced by doctor(), UART0_Handler(), uart_consumer(), uart_send_char_(), and uart_send_string_().

{
    //
    // Check the arguments.
    //
    ASSERT(_UARTBaseValid(ui32Base));

    //
    // Wait until space is available.
    //
    while(HWREG(ui32Base + UART_O_FR) & UART_FR_TXFF)
    {
    }

    //
    // Send the char.
    //
    HWREG(ui32Base + UART_O_DR) = ucData;
}

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bool UARTCharPutNonBlocking	(	uint32_t	ui32Base,
		unsigned char	ucData
	)

Sends a character to the specified port.

Parameters

ui32Base	is the base address of the UART port.
ucData	is the character to be transmitted.

This function writes the character ucData to the transmit FIFO for the specified port. This function does not block, so if there is no space available, then a false is returned and the application must retry the function later.

Returns

Returns true if the character was successfully placed in the transmit FIFO or false if there was no space available in the transmit FIFO.

Definition at line 1222 of file uart.c.

References ASSERT, HWREG, UART_FR_TXFF, UART_O_DR, and UART_O_FR.

{
    //
    // Check the arguments.
    //
    ASSERT(_UARTBaseValid(ui32Base));

    //
    // See if there is space in the transmit FIFO.
    //
    if(!(HWREG(ui32Base + UART_O_FR) & UART_FR_TXFF))
    {
        //
        // Write this character to the transmit FIFO.
        //
        HWREG(ui32Base + UART_O_DR) = ucData;

        //
        // Success.
        //
        return(true);
    }
    else
    {
        //
        // There is no space in the transmit FIFO, so return a failure.
        //
        return(false);
    }
}

bool UARTCharsAvail

(

uint32_t

ui32Base

)

Determines if there are any characters in the receive FIFO.

Parameters

ui32Base

is the base address of the UART port.

This function returns a flag indicating whether or not there is data available in the receive FIFO.

Returns

Returns true if there is data in the receive FIFO or false if there is no data in the receive FIFO.

Definition at line 1087 of file uart.c.

References ASSERT, HWREG, UART_FR_RXFE, and UART_O_FR.

Referenced by s_Handler(), UART0_Handler(), and uart_get_string_().

{
    //
    // Check the arguments.
    //
    ASSERT(_UARTBaseValid(ui32Base));

    //
    // Return the availability of characters.
    //
    return((HWREG(ui32Base + UART_O_FR) & UART_FR_RXFE) ? false : true);
}

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uint32_t UARTClockSourceGet

(

uint32_t

ui32Base

)

Gets the baud clock source for the specified UART.

Parameters

ui32Base

is the base address of the UART port.

This function returns the baud clock source for the specified UART. The possible baud clock source are the system clock (UART_CLOCK_SYSTEM) or the precision internal oscillator (UART_CLOCK_PIOSC).

Note

The ability to specify the UART baud clock source varies with the Tiva part in use. Please consult the datasheet for the part you are using to determine whether this support is available.

Returns

None.

Definition at line 1778 of file uart.c.

References ASSERT, HWREG, and UART_O_CC.

{
    //
    // Check the arguments.
    //
    ASSERT(_UARTBaseValid(ui32Base));

    //
    // Return the UART clock source.
    //
    return(HWREG(ui32Base + UART_O_CC));
}

void UARTClockSourceSet	(	uint32_t	ui32Base,
		uint32_t	ui32Source
	)

Sets the baud clock source for the specified UART.

Parameters

ui32Base	is the base address of the UART port.
ui32Source	is the baud clock source for the UART.

This function allows the baud clock source for the UART to be selected. The possible clock source are the system clock (UART_CLOCK_SYSTEM) or the precision internal oscillator (UART_CLOCK_PIOSC).

Changing the baud clock source changes the baud rate generated by the UART. Therefore, the baud rate should be reconfigured after any change to the baud clock source.

Note

The ability to specify the UART baud clock source varies with the Tiva part in use. Please consult the datasheet for the part you are using to determine whether this support is available.

Returns

None.

Definition at line 1745 of file uart.c.

References ASSERT, HWREG, UART_CLOCK_PIOSC, UART_CLOCK_SYSTEM, and UART_O_CC.

{
    //
    // Check the arguments.
    //
    ASSERT(_UARTBaseValid(ui32Base));
    ASSERT((ui32Source == UART_CLOCK_SYSTEM) ||
           (ui32Source == UART_CLOCK_PIOSC));

    //
    // Set the UART clock source.
    //
    HWREG(ui32Base + UART_O_CC) = ui32Source;
}

void UARTConfigGetExpClk	(	uint32_t	ui32Base,
		uint32_t	ui32UARTClk,
		uint32_t *	pui32Baud,
		uint32_t *	pui32Config
	)

Gets the current configuration of a UART.

Parameters

ui32Base	is the base address of the UART port.
ui32UARTClk	is the rate of the clock supplied to the UART module.
pui32Baud	is a pointer to storage for the baud rate.
pui32Config	is a pointer to storage for the data format.

This function determines the baud rate and data format for the UART, given an explicitly provided peripheral clock (hence the ExpClk suffix). The returned baud rate is the actual baud rate; it may not be the exact baud rate requested or an ``official'' baud rate. The data format returned in pui32Config is enumerated the same as the ui32Config parameter of UARTConfigSetExpClk().

The peripheral clock is the same as the processor clock. The frequency of the system clock is the value returned by SysCtlClockGet(), or it can be explicitly hard coded if it is constant and known (to save the code/execution overhead of a call to SysCtlClockGet()).

For Tiva parts that have the ability to specify the UART baud clock source (via UARTClockSourceSet()), the peripheral clock can be changed to PIOSC. In this case, the peripheral clock should be specified as 16,000,000 (the nominal rate of PIOSC).

Returns

None.

Definition at line 467 of file uart.c.

References ASSERT, HWREG, UART_CTL_HSE, UART_LCRH_EPS, UART_LCRH_PEN, UART_LCRH_SPS, UART_LCRH_STP2, UART_LCRH_WLEN_M, UART_O_CTL, UART_O_FBRD, UART_O_IBRD, and UART_O_LCRH.

{
    uint32_t ui32Int, ui32Frac;

    //
    // Check the arguments.
    //
    ASSERT(_UARTBaseValid(ui32Base));

    //
    // Compute the baud rate.
    //
    ui32Int = HWREG(ui32Base + UART_O_IBRD);
    ui32Frac = HWREG(ui32Base + UART_O_FBRD);
    *pui32Baud = (ui32UARTClk * 4) / ((64 * ui32Int) + ui32Frac);

    //
    // See if high speed mode enabled.
    //
    if(HWREG(ui32Base + UART_O_CTL) & UART_CTL_HSE)
    {
        //
        // High speed mode is enabled so the actual baud rate is actually
        // double what was just calculated.
        //
        *pui32Baud *= 2;
    }

    //
    // Get the parity, data length, and number of stop bits.
    //
    *pui32Config = (HWREG(ui32Base + UART_O_LCRH) &
                    (UART_LCRH_SPS | UART_LCRH_WLEN_M | UART_LCRH_STP2 |
                     UART_LCRH_EPS | UART_LCRH_PEN));
}

void UARTConfigSetExpClk	(	uint32_t	ui32Base,
		uint32_t	ui32UARTClk,
		uint32_t	ui32Baud,
		uint32_t	ui32Config
	)

Sets the configuration of a UART.

Parameters

ui32Base	is the base address of the UART port.
ui32UARTClk	is the rate of the clock supplied to the UART module.
ui32Baud	is the desired baud rate.
ui32Config	is the data format for the port (number of data bits, number of stop bits, and parity).

This function configures the UART for operation in the specified data format. The baud rate is provided in the ui32Baud parameter and the data format in the ui32Config parameter.

The ui32Config parameter is the logical OR of three values: the number of data bits, the number of stop bits, and the parity. UART_CONFIG_WLEN_8, UART_CONFIG_WLEN_7, UART_CONFIG_WLEN_6, and UART_CONFIG_WLEN_5 select from eight to five data bits per byte (respectively). UART_CONFIG_STOP_ONE and UART_CONFIG_STOP_TWO select one or two stop bits (respectively). UART_CONFIG_PAR_NONE, UART_CONFIG_PAR_EVEN, UART_CONFIG_PAR_ODD, UART_CONFIG_PAR_ONE, and UART_CONFIG_PAR_ZERO select the parity mode (no parity bit, even parity bit, odd parity bit, parity bit always one, and parity bit always zero, respectively).

The peripheral clock is the same as the processor clock. The frequency of the system clock is the value returned by SysCtlClockGet(), or it can be explicitly hard coded if it is constant and known (to save the code/execution overhead of a call to SysCtlClockGet()).

For Tiva parts that have the ability to specify the UART baud clock source (via UARTClockSourceSet()), the peripheral clock can be changed to PIOSC. In this case, the peripheral clock should be specified as 16,000,000 (the nominal rate of PIOSC).

Returns

None.

Definition at line 368 of file uart.c.

References ASSERT, HWREG, UART_CLK_DIVIDER, UART_CTL_HSE, UART_O_CTL, UART_O_FBRD, UART_O_FR, UART_O_IBRD, UART_O_LCRH, UARTDisable(), and UARTEnable().

Referenced by main(), and uart_init().

{
    uint32_t ui32Div;

    //
    // Check the arguments.
    //
    ASSERT(_UARTBaseValid(ui32Base));
    ASSERT(ui32Baud != 0);
    ASSERT(ui32UARTClk >= (ui32Baud * UART_CLK_DIVIDER));

    //
    // Stop the UART.
    //
    UARTDisable(ui32Base);

    //
    // Is the required baud rate greater than the maximum rate supported
    // without the use of high speed mode?
    //
    if((ui32Baud * 16) > ui32UARTClk)
    {
        //
        // Enable high speed mode.
        //
        HWREG(ui32Base + UART_O_CTL) |= UART_CTL_HSE;

        //
        // Half the supplied baud rate to compensate for enabling high speed
        // mode.  This allows the following code to be common to both cases.
        //
        ui32Baud /= 2;
    }
    else
    {
        //
        // Disable high speed mode.
        //
        HWREG(ui32Base + UART_O_CTL) &= ~(UART_CTL_HSE);
    }

    //
    // Compute the fractional baud rate divider.
    //
    ui32Div = (((ui32UARTClk * 8) / ui32Baud) + 1) / 2;

    //
    // Set the baud rate.
    //
    HWREG(ui32Base + UART_O_IBRD) = ui32Div / 64;
    HWREG(ui32Base + UART_O_FBRD) = ui32Div % 64;

    //
    // Set parity, data length, and number of stop bits.
    //
    HWREG(ui32Base + UART_O_LCRH) = ui32Config;

    //
    // Clear the flags register.
    //
    HWREG(ui32Base + UART_O_FR) = 0;

    //
    // Start the UART.
    //
    UARTEnable(ui32Base);
}

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void UARTDisable

(

uint32_t

ui32Base

)

Disables transmitting and receiving.

Parameters

ui32Base

is the base address of the UART port.

This function disables the UART, waits for the end of transmission of the current character, and flushes the transmit FIFO.

Returns

None.

Definition at line 548 of file uart.c.

References ASSERT, HWREG, UART_CTL_RXE, UART_CTL_TXE, UART_CTL_UARTEN, UART_FR_BUSY, UART_LCRH_FEN, UART_O_CTL, UART_O_FR, and UART_O_LCRH.

Referenced by UARTConfigSetExpClk().

{
    //
    // Check the arguments.
    //
    ASSERT(_UARTBaseValid(ui32Base));

    //
    // Wait for end of TX.
    //
    while(HWREG(ui32Base + UART_O_FR) & UART_FR_BUSY)
    {
    }

    //
    // Disable the FIFO.
    //
    HWREG(ui32Base + UART_O_LCRH) &= ~(UART_LCRH_FEN);

    //
    // Disable the UART.
    //
    HWREG(ui32Base + UART_O_CTL) &= ~(UART_CTL_UARTEN | UART_CTL_TXE |
                                      UART_CTL_RXE);
}

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void UARTDisableSIR

(

uint32_t

ui32Base

)

Disables SIR (IrDA) mode on the specified UART.

Parameters

ui32Base

is the base address of the UART port.

This function disables SIR(IrDA) mode on the UART. This function only has an effect if the UART has not been enabled by a call to UARTEnable(). The call UARTEnableSIR() must be made before a call to UARTConfigSetExpClk() because the UARTConfigSetExpClk() function calls the UARTEnable() function. Another option is to call UARTDisable() followed by UARTEnableSIR() and then enable the UART by calling UARTEnable().

Note

The availability of SIR (IrDA) operation varies with the Tiva part in use. Please consult the datasheet for the part you are using to determine whether this support is available.

Returns

None.

Definition at line 688 of file uart.c.

References ASSERT, HWREG, UART_CTL_SIREN, UART_CTL_SIRLP, and UART_O_CTL.

{
    //
    // Check the arguments.
    //
    ASSERT(_UARTBaseValid(ui32Base));

    //
    // Disable SIR and SIRLP (if appropriate).
    //
    HWREG(ui32Base + UART_O_CTL) &= ~(UART_CTL_SIREN | UART_CTL_SIRLP);
}

void UARTDMADisable	(	uint32_t	ui32Base,
		uint32_t	ui32DMAFlags
	)

Disable UART uDMA operation.

Parameters

ui32Base	is the base address of the UART port.
ui32DMAFlags	is a bit mask of the uDMA features to disable.

This function is used to disable UART uDMA features that were enabled by UARTDMAEnable(). The specified UART uDMA features are disabled. The ui32DMAFlags parameter is the logical OR of any of the following values:

• UART_DMA_RX - disable uDMA for receive
• UART_DMA_TX - disable uDMA for transmit
• UART_DMA_ERR_RXSTOP - do not disable uDMA receive on UART error

Returns

None.

Definition at line 1649 of file uart.c.

References ASSERT, HWREG, and UART_O_DMACTL.

{
    //
    // Check the arguments.
    //
    ASSERT(_UARTBaseValid(ui32Base));

    //
    // Clear the requested bits in the UART uDMA control register.
    //
    HWREG(ui32Base + UART_O_DMACTL) &= ~ui32DMAFlags;
}

void UARTDMAEnable	(	uint32_t	ui32Base,
		uint32_t	ui32DMAFlags
	)

Enable UART uDMA operation.

Parameters

ui32Base	is the base address of the UART port.
ui32DMAFlags	is a bit mask of the uDMA features to enable.

The specified UART uDMA features are enabled. The UART can be configured to use uDMA for transmit or receive and to disable receive if an error occurs. The ui32DMAFlags parameter is the logical OR of any of the following values:

• UART_DMA_RX - enable uDMA for receive
• UART_DMA_TX - enable uDMA for transmit
• UART_DMA_ERR_RXSTOP - disable uDMA receive on UART error

Note

The uDMA controller must also be set up before DMA can be used with the UART.

Returns

None.

Definition at line 1617 of file uart.c.

References ASSERT, HWREG, and UART_O_DMACTL.

{
    //
    // Check the arguments.
    //
    ASSERT(_UARTBaseValid(ui32Base));

    //
    // Set the requested bits in the UART uDMA control register.
    //
    HWREG(ui32Base + UART_O_DMACTL) |= ui32DMAFlags;
}

void UARTEnable

(

uint32_t

ui32Base

)

Enables transmitting and receiving.

Parameters

ui32Base

is the base address of the UART port.

This function enables the UART and its transmit and receive FIFOs.

Returns

None.

Definition at line 516 of file uart.c.

References ASSERT, HWREG, UART_CTL_RXE, UART_CTL_TXE, UART_CTL_UARTEN, UART_LCRH_FEN, UART_O_CTL, and UART_O_LCRH.

Referenced by UARTConfigSetExpClk().

{
    //
    // Check the arguments.
    //
    ASSERT(_UARTBaseValid(ui32Base));

    //
    // Enable the FIFO.
    //
    HWREG(ui32Base + UART_O_LCRH) |= UART_LCRH_FEN;

    //
    // Enable RX, TX, and the UART.
    //
    HWREG(ui32Base + UART_O_CTL) |= (UART_CTL_UARTEN | UART_CTL_TXE |
                                     UART_CTL_RXE);
}

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void UARTEnableSIR	(	uint32_t	ui32Base,
		bool	bLowPower
	)

Enables SIR (IrDA) mode on the specified UART.

Parameters

ui32Base	is the base address of the UART port.
bLowPower	indicates if SIR Low Power Mode is to be used.

This function enables SIR (IrDA) mode on the UART. If the bLowPower flag is set, then SIR low power mode will be selected as well. This function only has an effect if the UART has not been enabled by a call to UARTEnable(). The call UARTEnableSIR() must be made before a call to UARTConfigSetExpClk() because the UARTConfigSetExpClk() function calls the UARTEnable() function. Another option is to call UARTDisable() followed by UARTEnableSIR() and then enable the UART by calling UARTEnable().

Note

The availability of SIR (IrDA) operation varies with the Tiva part in use. Please consult the datasheet for the part you are using to determine whether this support is available.

Returns

None.

Definition at line 647 of file uart.c.

References ASSERT, HWREG, UART_CTL_SIREN, UART_CTL_SIRLP, and UART_O_CTL.

{
    //
    // Check the arguments.
    //
    ASSERT(_UARTBaseValid(ui32Base));

    //
    // Enable SIR and SIRLP (if appropriate).
    //
    if(bLowPower)
    {
        HWREG(ui32Base + UART_O_CTL) |= (UART_CTL_SIREN | UART_CTL_SIRLP);
    }
    else
    {
        HWREG(ui32Base + UART_O_CTL) |= (UART_CTL_SIREN);
    }
}

void UARTFIFODisable

(

uint32_t

ui32Base

)

Disables the transmit and receive FIFOs.

Parameters

ui32Base

is the base address of the UART port.

This function disables the transmit and receive FIFOs in the UART.

Returns

None.

Definition at line 611 of file uart.c.

References ASSERT, HWREG, UART_LCRH_FEN, and UART_O_LCRH.

{
    //
    // Check the arguments.
    //
    ASSERT(_UARTBaseValid(ui32Base));

    //
    // Disable the FIFO.
    //
    HWREG(ui32Base + UART_O_LCRH) &= ~(UART_LCRH_FEN);
}

void UARTFIFOEnable

(

uint32_t

ui32Base

)

Enables the transmit and receive FIFOs.

Parameters

ui32Base

is the base address of the UART port.

This functions enables the transmit and receive FIFOs in the UART.

Returns

None.

Definition at line 586 of file uart.c.

References ASSERT, HWREG, UART_LCRH_FEN, and UART_O_LCRH.

{
    //
    // Check the arguments.
    //
    ASSERT(_UARTBaseValid(ui32Base));

    //
    // Enable the FIFO.
    //
    HWREG(ui32Base + UART_O_LCRH) |= UART_LCRH_FEN;
}

void UARTFIFOLevelGet	(	uint32_t	ui32Base,
		uint32_t *	pui32TxLevel,
		uint32_t *	pui32RxLevel
	)

Gets the FIFO level at which interrupts are generated.

Parameters

ui32Base	is the base address of the UART port.
pui32TxLevel	is a pointer to storage for the transmit FIFO level, returned as one of UART_FIFO_TX1_8, UART_FIFO_TX2_8, UART_FIFO_TX4_8, UART_FIFO_TX6_8, or UART_FIFO_TX7_8.
pui32RxLevel	is a pointer to storage for the receive FIFO level, returned as one of UART_FIFO_RX1_8, UART_FIFO_RX2_8, UART_FIFO_RX4_8, UART_FIFO_RX6_8, or UART_FIFO_RX7_8.

This function gets the FIFO level at which transmit and receive interrupts are generated.

Returns

None.

Definition at line 307 of file uart.c.

References ASSERT, HWREG, UART_IFLS_RX_M, UART_IFLS_TX_M, and UART_O_IFLS.

{
    uint32_t ui32Temp;

    //
    // Check the arguments.
    //
    ASSERT(_UARTBaseValid(ui32Base));

    //
    // Read the FIFO level register.
    //
    ui32Temp = HWREG(ui32Base + UART_O_IFLS);

    //
    // Extract the transmit and receive FIFO levels.
    //
    *pui32TxLevel = ui32Temp & UART_IFLS_TX_M;
    *pui32RxLevel = ui32Temp & UART_IFLS_RX_M;
}

void UARTFIFOLevelSet	(	uint32_t	ui32Base,
		uint32_t	ui32TxLevel,
		uint32_t	ui32RxLevel
	)

Sets the FIFO level at which interrupts are generated.

Parameters

ui32Base	is the base address of the UART port.
ui32TxLevel	is the transmit FIFO interrupt level, specified as one of UART_FIFO_TX1_8, UART_FIFO_TX2_8, UART_FIFO_TX4_8, UART_FIFO_TX6_8, or UART_FIFO_TX7_8.
ui32RxLevel	is the receive FIFO interrupt level, specified as one of UART_FIFO_RX1_8, UART_FIFO_RX2_8, UART_FIFO_RX4_8, UART_FIFO_RX6_8, or UART_FIFO_RX7_8.

This function configures the FIFO level at which transmit and receive interrupts are generated.

Returns

None.

Definition at line 264 of file uart.c.

References ASSERT, HWREG, UART_FIFO_RX1_8, UART_FIFO_RX2_8, UART_FIFO_RX4_8, UART_FIFO_RX6_8, UART_FIFO_RX7_8, UART_FIFO_TX1_8, UART_FIFO_TX2_8, UART_FIFO_TX4_8, UART_FIFO_TX6_8, UART_FIFO_TX7_8, and UART_O_IFLS.

{
    //
    // Check the arguments.
    //
    ASSERT(_UARTBaseValid(ui32Base));
    ASSERT((ui32TxLevel == UART_FIFO_TX1_8) ||
           (ui32TxLevel == UART_FIFO_TX2_8) ||
           (ui32TxLevel == UART_FIFO_TX4_8) ||
           (ui32TxLevel == UART_FIFO_TX6_8) ||
           (ui32TxLevel == UART_FIFO_TX7_8));
    ASSERT((ui32RxLevel == UART_FIFO_RX1_8) ||
           (ui32RxLevel == UART_FIFO_RX2_8) ||
           (ui32RxLevel == UART_FIFO_RX4_8) ||
           (ui32RxLevel == UART_FIFO_RX6_8) ||
           (ui32RxLevel == UART_FIFO_RX7_8));

    //
    // Set the FIFO interrupt levels.
    //
    HWREG(ui32Base + UART_O_IFLS) = ui32TxLevel | ui32RxLevel;
}

uint32_t UARTFlowControlGet

(

uint32_t

ui32Base

)

Returns the UART hardware flow control mode currently in use.

Parameters

ui32Base

is the base address of the UART port.

This function returns the current hardware flow control mode.

Note

The availability of hardware flow control varies with the Tiva part and UART in use. Please consult the datasheet for the part you are using to determine whether this support is available.

Returns

Returns the current flow control mode in use. This value is a logical OR combination of values UART_FLOWCONTROL_TX if transmit (CTS) flow control is enabled and UART_FLOWCONTROL_RX if receive (RTS) flow control is in use. If hardware flow control is disabled, UART_FLOWCONTROL_NONE is returned.

Definition at line 983 of file uart.c.

References ASSERT, HWREG, UART_FLOWCONTROL_RX, UART_FLOWCONTROL_TX, and UART_O_CTL.

{
    //
    // Check the arguments.
    //
    ASSERT(_UARTBaseValid(ui32Base));

    return(HWREG(ui32Base + UART_O_CTL) & (UART_FLOWCONTROL_TX |
                                           UART_FLOWCONTROL_RX));
}

void UARTFlowControlSet	(	uint32_t	ui32Base,
		uint32_t	ui32Mode
	)

Sets the UART hardware flow control mode to be used.

Parameters

ui32Base	is the base address of the UART port.
ui32Mode	indicates the flow control modes to be used. This parameter is a logical OR combination of values UART_FLOWCONTROL_TX and UART_FLOWCONTROL_RX to enable hardware transmit (CTS) and receive (RTS) flow control or UART_FLOWCONTROL_NONE to disable hardware flow control.

This function configures the required hardware flow control modes. If ui32Mode contains flag UART_FLOWCONTROL_TX, data is only transmitted if the incoming CTS signal is asserted. If ui32Mode contains flag UART_FLOWCONTROL_RX, the RTS output is controlled by the hardware and is asserted only when there is space available in the receive FIFO. If no hardware flow control is required, UART_FLOWCONTROL_NONE should be passed.

Note

The availability of hardware flow control varies with the Tiva part and UART in use. Please consult the datasheet for the part you are using to determine whether this support is available.

Returns

None.

Definition at line 947 of file uart.c.

References ASSERT, HWREG, UART_FLOWCONTROL_RX, UART_FLOWCONTROL_TX, and UART_O_CTL.

{
    //
    // Check the arguments.
    //
    ASSERT(_UARTBaseValid(ui32Base));
    ASSERT((ui32Mode & ~(UART_FLOWCONTROL_TX | UART_FLOWCONTROL_RX)) == 0);

    //
    // Set the flow control mode as requested.
    //
    HWREG(ui32Base + UART_O_CTL) = ((HWREG(ui32Base + UART_O_CTL) &
                                     ~(UART_FLOWCONTROL_TX |
                                       UART_FLOWCONTROL_RX)) | ui32Mode);
}

void UARTIntClear	(	uint32_t	ui32Base,
		uint32_t	ui32IntFlags
	)

Clears UART interrupt sources.

Parameters

ui32Base	is the base address of the UART port.
ui32IntFlags	is a bit mask of the interrupt sources to be cleared.

The specified UART interrupt sources are cleared, so that they no longer assert. This function must be called in the interrupt handler to keep the interrupt from being triggered again immediately upon exit.

The ui32IntFlags parameter has the same definition as the ui32IntFlags parameter to UARTIntEnable().

Note

Because there is a write buffer in the Cortex-M processor, it may take several clock cycles before the interrupt source is actually cleared. Therefore, it is recommended that the interrupt source be cleared early in the interrupt handler (as opposed to the very last action) to avoid returning from the interrupt handler before the interrupt source is actually cleared. Failure to do so may result in the interrupt handler being immediately reentered (because the interrupt controller still sees the interrupt source asserted).

Returns

None.

Definition at line 1581 of file uart.c.

References ASSERT, HWREG, and UART_O_ICR.

Referenced by UART0_Handler(), uart_get_char_(), and uart_get_string_().

{
    //
    // Check the arguments.
    //
    ASSERT(_UARTBaseValid(ui32Base));

    //
    // Clear the requested interrupt sources.
    //
    HWREG(ui32Base + UART_O_ICR) = ui32IntFlags;
}

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void UARTIntDisable	(	uint32_t	ui32Base,
		uint32_t	ui32IntFlags
	)

Disables individual UART interrupt sources.

Parameters

ui32Base	is the base address of the UART port.
ui32IntFlags	is the bit mask of the interrupt sources to be disabled.

This function disables the indicated UART interrupt sources. Only the sources that are enabled can be reflected to the processor interrupt; disabled sources have no effect on the processor.

The ui32IntFlags parameter has the same definition as the ui32IntFlags parameter to UARTIntEnable().

Returns

None.

Definition at line 1503 of file uart.c.

References ASSERT, HWREG, and UART_O_IM.

{
    //
    // Check the arguments.
    //
    ASSERT(_UARTBaseValid(ui32Base));

    //
    // Disable the specified interrupts.
    //
    HWREG(ui32Base + UART_O_IM) &= ~(ui32IntFlags);
}

void UARTIntEnable	(	uint32_t	ui32Base,
		uint32_t	ui32IntFlags
	)

Enables individual UART interrupt sources.

Parameters

ui32Base	is the base address of the UART port.
ui32IntFlags	is the bit mask of the interrupt sources to be enabled.

This function enables the indicated UART interrupt sources. Only the sources that are enabled can be reflected to the processor interrupt; disabled sources have no effect on the processor.

The ui32IntFlags parameter is the logical OR of any of the following:

• UART_INT_9BIT - 9-bit Address Match interrupt
• UART_INT_OE - Overrun Error interrupt
• UART_INT_BE - Break Error interrupt
• UART_INT_PE - Parity Error interrupt
• UART_INT_FE - Framing Error interrupt
• UART_INT_RT - Receive Timeout interrupt
• UART_INT_TX - Transmit interrupt
• UART_INT_RX - Receive interrupt
• UART_INT_DSR - DSR interrupt
• UART_INT_DCD - DCD interrupt
• UART_INT_CTS - CTS interrupt
• UART_INT_RI - RI interrupt

Returns

None.

Definition at line 1471 of file uart.c.

References ASSERT, HWREG, and UART_O_IM.

Referenced by uart_init().

{
    //
    // Check the arguments.
    //
    ASSERT(_UARTBaseValid(ui32Base));

    //
    // Enable the specified interrupts.
    //
    HWREG(ui32Base + UART_O_IM) |= ui32IntFlags;
}

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void UARTIntRegister	(	uint32_t	ui32Base,
		void(*)(void)	pfnHandler
	)

Registers an interrupt handler for a UART interrupt.

Parameters

ui32Base	is the base address of the UART port.
pfnHandler	is a pointer to the function to be called when the UART interrupt occurs.

This function does the actual registering of the interrupt handler. This function enables the global interrupt in the interrupt controller; specific UART interrupts must be enabled via UARTIntEnable(). It is the interrupt handler's responsibility to clear the interrupt source.

See also

IntRegister() for important information about registering interrupt handlers.

Returns

None.

Definition at line 1369 of file uart.c.

References _UARTIntNumberGet(), ASSERT, IntEnable(), and IntRegister().

{
    uint32_t ui32Int;

    //
    // Check the arguments.
    //
    ASSERT(_UARTBaseValid(ui32Base));

    //
    // Determine the interrupt number based on the UART port.
    //
    ui32Int = _UARTIntNumberGet(ui32Base);

    ASSERT(ui32Int != 0);

    //
    // Register the interrupt handler.
    //
    IntRegister(ui32Int, pfnHandler);

    //
    // Enable the UART interrupt.
    //
    IntEnable(ui32Int);
}

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uint32_t UARTIntStatus	(	uint32_t	ui32Base,
		bool	bMasked
	)

Gets the current interrupt status.

Parameters

ui32Base	is the base address of the UART port.
bMasked	is false if the raw interrupt status is required and true if the masked interrupt status is required.

This function returns the interrupt status for the specified UART. Either the raw interrupt status or the status of interrupts that are allowed to reflect to the processor can be returned.

Returns

Returns the current interrupt status, enumerated as a bit field of values described in UARTIntEnable().

Definition at line 1533 of file uart.c.

References ASSERT, HWREG, UART_O_MIS, and UART_O_RIS.

Referenced by s_Handler(), UART0_Handler(), uart_get_char_(), and uart_get_string_().

{
    //
    // Check the arguments.
    //
    ASSERT(_UARTBaseValid(ui32Base));

    //
    // Return either the interrupt status or the raw interrupt status as
    // requested.
    //
    if(bMasked)
    {
        return(HWREG(ui32Base + UART_O_MIS));
    }
    else
    {
        return(HWREG(ui32Base + UART_O_RIS));
    }
}

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void UARTIntUnregister

(

uint32_t

ui32Base

)

Unregisters an interrupt handler for a UART interrupt.

Parameters

ui32Base

is the base address of the UART port.

This function does the actual unregistering of the interrupt handler. It clears the handler to be called when a UART interrupt occurs. This function also masks off the interrupt in the interrupt controller so that the interrupt handler no longer is called.

See also

IntRegister() for important information about registering interrupt handlers.

Returns

None.

Definition at line 1414 of file uart.c.

References _UARTIntNumberGet(), ASSERT, IntDisable(), and IntUnregister().

{
    uint32_t ui32Int;

    //
    // Check the arguments.
    //
    ASSERT(_UARTBaseValid(ui32Base));

    //
    // Determine the interrupt number based on the UART port.
    //
    ui32Int = _UARTIntNumberGet(ui32Base);

    ASSERT(ui32Int != 0);

    //
    // Disable the interrupt.
    //
    IntDisable(ui32Int);

    //
    // Unregister the interrupt handler.
    //
    IntUnregister(ui32Int);
}

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void UARTModemControlClear	(	uint32_t	ui32Base,
		uint32_t	ui32Control
	)

Clears the states of the DTR and/or RTS modem control signals.

Parameters

ui32Base	is the base address of the UART port.
ui32Control	is a bit-mapped flag indicating which modem control bits should be set.

This function clears the states of the DTR or RTS modem handshake outputs from the UART.

The ui32Control parameter is the logical OR of any of the following:

• UART_OUTPUT_DTR - The modem control DTR signal
• UART_OUTPUT_RTS - The modem control RTS signal

Note

The availability of hardware modem handshake signals varies with the Tiva part and UART in use. Please consult the datasheet for the part you are using to determine whether this support is available.

Returns

None.

Definition at line 842 of file uart.c.

References ASSERT, HWREG, UART1_BASE, UART_O_CTL, UART_OUTPUT_DTR, and UART_OUTPUT_RTS.

{
    uint32_t ui32Temp;

    //
    // Check the arguments.
    //
    ASSERT(ui32Base == UART1_BASE);
    ASSERT((ui32Control & ~(UART_OUTPUT_RTS | UART_OUTPUT_DTR)) == 0);

    //
    // Set the appropriate modem control output bits.
    //
    ui32Temp = HWREG(ui32Base + UART_O_CTL);
    ui32Temp &= ~(ui32Control & (UART_OUTPUT_RTS | UART_OUTPUT_DTR));
    HWREG(ui32Base + UART_O_CTL) = ui32Temp;
}

uint32_t UARTModemControlGet

(

uint32_t

ui32Base

)

Gets the states of the DTR and RTS modem control signals.

Parameters

ui32Base

is the base address of the UART port.

This function returns the current states of each of the two UART modem control signals, DTR and RTS.

Note

The availability of hardware modem handshake signals varies with the Tiva part and UART in use. Please consult the datasheet for the part you are using to determine whether this support is available.

Returns

Returns the states of the handshake output signals. This value is a logical OR combination of values UART_OUTPUT_RTS and UART_OUTPUT_DTR where the presence of each flag indicates that the associated signal is asserted.

Definition at line 880 of file uart.c.

References ASSERT, HWREG, UART1_BASE, UART_O_CTL, UART_OUTPUT_DTR, and UART_OUTPUT_RTS.

{
    //
    // Check the arguments.
    //
    ASSERT(ui32Base == UART1_BASE);

    return(HWREG(ui32Base + UART_O_CTL) & (UART_OUTPUT_RTS | UART_OUTPUT_DTR));
}

void UARTModemControlSet	(	uint32_t	ui32Base,
		uint32_t	ui32Control
	)

Sets the states of the DTR and/or RTS modem control signals.

Parameters

ui32Base	is the base address of the UART port.
ui32Control	is a bit-mapped flag indicating which modem control bits should be set.

This function configures the states of the DTR or RTS modem handshake outputs from the UART.

The ui32Control parameter is the logical OR of any of the following:

• UART_OUTPUT_DTR - The modem control DTR signal
• UART_OUTPUT_RTS - The modem control RTS signal

Note

The availability of hardware modem handshake signals varies with the Tiva part and UART in use. Please consult the datasheet for the part you are using to determine whether this support is available.

Returns

None.

Definition at line 800 of file uart.c.

References ASSERT, HWREG, UART1_BASE, UART_O_CTL, UART_OUTPUT_DTR, and UART_OUTPUT_RTS.

{
    uint32_t ui32Temp;

    //
    // Check the arguments.
    //
    ASSERT(ui32Base == UART1_BASE);
    ASSERT((ui32Control & ~(UART_OUTPUT_RTS | UART_OUTPUT_DTR)) == 0);

    //
    // Set the appropriate modem control output bits.
    //
    ui32Temp = HWREG(ui32Base + UART_O_CTL);
    ui32Temp |= (ui32Control & (UART_OUTPUT_RTS | UART_OUTPUT_DTR));
    HWREG(ui32Base + UART_O_CTL) = ui32Temp;
}

uint32_t UARTModemStatusGet

(

uint32_t

ui32Base

)

Gets the states of the RI, DCD, DSR and CTS modem status signals.

Parameters

ui32Base

is the base address of the UART port.

This function returns the current states of each of the four UART modem status signals, RI, DCD, DSR and CTS.

Note

The availability of hardware modem handshake signals varies with the Tiva part and UART in use. Please consult the datasheet for the part you are using to determine whether this support is available.

Returns

Returns the states of the handshake output signals. This value is a logical OR combination of values UART_INPUT_RI, UART_INPUT_DCD, UART_INPUT_CTS and UART_INPUT_DSR where the presence of each flag indicates that the associated signal is asserted.

Definition at line 910 of file uart.c.

References ASSERT, HWREG, UART1_BASE, UART_INPUT_CTS, UART_INPUT_DCD, UART_INPUT_DSR, UART_INPUT_RI, and UART_O_FR.

{
    //
    // Check the arguments.
    //
    ASSERT(ui32Base == UART1_BASE);

    return(HWREG(ui32Base + UART_O_FR) & (UART_INPUT_RI | UART_INPUT_DCD |
                                          UART_INPUT_CTS | UART_INPUT_DSR));
}

uint32_t UARTParityModeGet

(

uint32_t

ui32Base

)

Gets the type of parity currently being used.

Parameters

ui32Base

is the base address of the UART port.

This function gets the type of parity used for transmitting data and expected when receiving data.

Returns

Returns the current parity settings, specified as one of UART_CONFIG_PAR_NONE, UART_CONFIG_PAR_EVEN, UART_CONFIG_PAR_ODD, UART_CONFIG_PAR_ONE, or UART_CONFIG_PAR_ZERO.

Definition at line 231 of file uart.c.

References ASSERT, HWREG, UART_LCRH_EPS, UART_LCRH_PEN, UART_LCRH_SPS, and UART_O_LCRH.

{
    //
    // Check the arguments.
    //
    ASSERT(_UARTBaseValid(ui32Base));

    //
    // Return the current parity setting.
    //
    return(HWREG(ui32Base + UART_O_LCRH) &
           (UART_LCRH_SPS | UART_LCRH_EPS | UART_LCRH_PEN));
}

void UARTParityModeSet	(	uint32_t	ui32Base,
		uint32_t	ui32Parity
	)

Sets the type of parity.

Parameters

ui32Base	is the base address of the UART port.
ui32Parity	specifies the type of parity to use.

This function configures the type of parity to use for transmitting and expect when receiving. The ui32Parity parameter must be one of UART_CONFIG_PAR_NONE, UART_CONFIG_PAR_EVEN, UART_CONFIG_PAR_ODD, UART_CONFIG_PAR_ONE, or UART_CONFIG_PAR_ZERO. The last two parameters allow direct control of the parity bit; it is always either one or zero based on the mode.

Returns

None.

Definition at line 196 of file uart.c.

References ASSERT, HWREG, UART_CONFIG_PAR_EVEN, UART_CONFIG_PAR_NONE, UART_CONFIG_PAR_ODD, UART_CONFIG_PAR_ONE, UART_CONFIG_PAR_ZERO, UART_LCRH_EPS, UART_LCRH_PEN, UART_LCRH_SPS, and UART_O_LCRH.

{
    //
    // Check the arguments.
    //
    ASSERT(_UARTBaseValid(ui32Base));
    ASSERT((ui32Parity == UART_CONFIG_PAR_NONE) ||
           (ui32Parity == UART_CONFIG_PAR_EVEN) ||
           (ui32Parity == UART_CONFIG_PAR_ODD) ||
           (ui32Parity == UART_CONFIG_PAR_ONE) ||
           (ui32Parity == UART_CONFIG_PAR_ZERO));

    //
    // Set the parity mode.
    //
    HWREG(ui32Base + UART_O_LCRH) = ((HWREG(ui32Base + UART_O_LCRH) &
                                      ~(UART_LCRH_SPS | UART_LCRH_EPS |
                                        UART_LCRH_PEN)) | ui32Parity);
}

void UARTRxErrorClear

(

uint32_t

ui32Base

)

Clears all reported receiver errors.

Parameters

ui32Base

is the base address of the UART port.

This function is used to clear all receiver error conditions reported via UARTRxErrorGet(). If using the overrun, framing error, parity error or break interrupts, this function must be called after clearing the interrupt to ensure that later errors of the same type trigger another interrupt.

Returns

None.

Definition at line 1708 of file uart.c.

References ASSERT, HWREG, and UART_O_ECR.

{
    //
    // Check the arguments.
    //
    ASSERT(_UARTBaseValid(ui32Base));

    //
    // Any write to the Error Clear Register clears all bits which are
    // currently set.
    //
    HWREG(ui32Base + UART_O_ECR) = 0;
}

uint32_t UARTRxErrorGet

(

uint32_t

ui32Base

)

Gets current receiver errors.

Parameters

ui32Base

is the base address of the UART port.

This function returns the current state of each of the 4 receiver error sources. The returned errors are equivalent to the four error bits returned via the previous call to UARTCharGet() or UARTCharGetNonBlocking() with the exception that the overrun error is set immediately when the overrun occurs rather than when a character is next read.

Returns

Returns a logical OR combination of the receiver error flags, UART_RXERROR_FRAMING, UART_RXERROR_PARITY, UART_RXERROR_BREAK and UART_RXERROR_OVERRUN.

Definition at line 1680 of file uart.c.

References ASSERT, HWREG, and UART_O_RSR.

{
    //
    // Check the arguments.
    //
    ASSERT(_UARTBaseValid(ui32Base));

    //
    // Return the current value of the receive status register.
    //
    return(HWREG(ui32Base + UART_O_RSR) & 0x0000000F);
}

void UARTSmartCardDisable

(

uint32_t

ui32Base

)

Disables ISO7816 smart card mode on the specified UART.

Parameters

ui32Base

is the base address of the UART port.

This function clears the SMART (ISO7816 smart card) bit in the UART control register.

Note

The availability of ISO7816 smart card mode varies with the Tiva part and UART in use. Please consult the datasheet for the part you are using to determine whether this support is available.

Returns

None.

Definition at line 763 of file uart.c.

References ASSERT, HWREG, UART_CTL_SMART, and UART_O_CTL.

{
    //
    // Check the arguments.
    //
    ASSERT(_UARTBaseValid(ui32Base));

    //
    // Disable the SMART bit.
    //
    HWREG(ui32Base + UART_O_CTL) &= ~UART_CTL_SMART;
}

void UARTSmartCardEnable

(

uint32_t

ui32Base

)

Enables ISO7816 smart card mode on the specified UART.

Parameters

ui32Base

is the base address of the UART port.

This function enables the SMART control bit for the ISO7816 smart card mode on the UART. This call also sets 8-bit word length and even parity as required by ISO7816.

Note

The availability of ISO7816 smart card mode varies with the Tiva part and UART in use. Please consult the datasheet for the part you are using to determine whether this support is available.

Returns

None.

Definition at line 719 of file uart.c.

References ASSERT, HWREG, UART_CTL_SMART, UART_LCRH_EPS, UART_LCRH_PEN, UART_LCRH_SPS, UART_LCRH_STP2, UART_LCRH_WLEN_8, UART_LCRH_WLEN_M, UART_O_CTL, and UART_O_LCRH.

{
    uint32_t ui32Val;

    //
    // Check the arguments.
    //
    ASSERT(_UARTBaseValid(ui32Base));

    //
    // Set 8-bit word length, even parity, 2 stop bits (note that although the
    // STP2 bit is ignored when in smartcard mode, this code lets the caller
    // read back the actual setting in use).
    //
    ui32Val = HWREG(ui32Base + UART_O_LCRH);
    ui32Val &= ~(UART_LCRH_SPS | UART_LCRH_EPS | UART_LCRH_PEN |
                 UART_LCRH_WLEN_M);
    ui32Val |= UART_LCRH_WLEN_8 | UART_LCRH_PEN | UART_LCRH_EPS |
               UART_LCRH_STP2;
    HWREG(ui32Base + UART_O_LCRH) = ui32Val;

    //
    // Enable SMART mode.
    //
    HWREG(ui32Base + UART_O_CTL) |= UART_CTL_SMART;
}

bool UARTSpaceAvail

(

uint32_t

ui32Base

)

Determines if there is any space in the transmit FIFO.

Parameters

ui32Base

is the base address of the UART port.

This function returns a flag indicating whether or not there is space available in the transmit FIFO.

Returns

Returns true if there is space available in the transmit FIFO or false if there is no space available in the transmit FIFO.

Definition at line 1114 of file uart.c.

References ASSERT, HWREG, UART_FR_TXFF, and UART_O_FR.

{
    //
    // Check the arguments.
    //
    ASSERT(_UARTBaseValid(ui32Base));

    //
    // Return the availability of space.
    //
    return((HWREG(ui32Base + UART_O_FR) & UART_FR_TXFF) ? false : true);
}

uint32_t UARTTxIntModeGet

(

uint32_t

ui32Base

)

Returns the current operating mode for the UART transmit interrupt.

Parameters

ui32Base

is the base address of the UART port.

This function returns the current operating mode for the UART transmit interrupt. The return value is UART_TXINT_MODE_EOT if the transmit interrupt is currently configured to be asserted once the transmitter is completely idle - the transmit FIFO is empty and all bits, including any stop bits, have cleared the transmitter. The return value is UART_TXINT_MODE_FIFO if the interrupt is configured to be asserted based on the level of the transmit FIFO.

Note

The availability of end-of-transmission mode varies with the Tiva part in use. Please consult the datasheet for the part you are using to determine whether this support is available.

Returns

Returns UART_TXINT_MODE_FIFO or UART_TXINT_MODE_EOT.

Definition at line 1059 of file uart.c.

References ASSERT, HWREG, UART_O_CTL, UART_TXINT_MODE_EOT, and UART_TXINT_MODE_FIFO.

{
    //
    // Check the arguments.
    //
    ASSERT(_UARTBaseValid(ui32Base));

    //
    // Return the current transmit interrupt mode.
    //
    return(HWREG(ui32Base + UART_O_CTL) & (UART_TXINT_MODE_EOT |
                                           UART_TXINT_MODE_FIFO));
}

void UARTTxIntModeSet	(	uint32_t	ui32Base,
		uint32_t	ui32Mode
	)

Sets the operating mode for the UART transmit interrupt.

Parameters

ui32Base	is the base address of the UART port.
ui32Mode	is the operating mode for the transmit interrupt. It may be UART_TXINT_MODE_EOT to trigger interrupts when the transmitter is idle or UART_TXINT_MODE_FIFO to trigger based on the current transmit FIFO level.

This function allows the mode of the UART transmit interrupt to be set. By default, the transmit interrupt is asserted when the FIFO level falls past a threshold set via a call to UARTFIFOLevelSet(). Alternatively, if this function is called with ui32Mode set to UART_TXINT_MODE_EOT, the transmit interrupt is asserted once the transmitter is completely idle - the transmit FIFO is empty and all bits, including any stop bits, have cleared the transmitter.

Note

The availability of end-of-transmission mode varies with the Tiva part in use. Please consult the datasheet for the part you are using to determine whether this support is available.

Returns

None.

Definition at line 1020 of file uart.c.

References ASSERT, HWREG, UART_O_CTL, UART_TXINT_MODE_EOT, and UART_TXINT_MODE_FIFO.

{
    //
    // Check the arguments.
    //
    ASSERT(_UARTBaseValid(ui32Base));
    ASSERT((ui32Mode == UART_TXINT_MODE_EOT) ||
           (ui32Mode == UART_TXINT_MODE_FIFO));

    //
    // Set or clear the EOT bit of the UART control register as appropriate.
    //
    HWREG(ui32Base + UART_O_CTL) = ((HWREG(ui32Base + UART_O_CTL) &
                                     ~(UART_TXINT_MODE_EOT |
                                       UART_TXINT_MODE_FIFO)) | ui32Mode);
}

Variable Documentation

const uint32_t g_ppui32UARTIntMap[][2]

static

Initial value:

=
{
    { UART0_BASE, INT_UART0_TM4C123 },
    { UART1_BASE, INT_UART1_TM4C123 },
    { UART2_BASE, INT_UART2_TM4C123 },
    { UART3_BASE, INT_UART3_TM4C123 },
    { UART4_BASE, INT_UART4_TM4C123 },
    { UART5_BASE, INT_UART5_TM4C123 },
    { UART6_BASE, INT_UART6_TM4C123 },
    { UART7_BASE, INT_UART7_TM4C123 },
}

Definition at line 71 of file uart.c.

Referenced by _UARTIntNumberGet().

const uint32_t g_ppui32UARTIntMapSnowflake[][2]

static

Initial value:

=
{
    { UART0_BASE, INT_UART0_TM4C129 },
    { UART1_BASE, INT_UART1_TM4C129 },
    { UART2_BASE, INT_UART2_TM4C129 },
    { UART3_BASE, INT_UART3_TM4C129 },
    { UART4_BASE, INT_UART4_TM4C129 },
    { UART5_BASE, INT_UART5_TM4C129 },
    { UART6_BASE, INT_UART6_TM4C129 },
    { UART7_BASE, INT_UART7_TM4C129 },
}

Definition at line 84 of file uart.c.

Referenced by _UARTIntNumberGet().

const uint_fast8_t g_ui8UARTIntMapRows

static

Initial value:

=
    sizeof(g_ppui32UARTIntMap) / sizeof(g_ppui32UARTIntMap[0])

Definition at line 82 of file uart.c.

Referenced by _UARTIntNumberGet().

const uint_fast8_t g_ui8UARTIntMapRowsSnowflake

static

Initial value:

=
    sizeof(g_ppui32UARTIntMapSnowflake) /
    sizeof(g_ppui32UARTIntMapSnowflake[0])

Definition at line 95 of file uart.c.

Referenced by _UARTIntNumberGet().