Watchdog_api

Functions
bool	WatchdogRunning (uint32_t ui32Base)
void	WatchdogEnable (uint32_t ui32Base)
void	WatchdogResetEnable (uint32_t ui32Base)
void	WatchdogResetDisable (uint32_t ui32Base)
void	WatchdogLock (uint32_t ui32Base)
void	WatchdogUnlock (uint32_t ui32Base)
bool	WatchdogLockState (uint32_t ui32Base)
void	WatchdogReloadSet (uint32_t ui32Base, uint32_t ui32LoadVal)
uint32_t	WatchdogReloadGet (uint32_t ui32Base)
uint32_t	WatchdogValueGet (uint32_t ui32Base)
void	WatchdogIntRegister (uint32_t ui32Base, void(*pfnHandler)(void))
void	WatchdogIntUnregister (uint32_t ui32Base)
void	WatchdogIntEnable (uint32_t ui32Base)
uint32_t	WatchdogIntStatus (uint32_t ui32Base, bool bMasked)
void	WatchdogIntClear (uint32_t ui32Base)
void	WatchdogIntTypeSet (uint32_t ui32Base, uint32_t ui32Type)
void	WatchdogStallEnable (uint32_t ui32Base)
void	WatchdogStallDisable (uint32_t ui32Base)

Detailed Description

Function Documentation

void WatchdogEnable

(

uint32_t

ui32Base

)

Enables the watchdog timer.

Parameters

ui32Base

is the base address of the watchdog timer module.

This function enables the watchdog timer counter and interrupt.

Note

This function has no effect if the watchdog timer has been locked.

Returns

None.

Definition at line 97 of file watchdog.c.

References ASSERT, HWREG, WATCHDOG0_BASE, WATCHDOG1_BASE, WDT_CTL_INTEN, and WDT_O_CTL.

{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == WATCHDOG0_BASE) || (ui32Base == WATCHDOG1_BASE));

    //
    // Enable the watchdog timer module.
    //
    HWREG(ui32Base + WDT_O_CTL) |= WDT_CTL_INTEN;
}

void WatchdogIntClear

(

uint32_t

ui32Base

)

Clears the watchdog timer interrupt.

Parameters

ui32Base

is the base address of the watchdog timer module.

The watchdog timer interrupt source is cleared, so that it no longer asserts.

Note

Because there is a write buffer in the Cortex-M processor, it may take several clock cycles before the interrupt source is actually cleared. Therefore, it is recommended that the interrupt source be cleared early in the interrupt handler (as opposed to the very last action) to avoid returning from the interrupt handler before the interrupt source is actually cleared. Failure to do so may result in the interrupt handler being immediately reentered (because the interrupt controller still sees the interrupt source asserted). This function has no effect if the watchdog timer has been locked.

Returns

None.

Definition at line 501 of file watchdog.c.

References ASSERT, HWREG, WATCHDOG0_BASE, WATCHDOG1_BASE, WDT_O_ICR, and WDT_RIS_WDTRIS.

{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == WATCHDOG0_BASE) || (ui32Base == WATCHDOG1_BASE));

    //
    // Clear the interrupt source.
    //
    HWREG(ui32Base + WDT_O_ICR) = WDT_RIS_WDTRIS;
}

void WatchdogIntEnable

(

uint32_t

ui32Base

)

Enables the watchdog timer interrupt.

Parameters

ui32Base

is the base address of the watchdog timer module.

This function enables the watchdog timer interrupt.

Note

This function has no effect if the watchdog timer has been locked.

Returns

None.

Definition at line 427 of file watchdog.c.

References ASSERT, HWREG, WATCHDOG0_BASE, WATCHDOG1_BASE, WDT_CTL_INTEN, and WDT_O_CTL.

{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == WATCHDOG0_BASE) || (ui32Base == WATCHDOG1_BASE));

    //
    // Enable the watchdog interrupt.
    //
    HWREG(ui32Base + WDT_O_CTL) |= WDT_CTL_INTEN;
}

void WatchdogIntRegister	(	uint32_t	ui32Base,
		void(*)(void)	pfnHandler
	)

Registers an interrupt handler for the watchdog timer interrupt.

Parameters

ui32Base	is the base address of the watchdog timer module.
pfnHandler	is a pointer to the function to be called when the watchdog timer interrupt occurs.

This function does the actual registering of the interrupt handler. This function also enables the global interrupt in the interrupt controller; the watchdog timer interrupt must be enabled via WatchdogEnable(). It is the interrupt handler's responsibility to clear the interrupt source via WatchdogIntClear().

See also

IntRegister() for important information about registering interrupt handlers.

Note

For parts with a watchdog timer module that has the ability to generate an NMI instead of a standard interrupt, this function registers the standard watchdog interrupt handler. To register the NMI watchdog handler, use IntRegister() to register the handler for the FAULT_NMI interrupt.

Returns

None.

Definition at line 353 of file watchdog.c.

References ASSERT, INT_WATCHDOG_TM4C123, IntEnable(), IntRegister(), WATCHDOG0_BASE, and WATCHDOG1_BASE.

{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == WATCHDOG0_BASE) || (ui32Base == WATCHDOG1_BASE));

    //
    // Register the interrupt handler.
    //
    IntRegister(INT_WATCHDOG_TM4C123, pfnHandler);

    //
    // Enable the watchdog timer interrupt.
    //
    IntEnable(INT_WATCHDOG_TM4C123);
}

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uint32_t WatchdogIntStatus	(	uint32_t	ui32Base,
		bool	bMasked
	)

Gets the current watchdog timer interrupt status.

Parameters

ui32Base	is the base address of the watchdog timer module.
bMasked	is false if the raw interrupt status is required and true if the masked interrupt status is required.

This function returns the interrupt status for the watchdog timer module. Either the raw interrupt status or the status of interrupt that is allowed to reflect to the processor can be returned.

Returns

Returns the current interrupt status, where a 1 indicates that the watchdog interrupt is active, and a 0 indicates that it is not active.

Definition at line 457 of file watchdog.c.

References ASSERT, HWREG, WATCHDOG0_BASE, WATCHDOG1_BASE, WDT_O_MIS, and WDT_O_RIS.

{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == WATCHDOG0_BASE) || (ui32Base == WATCHDOG1_BASE));

    //
    // Return either the interrupt status or the raw interrupt status as
    // requested.
    //
    if(bMasked)
    {
        return(HWREG(ui32Base + WDT_O_MIS));
    }
    else
    {
        return(HWREG(ui32Base + WDT_O_RIS));
    }
}

void WatchdogIntTypeSet	(	uint32_t	ui32Base,
		uint32_t	ui32Type
	)

Sets the type of interrupt generated by the watchdog.

Parameters

ui32Base	is the base address of the watchdog timer module.
ui32Type	is the type of interrupt to generate.

This function sets the type of interrupt that is generated if the watchdog timer expires. ui32Type can be either WATCHDOG_INT_TYPE_INT to generate a standard interrupt (the default) or WATCHDOG_INT_TYPE_NMI to generate a non-maskable interrupt (NMI).

When configured to generate an NMI, the watchdog interrupt must still be enabled with WatchdogIntEnable(), and it must still be cleared inside the NMI handler with WatchdogIntClear().

Note

The ability to select an NMI interrupt varies with the Tiva part in use. Please consult the datasheet for the part you are using to determine whether this support is available. This function has no effect if the watchdog timer has been locked.

Returns

None.

Definition at line 539 of file watchdog.c.

References ASSERT, HWREG, WATCHDOG0_BASE, WATCHDOG1_BASE, WATCHDOG_INT_TYPE_INT, WATCHDOG_INT_TYPE_NMI, WDT_CTL_INTTYPE, and WDT_O_CTL.

{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == WATCHDOG0_BASE) || (ui32Base == WATCHDOG1_BASE));
    ASSERT((ui32Type == WATCHDOG_INT_TYPE_INT) ||
           (ui32Type == WATCHDOG_INT_TYPE_NMI));

    //
    // Set the interrupt type.
    //
    HWREG(ui32Base + WDT_O_CTL) = (HWREG(ui32Base + WDT_O_CTL) &
                                   ~WDT_CTL_INTTYPE) | ui32Type;
}

void WatchdogIntUnregister

(

uint32_t

ui32Base

)

Unregisters an interrupt handler for the watchdog timer interrupt.

Parameters

ui32Base

is the base address of the watchdog timer module.

This function does the actual unregistering of the interrupt handler. This function clears the handler to be called when a watchdog timer interrupt occurs. This function also masks off the interrupt in the interrupt controller so that the interrupt handler no longer is called.

See also

IntRegister() for important information about registering interrupt handlers.

Note

For parts with a watchdog timer module that has the ability to generate an NMI instead of a standard interrupt, this function unregisters the standard watchdog interrupt handler. To unregister the NMI watchdog handler, use IntUnregister() to unregister the handler for the FAULT_NMI interrupt.

Returns

None.

Definition at line 395 of file watchdog.c.

References ASSERT, INT_WATCHDOG_TM4C123, IntDisable(), IntUnregister(), WATCHDOG0_BASE, and WATCHDOG1_BASE.

{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == WATCHDOG0_BASE) || (ui32Base == WATCHDOG1_BASE));

    //
    // Disable the interrupt.
    //
    IntDisable(INT_WATCHDOG_TM4C123);

    //
    // Unregister the interrupt handler.
    //
    IntUnregister(INT_WATCHDOG_TM4C123);
}

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void WatchdogLock

(

uint32_t

ui32Base

)

Enables the watchdog timer lock mechanism.

Parameters

ui32Base

is the base address of the watchdog timer module.

This function locks out write access to the watchdog timer registers.

Returns

None.

Definition at line 178 of file watchdog.c.

References ASSERT, HWREG, WATCHDOG0_BASE, WATCHDOG1_BASE, WDT_LOCK_LOCKED, and WDT_O_LOCK.

{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == WATCHDOG0_BASE) || (ui32Base == WATCHDOG1_BASE));

    //
    // Lock out watchdog register writes.  Writing anything to the WDT_O_LOCK
    // register causes the lock to go into effect.
    //
    HWREG(ui32Base + WDT_O_LOCK) = WDT_LOCK_LOCKED;
}

bool WatchdogLockState

(

uint32_t

ui32Base

)

Gets the state of the watchdog timer lock mechanism.

Parameters

ui32Base

is the base address of the watchdog timer module.

This function returns the lock state of the watchdog timer registers.

Returns

Returns true if the watchdog timer registers are locked, and false if they are not locked.

Definition at line 230 of file watchdog.c.

References ASSERT, HWREG, WATCHDOG0_BASE, WATCHDOG1_BASE, WDT_LOCK_LOCKED, and WDT_O_LOCK.

{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == WATCHDOG0_BASE) || (ui32Base == WATCHDOG1_BASE));

    //
    // Get the lock state.
    //
    return((HWREG(ui32Base + WDT_O_LOCK) == WDT_LOCK_LOCKED) ? true : false);
}

uint32_t WatchdogReloadGet

(

uint32_t

ui32Base

)

Gets the watchdog timer reload value.

Parameters

ui32Base

is the base address of the watchdog timer module.

This function gets the value that is loaded into the watchdog timer when the count reaches zero for the first time.

Returns

None.

Definition at line 288 of file watchdog.c.

References ASSERT, HWREG, WATCHDOG0_BASE, WATCHDOG1_BASE, and WDT_O_LOAD.

{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == WATCHDOG0_BASE) || (ui32Base == WATCHDOG1_BASE));

    //
    // Get the load register.
    //
    return(HWREG(ui32Base + WDT_O_LOAD));
}

void WatchdogReloadSet	(	uint32_t	ui32Base,
		uint32_t	ui32LoadVal
	)

Sets the watchdog timer reload value.

Parameters

ui32Base	is the base address of the watchdog timer module.
ui32LoadVal	is the load value for the watchdog timer.

This function configures the value to load into the watchdog timer when the count reaches zero for the first time; if the watchdog timer is running when this function is called, then the value is immediately loaded into the watchdog timer counter. If the ui32LoadVal parameter is 0, then an interrupt is immediately generated.

Note

This function has no effect if the watchdog timer has been locked.

Returns

None.

Definition at line 262 of file watchdog.c.

References ASSERT, HWREG, WATCHDOG0_BASE, WATCHDOG1_BASE, and WDT_O_LOAD.

{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == WATCHDOG0_BASE) || (ui32Base == WATCHDOG1_BASE));

    //
    // Set the load register.
    //
    HWREG(ui32Base + WDT_O_LOAD) = ui32LoadVal;
}

void WatchdogResetDisable

(

uint32_t

ui32Base

)

Disables the watchdog timer reset.

Parameters

ui32Base

is the base address of the watchdog timer module.

This function disables the capability of the watchdog timer to issue a reset to the processor after a second timeout condition.

Note

This function has no effect if the watchdog timer has been locked.

Returns

None.

Definition at line 153 of file watchdog.c.

References ASSERT, HWREG, WATCHDOG0_BASE, WATCHDOG1_BASE, WDT_CTL_RESEN, and WDT_O_CTL.

{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == WATCHDOG0_BASE) || (ui32Base == WATCHDOG1_BASE));

    //
    // Disable the watchdog reset.
    //
    HWREG(ui32Base + WDT_O_CTL) &= ~(WDT_CTL_RESEN);
}

void WatchdogResetEnable

(

uint32_t

ui32Base

)

Enables the watchdog timer reset.

Parameters

ui32Base

is the base address of the watchdog timer module.

This function enables the capability of the watchdog timer to issue a reset to the processor after a second timeout condition.

Note

This function has no effect if the watchdog timer has been locked.

Returns

None.

Definition at line 125 of file watchdog.c.

References ASSERT, HWREG, WATCHDOG0_BASE, WATCHDOG1_BASE, WDT_CTL_RESEN, and WDT_O_CTL.

{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == WATCHDOG0_BASE) || (ui32Base == WATCHDOG1_BASE));

    //
    // Enable the watchdog reset.
    //
    HWREG(ui32Base + WDT_O_CTL) |= WDT_CTL_RESEN;
}

bool WatchdogRunning

(

uint32_t

ui32Base

)

Determines if the watchdog timer is enabled.

Parameters

ui32Base

is the base address of the watchdog timer module.

This function checks to see if the watchdog timer is enabled.

Returns

Returns true if the watchdog timer is enabled and false if it is not.

Definition at line 70 of file watchdog.c.

References ASSERT, HWREG, WATCHDOG0_BASE, WATCHDOG1_BASE, WDT_CTL_INTEN, and WDT_O_CTL.

{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == WATCHDOG0_BASE) || (ui32Base == WATCHDOG1_BASE));

    //
    // See if the watchdog timer module is enabled, and return.
    //
    return(HWREG(ui32Base + WDT_O_CTL) & WDT_CTL_INTEN);
}

void WatchdogStallDisable

(

uint32_t

ui32Base

)

Disables stalling of the watchdog timer during debug events.

Parameters

ui32Base

is the base address of the watchdog timer module.

This function disables the debug mode stall of the watchdog timer. By doing so, the watchdog timer continues to count regardless of the processor debug state.

Note

This function has no effect if the watchdog timer has been locked.

Returns

None.

Definition at line 604 of file watchdog.c.

References ASSERT, HWREG, WATCHDOG0_BASE, WATCHDOG1_BASE, WDT_O_TEST, and WDT_TEST_STALL.

{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == WATCHDOG0_BASE) || (ui32Base == WATCHDOG1_BASE));

    //
    // Disable timer stalling.
    //
    HWREG(ui32Base + WDT_O_TEST) &= ~(WDT_TEST_STALL);
}

void WatchdogStallEnable

(

uint32_t

ui32Base

)

Enables stalling of the watchdog timer during debug events.

Parameters

ui32Base

is the base address of the watchdog timer module.

This function allows the watchdog timer to stop counting when the processor is stopped by the debugger. By doing so, the watchdog is prevented from expiring (typically almost immediately from a human time perspective) and resetting the system (if reset is enabled). The watchdog instead expires after the appropriate number of processor cycles have been executed while debugging (or at the appropriate time after the processor has been restarted).

Note

This function has no effect if the watchdog timer has been locked.

Returns

None.

Definition at line 575 of file watchdog.c.

References ASSERT, HWREG, WATCHDOG0_BASE, WATCHDOG1_BASE, WDT_O_TEST, and WDT_TEST_STALL.

{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == WATCHDOG0_BASE) || (ui32Base == WATCHDOG1_BASE));

    //
    // Enable timer stalling.
    //
    HWREG(ui32Base + WDT_O_TEST) |= WDT_TEST_STALL;
}

void WatchdogUnlock

(

uint32_t

ui32Base

)

Disables the watchdog timer lock mechanism.

Parameters

ui32Base

is the base address of the watchdog timer module.

This function enables write access to the watchdog timer registers.

Returns

None.

Definition at line 204 of file watchdog.c.

References ASSERT, HWREG, WATCHDOG0_BASE, WATCHDOG1_BASE, WDT_LOCK_UNLOCK, and WDT_O_LOCK.

{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == WATCHDOG0_BASE) || (ui32Base == WATCHDOG1_BASE));

    //
    // Unlock watchdog register writes.
    //
    HWREG(ui32Base + WDT_O_LOCK) = WDT_LOCK_UNLOCK;
}

uint32_t WatchdogValueGet

(

uint32_t

ui32Base

)

Gets the current watchdog timer value.

Parameters

ui32Base

is the base address of the watchdog timer module.

This function reads the current value of the watchdog timer.

Returns

Returns the current value of the watchdog timer.

Definition at line 313 of file watchdog.c.

References ASSERT, HWREG, WATCHDOG0_BASE, WATCHDOG1_BASE, and WDT_O_VALUE.

{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == WATCHDOG0_BASE) || (ui32Base == WATCHDOG1_BASE));

    //
    // Get the current watchdog timer register value.
    //
    return(HWREG(ui32Base + WDT_O_VALUE));
}