EE445M RTOS
Taken at the University of Texas Spring 2015
Usb_api

Macros

#define USB_INTEP_RX_SHIFT   16
 
#define USB_RX_EPSTATUS_SHIFT   16
 
#define EP_OFFSET(Endpoint)   (Endpoint - 0x10)
 

Functions

static void _USBIndexWrite (uint32_t ui32Base, uint32_t ui32Endpoint, uint32_t ui32IndexedReg, uint32_t ui32Value, uint32_t ui32Size)
 
static uint32_t _USBIndexRead (uint32_t ui32Base, uint32_t ui32Endpoint, uint32_t ui32IndexedReg, uint32_t ui32Size)
 
void USBHostSuspend (uint32_t ui32Base)
 
void USBHostReset (uint32_t ui32Base, bool bStart)
 
void USBHighSpeed (uint32_t ui32Base, bool bEnable)
 
void USBHostResume (uint32_t ui32Base, bool bStart)
 
uint32_t USBHostSpeedGet (uint32_t ui32Base)
 
uint32_t USBDevSpeedGet (uint32_t ui32Base)
 
void USBIntDisableControl (uint32_t ui32Base, uint32_t ui32Flags)
 
void USBIntEnableControl (uint32_t ui32Base, uint32_t ui32Flags)
 
uint32_t USBIntStatusControl (uint32_t ui32Base)
 
void USBIntDisableEndpoint (uint32_t ui32Base, uint32_t ui32Flags)
 
void USBIntEnableEndpoint (uint32_t ui32Base, uint32_t ui32Flags)
 
uint32_t USBIntStatusEndpoint (uint32_t ui32Base)
 
static uint32_t _USBIntNumberGet (uint32_t ui32Base)
 
void USBIntRegister (uint32_t ui32Base, void(*pfnHandler)(void))
 
void USBIntUnregister (uint32_t ui32Base)
 
uint32_t USBEndpointStatus (uint32_t ui32Base, uint32_t ui32Endpoint)
 
void USBHostEndpointStatusClear (uint32_t ui32Base, uint32_t ui32Endpoint, uint32_t ui32Flags)
 
void USBDevEndpointStatusClear (uint32_t ui32Base, uint32_t ui32Endpoint, uint32_t ui32Flags)
 
void USBHostEndpointDataToggle (uint32_t ui32Base, uint32_t ui32Endpoint, bool bDataToggle, uint32_t ui32Flags)
 
void USBEndpointDataToggleClear (uint32_t ui32Base, uint32_t ui32Endpoint, uint32_t ui32Flags)
 
void USBHostEndpointPing (uint32_t ui32Base, uint32_t ui32Endpoint, bool bEnable)
 
void USBDevEndpointStall (uint32_t ui32Base, uint32_t ui32Endpoint, uint32_t ui32Flags)
 
void USBDevEndpointStallClear (uint32_t ui32Base, uint32_t ui32Endpoint, uint32_t ui32Flags)
 
void USBDevConnect (uint32_t ui32Base)
 
void USBDevDisconnect (uint32_t ui32Base)
 
void USBDevAddrSet (uint32_t ui32Base, uint32_t ui32Address)
 
uint32_t USBDevAddrGet (uint32_t ui32Base)
 
void USBHostEndpointConfig (uint32_t ui32Base, uint32_t ui32Endpoint, uint32_t ui32MaxPayload, uint32_t ui32NAKPollInterval, uint32_t ui32TargetEndpoint, uint32_t ui32Flags)
 
void USBHostEndpointSpeed (uint32_t ui32Base, uint32_t ui32Endpoint, uint32_t ui32Flags)
 
void USBDevEndpointConfigSet (uint32_t ui32Base, uint32_t ui32Endpoint, uint32_t ui32MaxPacketSize, uint32_t ui32Flags)
 
void USBDevEndpointConfigGet (uint32_t ui32Base, uint32_t ui32Endpoint, uint32_t *pui32MaxPacketSize, uint32_t *pui32Flags)
 
void USBFIFOConfigSet (uint32_t ui32Base, uint32_t ui32Endpoint, uint32_t ui32FIFOAddress, uint32_t ui32FIFOSize, uint32_t ui32Flags)
 
void USBFIFOConfigGet (uint32_t ui32Base, uint32_t ui32Endpoint, uint32_t *pui32FIFOAddress, uint32_t *pui32FIFOSize, uint32_t ui32Flags)
 
void USBEndpointDMAConfigSet (uint32_t ui32Base, uint32_t ui32Endpoint, uint32_t ui32Config)
 
void USBEndpointDMAEnable (uint32_t ui32Base, uint32_t ui32Endpoint, uint32_t ui32Flags)
 
void USBEndpointDMADisable (uint32_t ui32Base, uint32_t ui32Endpoint, uint32_t ui32Flags)
 
uint32_t USBEndpointDataAvail (uint32_t ui32Base, uint32_t ui32Endpoint)
 
int32_t USBEndpointDataGet (uint32_t ui32Base, uint32_t ui32Endpoint, uint8_t *pui8Data, uint32_t *pui32Size)
 
void USBDevEndpointDataAck (uint32_t ui32Base, uint32_t ui32Endpoint, bool bIsLastPacket)
 
void USBHostEndpointDataAck (uint32_t ui32Base, uint32_t ui32Endpoint)
 
int32_t USBEndpointDataPut (uint32_t ui32Base, uint32_t ui32Endpoint, uint8_t *pui8Data, uint32_t ui32Size)
 
int32_t USBEndpointDataSend (uint32_t ui32Base, uint32_t ui32Endpoint, uint32_t ui32TransType)
 
void USBFIFOFlush (uint32_t ui32Base, uint32_t ui32Endpoint, uint32_t ui32Flags)
 
void USBHostRequestIN (uint32_t ui32Base, uint32_t ui32Endpoint)
 
void USBHostRequestINClear (uint32_t ui32Base, uint32_t ui32Endpoint)
 
void USBHostRequestStatus (uint32_t ui32Base)
 
void USBHostAddrSet (uint32_t ui32Base, uint32_t ui32Endpoint, uint32_t ui32Addr, uint32_t ui32Flags)
 
uint32_t USBHostAddrGet (uint32_t ui32Base, uint32_t ui32Endpoint, uint32_t ui32Flags)
 
void USBHostHubAddrSet (uint32_t ui32Base, uint32_t ui32Endpoint, uint32_t ui32Addr, uint32_t ui32Flags)
 
uint32_t USBHostHubAddrGet (uint32_t ui32Base, uint32_t ui32Endpoint, uint32_t ui32Flags)
 
void USBHostPwrConfig (uint32_t ui32Base, uint32_t ui32Flags)
 
void USBHostPwrFaultEnable (uint32_t ui32Base)
 
void USBHostPwrFaultDisable (uint32_t ui32Base)
 
void USBHostPwrEnable (uint32_t ui32Base)
 
void USBHostPwrDisable (uint32_t ui32Base)
 
uint32_t USBFrameNumberGet (uint32_t ui32Base)
 
void USBOTGSessionRequest (uint32_t ui32Base, bool bStart)
 
uint32_t USBFIFOAddrGet (uint32_t ui32Base, uint32_t ui32Endpoint)
 
uint32_t USBModeGet (uint32_t ui32Base)
 
void USBEndpointDMAChannel (uint32_t ui32Base, uint32_t ui32Endpoint, uint32_t ui32Channel)
 
void USBHostMode (uint32_t ui32Base)
 
void USBDevMode (uint32_t ui32Base)
 
void USBOTGMode (uint32_t ui32Base)
 
void USBModeConfig (uint32_t ui32Base, uint32_t ui32Mode)
 
void USBPHYPowerOff (uint32_t ui32Base)
 
void USBPHYPowerOn (uint32_t ui32Base)
 
void USBEndpointPacketCountSet (uint32_t ui32Base, uint32_t ui32Endpoint, uint32_t ui32Count)
 
uint32_t USBNumEndpointsGet (uint32_t ui32Base)
 
uint32_t USBControllerVersion (uint32_t ui32Base)
 
void USBClockEnable (uint32_t ui32Base, uint32_t ui32Div, uint32_t ui32Flags)
 
void USBClockDisable (uint32_t ui32Base)
 

Detailed Description

Macro Definition Documentation

#define USB_INTEP_RX_SHIFT   16

Definition at line 66 of file usb.c.

Referenced by USBIntDisableEndpoint(), USBIntEnableEndpoint(), and USBIntStatusEndpoint().

#define USB_RX_EPSTATUS_SHIFT   16

Definition at line 74 of file usb.c.

Referenced by USBDevEndpointStatusClear(), USBEndpointStatus(), and USBHostEndpointStatusClear().

Function Documentation

static uint32_t _USBIndexRead ( uint32_t  ui32Base,
uint32_t  ui32Endpoint,
uint32_t  ui32IndexedReg,
uint32_t  ui32Size 
)
static

Definition at line 164 of file usb.c.

References ASSERT, HWREGB, HWREGH, USB0_BASE, and USB_O_EPIDX.

Referenced by USBFIFOConfigGet().

166 {
167  uint8_t ui8Index;
168  uint8_t ui8Value;
169 
170  //
171  // Check the arguments.
172  //
173  ASSERT(ui32Base == USB0_BASE);
174  ASSERT((ui32Endpoint == 0) || (ui32Endpoint == 1) || (ui32Endpoint == 2) ||
175  (ui32Endpoint == 3));
176  ASSERT((ui32Size == 1) || (ui32Size == 2));
177 
178  //
179  // Save the old index in case it was in use.
180  //
181  ui8Index = HWREGB(ui32Base + USB_O_EPIDX);
182 
183  //
184  // Set the index.
185  //
186  HWREGB(ui32Base + USB_O_EPIDX) = ui32Endpoint;
187 
188  //
189  // Determine the size of the register value.
190  //
191  if(ui32Size == 1)
192  {
193  //
194  // Get the value.
195  //
196  ui8Value = HWREGB(ui32Base + ui32IndexedReg);
197  }
198  else
199  {
200  //
201  // Get the value.
202  //
203  ui8Value = HWREGH(ui32Base + ui32IndexedReg);
204  }
205 
206  //
207  // Restore the old index in case it was in use.
208  //
209  HWREGB(ui32Base + USB_O_EPIDX) = ui8Index;
210 
211  //
212  // Return the register's value.
213  //
214  return(ui8Value);
215 }
#define ASSERT(expr)
Definition: debug.h:67
#define USB_O_EPIDX
Definition: hw_usb.h:57
#define HWREGH(x)
Definition: hw_types.h:50
#define HWREGB(x)
Definition: hw_types.h:52
#define USB0_BASE
Definition: hw_memmap.h:99

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static void _USBIndexWrite ( uint32_t  ui32Base,
uint32_t  ui32Endpoint,
uint32_t  ui32IndexedReg,
uint32_t  ui32Value,
uint32_t  ui32Size 
)
static

Definition at line 101 of file usb.c.

References ASSERT, HWREGB, HWREGH, USB0_BASE, and USB_O_EPIDX.

Referenced by USBFIFOConfigSet().

103 {
104  uint32_t ui32Index;
105 
106  //
107  // Check the arguments.
108  //
109  ASSERT(ui32Base == USB0_BASE);
110  ASSERT((ui32Endpoint == 0) || (ui32Endpoint == 1) || (ui32Endpoint == 2) ||
111  (ui32Endpoint == 3));
112  ASSERT((ui32Size == 1) || (ui32Size == 2));
113 
114  //
115  // Save the old index in case it was in use.
116  //
117  ui32Index = HWREGB(ui32Base + USB_O_EPIDX);
118 
119  //
120  // Set the index.
121  //
122  HWREGB(ui32Base + USB_O_EPIDX) = ui32Endpoint;
123 
124  //
125  // Determine the size of the register value.
126  //
127  if(ui32Size == 1)
128  {
129  //
130  // Set the value.
131  //
132  HWREGB(ui32Base + ui32IndexedReg) = ui32Value;
133  }
134  else
135  {
136  //
137  // Set the value.
138  //
139  HWREGH(ui32Base + ui32IndexedReg) = ui32Value;
140  }
141 
142  //
143  // Restore the old index in case it was in use.
144  //
145  HWREGB(ui32Base + USB_O_EPIDX) = ui32Index;
146 }
#define ASSERT(expr)
Definition: debug.h:67
#define USB_O_EPIDX
Definition: hw_usb.h:57
#define HWREGH(x)
Definition: hw_types.h:50
#define HWREGB(x)
Definition: hw_types.h:52
#define USB0_BASE
Definition: hw_memmap.h:99

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static uint32_t _USBIntNumberGet ( uint32_t  ui32Base)
static

Returns the interrupt number for a specified USB module.

Parameters
ui32Baseis the base address of the USB module.

This function returns the interrupt number for the USB module with the base address passed in the ui32Base parameter.

Returns
Returns the USB interrupt number or 0 if the interrupt does not exist.

Definition at line 818 of file usb.c.

References CLASS_IS_TM4C123, CLASS_IS_TM4C129, INT_USB0_TM4C123, and INT_USB0_TM4C129.

Referenced by USBIntRegister(), and USBIntUnregister().

819 {
820  uint32_t ui32Int;
821 
822  if(CLASS_IS_TM4C123)
823  {
824  ui32Int = INT_USB0_TM4C123;
825  }
826  else if(CLASS_IS_TM4C129)
827  {
828  ui32Int = INT_USB0_TM4C129;
829  }
830  else
831  {
832  ui32Int = 0;
833  }
834  return(ui32Int);
835 }
#define INT_USB0_TM4C129
Definition: hw_ints.h:218
#define CLASS_IS_TM4C123
Definition: hw_types.h:93
#define CLASS_IS_TM4C129
Definition: hw_types.h:99
#define INT_USB0_TM4C123
Definition: hw_ints.h:107

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void USBClockDisable ( uint32_t  ui32Base)

Disables the clocking of the USB controller's PHY.

Parameters
ui32Basespecifies the USB module base address.

This function disables the USB PHY clock. This function should not be called in applications where the USB controller is used.

Example: Disable the USB PHY clock input.

//! //
//! // Disable clocking of the USB controller's PHY.
//! //
//! USBClockDisable(USB0_BASE);
//! 
\note The ability to configure the USB PHY clock is not available on all
Tiva devices.  Please consult the data sheet for the Tiva device
that you are using to determine if this feature is available.

\return None.  

Definition at line 4346 of file usb.c.

References ASSERT, HWREG, USB0_BASE, and USB_O_CC.

4347 {
4348  ASSERT(ui32Base == USB0_BASE);
4349 
4350  //
4351  // Disable the USB clock input.
4352  //
4353  HWREG(ui32Base + USB_O_CC) = 0;
4354 }
#define HWREG(x)
Definition: hw_types.h:48
#define ASSERT(expr)
Definition: debug.h:67
#define USB_O_CC
Definition: hw_usb.h:406
#define USB0_BASE
Definition: hw_memmap.h:99
void USBClockEnable ( uint32_t  ui32Base,
uint32_t  ui32Div,
uint32_t  ui32Flags 
)

Configures and enables the clocking to the USB controller's PHY.

Parameters
ui32Basespecifies the USB module base address.
ui32Divspecifies the divider for the internal USB PHY clock.
ui32Flagsconfigures the internal USB PHY clock and specifies the clock source for a ULPI-connected PHY.

This function configures and enables the USB PHY clock. In addition, for systems that use a ULPI-connected external PHY, this function configures the source for the PHY clock. The ui32Flags parameter specifies the clock source with the following values:

  • USB_CLOCK_INTERNAL uses the internal PLL combined with the ui32Div value to generate the USB clock that is used by the internal USB PHY. In addition, when using an external ULPI-connected USB PHY, the specified clock is output on the USB0CLK pin.
  • USB_CLOCK_EXTERNAL specifies that USB0CLK is an input from the ULPI-connected external PHY.

The ui32Div parameter is used to specify a divider for the internal clock if the USB_CLOCK_INTERNAL is specified and is ignored if USB_CLOCK_EXTERNAL is specified. When the USB_CLOCK_INTERNAL is specified, the ui32Div value must be set so that the PLL_VCO/ui32Div results in a 60-MHz clock.

Example: Enable the USB clock with a 480-MHz PLL setting.

//! //
//! // Enable the USB clock using a 480-MHz PLL.
//! // (480-MHz/8 = 60-MHz)
//! //
//! USBClockEnable(USB0_BASE, 8, USB_CLOCK_INTERNAL);
//! 
\note The ability to configure the USB PHY clock is not available on
all Tiva devices.  Please consult the data sheet for the Tiva
device that you are using to determine if this feature is available.

\return None.  

Definition at line 4310 of file usb.c.

References ASSERT, HWREG, USB0_BASE, and USB_O_CC.

4311 {
4312  ASSERT(ui32Base == USB0_BASE);
4313 
4314  //
4315  // Configure and enable the USB clock input.
4316  //
4317  HWREG(ui32Base + USB_O_CC) = (ui32Div - 1) | ui32Flags;
4318 }
#define HWREG(x)
Definition: hw_types.h:48
#define ASSERT(expr)
Definition: debug.h:67
#define USB_O_CC
Definition: hw_usb.h:406
#define USB0_BASE
Definition: hw_memmap.h:99
uint32_t USBControllerVersion ( uint32_t  ui32Base)

Returns the version of the USB controller.

Parameters
ui32Basespecifies the USB module base address.

This function returns the version number of the USB controller, which can be be used to adjust for slight differences between the USB controllers in the Tiva family. The values that are returned are USB_CONTROLLER_VER_0 and USB_CONTROLLER_VER_1.

Note
The most significant difference between USB_CONTROLLER_VER_0 and USB_CONTROLLER_VER_1 is that USB_CONTROLLER_VER_1 supports the USB controller's own bus master DMA controller, while the USB_CONTROLLER_VER_0 only supports using the uDMA controller with the USB module.

Example: Get the version of the Tiva USB controller.

//! uint32_t ui32Version;
//!
//! //
//! // Retrieve the version of the Tiva USB controller.
//! //
//! ui32Version = USBControllerVersion(USB0_BASE);
//! 
\return This function returns one of the \b USB_CONTROLLER_VER_ values.  

Definition at line 4256 of file usb.c.

References HWREG, USB_O_PP, and USB_PP_TYPE_M.

4257 {
4258  //
4259  // Return the type field of the peripheral properties. This returns
4260  // zero for all parts that did not have a peripheral property.
4261  //
4262  return(HWREG(ui32Base + USB_O_PP) & USB_PP_TYPE_M);
4263 }
#define HWREG(x)
Definition: hw_types.h:48
#define USB_PP_TYPE_M
Definition: hw_usb.h:3005
#define USB_O_PP
Definition: hw_usb.h:404
uint32_t USBDevAddrGet ( uint32_t  ui32Base)

Returns the current device address in device mode.

Parameters
ui32Basespecifies the USB module base address.

This function returns the current device address. This address was set by a call to USBDevAddrSet().

Note
This function must only be called in device mode.
Returns
The current device address.

Definition at line 1585 of file usb.c.

References ASSERT, HWREGB, USB0_BASE, and USB_O_FADDR.

1586 {
1587  //
1588  // Check the arguments.
1589  //
1590  ASSERT(ui32Base == USB0_BASE);
1591 
1592  //
1593  // Return the function address.
1594  //
1595  return(HWREGB(ui32Base + USB_O_FADDR));
1596 }
#define ASSERT(expr)
Definition: debug.h:67
#define USB_O_FADDR
Definition: hw_usb.h:48
#define HWREGB(x)
Definition: hw_types.h:52
#define USB0_BASE
Definition: hw_memmap.h:99
void USBDevAddrSet ( uint32_t  ui32Base,
uint32_t  ui32Address 
)

Sets the address in device mode.

Parameters
ui32Basespecifies the USB module base address.
ui32Addressis the address to use for a device.

This function configures the device address on the USB bus. This address was likely received via a SET ADDRESS command from the host controller.

Note
This function must only be called in device mode.
Returns
None.

Definition at line 1557 of file usb.c.

References ASSERT, HWREGB, USB0_BASE, and USB_O_FADDR.

1558 {
1559  //
1560  // Check the arguments.
1561  //
1562  ASSERT(ui32Base == USB0_BASE);
1563 
1564  //
1565  // Set the function address in the correct location.
1566  //
1567  HWREGB(ui32Base + USB_O_FADDR) = (uint8_t)ui32Address;
1568 }
#define ASSERT(expr)
Definition: debug.h:67
#define USB_O_FADDR
Definition: hw_usb.h:48
#define HWREGB(x)
Definition: hw_types.h:52
#define USB0_BASE
Definition: hw_memmap.h:99
void USBDevConnect ( uint32_t  ui32Base)

Connects the USB controller to the bus in device mode.

Parameters
ui32Basespecifies the USB module base address.

This function causes the soft connect feature of the USB controller to be enabled. Call USBDevDisconnect() to remove the USB device from the bus.

Note
This function must only be called in device mode.
Returns
None.

Definition at line 1499 of file usb.c.

References ASSERT, HWREGB, USB0_BASE, USB_O_POWER, and USB_POWER_SOFTCONN.

1500 {
1501  //
1502  // Check the arguments.
1503  //
1504  ASSERT(ui32Base == USB0_BASE);
1505 
1506  //
1507  // Enable connection to the USB bus.
1508  //
1509  HWREGB(ui32Base + USB_O_POWER) |= USB_POWER_SOFTCONN;
1510 }
#define ASSERT(expr)
Definition: debug.h:67
#define USB_POWER_SOFTCONN
Definition: hw_usb.h:422
#define USB_O_POWER
Definition: hw_usb.h:49
#define HWREGB(x)
Definition: hw_types.h:52
#define USB0_BASE
Definition: hw_memmap.h:99
void USBDevDisconnect ( uint32_t  ui32Base)

Removes the USB controller from the bus in device mode.

Parameters
ui32Basespecifies the USB module base address.

This function causes the soft connect feature of the USB controller to remove the device from the USB bus. A call to USBDevConnect() is needed to reconnect to the bus.

Note
This function must only be called in device mode.
Returns
None.

Definition at line 1528 of file usb.c.

References ASSERT, HWREGB, USB0_BASE, USB_O_POWER, and USB_POWER_SOFTCONN.

1529 {
1530  //
1531  // Check the arguments.
1532  //
1533  ASSERT(ui32Base == USB0_BASE);
1534 
1535  //
1536  // Disable connection to the USB bus.
1537  //
1538  HWREGB(ui32Base + USB_O_POWER) &= (~USB_POWER_SOFTCONN);
1539 }
#define ASSERT(expr)
Definition: debug.h:67
#define USB_POWER_SOFTCONN
Definition: hw_usb.h:422
#define USB_O_POWER
Definition: hw_usb.h:49
#define HWREGB(x)
Definition: hw_types.h:52
#define USB0_BASE
Definition: hw_memmap.h:99
void USBDevEndpointConfigGet ( uint32_t  ui32Base,
uint32_t  ui32Endpoint,
uint32_t *  pui32MaxPacketSize,
uint32_t *  pui32Flags 
)

Gets the current configuration for an endpoint.

Parameters
ui32Basespecifies the USB module base address.
ui32Endpointis the endpoint to access.
pui32MaxPacketSizeis a pointer which is written with the maximum packet size for this endpoint.
pui32Flagsis a pointer which is written with the current endpoint settings. On entry to the function, this pointer must contain either USB_EP_DEV_IN or USB_EP_DEV_OUT to indicate whether the IN or OUT endpoint is to be queried.

This function returns the basic configuration for an endpoint in device mode. The values returned in *pui32MaxPacketSize and *pui32Flags are equivalent to the ui32MaxPacketSize and ui32Flags previously passed to USBDevEndpointConfigSet() for this endpoint.

Note
This function must only be called in device mode.
Returns
None.

Definition at line 2213 of file usb.c.

References ASSERT, EP_OFFSET, HWREGB, HWREGH, USB0_BASE, USB_EP_1, USB_EP_2, USB_EP_3, USB_EP_4, USB_EP_5, USB_EP_6, USB_EP_7, USB_EP_AUTO_CLEAR, USB_EP_AUTO_SET, USB_EP_DEV_IN, USB_EP_DEV_OUT, USB_EP_DMA_MODE_0, USB_EP_DMA_MODE_1, USB_EP_MODE_BULK, USB_EP_MODE_ISOC, USB_O_RXCSRH1, USB_O_RXMAXP1, USB_O_TXCSRH1, USB_O_TXMAXP1, USB_RXCSRH1_AUTOCL, USB_RXCSRH1_DMAEN, USB_RXCSRH1_DMAMOD, USB_RXCSRH1_ISO, USB_TXCSRH1_AUTOSET, USB_TXCSRH1_DMAEN, USB_TXCSRH1_DMAMOD, and USB_TXCSRH1_ISO.

2215 {
2216  uint32_t ui32Register;
2217 
2218  //
2219  // Check the arguments.
2220  //
2221  ASSERT(ui32Base == USB0_BASE);
2222  ASSERT(pui32MaxPacketSize && pui32Flags);
2223  ASSERT((ui32Endpoint == USB_EP_1) || (ui32Endpoint == USB_EP_2) ||
2224  (ui32Endpoint == USB_EP_3) || (ui32Endpoint == USB_EP_4) ||
2225  (ui32Endpoint == USB_EP_5) || (ui32Endpoint == USB_EP_6) ||
2226  (ui32Endpoint == USB_EP_7));
2227 
2228  //
2229  // Determine if a transmit or receive endpoint is being queried.
2230  //
2231  if(*pui32Flags & USB_EP_DEV_IN)
2232  {
2233  //
2234  // Clear the flags other than the direction bit.
2235  //
2236  *pui32Flags = USB_EP_DEV_IN;
2237 
2238  //
2239  // Get the maximum packet size.
2240  //
2241  *pui32MaxPacketSize = (uint32_t)HWREGH(ui32Base +
2242  EP_OFFSET(ui32Endpoint) +
2243  USB_O_TXMAXP1);
2244 
2245  //
2246  // Get the current transmit control register value.
2247  //
2248  ui32Register = (uint32_t)HWREGB(ui32Base + EP_OFFSET(ui32Endpoint) +
2249  USB_O_TXCSRH1);
2250 
2251  //
2252  // Are we allowing auto setting of TxPktRdy when max packet size has
2253  // been loaded into the FIFO?
2254  //
2255  if(ui32Register & USB_TXCSRH1_AUTOSET)
2256  {
2257  *pui32Flags |= USB_EP_AUTO_SET;
2258  }
2259 
2260  //
2261  // Get the DMA mode.
2262  //
2263  if(ui32Register & USB_TXCSRH1_DMAEN)
2264  {
2265  if(ui32Register & USB_TXCSRH1_DMAMOD)
2266  {
2267  *pui32Flags |= USB_EP_DMA_MODE_1;
2268  }
2269  else
2270  {
2271  *pui32Flags |= USB_EP_DMA_MODE_0;
2272  }
2273  }
2274 
2275  //
2276  // Are we in isochronous mode?
2277  //
2278  if(ui32Register & USB_TXCSRH1_ISO)
2279  {
2280  *pui32Flags |= USB_EP_MODE_ISOC;
2281  }
2282  else
2283  {
2284  //
2285  // The hardware doesn't differentiate between bulk, interrupt
2286  // and control mode for the endpoint so we just set something
2287  // that isn't isochronous. This protocol ensures that anyone
2288  // modifying the returned flags in preparation for a call to
2289  // USBDevEndpointConfigSet do not see an unexpected mode change.
2290  // If they decode the returned mode, however, they may be in for
2291  // a surprise.
2292  //
2293  *pui32Flags |= USB_EP_MODE_BULK;
2294  }
2295  }
2296  else
2297  {
2298  //
2299  // Clear the flags other than the direction bit.
2300  //
2301  *pui32Flags = USB_EP_DEV_OUT;
2302 
2303  //
2304  // Get the MaxPacketSize.
2305  //
2306  *pui32MaxPacketSize = (uint32_t)HWREGH(ui32Base +
2307  EP_OFFSET(ui32Endpoint) +
2308  USB_O_RXMAXP1);
2309 
2310  //
2311  // Get the current receive control register value.
2312  //
2313  ui32Register = (uint32_t)HWREGB(ui32Base + EP_OFFSET(ui32Endpoint) +
2314  USB_O_RXCSRH1);
2315 
2316  //
2317  // Are we allowing auto clearing of RxPktRdy when packet of size max
2318  // packet has been unloaded from the FIFO?
2319  //
2320  if(ui32Register & USB_RXCSRH1_AUTOCL)
2321  {
2322  *pui32Flags |= USB_EP_AUTO_CLEAR;
2323  }
2324 
2325  //
2326  // Get the DMA mode.
2327  //
2328  if(ui32Register & USB_RXCSRH1_DMAEN)
2329  {
2330  if(ui32Register & USB_RXCSRH1_DMAMOD)
2331  {
2332  *pui32Flags |= USB_EP_DMA_MODE_1;
2333  }
2334  else
2335  {
2336  *pui32Flags |= USB_EP_DMA_MODE_0;
2337  }
2338  }
2339 
2340  //
2341  // Are we in isochronous mode?
2342  //
2343  if(ui32Register & USB_RXCSRH1_ISO)
2344  {
2345  *pui32Flags |= USB_EP_MODE_ISOC;
2346  }
2347  else
2348  {
2349  //
2350  // The hardware doesn't differentiate between bulk, interrupt
2351  // and control mode for the endpoint so we just set something
2352  // that isn't isochronous. This protocol ensures that anyone
2353  // modifying the returned flags in preparation for a call to
2354  // USBDevEndpointConfigSet do not see an unexpected mode change.
2355  // If they decode the returned mode, however, they may be in for
2356  // a surprise.
2357  //
2358  *pui32Flags |= USB_EP_MODE_BULK;
2359  }
2360  }
2361 }
#define USB_RXCSRH1_DMAEN
Definition: hw_usb.h:1322
#define USB_EP_MODE_ISOC
Definition: usb.h:234
#define USB_TXCSRH1_DMAMOD
Definition: hw_usb.h:1285
#define USB_EP_DEV_IN
Definition: usb.h:244
#define USB_TXCSRH1_ISO
Definition: hw_usb.h:1281
#define USB_RXCSRH1_DMAMOD
Definition: hw_usb.h:1325
#define USB_EP_DMA_MODE_1
Definition: usb.h:230
#define USB_EP_DEV_OUT
Definition: usb.h:245
#define USB_EP_4
Definition: usb.h:351
#define ASSERT(expr)
Definition: debug.h:67
#define USB_O_RXCSRH1
Definition: hw_usb.h:180
#define USB_O_TXCSRH1
Definition: hw_usb.h:174
#define USB_EP_5
Definition: usb.h:352
#define HWREGH(x)
Definition: hw_types.h:50
#define USB_EP_AUTO_SET
Definition: usb.h:226
#define USB_RXCSRH1_AUTOCL
Definition: hw_usb.h:1319
#define USB_EP_DMA_MODE_0
Definition: usb.h:229
#define USB_EP_6
Definition: usb.h:353
#define USB_EP_MODE_BULK
Definition: usb.h:235
#define USB_EP_3
Definition: usb.h:350
#define USB_TXCSRH1_AUTOSET
Definition: hw_usb.h:1280
#define USB_EP_2
Definition: usb.h:349
#define USB_O_TXMAXP1
Definition: hw_usb.h:170
#define USB_EP_1
Definition: usb.h:348
#define USB_TXCSRH1_DMAEN
Definition: hw_usb.h:1283
#define USB_RXCSRH1_ISO
Definition: hw_usb.h:1321
#define USB_EP_AUTO_CLEAR
Definition: usb.h:228
#define HWREGB(x)
Definition: hw_types.h:52
#define USB_O_RXMAXP1
Definition: hw_usb.h:176
#define EP_OFFSET(Endpoint)
Definition: usb.c:82
#define USB0_BASE
Definition: hw_memmap.h:99
#define USB_EP_7
Definition: usb.h:354
void USBDevEndpointConfigSet ( uint32_t  ui32Base,
uint32_t  ui32Endpoint,
uint32_t  ui32MaxPacketSize,
uint32_t  ui32Flags 
)

Sets the configuration for an endpoint.

Parameters
ui32Basespecifies the USB module base address.
ui32Endpointis the endpoint to access.
ui32MaxPacketSizeis the maximum packet size for this endpoint.
ui32Flagsare used to configure other endpoint settings.

This function sets the basic configuration for an endpoint in device mode. Endpoint zero does not have a dynamic configuration, so this function must not be called for endpoint zero. The ui32Flags parameter determines some of the configuration while the other parameters provide the rest.

The USB_EP_MODE_ flags define what the type is for the specified endpoint.

  • USB_EP_MODE_CTRL is a control endpoint.
  • USB_EP_MODE_ISOC is an isochronous endpoint.
  • USB_EP_MODE_BULK is a bulk endpoint.
  • USB_EP_MODE_INT is an interrupt endpoint.

The USB_EP_DMA_MODE_ flags determine the type of DMA access to the endpoint data FIFOs. The choice of the DMA mode depends on how the DMA controller is configured and how it is being used. See the ``Using USB with the uDMA Controller'' or the ''Using the integrated USB DMA Controller'' section for more information on DMA configuration depending on the type of DMA that is supported by the USB controller.

When configuring an IN endpoint, the USB_EP_AUTO_SET bit can be specified to cause the automatic transmission of data on the USB bus as soon as ui32MaxPacketSize bytes of data are written into the FIFO for this endpoint. This option is commonly used with DMA (both on devices with integrated USB DMA as well as those that use uDMA) as no interaction is required to start the transmission of data.

When configuring an OUT endpoint, the USB_EP_AUTO_REQUEST bit is specified to trigger the request for more data once the FIFO has been drained enough to receive ui32MaxPacketSize more bytes of data. Also for OUT endpoints, the USB_EP_AUTO_CLEAR bit can be used to clear the data packet ready flag automatically once the data has been read from the FIFO. If this option is not used, this flag must be manually cleared via a call to USBDevEndpointStatusClear(). Both of these settings can be used to remove the need for extra calls when using the controller with DMA.

Note
This function must only be called in device mode.
Returns
None.

Definition at line 2053 of file usb.c.

References ASSERT, EP_OFFSET, HWREGB, HWREGH, USB0_BASE, USB_EP_1, USB_EP_2, USB_EP_3, USB_EP_4, USB_EP_5, USB_EP_6, USB_EP_7, USB_EP_AUTO_CLEAR, USB_EP_AUTO_SET, USB_EP_DEV_IN, USB_EP_DIS_NYET, USB_EP_DMA_MODE_0, USB_EP_DMA_MODE_1, USB_EP_MODE_ISOC, USB_EP_MODE_MASK, USB_O_RXCSRH1, USB_O_RXCSRL1, USB_O_RXMAXP1, USB_O_TXCSRH1, USB_O_TXCSRL1, USB_O_TXMAXP1, USB_RXCSRH1_AUTOCL, USB_RXCSRH1_DISNYET, USB_RXCSRH1_DMAEN, USB_RXCSRH1_DMAMOD, USB_RXCSRH1_ISO, USB_RXCSRL1_CLRDT, USB_TXCSRH1_AUTOSET, USB_TXCSRH1_DMAEN, USB_TXCSRH1_DMAMOD, USB_TXCSRH1_ISO, and USB_TXCSRL1_CLRDT.

2055 {
2056  uint32_t ui32Register;
2057 
2058  //
2059  // Check the arguments.
2060  //
2061  ASSERT(ui32Base == USB0_BASE);
2062  ASSERT((ui32Endpoint == USB_EP_1) || (ui32Endpoint == USB_EP_2) ||
2063  (ui32Endpoint == USB_EP_3) || (ui32Endpoint == USB_EP_4) ||
2064  (ui32Endpoint == USB_EP_5) || (ui32Endpoint == USB_EP_6) ||
2065  (ui32Endpoint == USB_EP_7));
2066 
2067  //
2068  // Determine if a transmit or receive endpoint is being configured.
2069  //
2070  if(ui32Flags & USB_EP_DEV_IN)
2071  {
2072  //
2073  // Set the maximum packet size.
2074  //
2075  HWREGH(ui32Base + EP_OFFSET(ui32Endpoint) + USB_O_TXMAXP1) =
2076  ui32MaxPacketSize;
2077 
2078  //
2079  // The transmit control value is zero unless options are enabled.
2080  //
2081  ui32Register = 0;
2082 
2083  //
2084  // Allow auto setting of TxPktRdy when max packet size has been loaded
2085  // into the FIFO.
2086  //
2087  if(ui32Flags & USB_EP_AUTO_SET)
2088  {
2089  ui32Register |= USB_TXCSRH1_AUTOSET;
2090  }
2091 
2092  //
2093  // Configure the DMA mode.
2094  //
2095  if(ui32Flags & USB_EP_DMA_MODE_1)
2096  {
2097  ui32Register |= USB_TXCSRH1_DMAEN | USB_TXCSRH1_DMAMOD;
2098  }
2099  else if(ui32Flags & USB_EP_DMA_MODE_0)
2100  {
2101  ui32Register |= USB_TXCSRH1_DMAEN;
2102  }
2103 
2104  //
2105  // Enable isochronous mode if requested.
2106  //
2107  if((ui32Flags & USB_EP_MODE_MASK) == USB_EP_MODE_ISOC)
2108  {
2109  ui32Register |= USB_TXCSRH1_ISO;
2110  }
2111 
2112  //
2113  // Write the transmit control value.
2114  //
2115  HWREGB(ui32Base + EP_OFFSET(ui32Endpoint) + USB_O_TXCSRH1) =
2116  (uint8_t)ui32Register;
2117 
2118  //
2119  // Reset the Data toggle to zero.
2120  //
2121  HWREGB(ui32Base + EP_OFFSET(ui32Endpoint) + USB_O_TXCSRL1) =
2123  }
2124  else
2125  {
2126  //
2127  // Set the MaxPacketSize.
2128  //
2129  HWREGH(ui32Base + EP_OFFSET(ui32Endpoint) + USB_O_RXMAXP1) =
2130  ui32MaxPacketSize;
2131 
2132  //
2133  // The receive control value is zero unless options are enabled.
2134  //
2135  ui32Register = 0;
2136 
2137  //
2138  // Allow auto clearing of RxPktRdy when packet of size max packet
2139  // has been unloaded from the FIFO.
2140  //
2141  if(ui32Flags & USB_EP_AUTO_CLEAR)
2142  {
2143  ui32Register = USB_RXCSRH1_AUTOCL;
2144  }
2145 
2146  //
2147  // Configure the DMA mode.
2148  //
2149  if(ui32Flags & USB_EP_DMA_MODE_1)
2150  {
2151  ui32Register |= USB_RXCSRH1_DMAEN | USB_RXCSRH1_DMAMOD;
2152  }
2153  else if(ui32Flags & USB_EP_DMA_MODE_0)
2154  {
2155  ui32Register |= USB_RXCSRH1_DMAEN;
2156  }
2157 
2158  //
2159  // If requested, disable NYET responses for high-speed bulk and
2160  // interrupt endpoints.
2161  //
2162  if(ui32Flags & USB_EP_DIS_NYET)
2163  {
2164  ui32Register |= USB_RXCSRH1_DISNYET;
2165  }
2166 
2167  //
2168  // Enable isochronous mode if requested.
2169  //
2170  if((ui32Flags & USB_EP_MODE_MASK) == USB_EP_MODE_ISOC)
2171  {
2172  ui32Register |= USB_RXCSRH1_ISO;
2173  }
2174 
2175  //
2176  // Write the receive control value.
2177  //
2178  HWREGB(ui32Base + EP_OFFSET(ui32Endpoint) + USB_O_RXCSRH1) =
2179  (uint8_t)ui32Register;
2180 
2181  //
2182  // Reset the Data toggle to zero.
2183  //
2184  HWREGB(ui32Base + EP_OFFSET(ui32Endpoint) + USB_O_RXCSRL1) =
2186  }
2187 }
#define USB_RXCSRH1_DMAEN
Definition: hw_usb.h:1322
#define USB_EP_MODE_ISOC
Definition: usb.h:234
#define USB_TXCSRH1_DMAMOD
Definition: hw_usb.h:1285
#define USB_EP_DEV_IN
Definition: usb.h:244
#define USB_TXCSRH1_ISO
Definition: hw_usb.h:1281
#define USB_RXCSRH1_DMAMOD
Definition: hw_usb.h:1325
#define USB_EP_DMA_MODE_1
Definition: usb.h:230
#define USB_RXCSRH1_DISNYET
Definition: hw_usb.h:1323
#define USB_EP_MODE_MASK
Definition: usb.h:238
#define USB_EP_4
Definition: usb.h:351
#define ASSERT(expr)
Definition: debug.h:67
#define USB_EP_DIS_NYET
Definition: usb.h:231
#define USB_O_RXCSRH1
Definition: hw_usb.h:180
#define USB_O_RXCSRL1
Definition: hw_usb.h:178
#define USB_O_TXCSRH1
Definition: hw_usb.h:174
#define USB_TXCSRL1_CLRDT
Definition: hw_usb.h:1265
#define USB_EP_5
Definition: usb.h:352
#define HWREGH(x)
Definition: hw_types.h:50
#define USB_EP_AUTO_SET
Definition: usb.h:226
#define USB_RXCSRH1_AUTOCL
Definition: hw_usb.h:1319
#define USB_EP_DMA_MODE_0
Definition: usb.h:229
#define USB_EP_6
Definition: usb.h:353
#define USB_RXCSRL1_CLRDT
Definition: hw_usb.h:1302
#define USB_O_TXCSRL1
Definition: hw_usb.h:172
#define USB_EP_3
Definition: usb.h:350
#define USB_TXCSRH1_AUTOSET
Definition: hw_usb.h:1280
#define USB_EP_2
Definition: usb.h:349
#define USB_O_TXMAXP1
Definition: hw_usb.h:170
#define USB_EP_1
Definition: usb.h:348
#define USB_TXCSRH1_DMAEN
Definition: hw_usb.h:1283
#define USB_RXCSRH1_ISO
Definition: hw_usb.h:1321
#define USB_EP_AUTO_CLEAR
Definition: usb.h:228
#define HWREGB(x)
Definition: hw_types.h:52
#define USB_O_RXMAXP1
Definition: hw_usb.h:176
#define EP_OFFSET(Endpoint)
Definition: usb.c:82
#define USB0_BASE
Definition: hw_memmap.h:99
#define USB_EP_7
Definition: usb.h:354
void USBDevEndpointDataAck ( uint32_t  ui32Base,
uint32_t  ui32Endpoint,
bool  bIsLastPacket 
)

Acknowledge that data was read from the specified endpoint's FIFO in device mode.

Parameters
ui32Basespecifies the USB module base address.
ui32Endpointis the endpoint to access.
bIsLastPacketindicates if this packet is the last one.

This function acknowledges that the data was read from the endpoint's FIFO. The bIsLastPacket parameter is set to a true value if this is the last in a series of data packets on endpoint zero. The bIsLastPacket parameter is not used for endpoints other than endpoint zero. This call can be used if processing is required between reading the data and acknowledging that the data has been read.

Note
This function must only be called in device mode.
Returns
None.

Definition at line 2896 of file usb.c.

References ASSERT, EP_OFFSET, HWREGB, USB0_BASE, USB_CSRL0_DATAEND, USB_CSRL0_RXRDYC, USB_EP_0, USB_EP_1, USB_EP_2, USB_EP_3, USB_EP_4, USB_EP_5, USB_EP_6, USB_EP_7, USB_O_CSRL0, USB_O_RXCSRL1, and USB_RXCSRL1_RXRDY.

2898 {
2899  //
2900  // Check the arguments.
2901  //
2902  ASSERT(ui32Base == USB0_BASE);
2903  ASSERT((ui32Endpoint == USB_EP_0) || (ui32Endpoint == USB_EP_1) ||
2904  (ui32Endpoint == USB_EP_2) || (ui32Endpoint == USB_EP_3) ||
2905  (ui32Endpoint == USB_EP_4) || (ui32Endpoint == USB_EP_5) ||
2906  (ui32Endpoint == USB_EP_6) || (ui32Endpoint == USB_EP_7));
2907 
2908  //
2909  // Determine which endpoint is being acked.
2910  //
2911  if(ui32Endpoint == USB_EP_0)
2912  {
2913  //
2914  // Clear RxPktRdy, and optionally DataEnd, on endpoint zero.
2915  //
2916  HWREGB(ui32Base + USB_O_CSRL0) =
2917  USB_CSRL0_RXRDYC | (bIsLastPacket ? USB_CSRL0_DATAEND : 0);
2918  }
2919  else
2920  {
2921  //
2922  // Clear RxPktRdy on all other endpoints.
2923  //
2924  HWREGB(ui32Base + USB_O_RXCSRL1 + EP_OFFSET(ui32Endpoint)) &=
2925  ~(USB_RXCSRL1_RXRDY);
2926  }
2927 }
#define USB_CSRL0_RXRDYC
Definition: hw_usb.h:1204
#define USB_CSRL0_DATAEND
Definition: hw_usb.h:1209
#define USB_EP_4
Definition: usb.h:351
#define ASSERT(expr)
Definition: debug.h:67
#define USB_RXCSRL1_RXRDY
Definition: hw_usb.h:1312
#define USB_O_RXCSRL1
Definition: hw_usb.h:178
#define USB_EP_5
Definition: usb.h:352
#define USB_EP_6
Definition: usb.h:353
#define USB_EP_3
Definition: usb.h:350
#define USB_EP_0
Definition: usb.h:347
#define USB_EP_2
Definition: usb.h:349
#define USB_EP_1
Definition: usb.h:348
#define HWREGB(x)
Definition: hw_types.h:52
#define EP_OFFSET(Endpoint)
Definition: usb.c:82
#define USB0_BASE
Definition: hw_memmap.h:99
#define USB_O_CSRL0
Definition: hw_usb.h:162
#define USB_EP_7
Definition: usb.h:354
void USBDevEndpointStall ( uint32_t  ui32Base,
uint32_t  ui32Endpoint,
uint32_t  ui32Flags 
)

Stalls the specified endpoint in device mode.

Parameters
ui32Basespecifies the USB module base address.
ui32Endpointspecifies the endpoint to stall.
ui32Flagsspecifies whether to stall the IN or OUT endpoint.

This function causes the endpoint number passed in to go into a stall condition. If the ui32Flags parameter is USB_EP_DEV_IN, then the stall is issued on the IN portion of this endpoint. If the ui32Flags parameter is USB_EP_DEV_OUT, then the stall is issued on the OUT portion of this endpoint.

Note
This function must only be called in device mode.
Returns
None.

Definition at line 1369 of file usb.c.

References ASSERT, EP_OFFSET, HWREGB, USB0_BASE, USB_CSRL0_RXRDYC, USB_CSRL0_STALL, USB_EP_0, USB_EP_1, USB_EP_2, USB_EP_3, USB_EP_4, USB_EP_5, USB_EP_6, USB_EP_7, USB_EP_DEV_IN, USB_EP_DEV_OUT, USB_O_CSRL0, USB_O_RXCSRL1, USB_O_TXCSRL1, USB_RXCSRL1_STALL, and USB_TXCSRL1_STALL.

1371 {
1372  //
1373  // Check the arguments.
1374  //
1375  ASSERT(ui32Base == USB0_BASE);
1376  ASSERT((ui32Flags & ~(USB_EP_DEV_IN | USB_EP_DEV_OUT)) == 0);
1377  ASSERT((ui32Endpoint == USB_EP_0) || (ui32Endpoint == USB_EP_1) ||
1378  (ui32Endpoint == USB_EP_2) || (ui32Endpoint == USB_EP_3) ||
1379  (ui32Endpoint == USB_EP_4) || (ui32Endpoint == USB_EP_5) ||
1380  (ui32Endpoint == USB_EP_6) || (ui32Endpoint == USB_EP_7));
1381 
1382  //
1383  // Determine how to stall this endpoint.
1384  //
1385  if(ui32Endpoint == USB_EP_0)
1386  {
1387  //
1388  // Perform a stall on endpoint zero.
1389  //
1391  }
1392  else if(ui32Flags == USB_EP_DEV_IN)
1393  {
1394  //
1395  // Perform a stall on an IN endpoint.
1396  //
1397  HWREGB(ui32Base + USB_O_TXCSRL1 + EP_OFFSET(ui32Endpoint)) |=
1399  }
1400  else
1401  {
1402  //
1403  // Perform a stall on an OUT endpoint.
1404  //
1405  HWREGB(ui32Base + USB_O_RXCSRL1 + EP_OFFSET(ui32Endpoint)) |=
1407  }
1408 }
#define USB_EP_DEV_IN
Definition: usb.h:244
#define USB_CSRL0_RXRDYC
Definition: hw_usb.h:1204
#define USB_EP_DEV_OUT
Definition: usb.h:245
#define USB_EP_4
Definition: usb.h:351
#define ASSERT(expr)
Definition: debug.h:67
#define USB_O_RXCSRL1
Definition: hw_usb.h:178
#define USB_TXCSRL1_STALL
Definition: hw_usb.h:1267
#define USB_CSRL0_STALL
Definition: hw_usb.h:1206
#define USB_EP_5
Definition: usb.h:352
#define USB_EP_6
Definition: usb.h:353
#define USB_O_TXCSRL1
Definition: hw_usb.h:172
#define USB_RXCSRL1_STALL
Definition: hw_usb.h:1304
#define USB_EP_3
Definition: usb.h:350
#define USB_EP_0
Definition: usb.h:347
#define USB_EP_2
Definition: usb.h:349
#define USB_EP_1
Definition: usb.h:348
#define HWREGB(x)
Definition: hw_types.h:52
#define EP_OFFSET(Endpoint)
Definition: usb.c:82
#define USB0_BASE
Definition: hw_memmap.h:99
#define USB_O_CSRL0
Definition: hw_usb.h:162
#define USB_EP_7
Definition: usb.h:354
void USBDevEndpointStallClear ( uint32_t  ui32Base,
uint32_t  ui32Endpoint,
uint32_t  ui32Flags 
)

Clears the stall condition on the specified endpoint in device mode.

Parameters
ui32Basespecifies the USB module base address.
ui32Endpointspecifies which endpoint to remove the stall condition.
ui32Flagsspecifies whether to remove the stall condition from the IN or the OUT portion of this endpoint.

This function causes the endpoint number passed in to exit the stall condition. If the ui32Flags parameter is USB_EP_DEV_IN, then the stall is cleared on the IN portion of this endpoint. If the ui32Flags parameter is USB_EP_DEV_OUT, then the stall is cleared on the OUT portion of this endpoint.

Note
This function must only be called in device mode.
Returns
None.

Definition at line 1431 of file usb.c.

References ASSERT, EP_OFFSET, HWREGB, USB0_BASE, USB_CSRL0_STALLED, USB_EP_0, USB_EP_1, USB_EP_2, USB_EP_3, USB_EP_4, USB_EP_5, USB_EP_6, USB_EP_7, USB_EP_DEV_IN, USB_EP_DEV_OUT, USB_O_CSRL0, USB_O_RXCSRL1, USB_O_TXCSRL1, USB_RXCSRL1_CLRDT, USB_RXCSRL1_STALL, USB_RXCSRL1_STALLED, USB_TXCSRL1_CLRDT, USB_TXCSRL1_STALL, and USB_TXCSRL1_STALLED.

1433 {
1434  //
1435  // Check the arguments.
1436  //
1437  ASSERT(ui32Base == USB0_BASE);
1438  ASSERT((ui32Endpoint == USB_EP_0) || (ui32Endpoint == USB_EP_1) ||
1439  (ui32Endpoint == USB_EP_2) || (ui32Endpoint == USB_EP_3) ||
1440  (ui32Endpoint == USB_EP_4) || (ui32Endpoint == USB_EP_5) ||
1441  (ui32Endpoint == USB_EP_6) || (ui32Endpoint == USB_EP_7));
1442  ASSERT((ui32Flags & ~(USB_EP_DEV_IN | USB_EP_DEV_OUT)) == 0);
1443 
1444  //
1445  // Determine how to clear the stall on this endpoint.
1446  //
1447  if(ui32Endpoint == USB_EP_0)
1448  {
1449  //
1450  // Clear the stall on endpoint zero.
1451  //
1452  HWREGB(ui32Base + USB_O_CSRL0) &= ~USB_CSRL0_STALLED;
1453  }
1454  else if(ui32Flags == USB_EP_DEV_IN)
1455  {
1456  //
1457  // Clear the stall on an IN endpoint.
1458  //
1459  HWREGB(ui32Base + USB_O_TXCSRL1 + EP_OFFSET(ui32Endpoint)) &=
1461 
1462  //
1463  // Reset the data toggle.
1464  //
1465  HWREGB(ui32Base + USB_O_TXCSRL1 + EP_OFFSET(ui32Endpoint)) |=
1467  }
1468  else
1469  {
1470  //
1471  // Clear the stall on an OUT endpoint.
1472  //
1473  HWREGB(ui32Base + USB_O_RXCSRL1 + EP_OFFSET(ui32Endpoint)) &=
1475 
1476  //
1477  // Reset the data toggle.
1478  //
1479  HWREGB(ui32Base + USB_O_RXCSRL1 + EP_OFFSET(ui32Endpoint)) |=
1481  }
1482 }
#define USB_EP_DEV_IN
Definition: usb.h:244
#define USB_EP_DEV_OUT
Definition: usb.h:245
#define USB_EP_4
Definition: usb.h:351
#define ASSERT(expr)
Definition: debug.h:67
#define USB_O_RXCSRL1
Definition: hw_usb.h:178
#define USB_TXCSRL1_STALL
Definition: hw_usb.h:1267
#define USB_TXCSRL1_CLRDT
Definition: hw_usb.h:1265
#define USB_EP_5
Definition: usb.h:352
#define USB_RXCSRL1_STALLED
Definition: hw_usb.h:1303
#define USB_TXCSRL1_STALLED
Definition: hw_usb.h:1266
#define USB_EP_6
Definition: usb.h:353
#define USB_CSRL0_STALLED
Definition: hw_usb.h:1211
#define USB_RXCSRL1_CLRDT
Definition: hw_usb.h:1302
#define USB_O_TXCSRL1
Definition: hw_usb.h:172
#define USB_RXCSRL1_STALL
Definition: hw_usb.h:1304
#define USB_EP_3
Definition: usb.h:350
#define USB_EP_0
Definition: usb.h:347
#define USB_EP_2
Definition: usb.h:349
#define USB_EP_1
Definition: usb.h:348
#define HWREGB(x)
Definition: hw_types.h:52
#define EP_OFFSET(Endpoint)
Definition: usb.c:82
#define USB0_BASE
Definition: hw_memmap.h:99
#define USB_O_CSRL0
Definition: hw_usb.h:162
#define USB_EP_7
Definition: usb.h:354
void USBDevEndpointStatusClear ( uint32_t  ui32Base,
uint32_t  ui32Endpoint,
uint32_t  ui32Flags 
)

Clears the status bits in this endpoint in device mode.

Parameters
ui32Basespecifies the USB module base address.
ui32Endpointis the endpoint to access.
ui32Flagsare the status bits that are cleared.

This function clears the status of any bits that are passed in the ui32Flags parameter. The ui32Flags parameter can take the value returned from the USBEndpointStatus() call.

Note
This function must only be called in device mode.
Returns
None.

Definition at line 1089 of file usb.c.

References ASSERT, EP_OFFSET, HWREGB, USB0_BASE, USB_CSRL0_RXRDYC, USB_CSRL0_SETENDC, USB_DEV_EP0_OUT_PKTRDY, USB_DEV_EP0_SENT_STALL, USB_DEV_EP0_SETUP_END, USB_DEV_RX_DATA_ERROR, USB_DEV_RX_OVERRUN, USB_DEV_RX_SENT_STALL, USB_DEV_TX_SENT_STALL, USB_DEV_TX_UNDERRUN, USB_EP_0, USB_EP_1, USB_EP_2, USB_EP_3, USB_EP_4, USB_EP_5, USB_EP_6, USB_EP_7, USB_O_CSRL0, USB_O_RXCSRL1, USB_O_TXCSRL1, and USB_RX_EPSTATUS_SHIFT.

1091 {
1092  //
1093  // Check the arguments.
1094  //
1095  ASSERT(ui32Base == USB0_BASE);
1096  ASSERT((ui32Endpoint == USB_EP_0) || (ui32Endpoint == USB_EP_1) ||
1097  (ui32Endpoint == USB_EP_2) || (ui32Endpoint == USB_EP_3) ||
1098  (ui32Endpoint == USB_EP_4) || (ui32Endpoint == USB_EP_5) ||
1099  (ui32Endpoint == USB_EP_6) || (ui32Endpoint == USB_EP_7));
1100 
1101  //
1102  // If this is endpoint 0, then the bits have different meaning and map
1103  // into the TX memory location.
1104  //
1105  if(ui32Endpoint == USB_EP_0)
1106  {
1107  //
1108  // Set the Serviced RxPktRdy bit to clear the RxPktRdy.
1109  //
1110  if(ui32Flags & USB_DEV_EP0_OUT_PKTRDY)
1111  {
1112  HWREGB(ui32Base + USB_O_CSRL0) |= USB_CSRL0_RXRDYC;
1113  }
1114 
1115  //
1116  // Set the serviced Setup End bit to clear the SetupEnd status.
1117  //
1118  if(ui32Flags & USB_DEV_EP0_SETUP_END)
1119  {
1120  HWREGB(ui32Base + USB_O_CSRL0) |= USB_CSRL0_SETENDC;
1121  }
1122 
1123  //
1124  // Clear the Sent Stall status flag.
1125  //
1126  if(ui32Flags & USB_DEV_EP0_SENT_STALL)
1127  {
1128  HWREGB(ui32Base + USB_O_CSRL0) &= ~(USB_DEV_EP0_SENT_STALL);
1129  }
1130  }
1131  else
1132  {
1133  //
1134  // Clear out any TX flags that were passed in. Only
1135  // USB_DEV_TX_SENT_STALL and USB_DEV_TX_UNDERRUN must be cleared.
1136  //
1137  HWREGB(ui32Base + USB_O_TXCSRL1 + EP_OFFSET(ui32Endpoint)) &=
1138  ~(ui32Flags & (USB_DEV_TX_SENT_STALL | USB_DEV_TX_UNDERRUN));
1139 
1140  //
1141  // Clear out valid RX flags that were passed in. Only
1142  // USB_DEV_RX_SENT_STALL, USB_DEV_RX_DATA_ERROR, and USB_DEV_RX_OVERRUN
1143  // must be cleared.
1144  //
1145  HWREGB(ui32Base + USB_O_RXCSRL1 + EP_OFFSET(ui32Endpoint)) &=
1146  ~((ui32Flags & (USB_DEV_RX_SENT_STALL | USB_DEV_RX_DATA_ERROR |
1148  }
1149 }
#define USB_DEV_EP0_SENT_STALL
Definition: usb.h:216
#define USB_RX_EPSTATUS_SHIFT
Definition: usb.c:74
#define USB_CSRL0_RXRDYC
Definition: hw_usb.h:1204
#define USB_DEV_TX_UNDERRUN
Definition: usb.h:211
#define USB_EP_4
Definition: usb.h:351
#define ASSERT(expr)
Definition: debug.h:67
#define USB_O_RXCSRL1
Definition: hw_usb.h:178
#define USB_DEV_RX_SENT_STALL
Definition: usb.h:202
#define USB_DEV_EP0_SETUP_END
Definition: usb.h:214
#define USB_DEV_RX_DATA_ERROR
Definition: usb.h:203
#define USB_EP_5
Definition: usb.h:352
#define USB_DEV_RX_OVERRUN
Definition: usb.h:204
#define USB_DEV_TX_SENT_STALL
Definition: usb.h:210
#define USB_EP_6
Definition: usb.h:353
#define USB_O_TXCSRL1
Definition: hw_usb.h:172
#define USB_EP_3
Definition: usb.h:350
#define USB_CSRL0_SETENDC
Definition: hw_usb.h:1202
#define USB_EP_0
Definition: usb.h:347
#define USB_EP_2
Definition: usb.h:349
#define USB_EP_1
Definition: usb.h:348
#define USB_DEV_EP0_OUT_PKTRDY
Definition: usb.h:218
#define HWREGB(x)
Definition: hw_types.h:52
#define EP_OFFSET(Endpoint)
Definition: usb.c:82
#define USB0_BASE
Definition: hw_memmap.h:99
#define USB_O_CSRL0
Definition: hw_usb.h:162
#define USB_EP_7
Definition: usb.h:354
void USBDevMode ( uint32_t  ui32Base)

Change the mode of the USB controller to device.

Parameters
ui32Basespecifies the USB module base address.

This function changes the mode of the USB controller to device mode.

Note
This function must only be called on microcontrollers that support OTG operation.
Returns
None.

Definition at line 4028 of file usb.c.

References ASSERT, HWREGB, USB0_BASE, USB_GPCS_DEVMOD, USB_GPCS_DEVMODOTG, and USB_O_GPCS.

4029 {
4030  //
4031  // Check the arguments.
4032  //
4033  ASSERT(ui32Base == USB0_BASE);
4034 
4035  //
4036  // Set the USB controller mode to device.
4037  //
4039 }
#define USB_GPCS_DEVMOD
Definition: hw_usb.h:2921
#define ASSERT(expr)
Definition: debug.h:67
#define USB_GPCS_DEVMODOTG
Definition: hw_usb.h:2920
#define USB_O_GPCS
Definition: hw_usb.h:388
#define HWREGB(x)
Definition: hw_types.h:52
#define USB0_BASE
Definition: hw_memmap.h:99
uint32_t USBDevSpeedGet ( uint32_t  ui32Base)

Returns the current speed of the USB controller in device mode.

Parameters
ui32Basespecifies the USB module base address.

This function returns the operating speed of the connection to the USB host controller. This function returns either USB_HIGH_SPEED or USB_FULL_SPEED to indicate the connection speed in device mode.

Example: Get the USB connection speed.

//! //
//! // Get the connection speed of the USB controller.
//! //
//! USBDevSpeedGet(USB0_BASE);
//! 
\note This function must only be called in device mode.

\return Returns either \b USB_HIGH_SPEED or \b USB_FULL_SPEED.  

Definition at line 474 of file usb.c.

References ASSERT, HWREGB, USB0_BASE, USB_FULL_SPEED, USB_HIGH_SPEED, USB_O_POWER, and USB_POWER_HSMODE.

475 {
476  //
477  // Check the arguments.
478  //
479  ASSERT(ui32Base == USB0_BASE);
480 
481  //
482  // If the Full Speed device bit is set, then this is a full speed device.
483  //
484  if(HWREGB(ui32Base + USB_O_POWER) & USB_POWER_HSMODE)
485  {
486  return(USB_HIGH_SPEED);
487  }
488 
489  return(USB_FULL_SPEED);
490 }
#define USB_POWER_HSMODE
Definition: hw_usb.h:424
#define ASSERT(expr)
Definition: debug.h:67
#define USB_HIGH_SPEED
Definition: usb.h:160
#define USB_FULL_SPEED
Definition: usb.h:161
#define USB_O_POWER
Definition: hw_usb.h:49
#define HWREGB(x)
Definition: hw_types.h:52
#define USB0_BASE
Definition: hw_memmap.h:99
uint32_t USBEndpointDataAvail ( uint32_t  ui32Base,
uint32_t  ui32Endpoint 
)

Determines the number of bytes of data available in a specified endpoint's FIFO.

Parameters
ui32Basespecifies the USB module base address.
ui32Endpointis the endpoint to access.

This function returns the number of bytes of data currently available in the FIFO for the specified receive (OUT) endpoint. It may be used prior to calling USBEndpointDataGet() to determine the size of buffer required to hold the newly-received packet.

Returns
This call returns the number of bytes available in a specified endpoint FIFO.

Definition at line 2730 of file usb.c.

References ASSERT, EP_OFFSET, HWREGH, USB0_BASE, USB_CSRL0_RXRDY, USB_EP_0, USB_EP_1, USB_EP_2, USB_EP_3, USB_EP_4, USB_EP_5, USB_EP_6, USB_EP_7, USB_O_COUNT0, USB_O_CSRL0, and USB_O_RXCSRL1.

2731 {
2732  uint32_t ui32Register;
2733 
2734  //
2735  // Check the arguments.
2736  //
2737  ASSERT(ui32Base == USB0_BASE);
2738  ASSERT((ui32Endpoint == USB_EP_0) || (ui32Endpoint == USB_EP_1) ||
2739  (ui32Endpoint == USB_EP_2) || (ui32Endpoint == USB_EP_3) ||
2740  (ui32Endpoint == USB_EP_4) || (ui32Endpoint == USB_EP_5) ||
2741  (ui32Endpoint == USB_EP_6) || (ui32Endpoint == USB_EP_7));
2742 
2743  //
2744  // Get the address of the receive status register to use, based on the
2745  // endpoint.
2746  //
2747  if(ui32Endpoint == USB_EP_0)
2748  {
2749  ui32Register = USB_O_CSRL0;
2750  }
2751  else
2752  {
2753  ui32Register = USB_O_RXCSRL1 + EP_OFFSET(ui32Endpoint);
2754  }
2755 
2756  //
2757  // Is there a packet ready in the FIFO?
2758  //
2759  if((HWREGH(ui32Base + ui32Register) & USB_CSRL0_RXRDY) == 0)
2760  {
2761  return(0);
2762  }
2763 
2764  //
2765  // Return the byte count in the FIFO.
2766  //
2767  return(HWREGH(ui32Base + USB_O_COUNT0 + ui32Endpoint));
2768 }
#define USB_EP_4
Definition: usb.h:351
#define ASSERT(expr)
Definition: debug.h:67
#define USB_O_RXCSRL1
Definition: hw_usb.h:178
#define USB_EP_5
Definition: usb.h:352
#define HWREGH(x)
Definition: hw_types.h:50
#define USB_EP_6
Definition: usb.h:353
#define USB_EP_3
Definition: usb.h:350
#define USB_EP_0
Definition: usb.h:347
#define USB_EP_2
Definition: usb.h:349
#define USB_EP_1
Definition: usb.h:348
#define USB_CSRL0_RXRDY
Definition: hw_usb.h:1213
#define USB_O_COUNT0
Definition: hw_usb.h:166
#define EP_OFFSET(Endpoint)
Definition: usb.c:82
#define USB0_BASE
Definition: hw_memmap.h:99
#define USB_O_CSRL0
Definition: hw_usb.h:162
#define USB_EP_7
Definition: usb.h:354
int32_t USBEndpointDataGet ( uint32_t  ui32Base,
uint32_t  ui32Endpoint,
uint8_t *  pui8Data,
uint32_t *  pui32Size 
)

Retrieves data from the specified endpoint's FIFO.

Parameters
ui32Basespecifies the USB module base address.
ui32Endpointis the endpoint to access.
pui8Datais a pointer to the data area used to return the data from the FIFO.
pui32Sizeis initially the size of the buffer passed into this call via the pui8Data parameter. It is set to the amount of data returned in the buffer.

This function returns the data from the FIFO for the specified endpoint. The pui32Size parameter indicates the size of the buffer passed in the pui32Data parameter. The data in the pui32Size parameter is changed to match the amount of data returned in the pui8Data parameter. If a zero-byte packet is received, this call does not return an error but instead just returns a zero in the pui32Size parameter. The only error case occurs when there is no data packet available.

Returns
This call returns 0, or -1 if no packet was received.

Definition at line 2794 of file usb.c.

References ASSERT, EP_OFFSET, HWREGB, HWREGH, USB0_BASE, USB_CSRL0_RXRDY, USB_EP_0, USB_EP_1, USB_EP_2, USB_EP_3, USB_EP_4, USB_EP_5, USB_EP_6, USB_EP_7, USB_O_COUNT0, USB_O_CSRL0, USB_O_FIFO0, and USB_O_RXCSRL1.

2796 {
2797  uint32_t ui32Register, ui32ByteCount, ui32FIFO;
2798 
2799  //
2800  // Check the arguments.
2801  //
2802  ASSERT(ui32Base == USB0_BASE);
2803  ASSERT((ui32Endpoint == USB_EP_0) || (ui32Endpoint == USB_EP_1) ||
2804  (ui32Endpoint == USB_EP_2) || (ui32Endpoint == USB_EP_3) ||
2805  (ui32Endpoint == USB_EP_4) || (ui32Endpoint == USB_EP_5) ||
2806  (ui32Endpoint == USB_EP_6) || (ui32Endpoint == USB_EP_7));
2807 
2808  //
2809  // Get the address of the receive status register to use, based on the
2810  // endpoint.
2811  //
2812  if(ui32Endpoint == USB_EP_0)
2813  {
2814  ui32Register = USB_O_CSRL0;
2815  }
2816  else
2817  {
2818  ui32Register = USB_O_RXCSRL1 + EP_OFFSET(ui32Endpoint);
2819  }
2820 
2821  //
2822  // Don't allow reading of data if the RxPktRdy bit is not set.
2823  //
2824  if((HWREGH(ui32Base + ui32Register) & USB_CSRL0_RXRDY) == 0)
2825  {
2826  //
2827  // Can't read the data because none is available.
2828  //
2829  *pui32Size = 0;
2830 
2831  //
2832  // Return a failure since there is no data to read.
2833  //
2834  return(-1);
2835  }
2836 
2837  //
2838  // Get the byte count in the FIFO.
2839  //
2840  ui32ByteCount = HWREGH(ui32Base + USB_O_COUNT0 + ui32Endpoint);
2841 
2842  //
2843  // Determine how many bytes are copied.
2844  //
2845  ui32ByteCount = (ui32ByteCount < *pui32Size) ? ui32ByteCount : *pui32Size;
2846 
2847  //
2848  // Return the number of bytes we are going to read.
2849  //
2850  *pui32Size = ui32ByteCount;
2851 
2852  //
2853  // Calculate the FIFO address.
2854  //
2855  ui32FIFO = ui32Base + USB_O_FIFO0 + (ui32Endpoint >> 2);
2856 
2857  //
2858  // Read the data out of the FIFO.
2859  //
2860  for(; ui32ByteCount > 0; ui32ByteCount--)
2861  {
2862  //
2863  // Read a byte at a time from the FIFO.
2864  //
2865  *pui8Data++ = HWREGB(ui32FIFO);
2866  }
2867 
2868  //
2869  // Success.
2870  //
2871  return(0);
2872 }
#define USB_EP_4
Definition: usb.h:351
#define ASSERT(expr)
Definition: debug.h:67
#define USB_O_RXCSRL1
Definition: hw_usb.h:178
#define USB_EP_5
Definition: usb.h:352
#define HWREGH(x)
Definition: hw_types.h:50
#define USB_EP_6
Definition: usb.h:353
#define USB_EP_3
Definition: usb.h:350
#define USB_EP_0
Definition: usb.h:347
#define USB_O_FIFO0
Definition: hw_usb.h:59
#define USB_EP_2
Definition: usb.h:349
#define USB_EP_1
Definition: usb.h:348
#define USB_CSRL0_RXRDY
Definition: hw_usb.h:1213
#define USB_O_COUNT0
Definition: hw_usb.h:166
#define HWREGB(x)
Definition: hw_types.h:52
#define EP_OFFSET(Endpoint)
Definition: usb.c:82
#define USB0_BASE
Definition: hw_memmap.h:99
#define USB_O_CSRL0
Definition: hw_usb.h:162
#define USB_EP_7
Definition: usb.h:354
int32_t USBEndpointDataPut ( uint32_t  ui32Base,
uint32_t  ui32Endpoint,
uint8_t *  pui8Data,
uint32_t  ui32Size 
)

Puts data into the specified endpoint's FIFO.

Parameters
ui32Basespecifies the USB module base address.
ui32Endpointis the endpoint to access.
pui8Datais a pointer to the data area used as the source for the data to put into the FIFO.
ui32Sizeis the amount of data to put into the FIFO.

This function puts the data from the pui8Data parameter into the FIFO for this endpoint. If a packet is already pending for transmission, then this call does not put any of the data into the FIFO and returns -1. Care must be taken to not write more data than can fit into the FIFO allocated by the call to USBFIFOConfigSet().

Returns
This call returns 0 on success, or -1 to indicate that the FIFO is in use and cannot be written.

Definition at line 2993 of file usb.c.

References ASSERT, HWREGB, USB0_BASE, USB_CSRL0_TXRDY, USB_EP_0, USB_EP_1, USB_EP_2, USB_EP_3, USB_EP_4, USB_EP_5, USB_EP_6, USB_EP_7, USB_O_CSRL0, USB_O_FIFO0, and USB_TXCSRL1_TXRDY.

2995 {
2996  uint32_t ui32FIFO;
2997  uint8_t ui8TxPktRdy;
2998 
2999  //
3000  // Check the arguments.
3001  //
3002  ASSERT(ui32Base == USB0_BASE);
3003  ASSERT((ui32Endpoint == USB_EP_0) || (ui32Endpoint == USB_EP_1) ||
3004  (ui32Endpoint == USB_EP_2) || (ui32Endpoint == USB_EP_3) ||
3005  (ui32Endpoint == USB_EP_4) || (ui32Endpoint == USB_EP_5) ||
3006  (ui32Endpoint == USB_EP_6) || (ui32Endpoint == USB_EP_7));
3007 
3008  //
3009  // Get the bit position of TxPktRdy based on the endpoint.
3010  //
3011  if(ui32Endpoint == USB_EP_0)
3012  {
3013  ui8TxPktRdy = USB_CSRL0_TXRDY;
3014  }
3015  else
3016  {
3017  ui8TxPktRdy = USB_TXCSRL1_TXRDY;
3018  }
3019 
3020  //
3021  // Don't allow transmit of data if the TxPktRdy bit is already set.
3022  //
3023  if(HWREGB(ui32Base + USB_O_CSRL0 + ui32Endpoint) & ui8TxPktRdy)
3024  {
3025  return(-1);
3026  }
3027 
3028  //
3029  // Calculate the FIFO address.
3030  //
3031  ui32FIFO = ui32Base + USB_O_FIFO0 + (ui32Endpoint >> 2);
3032 
3033  //
3034  // Write the data to the FIFO.
3035  //
3036  for(; ui32Size > 0; ui32Size--)
3037  {
3038  HWREGB(ui32FIFO) = *pui8Data++;
3039  }
3040 
3041  //
3042  // Success.
3043  //
3044  return(0);
3045 }
#define USB_EP_4
Definition: usb.h:351
#define ASSERT(expr)
Definition: debug.h:67
#define USB_CSRL0_TXRDY
Definition: hw_usb.h:1212
#define USB_EP_5
Definition: usb.h:352
#define USB_EP_6
Definition: usb.h:353
#define USB_EP_3
Definition: usb.h:350
#define USB_EP_0
Definition: usb.h:347
#define USB_O_FIFO0
Definition: hw_usb.h:59
#define USB_EP_2
Definition: usb.h:349
#define USB_EP_1
Definition: usb.h:348
#define HWREGB(x)
Definition: hw_types.h:52
#define USB_TXCSRL1_TXRDY
Definition: hw_usb.h:1273
#define USB0_BASE
Definition: hw_memmap.h:99
#define USB_O_CSRL0
Definition: hw_usb.h:162
#define USB_EP_7
Definition: usb.h:354
int32_t USBEndpointDataSend ( uint32_t  ui32Base,
uint32_t  ui32Endpoint,
uint32_t  ui32TransType 
)

Starts the transfer of data from an endpoint's FIFO.

Parameters
ui32Basespecifies the USB module base address.
ui32Endpointis the endpoint to access.
ui32TransTypeis set to indicate what type of data is being sent.

This function starts the transfer of data from the FIFO for a specified endpoint. This function is called if the USB_EP_AUTO_SET bit was not enabled for the endpoint. Setting the ui32TransType parameter allows the appropriate signaling on the USB bus for the type of transaction being requested. The ui32TransType parameter must be one of the following:

  • USB_TRANS_OUT for OUT transaction on any endpoint in host mode.
  • USB_TRANS_IN for IN transaction on any endpoint in device mode.
  • USB_TRANS_IN_LAST for the last IN transaction on endpoint zero in a sequence of IN transactions.
  • USB_TRANS_SETUP for setup transactions on endpoint zero.
  • USB_TRANS_STATUS for status results on endpoint zero.
Returns
This call returns 0 on success, or -1 if a transmission is already in progress.

Definition at line 3074 of file usb.c.

References ASSERT, HWREGB, USB0_BASE, USB_CSRL0_TXRDY, USB_EP_0, USB_EP_1, USB_EP_2, USB_EP_3, USB_EP_4, USB_EP_5, USB_EP_6, USB_EP_7, USB_O_CSRL0, and USB_TXCSRL1_TXRDY.

3076 {
3077  uint32_t ui32TxPktRdy;
3078 
3079  //
3080  // Check the arguments.
3081  //
3082  ASSERT(ui32Base == USB0_BASE);
3083  ASSERT((ui32Endpoint == USB_EP_0) || (ui32Endpoint == USB_EP_1) ||
3084  (ui32Endpoint == USB_EP_2) || (ui32Endpoint == USB_EP_3) ||
3085  (ui32Endpoint == USB_EP_4) || (ui32Endpoint == USB_EP_5) ||
3086  (ui32Endpoint == USB_EP_6) || (ui32Endpoint == USB_EP_7));
3087 
3088  //
3089  // Get the bit position of TxPktRdy based on the endpoint.
3090  //
3091  if(ui32Endpoint == USB_EP_0)
3092  {
3093  //
3094  // Don't allow transmit of data if the TxPktRdy bit is already set.
3095  //
3096  if(HWREGB(ui32Base + USB_O_CSRL0) & USB_CSRL0_TXRDY)
3097  {
3098  return(-1);
3099  }
3100 
3101  ui32TxPktRdy = ui32TransType & 0xff;
3102  }
3103  else
3104  {
3105  //
3106  // Don't allow transmit of data if the TxPktRdy bit is already set.
3107  //
3108  if(HWREGB(ui32Base + USB_O_CSRL0 + ui32Endpoint) & USB_TXCSRL1_TXRDY)
3109  {
3110  return(-1);
3111  }
3112 
3113  ui32TxPktRdy = (ui32TransType >> 8) & 0xff;
3114  }
3115 
3116  //
3117  // Set TxPktRdy in order to send the data.
3118  //
3119  HWREGB(ui32Base + USB_O_CSRL0 + ui32Endpoint) = ui32TxPktRdy;
3120 
3121  //
3122  // Success.
3123  //
3124  return(0);
3125 }
#define USB_EP_4
Definition: usb.h:351
#define ASSERT(expr)
Definition: debug.h:67
#define USB_CSRL0_TXRDY
Definition: hw_usb.h:1212
#define USB_EP_5
Definition: usb.h:352
#define USB_EP_6
Definition: usb.h:353
#define USB_EP_3
Definition: usb.h:350
#define USB_EP_0
Definition: usb.h:347
#define USB_EP_2
Definition: usb.h:349
#define USB_EP_1
Definition: usb.h:348
#define HWREGB(x)
Definition: hw_types.h:52
#define USB_TXCSRL1_TXRDY
Definition: hw_usb.h:1273
#define USB0_BASE
Definition: hw_memmap.h:99
#define USB_O_CSRL0
Definition: hw_usb.h:162
#define USB_EP_7
Definition: usb.h:354
void USBEndpointDataToggleClear ( uint32_t  ui32Base,
uint32_t  ui32Endpoint,
uint32_t  ui32Flags 
)

Sets the data toggle on an endpoint to zero.

Parameters
ui32Basespecifies the USB module base address.
ui32Endpointspecifies the endpoint to reset the data toggle.
ui32Flagsspecifies whether to access the IN or OUT endpoint.

This function causes the USB controller to clear the data toggle for an endpoint. This call is not valid for endpoint zero and can be made with host or device controllers.

The ui32Flags parameter must be one of USB_EP_HOST_OUT, USB_EP_HOST_IN, USB_EP_DEV_OUT, or USB_EP_DEV_IN.

Returns
None.

Definition at line 1268 of file usb.c.

References ASSERT, EP_OFFSET, HWREGB, USB0_BASE, USB_EP_1, USB_EP_2, USB_EP_3, USB_EP_4, USB_EP_5, USB_EP_6, USB_EP_7, USB_EP_DEV_IN, USB_EP_HOST_OUT, USB_O_RXCSRL1, USB_O_TXCSRL1, USB_RXCSRL1_CLRDT, and USB_TXCSRL1_CLRDT.

1270 {
1271  //
1272  // Check the arguments.
1273  //
1274  ASSERT(ui32Base == USB0_BASE);
1275  ASSERT((ui32Endpoint == USB_EP_1) || (ui32Endpoint == USB_EP_2) ||
1276  (ui32Endpoint == USB_EP_3) || (ui32Endpoint == USB_EP_4) ||
1277  (ui32Endpoint == USB_EP_5) || (ui32Endpoint == USB_EP_6) ||
1278  (ui32Endpoint == USB_EP_7));
1279 
1280  //
1281  // See if the transmit or receive data toggle must be cleared.
1282  //
1283  if(ui32Flags & (USB_EP_HOST_OUT | USB_EP_DEV_IN))
1284  {
1285  HWREGB(ui32Base + USB_O_TXCSRL1 + EP_OFFSET(ui32Endpoint)) |=
1287  }
1288  else
1289  {
1290  HWREGB(ui32Base + USB_O_RXCSRL1 + EP_OFFSET(ui32Endpoint)) |=
1292  }
1293 }
#define USB_EP_DEV_IN
Definition: usb.h:244
#define USB_EP_4
Definition: usb.h:351
#define ASSERT(expr)
Definition: debug.h:67
#define USB_O_RXCSRL1
Definition: hw_usb.h:178
#define USB_TXCSRL1_CLRDT
Definition: hw_usb.h:1265
#define USB_EP_5
Definition: usb.h:352
#define USB_EP_HOST_OUT
Definition: usb.h:243
#define USB_EP_6
Definition: usb.h:353
#define USB_RXCSRL1_CLRDT
Definition: hw_usb.h:1302
#define USB_O_TXCSRL1
Definition: hw_usb.h:172
#define USB_EP_3
Definition: usb.h:350
#define USB_EP_2
Definition: usb.h:349
#define USB_EP_1
Definition: usb.h:348
#define HWREGB(x)
Definition: hw_types.h:52
#define EP_OFFSET(Endpoint)
Definition: usb.c:82
#define USB0_BASE
Definition: hw_memmap.h:99
#define USB_EP_7
Definition: usb.h:354
void USBEndpointDMAChannel ( uint32_t  ui32Base,
uint32_t  ui32Endpoint,
uint32_t  ui32Channel 
)

Sets the DMA channel to use for a specified endpoint.

Parameters
ui32Basespecifies the USB module base address.
ui32Endpointspecifies which endpoint's FIFO address to return.
ui32Channelspecifies which DMA channel to use for which endpoint.

This function is used to configure which DMA channel to use with a specified endpoint. Receive DMA channels can only be used with receive endpoints and transmit DMA channels can only be used with transmit endpoints. As a result, the 3 receive and 3 transmit DMA channels can be mapped to any endpoint other than 0. The values that are passed into the ui32Channel value are the UDMA_CHANNEL_USBEP* values defined in udma.h.

Note
This function only has an effect on microcontrollers that have the ability to change the DMA channel for an endpoint. Calling this function on other devices has no effect.
Returns
None.

Definition at line 3944 of file usb.c.

References ASSERT, HWREG, UDMA_CHANNEL_USBEP3TX, USB0_BASE, USB_EP_1, USB_EP_2, USB_EP_3, USB_EP_4, USB_EP_5, USB_EP_6, USB_EP_7, USB_O_DMASEL, and USBEPToIndex.

3946 {
3947  uint32_t ui32Mask;
3948 
3949  //
3950  // Check the arguments.
3951  //
3952  ASSERT(ui32Base == USB0_BASE);
3953  ASSERT((ui32Endpoint == USB_EP_1) || (ui32Endpoint == USB_EP_2) ||
3954  (ui32Endpoint == USB_EP_3) || (ui32Endpoint == USB_EP_4) ||
3955  (ui32Endpoint == USB_EP_5) || (ui32Endpoint == USB_EP_6) ||
3956  (ui32Endpoint == USB_EP_7));
3957  ASSERT(ui32Channel <= UDMA_CHANNEL_USBEP3TX);
3958 
3959  //
3960  // The input select mask must be shifted into the correct position
3961  // based on the channel.
3962  //
3963  ui32Mask = 0xf << (ui32Channel * 4);
3964 
3965  //
3966  // Clear out the current selection for the channel.
3967  //
3968  ui32Mask = HWREG(ui32Base + USB_O_DMASEL) & (~ui32Mask);
3969 
3970  //
3971  // The input select is now shifted into the correct position based on the
3972  // channel.
3973  //
3974  ui32Mask |= (USBEPToIndex(ui32Endpoint)) << (ui32Channel * 4);
3975 
3976  //
3977  // Write the value out to the register.
3978  //
3979  HWREG(ui32Base + USB_O_DMASEL) = ui32Mask;
3980 }
#define HWREG(x)
Definition: hw_types.h:48
#define USB_EP_4
Definition: usb.h:351
#define ASSERT(expr)
Definition: debug.h:67
#define USB_EP_5
Definition: usb.h:352
#define USB_O_DMASEL
Definition: hw_usb.h:403
#define USB_EP_6
Definition: usb.h:353
#define USBEPToIndex(x)
Definition: usb.h:364
#define USB_EP_3
Definition: usb.h:350
#define USB_EP_2
Definition: usb.h:349
#define USB_EP_1
Definition: usb.h:348
#define UDMA_CHANNEL_USBEP3TX
Definition: udma.h:261
#define USB0_BASE
Definition: hw_memmap.h:99
#define USB_EP_7
Definition: usb.h:354
void USBEndpointDMAConfigSet ( uint32_t  ui32Base,
uint32_t  ui32Endpoint,
uint32_t  ui32Config 
)

Configure the DMA settings for an endpoint.

Parameters
ui32Basespecifies the USB module base address.
ui32Endpointis the endpoint to access.
ui32Configspecifies the configuration options for an endpoint.

This function configures the DMA settings for a specified endpoint without changing other options that may already be configured. In order for the DMA transfer to be enabled, the USBEndpointDMAEnable() function must be called before starting the DMA transfer. The configuration options are passed in the ui32Config parameter and can have the values described below.

One of the following values to specify direction:

  • USB_EP_HOST_OUT or USB_EP_DEV_IN - This setting is used with DMA transfers from memory to the USB controller.
  • USB_EP_HOST_IN or USB_EP_DEV_OUT - This setting is used with DMA transfers from the USB controller to memory.

One of the following values:

  • USB_EP_DMA_MODE_0(default) - This setting is typically used for transfers that do not span multiple packets or when interrupts are required for each packet.
  • USB_EP_DMA_MODE_1 - This setting is typically used for transfers that span multiple packets and do not require interrupts between packets.

Values only used with USB_EP_HOST_OUT or USB_EP_DEV_IN:

  • USB_EP_AUTO_SET - This setting is used to allow transmit DMA transfers to automatically be sent when a full packet is loaded into a FIFO. This is needed with USB_EP_DMA_MODE_1 to ensure that packets go out when the FIFO becomes full and the DMA has more data to send.

Values only used with USB_EP_HOST_IN or USB_EP_DEV_OUT:

  • USB_EP_AUTO_CLEAR - This setting is used to allow receive DMA transfers to automatically be acknowledged as they are received. This is needed with USB_EP_DMA_MODE_1 to ensure that packets continue to be received and acknowledged when the FIFO is emptied by the DMA transfer.

Values only used with USB_EP_HOST_IN:

  • USB_EP_AUTO_REQUEST - This setting is used to allow receive DMA transfers to automatically request a new IN transaction when the previous transfer has emptied the FIFO. This is typically used in conjunction with USB_EP_AUTO_CLEAR so that receive DMA transfers can continue without interrupting the main processor.

Example: Set endpoint 1 receive endpoint to automatically acknowledge request and automatically generate a new IN request in host mode.

//! //
//! // Configure endpoint 1 for receiving multiple packets using DMA.
//! //
//! USBEndpointDMAConfigSet(USB0_BASE, USB_EP_1, USB_EP_HOST_IN |
//!                                              USB_EP_DMA_MODE_1 |
//!                                              USB_EP_AUTO_CLEAR |
//!                                              USB_EP_AUTO_REQUEST);
//! 
\b Example: Set endpoint 2 transmit endpoint to automatically send each
packet in host mode when spanning multiple packets.
//! //
//! // Configure endpoint 1 for transmitting multiple packets using DMA.
//! //
//! USBEndpointDMAConfigSet(USB0_BASE, USB_EP_2, USB_EP_HOST_OUT |
//!                                              USB_EP_DMA_MODE_1 |
//!                                              USB_EP_AUTO_SET);
//! 
\return None.  

Definition at line 2574 of file usb.c.

References EP_OFFSET, HWREGB, USB_EP_AUTO_CLEAR, USB_EP_AUTO_REQUEST, USB_EP_AUTO_SET, USB_EP_DMA_MODE_1, USB_EP_HOST_OUT, USB_O_RXCSRH1, USB_O_TXCSRH1, USB_RXCSRH1_AUTOCL, USB_RXCSRH1_AUTORQ, USB_RXCSRH1_DMAMOD, USB_TXCSRH1_AUTOSET, and USB_TXCSRH1_DMAMOD.

2576 {
2577  uint32_t ui32NewConfig;
2578 
2579  if(ui32Config & USB_EP_HOST_OUT)
2580  {
2581  //
2582  // Clear mode and DMA enable.
2583  //
2584  ui32NewConfig =
2585  (HWREGB(ui32Base + EP_OFFSET(ui32Endpoint) + USB_O_TXCSRH1) &
2587 
2588  if(ui32Config & USB_EP_DMA_MODE_1)
2589  {
2590  ui32NewConfig |= USB_TXCSRH1_DMAMOD;
2591  }
2592 
2593  if(ui32Config & USB_EP_AUTO_SET)
2594  {
2595  ui32NewConfig |= USB_TXCSRH1_AUTOSET;
2596  }
2597 
2598  HWREGB(ui32Base + EP_OFFSET(ui32Endpoint) + USB_O_TXCSRH1) =
2599  ui32NewConfig;
2600  }
2601  else
2602  {
2603  ui32NewConfig =
2604  (HWREGB(ui32Base + EP_OFFSET(ui32Endpoint) + USB_O_RXCSRH1) &
2606 
2607  if(ui32Config & USB_EP_DMA_MODE_1)
2608  {
2609  ui32NewConfig |= USB_RXCSRH1_DMAMOD;
2610  }
2611 
2612  if(ui32Config & USB_EP_AUTO_CLEAR)
2613  {
2614  ui32NewConfig |= USB_RXCSRH1_AUTOCL;
2615  }
2616  if(ui32Config & USB_EP_AUTO_REQUEST)
2617  {
2618  ui32NewConfig |= USB_RXCSRH1_AUTORQ;
2619  }
2620  HWREGB(ui32Base + EP_OFFSET(ui32Endpoint) + USB_O_RXCSRH1) =
2621  ui32NewConfig;
2622  }
2623 }
#define USB_TXCSRH1_DMAMOD
Definition: hw_usb.h:1285
#define USB_RXCSRH1_DMAMOD
Definition: hw_usb.h:1325
#define USB_EP_DMA_MODE_1
Definition: usb.h:230
#define USB_O_RXCSRH1
Definition: hw_usb.h:180
#define USB_O_TXCSRH1
Definition: hw_usb.h:174
#define USB_EP_AUTO_REQUEST
Definition: usb.h:227
#define USB_EP_HOST_OUT
Definition: usb.h:243
#define USB_RXCSRH1_AUTORQ
Definition: hw_usb.h:1320
#define USB_EP_AUTO_SET
Definition: usb.h:226
#define USB_RXCSRH1_AUTOCL
Definition: hw_usb.h:1319
#define USB_TXCSRH1_AUTOSET
Definition: hw_usb.h:1280
#define USB_EP_AUTO_CLEAR
Definition: usb.h:228
#define HWREGB(x)
Definition: hw_types.h:52
#define EP_OFFSET(Endpoint)
Definition: usb.c:82
void USBEndpointDMADisable ( uint32_t  ui32Base,
uint32_t  ui32Endpoint,
uint32_t  ui32Flags 
)

Disable DMA on a specified endpoint.

Parameters
ui32Basespecifies the USB module base address.
ui32Endpointis the endpoint to access.
ui32Flagsspecifies which direction to disable.

This function disables DMA on a specified endpoint to allow non-DMA USB transactions to generate interrupts normally. The ui32Flags parameter must be USB_EP_DEV_IN or USB_EP_DEV_OUT; all other bits are ignored.

Returns
None.

Definition at line 2687 of file usb.c.

References EP_OFFSET, HWREGB, USB_EP_DEV_IN, USB_O_RXCSRH1, USB_O_TXCSRH1, USB_RXCSRH1_DMAEN, and USB_TXCSRH1_DMAEN.

2689 {
2690  //
2691  // If this was a request to disable DMA on the IN portion of the endpoint
2692  // then handle it.
2693  //
2694  if(ui32Flags & USB_EP_DEV_IN)
2695  {
2696  //
2697  // Just disable DMA leave the mode setting.
2698  //
2699  HWREGB(ui32Base + EP_OFFSET(ui32Endpoint) + USB_O_TXCSRH1) &=
2701  }
2702  else
2703  {
2704  //
2705  // Just disable DMA leave the mode setting.
2706  //
2707  HWREGB(ui32Base + EP_OFFSET(ui32Endpoint) + USB_O_RXCSRH1) &=
2709  }
2710 }
#define USB_RXCSRH1_DMAEN
Definition: hw_usb.h:1322
#define USB_EP_DEV_IN
Definition: usb.h:244
#define USB_O_RXCSRH1
Definition: hw_usb.h:180
#define USB_O_TXCSRH1
Definition: hw_usb.h:174
#define USB_TXCSRH1_DMAEN
Definition: hw_usb.h:1283
#define HWREGB(x)
Definition: hw_types.h:52
#define EP_OFFSET(Endpoint)
Definition: usb.c:82
void USBEndpointDMAEnable ( uint32_t  ui32Base,
uint32_t  ui32Endpoint,
uint32_t  ui32Flags 
)

Enable DMA on a specified endpoint.

Parameters
ui32Basespecifies the USB module base address.
ui32Endpointis the endpoint to access.
ui32Flagsspecifies which direction and what mode to use when enabling DMA.

This function enables DMA on a specified endpoint and configures the mode according to the values in the ui32Flags parameter. The ui32Flags parameter must have USB_EP_DEV_IN or USB_EP_DEV_OUT set. Once this function is called the only DMA or error interrupts are generated by the USB controller.

Note
If this function is called when an endpoint is configured in DMA mode 0 the USB controller does not generate an interrupt.
Returns
None.

Definition at line 2647 of file usb.c.

References EP_OFFSET, HWREGB, USB_EP_DEV_IN, USB_O_RXCSRH1, USB_O_TXCSRH1, USB_RXCSRH1_DMAEN, and USB_TXCSRH1_DMAEN.

2649 {
2650  //
2651  // See if the transmit DMA is being enabled.
2652  //
2653  if(ui32Flags & USB_EP_DEV_IN)
2654  {
2655  //
2656  // Enable DMA on the transmit endpoint.
2657  //
2658  HWREGB(ui32Base + EP_OFFSET(ui32Endpoint) + USB_O_TXCSRH1) |=
2660  }
2661  else
2662  {
2663  //
2664  // Enable DMA on the receive endpoint.
2665  //
2666  HWREGB(ui32Base + EP_OFFSET(ui32Endpoint) + USB_O_RXCSRH1) |=
2668  }
2669 }
#define USB_RXCSRH1_DMAEN
Definition: hw_usb.h:1322
#define USB_EP_DEV_IN
Definition: usb.h:244
#define USB_O_RXCSRH1
Definition: hw_usb.h:180
#define USB_O_TXCSRH1
Definition: hw_usb.h:174
#define USB_TXCSRH1_DMAEN
Definition: hw_usb.h:1283
#define HWREGB(x)
Definition: hw_types.h:52
#define EP_OFFSET(Endpoint)
Definition: usb.c:82
void USBEndpointPacketCountSet ( uint32_t  ui32Base,
uint32_t  ui32Endpoint,
uint32_t  ui32Count 
)

Sets the number of packets to request when transferring multiple bulk packets.

Parameters
ui32Basespecifies the USB module base address.
ui32Endpointis the endpoint index to target for this write.
ui32Countis the number of packets to request.

This function sets the number of consecutive bulk packets to request when transferring multiple bulk packets with DMA.

Note
This feature is not available on all Tiva devices. Please check the data sheet to determine if the USB controller has a DMA controller or if it must use the uDMA controller for DMA transfers.
Returns
None.

Definition at line 4192 of file usb.c.

References HWREG, USB_O_RQPKTCOUNT1, and USBEPToIndex.

4194 {
4195  HWREG(ui32Base + USB_O_RQPKTCOUNT1 +
4196  (0x4 * (USBEPToIndex(ui32Endpoint) - 1))) = ui32Count;
4197 }
#define HWREG(x)
Definition: hw_types.h:48
#define USB_O_RQPKTCOUNT1
Definition: hw_usb.h:349
#define USBEPToIndex(x)
Definition: usb.h:364
uint32_t USBEndpointStatus ( uint32_t  ui32Base,
uint32_t  ui32Endpoint 
)

Returns the current status of an endpoint.

Parameters
ui32Basespecifies the USB module base address.
ui32Endpointis the endpoint to access.

This function returns the status of a specified endpoint. If any of these status bits must be cleared, then the USBDevEndpointStatusClear() or the USBHostEndpointStatusClear() functions must be called.

The following are the status flags for host mode:

  • USB_HOST_IN_PID_ERROR - PID error on the specified endpoint.
  • USB_HOST_IN_NOT_COMP - The device failed to respond to an IN request.
  • USB_HOST_IN_STALL - A stall was received on an IN endpoint.
  • USB_HOST_IN_DATA_ERROR - There was a CRC or bit-stuff error on an IN endpoint in Isochronous mode.
  • USB_HOST_IN_NAK_TO - NAKs received on this IN endpoint for more than the specified timeout period.
  • USB_HOST_IN_ERROR - Failed to communicate with a device using this IN endpoint.
  • USB_HOST_IN_FIFO_FULL - This IN endpoint's FIFO is full.
  • USB_HOST_IN_PKTRDY - Data packet ready on this IN endpoint.
  • USB_HOST_OUT_NAK_TO - NAKs received on this OUT endpoint for more than the specified timeout period.
  • USB_HOST_OUT_NOT_COMP - The device failed to respond to an OUT request.
  • USB_HOST_OUT_STALL - A stall was received on this OUT endpoint.
  • USB_HOST_OUT_ERROR - Failed to communicate with a device using this OUT endpoint.
  • USB_HOST_OUT_FIFO_NE - This endpoint's OUT FIFO is not empty.
  • USB_HOST_OUT_PKTPEND - The data transfer on this OUT endpoint has not completed.
  • USB_HOST_EP0_NAK_TO - NAKs received on endpoint zero for more than the specified timeout period.
  • USB_HOST_EP0_ERROR - The device failed to respond to a request on endpoint zero.
  • USB_HOST_EP0_IN_STALL - A stall was received on endpoint zero for an IN transaction.
  • USB_HOST_EP0_IN_PKTRDY - Data packet ready on endpoint zero for an IN transaction.

The following are the status flags for device mode:

  • USB_DEV_OUT_SENT_STALL - A stall was sent on this OUT endpoint.
  • USB_DEV_OUT_DATA_ERROR - There was a CRC or bit-stuff error on an OUT endpoint.
  • USB_DEV_OUT_OVERRUN - An OUT packet was not loaded due to a full FIFO.
  • USB_DEV_OUT_FIFO_FULL - The OUT endpoint's FIFO is full.
  • USB_DEV_OUT_PKTRDY - There is a data packet ready in the OUT endpoint's FIFO.
  • USB_DEV_IN_NOT_COMP - A larger packet was split up, more data to come.
  • USB_DEV_IN_SENT_STALL - A stall was sent on this IN endpoint.
  • USB_DEV_IN_UNDERRUN - Data was requested on the IN endpoint and no data was ready.
  • USB_DEV_IN_FIFO_NE - The IN endpoint's FIFO is not empty.
  • USB_DEV_IN_PKTPEND - The data transfer on this IN endpoint has not completed.
  • USB_DEV_EP0_SETUP_END - A control transaction ended before Data End condition was sent.
  • USB_DEV_EP0_SENT_STALL - A stall was sent on endpoint zero.
  • USB_DEV_EP0_IN_PKTPEND - The data transfer on endpoint zero has not completed.
  • USB_DEV_EP0_OUT_PKTRDY - There is a data packet ready in endpoint zero's OUT FIFO.
Returns
The current status flags for the endpoint depending on mode.

Definition at line 994 of file usb.c.

References ASSERT, EP_OFFSET, HWREGH, USB0_BASE, USB_EP_0, USB_EP_1, USB_EP_2, USB_EP_3, USB_EP_4, USB_EP_5, USB_EP_6, USB_EP_7, USB_O_RXCSRL1, USB_O_TXCSRL1, and USB_RX_EPSTATUS_SHIFT.

995 {
996  uint32_t ui32Status;
997 
998  //
999  // Check the arguments.
1000  //
1001  ASSERT(ui32Base == USB0_BASE);
1002  ASSERT((ui32Endpoint == USB_EP_0) || (ui32Endpoint == USB_EP_1) ||
1003  (ui32Endpoint == USB_EP_2) || (ui32Endpoint == USB_EP_3) ||
1004  (ui32Endpoint == USB_EP_4) || (ui32Endpoint == USB_EP_5) ||
1005  (ui32Endpoint == USB_EP_6) || (ui32Endpoint == USB_EP_7));
1006 
1007  //
1008  // Get the TX portion of the endpoint status.
1009  //
1010  ui32Status = HWREGH(ui32Base + EP_OFFSET(ui32Endpoint) + USB_O_TXCSRL1);
1011 
1012  //
1013  // Get the RX portion of the endpoint status.
1014  //
1015  ui32Status |=
1016  ((HWREGH(ui32Base + EP_OFFSET(ui32Endpoint) + USB_O_RXCSRL1)) <<
1018 
1019  //
1020  // Return the endpoint status.
1021  //
1022  return(ui32Status);
1023 }
#define USB_RX_EPSTATUS_SHIFT
Definition: usb.c:74
#define USB_EP_4
Definition: usb.h:351
#define ASSERT(expr)
Definition: debug.h:67
#define USB_O_RXCSRL1
Definition: hw_usb.h:178
#define USB_EP_5
Definition: usb.h:352
#define HWREGH(x)
Definition: hw_types.h:50
#define USB_EP_6
Definition: usb.h:353
#define USB_O_TXCSRL1
Definition: hw_usb.h:172
#define USB_EP_3
Definition: usb.h:350
#define USB_EP_0
Definition: usb.h:347
#define USB_EP_2
Definition: usb.h:349
#define USB_EP_1
Definition: usb.h:348
#define EP_OFFSET(Endpoint)
Definition: usb.c:82
#define USB0_BASE
Definition: hw_memmap.h:99
#define USB_EP_7
Definition: usb.h:354
uint32_t USBFIFOAddrGet ( uint32_t  ui32Base,
uint32_t  ui32Endpoint 
)

Returns the absolute FIFO address for a specified endpoint.

Parameters
ui32Basespecifies the USB module base address.
ui32Endpointspecifies which endpoint's FIFO address to return.

This function returns the actual physical address of the FIFO. This address is needed when the USB is going to be used with the uDMA controller and the source or destination address must be set to the physical FIFO address for a specified endpoint. This function can also be used to provide the physical address to manually read data from an endpoints FIFO.

Returns
None.

Definition at line 3843 of file usb.c.

References USB_O_FIFO0.

3844 {
3845  //
3846  // Return the FIFO address for this endpoint.
3847  //
3848  return(ui32Base + USB_O_FIFO0 + (ui32Endpoint >> 2));
3849 }
#define USB_O_FIFO0
Definition: hw_usb.h:59
void USBFIFOConfigGet ( uint32_t  ui32Base,
uint32_t  ui32Endpoint,
uint32_t *  pui32FIFOAddress,
uint32_t *  pui32FIFOSize,
uint32_t  ui32Flags 
)

Returns the FIFO configuration for an endpoint.

Parameters
ui32Basespecifies the USB module base address.
ui32Endpointis the endpoint to access.
pui32FIFOAddressis the starting address for the FIFO.
pui32FIFOSizeis the size of the FIFO as specified by one of the USB_FIFO_SZ_ values.
ui32Flagsspecifies what information to retrieve from the FIFO configuration.

This function returns the starting address and size of the FIFO for a specified endpoint. Endpoint zero does not have a dynamically configurable FIFO, so this function must not be called for endpoint zero. The ui32Flags parameter specifies whether the endpoint's OUT or IN FIFO must be read. If in host mode, the ui32Flags parameter must be USB_EP_HOST_OUT or USB_EP_HOST_IN, and if in device mode, the ui32Flags parameter must be either USB_EP_DEV_OUT or USB_EP_DEV_IN.

Returns
None.

Definition at line 2456 of file usb.c.

References _USBIndexRead(), ASSERT, USB0_BASE, USB_EP_1, USB_EP_2, USB_EP_3, USB_EP_4, USB_EP_5, USB_EP_6, USB_EP_7, USB_EP_DEV_IN, USB_EP_HOST_OUT, USB_O_RXFIFOADD, USB_O_RXFIFOSZ, USB_O_TXFIFOADD, and USB_O_TXFIFOSZ.

2459 {
2460  //
2461  // Check the arguments.
2462  //
2463  ASSERT(ui32Base == USB0_BASE);
2464  ASSERT((ui32Endpoint == USB_EP_1) || (ui32Endpoint == USB_EP_2) ||
2465  (ui32Endpoint == USB_EP_3) || (ui32Endpoint == USB_EP_4) ||
2466  (ui32Endpoint == USB_EP_5) || (ui32Endpoint == USB_EP_6) ||
2467  (ui32Endpoint == USB_EP_7));
2468 
2469  //
2470  // See if the transmit or receive FIFO is being configured.
2471  //
2472  if(ui32Flags & (USB_EP_HOST_OUT | USB_EP_DEV_IN))
2473  {
2474  //
2475  // Get the transmit FIFO location and size for this endpoint.
2476  //
2477  *pui32FIFOAddress = (_USBIndexRead(ui32Base, ui32Endpoint >> 4,
2478  (uint32_t)USB_O_TXFIFOADD,
2479  2)) << 3;
2480  *pui32FIFOSize = _USBIndexRead(ui32Base, ui32Endpoint >> 4,
2481  (uint32_t)USB_O_TXFIFOSZ, 1);
2482  }
2483  else
2484  {
2485  //
2486  // Get the receive FIFO location and size for this endpoint.
2487  //
2488  *pui32FIFOAddress = (_USBIndexRead(ui32Base, ui32Endpoint >> 4,
2489  (uint32_t)USB_O_RXFIFOADD,
2490  2)) << 3;
2491  *pui32FIFOSize = _USBIndexRead(ui32Base, ui32Endpoint >> 4,
2492  (uint32_t)USB_O_RXFIFOSZ, 1);
2493  }
2494 }
#define USB_O_RXFIFOADD
Definition: hw_usb.h:72
static uint32_t _USBIndexRead(uint32_t ui32Base, uint32_t ui32Endpoint, uint32_t ui32IndexedReg, uint32_t ui32Size)
Definition: usb.c:164
#define USB_EP_DEV_IN
Definition: usb.h:244
#define USB_EP_4
Definition: usb.h:351
#define ASSERT(expr)
Definition: debug.h:67
#define USB_O_TXFIFOADD
Definition: hw_usb.h:71
#define USB_EP_5
Definition: usb.h:352
#define USB_O_RXFIFOSZ
Definition: hw_usb.h:70
#define USB_EP_HOST_OUT
Definition: usb.h:243
#define USB_EP_6
Definition: usb.h:353
#define USB_EP_3
Definition: usb.h:350
#define USB_EP_2
Definition: usb.h:349
#define USB_EP_1
Definition: usb.h:348
#define USB0_BASE
Definition: hw_memmap.h:99
#define USB_O_TXFIFOSZ
Definition: hw_usb.h:69
#define USB_EP_7
Definition: usb.h:354

Here is the call graph for this function:

void USBFIFOConfigSet ( uint32_t  ui32Base,
uint32_t  ui32Endpoint,
uint32_t  ui32FIFOAddress,
uint32_t  ui32FIFOSize,
uint32_t  ui32Flags 
)

Sets the FIFO configuration for an endpoint.

Parameters
ui32Basespecifies the USB module base address.
ui32Endpointis the endpoint to access.
ui32FIFOAddressis the starting address for the FIFO.
ui32FIFOSizeis the size of the FIFO specified by one of the USB_FIFO_SZ_ values.
ui32Flagsspecifies what information to set in the FIFO configuration.

This function configures the starting FIFO RAM address and size of the FIFO for a specified endpoint. Endpoint zero does not have a dynamically configurable FIFO, so this function must not be called for endpoint zero. The ui32FIFOSize parameter must be one of the values in the USB_FIFO_SZ_ values.

The ui32FIFOAddress value must be a multiple of 8 bytes and directly indicates the starting address in the USB controller's FIFO RAM. For example, a value of 64 indicates that the FIFO starts 64 bytes into the USB controller's FIFO memory. The ui32Flags value specifies whether the endpoint's OUT or IN FIFO must be configured. If in host mode, use USB_EP_HOST_OUT or USB_EP_HOST_IN, and if in device mode, use USB_EP_DEV_OUT or USB_EP_DEV_IN.

Returns
None.

Definition at line 2393 of file usb.c.

References _USBIndexWrite(), ASSERT, USB0_BASE, USB_EP_1, USB_EP_2, USB_EP_3, USB_EP_4, USB_EP_5, USB_EP_6, USB_EP_7, USB_EP_DEV_IN, USB_EP_HOST_OUT, USB_O_RXFIFOADD, USB_O_RXFIFOSZ, USB_O_TXFIFOADD, and USB_O_TXFIFOSZ.

2396 {
2397  //
2398  // Check the arguments.
2399  //
2400  ASSERT(ui32Base == USB0_BASE);
2401  ASSERT((ui32Endpoint == USB_EP_1) || (ui32Endpoint == USB_EP_2) ||
2402  (ui32Endpoint == USB_EP_3) || (ui32Endpoint == USB_EP_4) ||
2403  (ui32Endpoint == USB_EP_5) || (ui32Endpoint == USB_EP_6) ||
2404  (ui32Endpoint == USB_EP_7));
2405 
2406  //
2407  // See if the transmit or receive FIFO is being configured.
2408  //
2409  if(ui32Flags & (USB_EP_HOST_OUT | USB_EP_DEV_IN))
2410  {
2411  //
2412  // Set the transmit FIFO location and size for this endpoint.
2413  //
2414  _USBIndexWrite(ui32Base, ui32Endpoint >> 4, USB_O_TXFIFOSZ,
2415  ui32FIFOSize, 1);
2416  _USBIndexWrite(ui32Base, ui32Endpoint >> 4, USB_O_TXFIFOADD,
2417  ui32FIFOAddress >> 3, 2);
2418  }
2419  else
2420  {
2421  //
2422  // Set the receive FIFO location and size for this endpoint.
2423  //
2424  _USBIndexWrite(ui32Base, ui32Endpoint >> 4, USB_O_RXFIFOSZ,
2425  ui32FIFOSize, 1);
2426  _USBIndexWrite(ui32Base, ui32Endpoint >> 4, USB_O_RXFIFOADD,
2427  ui32FIFOAddress >> 3, 2);
2428  }
2429 }
#define USB_O_RXFIFOADD
Definition: hw_usb.h:72
#define USB_EP_DEV_IN
Definition: usb.h:244
static void _USBIndexWrite(uint32_t ui32Base, uint32_t ui32Endpoint, uint32_t ui32IndexedReg, uint32_t ui32Value, uint32_t ui32Size)
Definition: usb.c:101
#define USB_EP_4
Definition: usb.h:351
#define ASSERT(expr)
Definition: debug.h:67
#define USB_O_TXFIFOADD
Definition: hw_usb.h:71
#define USB_EP_5
Definition: usb.h:352
#define USB_O_RXFIFOSZ
Definition: hw_usb.h:70
#define USB_EP_HOST_OUT
Definition: usb.h:243
#define USB_EP_6
Definition: usb.h:353
#define USB_EP_3
Definition: usb.h:350
#define USB_EP_2
Definition: usb.h:349
#define USB_EP_1
Definition: usb.h:348
#define USB0_BASE
Definition: hw_memmap.h:99
#define USB_O_TXFIFOSZ
Definition: hw_usb.h:69
#define USB_EP_7
Definition: usb.h:354

Here is the call graph for this function:

void USBFIFOFlush ( uint32_t  ui32Base,
uint32_t  ui32Endpoint,
uint32_t  ui32Flags 
)

Forces a flush of an endpoint's FIFO.

Parameters
ui32Basespecifies the USB module base address.
ui32Endpointis the endpoint to access.
ui32Flagsspecifies if the IN or OUT endpoint is accessed.

This function forces the USB controller to flush out the data in the FIFO. The function can be called with either host or device controllers and requires the ui32Flags parameter be one of USB_EP_HOST_OUT, USB_EP_HOST_IN, USB_EP_DEV_OUT, or USB_EP_DEV_IN.

Returns
None.

Definition at line 3144 of file usb.c.

References ASSERT, EP_OFFSET, HWREGB, USB0_BASE, USB_CSRH0_FLUSH, USB_CSRL0_RXRDY, USB_CSRL0_TXRDY, USB_EP_0, USB_EP_1, USB_EP_2, USB_EP_3, USB_EP_4, USB_EP_5, USB_EP_6, USB_EP_7, USB_EP_DEV_IN, USB_EP_HOST_OUT, USB_O_CSRH0, USB_O_CSRL0, USB_O_RXCSRL1, USB_O_TXCSRL1, USB_RXCSRL1_FLUSH, USB_RXCSRL1_RXRDY, USB_TXCSRL1_FLUSH, and USB_TXCSRL1_TXRDY.

3145 {
3146  //
3147  // Check the arguments.
3148  //
3149  ASSERT(ui32Base == USB0_BASE);
3150  ASSERT((ui32Endpoint == USB_EP_0) || (ui32Endpoint == USB_EP_1) ||
3151  (ui32Endpoint == USB_EP_2) || (ui32Endpoint == USB_EP_3) ||
3152  (ui32Endpoint == USB_EP_4) || (ui32Endpoint == USB_EP_5) ||
3153  (ui32Endpoint == USB_EP_6) || (ui32Endpoint == USB_EP_7));
3154 
3155  //
3156  // Endpoint zero has a different register set for FIFO flushing.
3157  //
3158  if(ui32Endpoint == USB_EP_0)
3159  {
3160  //
3161  // Nothing in the FIFO if neither of these bits are set.
3162  //
3163  if((HWREGB(ui32Base + USB_O_CSRL0) &
3164  (USB_CSRL0_RXRDY | USB_CSRL0_TXRDY)) != 0)
3165  {
3166  //
3167  // Hit the Flush FIFO bit.
3168  //
3169  HWREGB(ui32Base + USB_O_CSRH0) = USB_CSRH0_FLUSH;
3170  }
3171  }
3172  else
3173  {
3174  //
3175  // Only reset the IN or OUT FIFO.
3176  //
3177  if(ui32Flags & (USB_EP_HOST_OUT | USB_EP_DEV_IN))
3178  {
3179  //
3180  // Make sure the FIFO is not empty.
3181  //
3182  if(HWREGB(ui32Base + USB_O_TXCSRL1 + EP_OFFSET(ui32Endpoint)) &
3184  {
3185  //
3186  // Hit the Flush FIFO bit.
3187  //
3188  HWREGB(ui32Base + USB_O_TXCSRL1 + EP_OFFSET(ui32Endpoint)) |=
3190  }
3191  }
3192  else
3193  {
3194  //
3195  // Make sure that the FIFO is not empty.
3196  //
3197  if(HWREGB(ui32Base + USB_O_RXCSRL1 + EP_OFFSET(ui32Endpoint)) &
3199  {
3200  //
3201  // Hit the Flush FIFO bit.
3202  //
3203  HWREGB(ui32Base + USB_O_RXCSRL1 + EP_OFFSET(ui32Endpoint)) |=
3205  }
3206  }
3207  }
3208 }
#define USB_EP_DEV_IN
Definition: usb.h:244
#define USB_O_CSRH0
Definition: hw_usb.h:164
#define USB_EP_4
Definition: usb.h:351
#define ASSERT(expr)
Definition: debug.h:67
#define USB_RXCSRL1_RXRDY
Definition: hw_usb.h:1312
#define USB_CSRL0_TXRDY
Definition: hw_usb.h:1212
#define USB_O_RXCSRL1
Definition: hw_usb.h:178
#define USB_EP_5
Definition: usb.h:352
#define USB_EP_HOST_OUT
Definition: usb.h:243
#define USB_CSRH0_FLUSH
Definition: hw_usb.h:1223
#define USB_EP_6
Definition: usb.h:353
#define USB_O_TXCSRL1
Definition: hw_usb.h:172
#define USB_EP_3
Definition: usb.h:350
#define USB_EP_0
Definition: usb.h:347
#define USB_EP_2
Definition: usb.h:349
#define USB_EP_1
Definition: usb.h:348
#define USB_RXCSRL1_FLUSH
Definition: hw_usb.h:1306
#define USB_CSRL0_RXRDY
Definition: hw_usb.h:1213
#define USB_TXCSRL1_FLUSH
Definition: hw_usb.h:1269
#define HWREGB(x)
Definition: hw_types.h:52
#define EP_OFFSET(Endpoint)
Definition: usb.c:82
#define USB_TXCSRL1_TXRDY
Definition: hw_usb.h:1273
#define USB0_BASE
Definition: hw_memmap.h:99
#define USB_O_CSRL0
Definition: hw_usb.h:162
#define USB_EP_7
Definition: usb.h:354
uint32_t USBFrameNumberGet ( uint32_t  ui32Base)

Gets the current frame number.

Parameters
ui32Basespecifies the USB module base address.

This function returns the last frame number received.

Returns
The last frame number received.

Definition at line 3777 of file usb.c.

References ASSERT, HWREGH, USB0_BASE, and USB_O_FRAME.

3778 {
3779  //
3780  // Check the arguments.
3781  //
3782  ASSERT(ui32Base == USB0_BASE);
3783 
3784  //
3785  // Return the most recent frame number.
3786  //
3787  return(HWREGH(ui32Base + USB_O_FRAME));
3788 }
#define USB_O_FRAME
Definition: hw_usb.h:56
#define ASSERT(expr)
Definition: debug.h:67
#define HWREGH(x)
Definition: hw_types.h:50
#define USB0_BASE
Definition: hw_memmap.h:99
void USBHighSpeed ( uint32_t  ui32Base,
bool  bEnable 
)

Enables or disables USB high-speed negotiation.

Parameters
ui32Basespecifies the USB module base address.
bEnablespecifies whether to enable or disable high-speed negotiation.

High-speed negotiations for both host and device mode are enabled when this function is called with the bEnable parameter set to true. In device mode this causes the device to negotiate for high speed when the USB controller receives a reset from the host. In host mode, the USB host enables high-speed negotiations when resetting the connected device. If bEnable is set to false the controller only operates only in full-speed or low-speed.

Example: Enable USB high-speed mode.

//! //
//! // Enable USB high-speed mode.
//! //
//! USBHighSpeed(USB0_BASE, true);
//! 
\note This feature is not available on all Tiva devices and should only be
called when the USB is connected to an external ULPI PHY.  Please
check the data sheet to determine if the USB controller can interface with
a ULPI PHY.

\return None.  

Definition at line 318 of file usb.c.

References ASSERT, HWREGB, USB0_BASE, USB_O_POWER, and USB_POWER_HSENAB.

319 {
320  //
321  // Check the arguments.
322  //
323  ASSERT(ui32Base == USB0_BASE);
324 
325  if(bEnable)
326  {
327  //
328  // Enable high speed mode negotiations in hosts or device mode.
329  //
330  HWREGB(ui32Base + USB_O_POWER) |= USB_POWER_HSENAB;
331  }
332  else
333  {
334  //
335  // Enable high speed mode negotiations in hosts or device mode.
336  //
337  HWREGB(ui32Base + USB_O_POWER) &= ~USB_POWER_HSENAB;
338  }
339 }
#define ASSERT(expr)
Definition: debug.h:67
#define USB_POWER_HSENAB
Definition: hw_usb.h:423
#define USB_O_POWER
Definition: hw_usb.h:49
#define HWREGB(x)
Definition: hw_types.h:52
#define USB0_BASE
Definition: hw_memmap.h:99
uint32_t USBHostAddrGet ( uint32_t  ui32Base,
uint32_t  ui32Endpoint,
uint32_t  ui32Flags 
)

Gets the current functional device address for an endpoint.

Parameters
ui32Basespecifies the USB module base address.
ui32Endpointis the endpoint to access.
ui32Flagsdetermines if this is an IN or an OUT endpoint.

This function returns the current functional address that an endpoint is using to communicate with a device. The ui32Flags parameter determines if the IN or OUT endpoint's device address is returned.

Note
This function must only be called in host mode.
Returns
Returns the current function address being used by an endpoint.

Definition at line 3413 of file usb.c.

References ASSERT, HWREGB, USB0_BASE, USB_EP_0, USB_EP_1, USB_EP_2, USB_EP_3, USB_EP_4, USB_EP_5, USB_EP_6, USB_EP_7, USB_EP_HOST_OUT, and USB_O_TXFUNCADDR0.

3414 {
3415  //
3416  // Check the arguments.
3417  //
3418  ASSERT(ui32Base == USB0_BASE);
3419  ASSERT((ui32Endpoint == USB_EP_0) || (ui32Endpoint == USB_EP_1) ||
3420  (ui32Endpoint == USB_EP_2) || (ui32Endpoint == USB_EP_3) ||
3421  (ui32Endpoint == USB_EP_4) || (ui32Endpoint == USB_EP_5) ||
3422  (ui32Endpoint == USB_EP_6) || (ui32Endpoint == USB_EP_7));
3423 
3424  //
3425  // See if the transmit or receive address is returned.
3426  //
3427  if(ui32Flags & USB_EP_HOST_OUT)
3428  {
3429  //
3430  // Return this endpoint's transmit address.
3431  //
3432  return(HWREGB(ui32Base + USB_O_TXFUNCADDR0 + (ui32Endpoint >> 1)));
3433  }
3434  else
3435  {
3436  //
3437  // Return this endpoint's receive address.
3438  //
3439  return(HWREGB(ui32Base + USB_O_TXFUNCADDR0 + 4 + (ui32Endpoint >> 1)));
3440  }
3441 }
#define USB_EP_4
Definition: usb.h:351
#define ASSERT(expr)
Definition: debug.h:67
#define USB_EP_5
Definition: usb.h:352
#define USB_EP_HOST_OUT
Definition: usb.h:243
#define USB_O_TXFUNCADDR0
Definition: hw_usb.h:87
#define USB_EP_6
Definition: usb.h:353
#define USB_EP_3
Definition: usb.h:350
#define USB_EP_0
Definition: usb.h:347
#define USB_EP_2
Definition: usb.h:349
#define USB_EP_1
Definition: usb.h:348
#define HWREGB(x)
Definition: hw_types.h:52
#define USB0_BASE
Definition: hw_memmap.h:99
#define USB_EP_7
Definition: usb.h:354
void USBHostAddrSet ( uint32_t  ui32Base,
uint32_t  ui32Endpoint,
uint32_t  ui32Addr,
uint32_t  ui32Flags 
)

Sets the functional address for the device that is connected to an endpoint in host mode.

Parameters
ui32Basespecifies the USB module base address.
ui32Endpointis the endpoint to access.
ui32Addris the functional address for the controller to use for this endpoint.
ui32Flagsdetermines if this is an IN or an OUT endpoint.

This function configures the functional address for a device that is using this endpoint for communication. This ui32Addr parameter is the address of the target device that this endpoint is communicating with. The ui32Flags parameter indicates if the IN or OUT endpoint is set.

Note
This function must only be called in host mode.
Returns
None.

Definition at line 3363 of file usb.c.

References ASSERT, HWREGB, USB0_BASE, USB_EP_0, USB_EP_1, USB_EP_2, USB_EP_3, USB_EP_4, USB_EP_5, USB_EP_6, USB_EP_7, USB_EP_HOST_OUT, and USB_O_TXFUNCADDR0.

3365 {
3366  //
3367  // Check the arguments.
3368  //
3369  ASSERT(ui32Base == USB0_BASE);
3370  ASSERT((ui32Endpoint == USB_EP_0) || (ui32Endpoint == USB_EP_1) ||
3371  (ui32Endpoint == USB_EP_2) || (ui32Endpoint == USB_EP_3) ||
3372  (ui32Endpoint == USB_EP_4) || (ui32Endpoint == USB_EP_5) ||
3373  (ui32Endpoint == USB_EP_6) || (ui32Endpoint == USB_EP_7));
3374 
3375  //
3376  // See if the transmit or receive address is set.
3377  //
3378  if(ui32Flags & USB_EP_HOST_OUT)
3379  {
3380  //
3381  // Set the transmit address.
3382  //
3383  HWREGB(ui32Base + USB_O_TXFUNCADDR0 + (ui32Endpoint >> 1)) = ui32Addr;
3384  }
3385  else
3386  {
3387  //
3388  // Set the receive address.
3389  //
3390  HWREGB(ui32Base + USB_O_TXFUNCADDR0 + 4 + (ui32Endpoint >> 1)) =
3391  ui32Addr;
3392  }
3393 }
#define USB_EP_4
Definition: usb.h:351
#define ASSERT(expr)
Definition: debug.h:67
#define USB_EP_5
Definition: usb.h:352
#define USB_EP_HOST_OUT
Definition: usb.h:243
#define USB_O_TXFUNCADDR0
Definition: hw_usb.h:87
#define USB_EP_6
Definition: usb.h:353
#define USB_EP_3
Definition: usb.h:350
#define USB_EP_0
Definition: usb.h:347
#define USB_EP_2
Definition: usb.h:349
#define USB_EP_1
Definition: usb.h:348
#define HWREGB(x)
Definition: hw_types.h:52
#define USB0_BASE
Definition: hw_memmap.h:99
#define USB_EP_7
Definition: usb.h:354
void USBHostEndpointConfig ( uint32_t  ui32Base,
uint32_t  ui32Endpoint,
uint32_t  ui32MaxPayload,
uint32_t  ui32NAKPollInterval,
uint32_t  ui32TargetEndpoint,
uint32_t  ui32Flags 
)

Sets the base configuration for a host endpoint.

Parameters
ui32Basespecifies the USB module base address.
ui32Endpointis the endpoint to access.
ui32MaxPayloadis the maximum payload for this endpoint.
ui32NAKPollIntervalis the either the NAK timeout limit or the polling interval, depending on the type of endpoint.
ui32TargetEndpointis the endpoint that the host endpoint is targeting.
ui32Flagsare used to configure other endpoint settings.

This function sets the basic configuration for the transmit or receive portion of an endpoint in host mode. The ui32Flags parameter determines some of the configuration while the other parameters provide the rest. The ui32Flags parameter determines whether this is an IN endpoint (USB_EP_HOST_IN or USB_EP_DEV_IN) or an OUT endpoint (USB_EP_HOST_OUT or USB_EP_DEV_OUT), whether this is a Full speed endpoint (USB_EP_SPEED_FULL) or a Low speed endpoint (USB_EP_SPEED_LOW).

The USB_EP_MODE_ flags control the type of the endpoint.

  • USB_EP_MODE_CTRL is a control endpoint.
  • USB_EP_MODE_ISOC is an isochronous endpoint.
  • USB_EP_MODE_BULK is a bulk endpoint.
  • USB_EP_MODE_INT is an interrupt endpoint.

The ui32NAKPollInterval parameter has different meanings based on the USB_EP_MODE value and whether or not this call is being made for endpoint zero or another endpoint. For endpoint zero or any Bulk endpoints, this value always indicates the number of frames to allow a device to NAK before considering it a timeout. If this endpoint is an isochronous or interrupt endpoint, this value is the polling interval for this endpoint.

For interrupt endpoints, the polling interval is the number of frames between interrupt IN requests to an endpoint and has a range of 1 to 255. For isochronous endpoints this value represents a polling interval of 2 ^ (ui32NAKPollInterval - 1) frames. When used as a NAK timeout, the ui32NAKPollInterval value specifies 2 ^ (ui32NAKPollInterval - 1) frames before issuing a time out.

There are two special time out values that can be specified when setting the ui32NAKPollInterval value. The first is MAX_NAK_LIMIT, which is the maximum value that can be passed in this variable. The other is DISABLE_NAK_LIMIT, which indicates that there is no limit on the number of NAKs.

The USB_EP_DMA_MODE_ flags determine the type of DMA access to the endpoint data FIFOs. The choice of the DMA mode depends on how the DMA controller is configured and how it is being used. See the ``Using USB with the uDMA Controller'' or the ''Using the integrated USB DMA Controller'' section for more information on DMA configuration depending on the type of DMA that is supported by the USB controller.

When configuring the OUT portion of an endpoint, the USB_EP_AUTO_SET bit is specified to cause the transmission of data on the USB bus to start as soon as the number of bytes specified by ui32MaxPayload has been written into the OUT FIFO for this endpoint.

When configuring the IN portion of an endpoint, the USB_EP_AUTO_REQUEST bit can be specified to trigger the request for more data once the FIFO has been drained enough to fit ui32MaxPayload bytes. The USB_EP_AUTO_CLEAR bit can be used to clear the data packet ready flag automatically once the data has been read from the FIFO. If this option is not used, this flag must be manually cleared via a call to USBDevEndpointStatusClear() or USBHostEndpointStatusClear().

For interrupt endpoints in low or full speed mode, the polling interval (ui32NAKPollInterval) is the number of frames between interrupt IN requests to an endpoint and has a range of 1 to 255. For interrupt endpoints in high speed mode the polling interval is 2 ^ (ui32NAKPollInterval - 1) microframes between interrupt IN requests to an endpoint and has a range of 1 to 16.

Note
This function must only be called in host mode.
Returns
None.

Definition at line 1680 of file usb.c.

References ASSERT, EP_OFFSET, HWREGB, HWREGH, MAX_NAK_LIMIT, USB0_BASE, USB_EP_0, USB_EP_1, USB_EP_2, USB_EP_3, USB_EP_4, USB_EP_5, USB_EP_6, USB_EP_7, USB_EP_AUTO_CLEAR, USB_EP_AUTO_REQUEST, USB_EP_AUTO_SET, USB_EP_DMA_MODE_0, USB_EP_DMA_MODE_1, USB_EP_HOST_OUT, USB_EP_MODE_BULK, USB_EP_MODE_CTRL, USB_EP_MODE_INT, USB_EP_MODE_ISOC, USB_EP_MODE_MASK, USB_EP_SPEED_FULL, USB_EP_SPEED_HIGH, USB_O_NAKLMT, USB_O_RXCSRH1, USB_O_RXINTERVAL1, USB_O_RXMAXP1, USB_O_RXTYPE1, USB_O_TXCSRH1, USB_O_TXINTERVAL1, USB_O_TXMAXP1, USB_O_TXTYPE1, USB_O_TYPE0, USB_RXCSRH1_AUTOCL, USB_RXCSRH1_AUTORQ, USB_RXCSRH1_DMAEN, USB_RXCSRH1_DMAMOD, USB_TXCSRH1_AUTOSET, USB_TXCSRH1_DMAEN, USB_TXCSRH1_DMAMOD, USB_TXTYPE1_PROTO_BULK, USB_TXTYPE1_PROTO_CTRL, USB_TXTYPE1_PROTO_INT, USB_TXTYPE1_PROTO_ISOC, USB_TXTYPE1_SPEED_FULL, USB_TXTYPE1_SPEED_HIGH, USB_TXTYPE1_SPEED_LOW, USB_TYPE0_SPEED_FULL, USB_TYPE0_SPEED_HIGH, and USB_TYPE0_SPEED_LOW.

1683 {
1684  uint32_t ui32Register;
1685 
1686  //
1687  // Check the arguments.
1688  //
1689  ASSERT(ui32Base == USB0_BASE);
1690  ASSERT((ui32Endpoint == USB_EP_0) || (ui32Endpoint == USB_EP_1) ||
1691  (ui32Endpoint == USB_EP_2) || (ui32Endpoint == USB_EP_3) ||
1692  (ui32Endpoint == USB_EP_4) || (ui32Endpoint == USB_EP_5) ||
1693  (ui32Endpoint == USB_EP_6) || (ui32Endpoint == USB_EP_7));
1694  ASSERT(ui32NAKPollInterval <= MAX_NAK_LIMIT);
1695 
1696  //
1697  // Endpoint zero is configured differently than the other endpoints, so see
1698  // if this is endpoint zero.
1699  //
1700  if(ui32Endpoint == USB_EP_0)
1701  {
1702  //
1703  // Set the NAK timeout.
1704  //
1705  HWREGB(ui32Base + USB_O_NAKLMT) = ui32NAKPollInterval;
1706 
1707  //
1708  // Set the transfer type information.
1709  //
1710  //
1711  // Set the speed of this endpoint.
1712  //
1713  if(ui32Flags & USB_EP_SPEED_HIGH)
1714  {
1715  HWREGB(ui32Base + USB_O_TYPE0) = USB_TYPE0_SPEED_HIGH;
1716  }
1717  else if(ui32Flags & USB_EP_SPEED_FULL)
1718  {
1719  HWREGB(ui32Base + USB_O_TYPE0) = USB_TYPE0_SPEED_FULL;
1720  }
1721  else
1722  {
1723  HWREGB(ui32Base + USB_O_TYPE0) = USB_TYPE0_SPEED_LOW;
1724  }
1725  }
1726  else
1727  {
1728  //
1729  // Start with the target endpoint.
1730  //
1731  ui32Register = ui32TargetEndpoint;
1732 
1733  //
1734  // Set the speed for the device using this endpoint.
1735  //
1736  if(ui32Flags & USB_EP_SPEED_HIGH)
1737  {
1738  ui32Register |= USB_TXTYPE1_SPEED_HIGH;
1739  }
1740  else if(ui32Flags & USB_EP_SPEED_FULL)
1741  {
1742  ui32Register |= USB_TXTYPE1_SPEED_FULL;
1743  }
1744  else
1745  {
1746  ui32Register |= USB_TXTYPE1_SPEED_LOW;
1747  }
1748 
1749  //
1750  // Set the protocol for the device using this endpoint.
1751  //
1752  switch(ui32Flags & USB_EP_MODE_MASK)
1753  {
1754  //
1755  // The bulk protocol is being used.
1756  //
1757  case USB_EP_MODE_BULK:
1758  {
1759  ui32Register |= USB_TXTYPE1_PROTO_BULK;
1760  break;
1761  }
1762 
1763  //
1764  // The isochronous protocol is being used.
1765  //
1766  case USB_EP_MODE_ISOC:
1767  {
1768  ui32Register |= USB_TXTYPE1_PROTO_ISOC;
1769  break;
1770  }
1771 
1772  //
1773  // The interrupt protocol is being used.
1774  //
1775  case USB_EP_MODE_INT:
1776  {
1777  ui32Register |= USB_TXTYPE1_PROTO_INT;
1778  break;
1779  }
1780 
1781  //
1782  // The control protocol is being used.
1783  //
1784  case USB_EP_MODE_CTRL:
1785  {
1786  ui32Register |= USB_TXTYPE1_PROTO_CTRL;
1787  break;
1788  }
1789  }
1790 
1791  //
1792  // See if the transmit or receive endpoint is being configured.
1793  //
1794  if(ui32Flags & USB_EP_HOST_OUT)
1795  {
1796  //
1797  // Set the transfer type information.
1798  //
1799  HWREGB(ui32Base + EP_OFFSET(ui32Endpoint) + USB_O_TXTYPE1) =
1800  ui32Register;
1801 
1802  //
1803  // Set the NAK timeout or polling interval.
1804  //
1805  HWREGB(ui32Base + EP_OFFSET(ui32Endpoint) + USB_O_TXINTERVAL1) =
1806  ui32NAKPollInterval;
1807 
1808  //
1809  // Set the Maximum Payload per transaction.
1810  //
1811  HWREGH(ui32Base + EP_OFFSET(ui32Endpoint) + USB_O_TXMAXP1) =
1812  ui32MaxPayload;
1813 
1814  //
1815  // Set the transmit control value to zero.
1816  //
1817  ui32Register = 0;
1818 
1819  //
1820  // Allow auto setting of TxPktRdy when max packet size has been
1821  // loaded into the FIFO.
1822  //
1823  if(ui32Flags & USB_EP_AUTO_SET)
1824  {
1825  ui32Register |= USB_TXCSRH1_AUTOSET;
1826  }
1827 
1828  //
1829  // Configure the DMA Mode.
1830  //
1831  if(ui32Flags & USB_EP_DMA_MODE_1)
1832  {
1833  ui32Register |= USB_TXCSRH1_DMAEN | USB_TXCSRH1_DMAMOD;
1834  }
1835  else if(ui32Flags & USB_EP_DMA_MODE_0)
1836  {
1837  ui32Register |= USB_TXCSRH1_DMAEN;
1838  }
1839 
1840  //
1841  // Write out the transmit control value.
1842  //
1843  HWREGB(ui32Base + EP_OFFSET(ui32Endpoint) + USB_O_TXCSRH1) =
1844  (uint8_t)ui32Register;
1845  }
1846  else
1847  {
1848  //
1849  // Set the transfer type information.
1850  //
1851  HWREGB(ui32Base + EP_OFFSET(ui32Endpoint) + USB_O_RXTYPE1) =
1852  ui32Register;
1853 
1854  //
1855  // Set the NAK timeout or polling interval.
1856  //
1857  HWREGB(ui32Base + EP_OFFSET(ui32Endpoint) + USB_O_RXINTERVAL1) =
1858  ui32NAKPollInterval;
1859 
1860  //
1861  // Set the Maximum Payload per transaction.
1862  //
1863  HWREGH(ui32Base + EP_OFFSET(ui32Endpoint) + USB_O_RXMAXP1) =
1864  ui32MaxPayload;
1865 
1866  //
1867  // Set the receive control value to zero.
1868  //
1869  ui32Register = 0;
1870 
1871  //
1872  // Allow auto clearing of RxPktRdy when packet of size max packet
1873  // has been unloaded from the FIFO.
1874  //
1875  if(ui32Flags & USB_EP_AUTO_CLEAR)
1876  {
1877  ui32Register |= USB_RXCSRH1_AUTOCL;
1878  }
1879 
1880  //
1881  // Allow auto generation of DMA requests.
1882  //
1883  if(ui32Flags & USB_EP_AUTO_REQUEST)
1884  {
1885  ui32Register |= USB_RXCSRH1_AUTORQ;
1886  }
1887 
1888  //
1889  // Configure the DMA Mode.
1890  //
1891  if(ui32Flags & USB_EP_DMA_MODE_1)
1892  {
1893  ui32Register |= USB_RXCSRH1_DMAEN | USB_RXCSRH1_DMAMOD;
1894  }
1895  else if(ui32Flags & USB_EP_DMA_MODE_0)
1896  {
1897  ui32Register |= USB_RXCSRH1_DMAEN;
1898  }
1899 
1900  //
1901  // Write out the receive control value.
1902  //
1903  HWREGB(ui32Base + EP_OFFSET(ui32Endpoint) + USB_O_RXCSRH1) =
1904  (uint8_t)ui32Register;
1905  }
1906  }
1907 }
#define USB_TXTYPE1_PROTO_CTRL
Definition: hw_usb.h:1350
#define USB_RXCSRH1_DMAEN
Definition: hw_usb.h:1322
#define USB_EP_MODE_ISOC
Definition: usb.h:234
#define USB_TXCSRH1_DMAMOD
Definition: hw_usb.h:1285
#define USB_O_TYPE0
Definition: hw_usb.h:168
#define USB_O_RXTYPE1
Definition: hw_usb.h:188
#define USB_TYPE0_SPEED_HIGH
Definition: hw_usb.h:1239
#define USB_RXCSRH1_DMAMOD
Definition: hw_usb.h:1325
#define USB_EP_DMA_MODE_1
Definition: usb.h:230
#define USB_EP_MODE_MASK
Definition: usb.h:238
#define USB_EP_4
Definition: usb.h:351
#define ASSERT(expr)
Definition: debug.h:67
#define USB_O_RXCSRH1
Definition: hw_usb.h:180
#define USB_O_RXINTERVAL1
Definition: hw_usb.h:190
#define USB_O_TXCSRH1
Definition: hw_usb.h:174
#define USB_EP_MODE_INT
Definition: usb.h:236
#define USB_TXTYPE1_SPEED_FULL
Definition: hw_usb.h:1347
#define USB_EP_SPEED_FULL
Definition: usb.h:240
#define USB_EP_5
Definition: usb.h:352
#define USB_EP_AUTO_REQUEST
Definition: usb.h:227
#define HWREGH(x)
Definition: hw_types.h:50
#define USB_TXTYPE1_PROTO_ISOC
Definition: hw_usb.h:1351
#define USB_EP_HOST_OUT
Definition: usb.h:243
#define USB_O_TXTYPE1
Definition: hw_usb.h:184
#define USB_RXCSRH1_AUTORQ
Definition: hw_usb.h:1320
#define USB_O_NAKLMT
Definition: hw_usb.h:169
#define USB_EP_MODE_CTRL
Definition: usb.h:237
#define USB_EP_AUTO_SET
Definition: usb.h:226
#define USB_RXCSRH1_AUTOCL
Definition: hw_usb.h:1319
#define MAX_NAK_LIMIT
Definition: usb.h:331
#define USB_TYPE0_SPEED_FULL
Definition: hw_usb.h:1240
#define USB_EP_DMA_MODE_0
Definition: usb.h:229
#define USB_EP_6
Definition: usb.h:353
#define USB_TXTYPE1_PROTO_INT
Definition: hw_usb.h:1353
#define USB_EP_MODE_BULK
Definition: usb.h:235
#define USB_TXTYPE1_SPEED_LOW
Definition: hw_usb.h:1348
#define USB_EP_3
Definition: usb.h:350
#define USB_EP_0
Definition: usb.h:347
#define USB_TXCSRH1_AUTOSET
Definition: hw_usb.h:1280
#define USB_TXTYPE1_PROTO_BULK
Definition: hw_usb.h:1352
#define USB_EP_2
Definition: usb.h:349
#define USB_TYPE0_SPEED_LOW
Definition: hw_usb.h:1241
#define USB_O_TXMAXP1
Definition: hw_usb.h:170
#define USB_EP_1
Definition: usb.h:348
#define USB_TXCSRH1_DMAEN
Definition: hw_usb.h:1283
#define USB_O_TXINTERVAL1
Definition: hw_usb.h:186
#define USB_EP_AUTO_CLEAR
Definition: usb.h:228
#define HWREGB(x)
Definition: hw_types.h:52
#define USB_TXTYPE1_SPEED_HIGH
Definition: hw_usb.h:1346
#define USB_O_RXMAXP1
Definition: hw_usb.h:176
#define USB_EP_SPEED_HIGH
Definition: usb.h:241
#define EP_OFFSET(Endpoint)
Definition: usb.c:82
#define USB0_BASE
Definition: hw_memmap.h:99
#define USB_EP_7
Definition: usb.h:354
void USBHostEndpointDataAck ( uint32_t  ui32Base,
uint32_t  ui32Endpoint 
)

Acknowledge that data was read from the specified endpoint's FIFO in host mode.

Parameters
ui32Basespecifies the USB module base address.
ui32Endpointis the endpoint to access.

This function acknowledges that the data was read from the endpoint's FIFO. This call is used if processing is required between reading the data and acknowledging that the data has been read.

Note
This function must only be called in host mode.
Returns
None.

Definition at line 2947 of file usb.c.

References ASSERT, EP_OFFSET, HWREGB, USB0_BASE, USB_CSRL0_RXRDY, USB_EP_0, USB_EP_1, USB_EP_2, USB_EP_3, USB_EP_4, USB_EP_5, USB_EP_6, USB_EP_7, USB_O_CSRL0, USB_O_RXCSRL1, and USB_RXCSRL1_RXRDY.

2948 {
2949  //
2950  // Check the arguments.
2951  //
2952  ASSERT(ui32Base == USB0_BASE);
2953  ASSERT((ui32Endpoint == USB_EP_0) || (ui32Endpoint == USB_EP_1) ||
2954  (ui32Endpoint == USB_EP_2) || (ui32Endpoint == USB_EP_3) ||
2955  (ui32Endpoint == USB_EP_4) || (ui32Endpoint == USB_EP_5) ||
2956  (ui32Endpoint == USB_EP_6) || (ui32Endpoint == USB_EP_7));
2957 
2958  //
2959  // Clear RxPktRdy.
2960  //
2961  if(ui32Endpoint == USB_EP_0)
2962  {
2963  HWREGB(ui32Base + USB_O_CSRL0) &= ~USB_CSRL0_RXRDY;
2964  }
2965  else
2966  {
2967  HWREGB(ui32Base + USB_O_RXCSRL1 + EP_OFFSET(ui32Endpoint)) &=
2968  ~(USB_RXCSRL1_RXRDY);
2969  }
2970 }
#define USB_EP_4
Definition: usb.h:351
#define ASSERT(expr)
Definition: debug.h:67
#define USB_RXCSRL1_RXRDY
Definition: hw_usb.h:1312
#define USB_O_RXCSRL1
Definition: hw_usb.h:178
#define USB_EP_5
Definition: usb.h:352
#define USB_EP_6
Definition: usb.h:353
#define USB_EP_3
Definition: usb.h:350
#define USB_EP_0
Definition: usb.h:347
#define USB_EP_2
Definition: usb.h:349
#define USB_EP_1
Definition: usb.h:348
#define USB_CSRL0_RXRDY
Definition: hw_usb.h:1213
#define HWREGB(x)
Definition: hw_types.h:52
#define EP_OFFSET(Endpoint)
Definition: usb.c:82
#define USB0_BASE
Definition: hw_memmap.h:99
#define USB_O_CSRL0
Definition: hw_usb.h:162
#define USB_EP_7
Definition: usb.h:354
void USBHostEndpointDataToggle ( uint32_t  ui32Base,
uint32_t  ui32Endpoint,
bool  bDataToggle,
uint32_t  ui32Flags 
)

Sets the value data toggle on an endpoint in host mode.

Parameters
ui32Basespecifies the USB module base address.
ui32Endpointspecifies the endpoint to reset the data toggle.
bDataTogglespecifies whether to set the state to DATA0 or DATA1.
ui32Flagsspecifies whether to set the IN or OUT endpoint.

This function is used to force the state of the data toggle in host mode. If the value passed in the bDataToggle parameter is false, then the data toggle is set to the DATA0 state, and if it is true it is set to the DATA1 state. The ui32Flags parameter can be USB_EP_HOST_IN or USB_EP_HOST_OUT to access the desired portion of this endpoint. The ui32Flags parameter is ignored for endpoint zero.

Note
This function must only be called in host mode.
Returns
None.

Definition at line 1173 of file usb.c.

References ASSERT, EP_OFFSET, HWREGB, USB0_BASE, USB_CSRH0_DT, USB_CSRH0_DTWE, USB_EP_0, USB_EP_1, USB_EP_2, USB_EP_3, USB_EP_4, USB_EP_5, USB_EP_6, USB_EP_7, USB_EP_HOST_IN, USB_O_CSRH0, USB_O_RXCSRH1, USB_O_TXCSRH1, USB_RXCSRH1_DT, USB_RXCSRH1_DTWE, USB_TXCSRH1_DT, and USB_TXCSRH1_DTWE.

1175 {
1176  uint32_t ui32DataToggle;
1177 
1178  //
1179  // Check the arguments.
1180  //
1181  ASSERT(ui32Base == USB0_BASE);
1182  ASSERT((ui32Endpoint == USB_EP_0) || (ui32Endpoint == USB_EP_1) ||
1183  (ui32Endpoint == USB_EP_2) || (ui32Endpoint == USB_EP_3) ||
1184  (ui32Endpoint == USB_EP_4) || (ui32Endpoint == USB_EP_5) ||
1185  (ui32Endpoint == USB_EP_6) || (ui32Endpoint == USB_EP_7));
1186 
1187  //
1188  // The data toggle defaults to DATA0.
1189  //
1190  ui32DataToggle = 0;
1191 
1192  //
1193  // See if the data toggle must be set to DATA1.
1194  //
1195  if(bDataToggle)
1196  {
1197  //
1198  // Select the data toggle bit based on the endpoint.
1199  //
1200  if(ui32Endpoint == USB_EP_0)
1201  {
1202  ui32DataToggle = USB_CSRH0_DT;
1203  }
1204  else if(ui32Flags == USB_EP_HOST_IN)
1205  {
1206  ui32DataToggle = USB_RXCSRH1_DT;
1207  }
1208  else
1209  {
1210  ui32DataToggle = USB_TXCSRH1_DT;
1211  }
1212  }
1213 
1214  //
1215  // Set the data toggle based on the endpoint.
1216  //
1217  if(ui32Endpoint == USB_EP_0)
1218  {
1219  //
1220  // Set the write enable and the bit value for endpoint zero.
1221  //
1222  HWREGB(ui32Base + USB_O_CSRH0) =
1223  ((HWREGB(ui32Base + USB_O_CSRH0) &
1225  (ui32DataToggle | USB_CSRH0_DTWE));
1226  }
1227  else if(ui32Flags == USB_EP_HOST_IN)
1228  {
1229  //
1230  // Set the Write enable and the bit value for an IN endpoint.
1231  //
1232  HWREGB(ui32Base + USB_O_RXCSRH1 + EP_OFFSET(ui32Endpoint)) =
1233  ((HWREGB(ui32Base + USB_O_RXCSRH1 + EP_OFFSET(ui32Endpoint)) &
1235  (ui32DataToggle | USB_RXCSRH1_DTWE));
1236  }
1237  else
1238  {
1239  //
1240  // Set the Write enable and the bit value for an OUT endpoint.
1241  //
1242  HWREGB(ui32Base + USB_O_TXCSRH1 + EP_OFFSET(ui32Endpoint)) =
1243  ((HWREGB(ui32Base + USB_O_TXCSRH1 + EP_OFFSET(ui32Endpoint)) &
1245  (ui32DataToggle | USB_TXCSRH1_DTWE));
1246  }
1247 }
#define USB_O_CSRH0
Definition: hw_usb.h:164
#define USB_RXCSRH1_DT
Definition: hw_usb.h:1327
#define USB_EP_HOST_IN
Definition: usb.h:242
#define USB_TXCSRH1_DT
Definition: hw_usb.h:1287
#define USB_EP_4
Definition: usb.h:351
#define ASSERT(expr)
Definition: debug.h:67
#define USB_CSRH0_DTWE
Definition: hw_usb.h:1221
#define USB_O_RXCSRH1
Definition: hw_usb.h:180
#define USB_RXCSRH1_DTWE
Definition: hw_usb.h:1326
#define USB_O_TXCSRH1
Definition: hw_usb.h:174
#define USB_EP_5
Definition: usb.h:352
#define USB_TXCSRH1_DTWE
Definition: hw_usb.h:1286
#define USB_EP_6
Definition: usb.h:353
#define USB_EP_3
Definition: usb.h:350
#define USB_CSRH0_DT
Definition: hw_usb.h:1222
#define USB_EP_0
Definition: usb.h:347
#define USB_EP_2
Definition: usb.h:349
#define USB_EP_1
Definition: usb.h:348
#define HWREGB(x)
Definition: hw_types.h:52
#define EP_OFFSET(Endpoint)
Definition: usb.c:82
#define USB0_BASE
Definition: hw_memmap.h:99
#define USB_EP_7
Definition: usb.h:354
void USBHostEndpointPing ( uint32_t  ui32Base,
uint32_t  ui32Endpoint,
bool  bEnable 
)

Enables or disables ping tokens for an endpoint using high-speed control transfers in host mode.

Parameters
ui32Basespecifies the USB module base address.
ui32Endpointspecifies the endpoint to enable/disable ping tokens.
bEnablespecifies whether enable or disable ping tokens.

This function configures the USB controller to either send or not send ping tokens during the data and status phase of high speed control transfers. The only supported value for ui32Endpoint is USB_EP_0 because all control transfers are handled using this endpoint. If the bEnable is true then ping tokens are enabled, if false then ping tokens are disabled. This must be used if the controller must support communications with devices that do not support ping tokens in high speed mode.

Example: Disable ping transactions in host mode on endpoint 0.

//! //
//! // Disable ping transaction on endpoint 0.
//! //
//! USBHostEndpointPing(USB0_BASE, USB_EP_0, false);
//! 
\note This function must only be called in host mode.

\return None.  

Definition at line 1328 of file usb.c.

References ASSERT, HWREGB, USB0_BASE, USB_CSRH0_DISPING, USB_EP_0, and USB_O_CSRH0.

1329 {
1330  //
1331  // Check the arguments.
1332  //
1333  ASSERT(ui32Base == USB0_BASE);
1334  ASSERT((ui32Endpoint == USB_EP_0));
1335 
1336  //
1337  // Handle the endpoint 0 case separately.
1338  //
1339  if(bEnable)
1340  {
1342  }
1343  else
1344  {
1346  }
1347 }
#define USB_O_CSRH0
Definition: hw_usb.h:164
#define ASSERT(expr)
Definition: debug.h:67
#define USB_CSRH0_DISPING
Definition: hw_usb.h:1220
#define USB_EP_0
Definition: usb.h:347
#define HWREGB(x)
Definition: hw_types.h:52
#define USB0_BASE
Definition: hw_memmap.h:99
void USBHostEndpointSpeed ( uint32_t  ui32Base,
uint32_t  ui32Endpoint,
uint32_t  ui32Flags 
)

Changes the speed of the connection for a host endpoint.

Parameters
ui32Basespecifies the USB module base address.
ui32Endpointis the endpoint to access.
ui32Flagsare used to configure other endpoint settings.

This function sets the USB speed for an IN or OUT endpoint in host mode. The ui32Flags parameter specifies the speed using one of the following values: USB_EP_SPEED_LOW, USB_EP_SPEED_FULL, or USB_EP_SPEED_HIGH. The ui32Flags parameter also specifies which direction is set by adding the logical OR in either USB_EP_HOST_IN or USB_EP_HOST_OUT. All other flags are ignored. This function is typically only used for endpoint 0, but could be used with other endpoints as well.

Example: Set host transactions on endpoint 0 to full speed..

//! //
//! // Set host endpoint 0 transactions to full speed.
//! //
//! USBHostEndpointSpeed(USB0_BASE, USB_EP_0, USB_EP_SPEED_FULL);
//! 
\note This function must only be called in host mode.

\return None.  

Definition at line 1940 of file usb.c.

References ASSERT, EP_OFFSET, HWREGB, HWREGH, USB0_BASE, USB_EP_0, USB_EP_1, USB_EP_2, USB_EP_3, USB_EP_4, USB_EP_5, USB_EP_6, USB_EP_7, USB_EP_HOST_OUT, USB_EP_SPEED_FULL, USB_EP_SPEED_HIGH, USB_O_RXTYPE1, USB_O_TXTYPE1, USB_O_TYPE0, USB_RXTYPE1_SPEED_M, USB_TXTYPE1_SPEED_M, USB_TYPE0_SPEED_FULL, USB_TYPE0_SPEED_HIGH, and USB_TYPE0_SPEED_LOW.

1942 {
1943  uint32_t ui32Reg;
1944  uint32_t ui32Speed;
1945 
1946  //
1947  // Check the arguments.
1948  //
1949  ASSERT(ui32Base == USB0_BASE);
1950  ASSERT((ui32Endpoint == USB_EP_0) || (ui32Endpoint == USB_EP_1) ||
1951  (ui32Endpoint == USB_EP_2) || (ui32Endpoint == USB_EP_3) ||
1952  (ui32Endpoint == USB_EP_4) || (ui32Endpoint == USB_EP_5) ||
1953  (ui32Endpoint == USB_EP_6) || (ui32Endpoint == USB_EP_7));
1954 
1955  //
1956  // Create the register speed value.
1957  //
1958  if(ui32Flags & USB_EP_SPEED_HIGH)
1959  {
1960  ui32Speed = USB_TYPE0_SPEED_HIGH;
1961  }
1962  else if(ui32Flags & USB_EP_SPEED_FULL)
1963  {
1964  ui32Speed = USB_TYPE0_SPEED_FULL;
1965  }
1966  else
1967  {
1968  ui32Speed = USB_TYPE0_SPEED_LOW;
1969  }
1970 
1971  //
1972  // Endpoint 0 is handled differently as it is bi-directional.
1973  //
1974  if(ui32Endpoint == USB_EP_0)
1975  {
1976  HWREGB(ui32Base + USB_O_TYPE0) = ui32Speed;
1977  }
1978  else if(ui32Flags & USB_EP_HOST_OUT)
1979  {
1980  //
1981  // Clear the current speed and set the new speed.
1982  //
1983  ui32Reg = (HWREGH(ui32Base + EP_OFFSET(ui32Endpoint) + USB_O_TXTYPE1) &
1984  ~(USB_TXTYPE1_SPEED_M));
1985  ui32Reg |= ui32Speed;
1986 
1987  HWREGH(ui32Base + EP_OFFSET(ui32Endpoint) + USB_O_TXTYPE1) |= ui32Reg;
1988  }
1989  else
1990  {
1991  //
1992  // Clear the current speed and set the new speed.
1993  //
1994  ui32Reg = (HWREGH(ui32Base + EP_OFFSET(ui32Endpoint) + USB_O_RXTYPE1) &
1995  ~(USB_RXTYPE1_SPEED_M));
1996  ui32Reg |= ui32Speed;
1997 
1998  HWREGH(ui32Base + EP_OFFSET(ui32Endpoint) + USB_O_RXTYPE1) |= ui32Reg;
1999  }
2000 }
#define USB_O_TYPE0
Definition: hw_usb.h:168
#define USB_O_RXTYPE1
Definition: hw_usb.h:188
#define USB_TYPE0_SPEED_HIGH
Definition: hw_usb.h:1239
#define USB_EP_4
Definition: usb.h:351
#define ASSERT(expr)
Definition: debug.h:67
#define USB_EP_SPEED_FULL
Definition: usb.h:240
#define USB_EP_5
Definition: usb.h:352
#define USB_RXTYPE1_SPEED_M
Definition: hw_usb.h:1377
#define HWREGH(x)
Definition: hw_types.h:50
#define USB_EP_HOST_OUT
Definition: usb.h:243
#define USB_O_TXTYPE1
Definition: hw_usb.h:184
#define USB_TYPE0_SPEED_FULL
Definition: hw_usb.h:1240
#define USB_EP_6
Definition: usb.h:353
#define USB_EP_3
Definition: usb.h:350
#define USB_EP_0
Definition: usb.h:347
#define USB_EP_2
Definition: usb.h:349
#define USB_TYPE0_SPEED_LOW
Definition: hw_usb.h:1241
#define USB_EP_1
Definition: usb.h:348
#define HWREGB(x)
Definition: hw_types.h:52
#define USB_TXTYPE1_SPEED_M
Definition: hw_usb.h:1344
#define USB_EP_SPEED_HIGH
Definition: usb.h:241
#define EP_OFFSET(Endpoint)
Definition: usb.c:82
#define USB0_BASE
Definition: hw_memmap.h:99
#define USB_EP_7
Definition: usb.h:354
void USBHostEndpointStatusClear ( uint32_t  ui32Base,
uint32_t  ui32Endpoint,
uint32_t  ui32Flags 
)

Clears the status bits in this endpoint in host mode.

Parameters
ui32Basespecifies the USB module base address.
ui32Endpointis the endpoint to access.
ui32Flagsare the status bits that are cleared.

This function clears the status of any bits that are passed in the ui32Flags parameter. The ui32Flags parameter can take the value returned from the USBEndpointStatus() call.

Note
This function must only be called in host mode.
Returns
None.

Definition at line 1043 of file usb.c.

References ASSERT, EP_OFFSET, HWREGB, USB0_BASE, USB_EP_0, USB_EP_1, USB_EP_2, USB_EP_3, USB_EP_4, USB_EP_5, USB_EP_6, USB_EP_7, USB_O_CSRL0, USB_O_RXCSRL1, USB_O_TXCSRL1, and USB_RX_EPSTATUS_SHIFT.

1045 {
1046  //
1047  // Check the arguments.
1048  //
1049  ASSERT(ui32Base == USB0_BASE);
1050  ASSERT((ui32Endpoint == USB_EP_0) || (ui32Endpoint == USB_EP_1) ||
1051  (ui32Endpoint == USB_EP_2) || (ui32Endpoint == USB_EP_3) ||
1052  (ui32Endpoint == USB_EP_4) || (ui32Endpoint == USB_EP_5) ||
1053  (ui32Endpoint == USB_EP_6) || (ui32Endpoint == USB_EP_7));
1054 
1055  //
1056  // Clear the specified flags for the endpoint.
1057  //
1058  if(ui32Endpoint == USB_EP_0)
1059  {
1060  HWREGB(ui32Base + USB_O_CSRL0) &= ~ui32Flags;
1061  }
1062  else
1063  {
1064  HWREGB(ui32Base + USB_O_TXCSRL1 + EP_OFFSET(ui32Endpoint)) &=
1065  ~ui32Flags;
1066  HWREGB(ui32Base + USB_O_RXCSRL1 + EP_OFFSET(ui32Endpoint)) &=
1067  ~(ui32Flags >> USB_RX_EPSTATUS_SHIFT);
1068  }
1069 }
#define USB_RX_EPSTATUS_SHIFT
Definition: usb.c:74
#define USB_EP_4
Definition: usb.h:351
#define ASSERT(expr)
Definition: debug.h:67
#define USB_O_RXCSRL1
Definition: hw_usb.h:178
#define USB_EP_5
Definition: usb.h:352
#define USB_EP_6
Definition: usb.h:353
#define USB_O_TXCSRL1
Definition: hw_usb.h:172
#define USB_EP_3
Definition: usb.h:350
#define USB_EP_0
Definition: usb.h:347
#define USB_EP_2
Definition: usb.h:349
#define USB_EP_1
Definition: usb.h:348
#define HWREGB(x)
Definition: hw_types.h:52
#define EP_OFFSET(Endpoint)
Definition: usb.c:82
#define USB0_BASE
Definition: hw_memmap.h:99
#define USB_O_CSRL0
Definition: hw_usb.h:162
#define USB_EP_7
Definition: usb.h:354
uint32_t USBHostHubAddrGet ( uint32_t  ui32Base,
uint32_t  ui32Endpoint,
uint32_t  ui32Flags 
)

Gets the current device hub address for this endpoint.

Parameters
ui32Basespecifies the USB module base address.
ui32Endpointis the endpoint to access.
ui32Flagsdetermines if this is an IN or an OUT endpoint.

This function returns the current hub address that an endpoint is using to communicate with a device. The ui32Flags parameter determines if the device address for the IN or OUT endpoint is returned.

Note
This function must only be called in host mode.
Returns
This function returns the current hub address being used by an endpoint.

Definition at line 3539 of file usb.c.

References ASSERT, HWREGB, USB0_BASE, USB_EP_0, USB_EP_1, USB_EP_2, USB_EP_3, USB_EP_4, USB_EP_5, USB_EP_6, USB_EP_7, USB_EP_HOST_OUT, and USB_O_TXHUBADDR0.

3540 {
3541  //
3542  // Check the arguments.
3543  //
3544  ASSERT(ui32Base == USB0_BASE);
3545  ASSERT((ui32Endpoint == USB_EP_0) || (ui32Endpoint == USB_EP_1) ||
3546  (ui32Endpoint == USB_EP_2) || (ui32Endpoint == USB_EP_3) ||
3547  (ui32Endpoint == USB_EP_4) || (ui32Endpoint == USB_EP_5) ||
3548  (ui32Endpoint == USB_EP_6) || (ui32Endpoint == USB_EP_7));
3549 
3550  //
3551  // See if the hub transmit or receive address is returned.
3552  //
3553  if(ui32Flags & USB_EP_HOST_OUT)
3554  {
3555  //
3556  // Return the hub transmit address for this endpoint.
3557  //
3558  return(HWREGB(ui32Base + USB_O_TXHUBADDR0 + (ui32Endpoint >> 1)));
3559  }
3560  else
3561  {
3562  //
3563  // Return the hub receive address for this endpoint.
3564  //
3565  return(HWREGB(ui32Base + USB_O_TXHUBADDR0 + 4 + (ui32Endpoint >> 1)));
3566  }
3567 }
#define USB_EP_4
Definition: usb.h:351
#define ASSERT(expr)
Definition: debug.h:67
#define USB_EP_5
Definition: usb.h:352
#define USB_EP_HOST_OUT
Definition: usb.h:243
#define USB_O_TXHUBADDR0
Definition: hw_usb.h:89
#define USB_EP_6
Definition: usb.h:353
#define USB_EP_3
Definition: usb.h:350
#define USB_EP_0
Definition: usb.h:347
#define USB_EP_2
Definition: usb.h:349
#define USB_EP_1
Definition: usb.h:348
#define HWREGB(x)
Definition: hw_types.h:52
#define USB0_BASE
Definition: hw_memmap.h:99
#define USB_EP_7
Definition: usb.h:354
void USBHostHubAddrSet ( uint32_t  ui32Base,
uint32_t  ui32Endpoint,
uint32_t  ui32Addr,
uint32_t  ui32Flags 
)

Sets the hub address for the device that is connected to an endpoint.

Parameters
ui32Basespecifies the USB module base address.
ui32Endpointis the endpoint to access.
ui32Addris the hub address and port for the device using this endpoint. The hub address must be defined in bits 0 through 6 with the port number in bits 8 through 14.
ui32Flagsdetermines if this is an IN or an OUT endpoint.

This function configures the hub address for a device that is using this endpoint for communication. The ui32Flags parameter determines if the device address for the IN or the OUT endpoint is configured by this call and sets the speed of the downstream device. Valid values are one of USB_EP_HOST_OUT or USB_EP_HOST_IN optionally ORed with USB_EP_SPEED_LOW.

Note
This function must only be called in host mode.
Returns
None.

Definition at line 3467 of file usb.c.

References ASSERT, HWREGB, HWREGH, USB0_BASE, USB_EP_0, USB_EP_1, USB_EP_2, USB_EP_3, USB_EP_4, USB_EP_5, USB_EP_6, USB_EP_7, USB_EP_HOST_OUT, USB_EP_SPEED_FULL, USB_EP_SPEED_HIGH, USB_O_TXHUBADDR0, USB_O_TYPE0, USB_TYPE0_SPEED_FULL, USB_TYPE0_SPEED_HIGH, and USB_TYPE0_SPEED_LOW.

3469 {
3470  //
3471  // Check the arguments.
3472  //
3473  ASSERT(ui32Base == USB0_BASE);
3474  ASSERT((ui32Endpoint == USB_EP_0) || (ui32Endpoint == USB_EP_1) ||
3475  (ui32Endpoint == USB_EP_2) || (ui32Endpoint == USB_EP_3) ||
3476  (ui32Endpoint == USB_EP_4) || (ui32Endpoint == USB_EP_5) ||
3477  (ui32Endpoint == USB_EP_6) || (ui32Endpoint == USB_EP_7));
3478 
3479  //
3480  // See if the hub transmit or receive address is being set.
3481  //
3482  if(ui32Flags & USB_EP_HOST_OUT)
3483  {
3484  //
3485  // Set the hub transmit address and port number for this endpoint.
3486  //
3487  HWREGH(ui32Base + USB_O_TXHUBADDR0 + (ui32Endpoint >> 1)) = ui32Addr;
3488  }
3489  else
3490  {
3491  //
3492  // Set the hub receive address and port number for this endpoint.
3493  //
3494  HWREGH(ui32Base + USB_O_TXHUBADDR0 + 4 + (ui32Endpoint >> 1)) =
3495  ui32Addr;
3496  }
3497 
3498  //
3499  // Set the speed of communication for endpoint 0. This configuration is
3500  // done here because it changes on a transaction-by-transaction basis for
3501  // EP0. For other endpoints, this is set in USBHostEndpointConfig().
3502  //
3503  if(ui32Endpoint == USB_EP_0)
3504  {
3505  if(ui32Flags & USB_EP_SPEED_FULL)
3506  {
3507  HWREGB(ui32Base + USB_O_TYPE0) = USB_TYPE0_SPEED_FULL;
3508  }
3509  else if(ui32Flags & USB_EP_SPEED_HIGH)
3510  {
3511  HWREGB(ui32Base + USB_O_TYPE0) = USB_TYPE0_SPEED_HIGH;
3512  }
3513  else
3514  {
3515  HWREGB(ui32Base + USB_O_TYPE0) = USB_TYPE0_SPEED_LOW;
3516  }
3517  }
3518 }
#define USB_O_TYPE0
Definition: hw_usb.h:168
#define USB_TYPE0_SPEED_HIGH
Definition: hw_usb.h:1239
#define USB_EP_4
Definition: usb.h:351
#define ASSERT(expr)
Definition: debug.h:67
#define USB_EP_SPEED_FULL
Definition: usb.h:240
#define USB_EP_5
Definition: usb.h:352
#define HWREGH(x)
Definition: hw_types.h:50
#define USB_EP_HOST_OUT
Definition: usb.h:243
#define USB_O_TXHUBADDR0
Definition: hw_usb.h:89
#define USB_TYPE0_SPEED_FULL
Definition: hw_usb.h:1240
#define USB_EP_6
Definition: usb.h:353
#define USB_EP_3
Definition: usb.h:350
#define USB_EP_0
Definition: usb.h:347
#define USB_EP_2
Definition: usb.h:349
#define USB_TYPE0_SPEED_LOW
Definition: hw_usb.h:1241
#define USB_EP_1
Definition: usb.h:348
#define HWREGB(x)
Definition: hw_types.h:52
#define USB_EP_SPEED_HIGH
Definition: usb.h:241
#define USB0_BASE
Definition: hw_memmap.h:99
#define USB_EP_7
Definition: usb.h:354
void USBHostMode ( uint32_t  ui32Base)

Change the mode of the USB controller to host.

Parameters
ui32Basespecifies the USB module base address.

This function changes the mode of the USB controller to host mode.

Note
This function must only be called on microcontrollers that support OTG operation.
Returns
None.

Definition at line 3997 of file usb.c.

References ASSERT, HWREGB, USB0_BASE, USB_GPCS_DEVMODOTG, and USB_O_GPCS.

3998 {
3999  //
4000  // Check the arguments.
4001  //
4002  ASSERT(ui32Base == USB0_BASE);
4003 
4004  //
4005  // Force mode in OTG parts that support forcing USB controller mode.
4006  // This bit is not writable in USB controllers that do not support
4007  // forcing the mode. Not setting the USB_GPCS_DEVMOD bit makes this a
4008  // force of host mode.
4009  //
4010  HWREGB(ui32Base + USB_O_GPCS) = USB_GPCS_DEVMODOTG;
4011 }
#define ASSERT(expr)
Definition: debug.h:67
#define USB_GPCS_DEVMODOTG
Definition: hw_usb.h:2920
#define USB_O_GPCS
Definition: hw_usb.h:388
#define HWREGB(x)
Definition: hw_types.h:52
#define USB0_BASE
Definition: hw_memmap.h:99
void USBHostPwrConfig ( uint32_t  ui32Base,
uint32_t  ui32Flags 
)

Sets the configuration for USB power fault.

Parameters
ui32Basespecifies the USB module base address.
ui32Flagsspecifies the configuration of the power fault.

This function controls how the USB controller uses its external power control pins (USBnPFLT and USBnEPEN). The flags specify the power fault level sensitivity, the power fault action, and the power enable level and source.

One of the following can be selected as the power fault level sensitivity:

  • USB_HOST_PWRFLT_LOW - An external power fault is indicated by the pin being driven low.
  • USB_HOST_PWRFLT_HIGH - An external power fault is indicated by the pin being driven high.

One of the following can be selected as the power fault action:

  • USB_HOST_PWRFLT_EP_NONE - No automatic action when power fault detected.
  • USB_HOST_PWRFLT_EP_TRI - Automatically tri-state the USBnEPEN pin on a power fault.
  • USB_HOST_PWRFLT_EP_LOW - Automatically drive USBnEPEN pin low on a power fault.
  • USB_HOST_PWRFLT_EP_HIGH - Automatically drive USBnEPEN pin high on a power fault.

One of the following can be selected as the power enable level and source:

  • USB_HOST_PWREN_MAN_LOW - USBnEPEN is driven low by the USB controller when USBHostPwrEnable() is called.
  • USB_HOST_PWREN_MAN_HIGH - USBnEPEN is driven high by the USB controller when USBHostPwrEnable() is called.
  • USB_HOST_PWREN_AUTOLOW - USBnEPEN is driven low by the USB controller automatically if USBOTGSessionRequest() has enabled a session.
  • USB_HOST_PWREN_AUTOHIGH - USBnEPEN is driven high by the USB controller automatically if USBOTGSessionRequest() has enabled a session.

When using the VBUS glitch filter, the USB_HOST_PWREN_FILTER can be addded to ignore small, short drops in VBUS level caused by high power consumption. This feature is mainly used to avoid causing VBUS errors caused by devices with high in-rush current.

Note
This function must only be called on microcontrollers that support host mode or OTG operation. The USB_HOST_PWREN_AUTOLOW and USB_HOST_PWREN_AUTOHIGH parameters can only be specified on devices that support OTG operation.
Returns
None.

Definition at line 3628 of file usb.c.

References ASSERT, HWREG, HWREGH, USB0_BASE, USB_EPC_EPEN_M, USB_EPC_PFLTACT_M, USB_EPC_PFLTAEN, USB_EPC_PFLTSEN_HIGH, USB_HOST_PWREN_FILTER, USB_O_EPC, and USB_O_VDC.

3629 {
3630  //
3631  // Check the arguments.
3632  //
3633  ASSERT(ui32Base == USB0_BASE);
3636  USB_EPC_EPEN_M)) == 0);
3637 
3638  //
3639  // If requested, enable VBUS droop detection on parts that support this
3640  // feature.
3641  //
3642  HWREG(ui32Base + USB_O_VDC) = ui32Flags >> 16;
3643 
3644  //
3645  // Set the power fault configuration as specified. This configuration
3646  // does not change whether fault detection is enabled or not.
3647  //
3648  HWREGH(ui32Base + USB_O_EPC) =
3649  (ui32Flags | (HWREGH(ui32Base + USB_O_EPC) &
3652 }
#define USB_EPC_PFLTSEN_HIGH
Definition: hw_usb.h:2850
#define HWREG(x)
Definition: hw_types.h:48
#define USB_O_VDC
Definition: hw_usb.h:390
#define ASSERT(expr)
Definition: debug.h:67
#define USB_EPC_EPEN_M
Definition: hw_usb.h:2853
#define USB_HOST_PWREN_FILTER
Definition: usb.h:263
#define HWREGH(x)
Definition: hw_types.h:50
#define USB_EPC_PFLTAEN
Definition: hw_usb.h:2849
#define USB_O_EPC
Definition: hw_usb.h:376
#define USB_EPC_PFLTACT_M
Definition: hw_usb.h:2844
#define USB0_BASE
Definition: hw_memmap.h:99
void USBHostPwrDisable ( uint32_t  ui32Base)

Disables the external power pin.

Parameters
ui32Basespecifies the USB module base address.

This function disables the USBnEPEN signal, which disables an external power supply in host mode operation.

Note
This function must only be called in host mode.
Returns
None.

Definition at line 3752 of file usb.c.

References ASSERT, HWREGH, USB0_BASE, USB_EPC_EPENDE, and USB_O_EPC.

3753 {
3754  //
3755  // Check the arguments.
3756  //
3757  ASSERT(ui32Base == USB0_BASE);
3758 
3759  //
3760  // Disable the external power supply enable signal.
3761  //
3762  HWREGH(ui32Base + USB_O_EPC) &= ~USB_EPC_EPENDE;
3763 }
#define ASSERT(expr)
Definition: debug.h:67
#define HWREGH(x)
Definition: hw_types.h:50
#define USB_EPC_EPENDE
Definition: hw_usb.h:2852
#define USB_O_EPC
Definition: hw_usb.h:376
#define USB0_BASE
Definition: hw_memmap.h:99
void USBHostPwrEnable ( uint32_t  ui32Base)

Enables the external power pin.

Parameters
ui32Basespecifies the USB module base address.

This function enables the USBnEPEN signal, which enables an external power supply in host mode operation.

Note
This function must only be called in host mode.
Returns
None.

Definition at line 3724 of file usb.c.

References ASSERT, HWREGH, USB0_BASE, USB_EPC_EPENDE, and USB_O_EPC.

3725 {
3726  //
3727  // Check the arguments.
3728  //
3729  ASSERT(ui32Base == USB0_BASE);
3730 
3731  //
3732  // Enable the external power supply enable signal.
3733  //
3734  HWREGH(ui32Base + USB_O_EPC) |= USB_EPC_EPENDE;
3735 }
#define ASSERT(expr)
Definition: debug.h:67
#define HWREGH(x)
Definition: hw_types.h:50
#define USB_EPC_EPENDE
Definition: hw_usb.h:2852
#define USB_O_EPC
Definition: hw_usb.h:376
#define USB0_BASE
Definition: hw_memmap.h:99
void USBHostPwrFaultDisable ( uint32_t  ui32Base)

Disables power fault detection.

Parameters
ui32Basespecifies the USB module base address.

This function disables power fault detection in the USB controller.

Note
This function must only be called in host mode.
Returns
None.

Definition at line 3696 of file usb.c.

References ASSERT, HWREGH, USB0_BASE, USB_EPC_PFLTEN, and USB_O_EPC.

3697 {
3698  //
3699  // Check the arguments.
3700  //
3701  ASSERT(ui32Base == USB0_BASE);
3702 
3703  //
3704  // Enable power fault input.
3705  //
3706  HWREGH(ui32Base + USB_O_EPC) &= ~USB_EPC_PFLTEN;
3707 }
#define ASSERT(expr)
Definition: debug.h:67
#define USB_EPC_PFLTEN
Definition: hw_usb.h:2851
#define HWREGH(x)
Definition: hw_types.h:50
#define USB_O_EPC
Definition: hw_usb.h:376
#define USB0_BASE
Definition: hw_memmap.h:99
void USBHostPwrFaultEnable ( uint32_t  ui32Base)

Enables power fault detection.

Parameters
ui32Basespecifies the USB module base address.

This function enables power fault detection in the USB controller. If the USBnPFLT pin is not in use, this function must not be used.

Note
This function must only be called in host mode.
Returns
None.

Definition at line 3669 of file usb.c.

References ASSERT, HWREGH, USB0_BASE, USB_EPC_PFLTEN, and USB_O_EPC.

3670 {
3671  //
3672  // Check the arguments.
3673  //
3674  ASSERT(ui32Base == USB0_BASE);
3675 
3676  //
3677  // Enable power fault input.
3678  //
3679  HWREGH(ui32Base + USB_O_EPC) |= USB_EPC_PFLTEN;
3680 }
#define ASSERT(expr)
Definition: debug.h:67
#define USB_EPC_PFLTEN
Definition: hw_usb.h:2851
#define HWREGH(x)
Definition: hw_types.h:50
#define USB_O_EPC
Definition: hw_usb.h:376
#define USB0_BASE
Definition: hw_memmap.h:99
void USBHostRequestIN ( uint32_t  ui32Base,
uint32_t  ui32Endpoint 
)

Schedules a request for an IN transaction on an endpoint in host mode.

Parameters
ui32Basespecifies the USB module base address.
ui32Endpointis the endpoint to access.

This function schedules a request for an IN transaction. When the USB device being communicated with responds with the data, the data can be retrieved by calling USBEndpointDataGet() or via a DMA transfer.

Note
This function must only be called in host mode and only for IN endpoints.
Returns
None.

Definition at line 3228 of file usb.c.

References ASSERT, EP_OFFSET, HWREGB, USB0_BASE, USB_EP_0, USB_EP_1, USB_EP_2, USB_EP_3, USB_EP_4, USB_EP_5, USB_EP_6, USB_EP_7, USB_O_CSRL0, USB_O_RXCSRL1, and USB_RXCSRL1_REQPKT.

3229 {
3230  uint32_t ui32Register;
3231 
3232  //
3233  // Check the arguments.
3234  //
3235  ASSERT(ui32Base == USB0_BASE);
3236  ASSERT((ui32Endpoint == USB_EP_0) || (ui32Endpoint == USB_EP_1) ||
3237  (ui32Endpoint == USB_EP_2) || (ui32Endpoint == USB_EP_3) ||
3238  (ui32Endpoint == USB_EP_4) || (ui32Endpoint == USB_EP_5) ||
3239  (ui32Endpoint == USB_EP_6) || (ui32Endpoint == USB_EP_7));
3240 
3241  //
3242  // Endpoint zero uses a different offset than the other endpoints.
3243  //
3244  if(ui32Endpoint == USB_EP_0)
3245  {
3246  ui32Register = USB_O_CSRL0;
3247  }
3248  else
3249  {
3250  ui32Register = USB_O_RXCSRL1 + EP_OFFSET(ui32Endpoint);
3251  }
3252 
3253  //
3254  // Set the request for an IN transaction.
3255  //
3256  HWREGB(ui32Base + ui32Register) = USB_RXCSRL1_REQPKT;
3257 }
#define USB_EP_4
Definition: usb.h:351
#define ASSERT(expr)
Definition: debug.h:67
#define USB_O_RXCSRL1
Definition: hw_usb.h:178
#define USB_EP_5
Definition: usb.h:352
#define USB_EP_6
Definition: usb.h:353
#define USB_EP_3
Definition: usb.h:350
#define USB_EP_0
Definition: usb.h:347
#define USB_EP_2
Definition: usb.h:349
#define USB_EP_1
Definition: usb.h:348
#define USB_RXCSRL1_REQPKT
Definition: hw_usb.h:1305
#define HWREGB(x)
Definition: hw_types.h:52
#define EP_OFFSET(Endpoint)
Definition: usb.c:82
#define USB0_BASE
Definition: hw_memmap.h:99
#define USB_O_CSRL0
Definition: hw_usb.h:162
#define USB_EP_7
Definition: usb.h:354
void USBHostRequestINClear ( uint32_t  ui32Base,
uint32_t  ui32Endpoint 
)

Clears a scheduled IN transaction for an endpoint in host mode.

Parameters
ui32Basespecifies the USB module base address.
ui32Endpointis the endpoint to access.

This function clears a previously scheduled IN transaction if it is still pending. This function is used to safely disable any scheduled IN transactions if the endpoint specified by ui32Endpoint is reconfigured for communications with other devices.

Note
This function must only be called in host mode and only for IN endpoints.
Returns
None.

Definition at line 3278 of file usb.c.

References ASSERT, EP_OFFSET, HWREGB, USB0_BASE, USB_EP_0, USB_EP_1, USB_EP_2, USB_EP_3, USB_EP_4, USB_EP_5, USB_EP_6, USB_EP_7, USB_O_CSRL0, USB_O_RXCSRL1, and USB_RXCSRL1_REQPKT.

3279 {
3280  uint32_t ui32Register;
3281 
3282  //
3283  // Check the arguments.
3284  //
3285  ASSERT(ui32Base == USB0_BASE);
3286  ASSERT((ui32Endpoint == USB_EP_0) || (ui32Endpoint == USB_EP_1) ||
3287  (ui32Endpoint == USB_EP_2) || (ui32Endpoint == USB_EP_3) ||
3288  (ui32Endpoint == USB_EP_4) || (ui32Endpoint == USB_EP_5) ||
3289  (ui32Endpoint == USB_EP_6) || (ui32Endpoint == USB_EP_7));
3290 
3291  //
3292  // Endpoint zero uses a different offset than the other endpoints.
3293  //
3294  if(ui32Endpoint == USB_EP_0)
3295  {
3296  ui32Register = USB_O_CSRL0;
3297  }
3298  else
3299  {
3300  ui32Register = USB_O_RXCSRL1 + EP_OFFSET(ui32Endpoint);
3301  }
3302 
3303  //
3304  // Clear the request for an IN transaction.
3305  //
3306  HWREGB(ui32Base + ui32Register) &= ~USB_RXCSRL1_REQPKT;
3307 }
#define USB_EP_4
Definition: usb.h:351
#define ASSERT(expr)
Definition: debug.h:67
#define USB_O_RXCSRL1
Definition: hw_usb.h:178
#define USB_EP_5
Definition: usb.h:352
#define USB_EP_6
Definition: usb.h:353
#define USB_EP_3
Definition: usb.h:350
#define USB_EP_0
Definition: usb.h:347
#define USB_EP_2
Definition: usb.h:349
#define USB_EP_1
Definition: usb.h:348
#define USB_RXCSRL1_REQPKT
Definition: hw_usb.h:1305
#define HWREGB(x)
Definition: hw_types.h:52
#define EP_OFFSET(Endpoint)
Definition: usb.c:82
#define USB0_BASE
Definition: hw_memmap.h:99
#define USB_O_CSRL0
Definition: hw_usb.h:162
#define USB_EP_7
Definition: usb.h:354
void USBHostRequestStatus ( uint32_t  ui32Base)

Issues a request for a status IN transaction on endpoint zero.

Parameters
ui32Basespecifies the USB module base address.

This function is used to cause a request for a status IN transaction from a device on endpoint zero. This function can only be used with endpoint zero as that is the only control endpoint that supports this ability. This function is used to complete the last phase of a control transaction to a device and an interrupt is signaled when the status packet has been received.

Note
This function must only be called in host mode.
Returns
None.

Definition at line 3328 of file usb.c.

References ASSERT, HWREGB, USB0_BASE, USB_CSRL0_REQPKT, USB_CSRL0_STATUS, and USB_O_CSRL0.

3329 {
3330  //
3331  // Check the arguments.
3332  //
3333  ASSERT(ui32Base == USB0_BASE);
3334 
3335  //
3336  // Set the request for a status IN transaction.
3337  //
3339 }
#define USB_CSRL0_REQPKT
Definition: hw_usb.h:1205
#define ASSERT(expr)
Definition: debug.h:67
#define USB_CSRL0_STATUS
Definition: hw_usb.h:1203
#define HWREGB(x)
Definition: hw_types.h:52
#define USB0_BASE
Definition: hw_memmap.h:99
#define USB_O_CSRL0
Definition: hw_usb.h:162
void USBHostReset ( uint32_t  ui32Base,
bool  bStart 
)

Handles the USB bus reset condition.

Parameters
ui32Basespecifies the USB module base address.
bStartspecifies whether to start or stop signaling reset on the USB bus.

When this function is called with the bStart parameter set to true, this function causes the start of a reset condition on the USB bus. The caller must then delay at least 20ms before calling this function again with the bStart parameter set to false.

Note
This function must only be called in host mode.
Returns
None.

Definition at line 264 of file usb.c.

References ASSERT, HWREGB, USB0_BASE, USB_O_POWER, and USB_POWER_RESET.

265 {
266  //
267  // Check the arguments.
268  //
269  ASSERT(ui32Base == USB0_BASE);
270 
271  //
272  // Send a reset signal to the bus.
273  //
274  if(bStart)
275  {
276  HWREGB(ui32Base + USB_O_POWER) |= USB_POWER_RESET;
277  }
278  else
279  {
280  HWREGB(ui32Base + USB_O_POWER) &= ~USB_POWER_RESET;
281  }
282 }
#define USB_POWER_RESET
Definition: hw_usb.h:425
#define ASSERT(expr)
Definition: debug.h:67
#define USB_O_POWER
Definition: hw_usb.h:49
#define HWREGB(x)
Definition: hw_types.h:52
#define USB0_BASE
Definition: hw_memmap.h:99
void USBHostResume ( uint32_t  ui32Base,
bool  bStart 
)

Handles the USB bus resume condition.

Parameters
ui32Basespecifies the USB module base address.
bStartspecifies if the USB controller is entering or leaving the resume signaling state.

When in device mode, this function brings the USB controller out of the suspend state. This call must first be made with the bStart parameter set to true to start resume signaling. The device application must then delay at least 10ms but not more than 15ms before calling this function with the bStart parameter set to false.

When in host mode, this function signals devices to leave the suspend state. This call must first be made with the bStart parameter set to true to start resume signaling. The host application must then delay at least 20ms before calling this function with the bStart parameter set to false. This action causes the controller to complete the resume signaling on the USB bus.

Note
This function must only be called in host mode.
Returns
None.

Definition at line 368 of file usb.c.

References ASSERT, HWREGB, USB0_BASE, USB_O_POWER, and USB_POWER_RESUME.

369 {
370  //
371  // Check the arguments.
372  //
373  ASSERT(ui32Base == USB0_BASE);
374 
375  //
376  // Send a resume signal to the bus.
377  //
378  if(bStart)
379  {
380  HWREGB(ui32Base + USB_O_POWER) |= USB_POWER_RESUME;
381  }
382  else
383  {
384  HWREGB(ui32Base + USB_O_POWER) &= ~USB_POWER_RESUME;
385  }
386 }
#define ASSERT(expr)
Definition: debug.h:67
#define USB_POWER_RESUME
Definition: hw_usb.h:426
#define USB_O_POWER
Definition: hw_usb.h:49
#define HWREGB(x)
Definition: hw_types.h:52
#define USB0_BASE
Definition: hw_memmap.h:99
uint32_t USBHostSpeedGet ( uint32_t  ui32Base)

Returns the current speed of the USB device connected.

Parameters
ui32Basespecifies the USB module base address.

This function returns the current speed of the USB bus in host mode.

Example: Get the USB connection speed.

//! //
//! // Get the connection speed of the device connected to the USB controller.
//! //
//! USBHostSpeedGet(USB0_BASE);
//! 
\note This function must only be called in host mode.

\return Returns one of the following: \b USB_LOW_SPEED, \b USB_FULL_SPEED,
\b USB_HIGH_SPEED, or \b USB_UNDEF_SPEED.  

Definition at line 412 of file usb.c.

References ASSERT, HWREGB, USB0_BASE, USB_DEVCTL_FSDEV, USB_DEVCTL_LSDEV, USB_FULL_SPEED, USB_HIGH_SPEED, USB_LOW_SPEED, USB_O_DEVCTL, USB_O_POWER, USB_POWER_HSMODE, and USB_UNDEF_SPEED.

413 {
414  //
415  // Check the arguments.
416  //
417  ASSERT(ui32Base == USB0_BASE);
418 
419  //
420  // If the Full Speed device bit is set, then this is a full speed device.
421  //
422  if(HWREGB(ui32Base + USB_O_POWER) & USB_POWER_HSMODE)
423  {
424  return(USB_HIGH_SPEED);
425  }
426 
427  //
428  // If the Full Speed device bit is set, then this is a full speed device.
429  //
430  if(HWREGB(ui32Base + USB_O_DEVCTL) & USB_DEVCTL_FSDEV)
431  {
432  return(USB_FULL_SPEED);
433  }
434 
435  //
436  // If the Low Speed device bit is set, then this is a low speed device.
437  //
438  if(HWREGB(ui32Base + USB_O_DEVCTL) & USB_DEVCTL_LSDEV)
439  {
440  return(USB_LOW_SPEED);
441  }
442 
443  //
444  // The device speed is not known.
445  //
446  return(USB_UNDEF_SPEED);
447 }
#define USB_POWER_HSMODE
Definition: hw_usb.h:424
#define USB_LOW_SPEED
Definition: usb.h:162
#define ASSERT(expr)
Definition: debug.h:67
#define USB_DEVCTL_FSDEV
Definition: hw_usb.h:617
#define USB_HIGH_SPEED
Definition: usb.h:160
#define USB_UNDEF_SPEED
Definition: usb.h:159
#define USB_DEVCTL_LSDEV
Definition: hw_usb.h:618
#define USB_FULL_SPEED
Definition: usb.h:161
#define USB_O_POWER
Definition: hw_usb.h:49
#define USB_O_DEVCTL
Definition: hw_usb.h:67
#define HWREGB(x)
Definition: hw_types.h:52
#define USB0_BASE
Definition: hw_memmap.h:99
void USBHostSuspend ( uint32_t  ui32Base)

Puts the USB bus in a suspended state.

Parameters
ui32Basespecifies the USB module base address.

When used in host mode, this function puts the USB bus in the suspended state.

Note
This function must only be called in host mode.
Returns
None.

Definition at line 232 of file usb.c.

References ASSERT, HWREGB, USB0_BASE, USB_O_POWER, and USB_POWER_SUSPEND.

233 {
234  //
235  // Check the arguments.
236  //
237  ASSERT(ui32Base == USB0_BASE);
238 
239  //
240  // Send the suspend signaling to the USB bus.
241  //
242  HWREGB(ui32Base + USB_O_POWER) |= USB_POWER_SUSPEND;
243 }
#define ASSERT(expr)
Definition: debug.h:67
#define USB_POWER_SUSPEND
Definition: hw_usb.h:427
#define USB_O_POWER
Definition: hw_usb.h:49
#define HWREGB(x)
Definition: hw_types.h:52
#define USB0_BASE
Definition: hw_memmap.h:99
void USBIntDisableControl ( uint32_t  ui32Base,
uint32_t  ui32Flags 
)

Disables control interrupts on a specified USB controller.

Parameters
ui32Basespecifies the USB module base address.
ui32Flagsspecifies which control interrupts to disable.

This function disables the control interrupts for the USB controller specified by the ui32Base parameter. The ui32Flags parameter specifies which control interrupts to disable. The flags passed in the ui32Flags parameters must be the definitions that start with USB_INTCTRL_* and not any other USB_INT flags.

Returns
None.

Definition at line 509 of file usb.c.

References ASSERT, HWREG, HWREGB, USB0_BASE, USB_INTCTRL_ALL, USB_INTCTRL_MODE_DETECT, USB_INTCTRL_POWER_FAULT, USB_INTCTRL_STATUS, USB_O_EPCIM, USB_O_IDVIM, and USB_O_IE.

510 {
511  //
512  // Check the arguments.
513  //
514  ASSERT(ui32Base == USB0_BASE);
515  ASSERT((ui32Flags & ~(USB_INTCTRL_ALL)) == 0);
516 
517  //
518  // If any general interrupts were disabled then write the general interrupt
519  // settings out to the hardware.
520  //
521  if(ui32Flags & USB_INTCTRL_STATUS)
522  {
523  HWREGB(ui32Base + USB_O_IE) &= ~(ui32Flags & USB_INTCTRL_STATUS);
524  }
525 
526  //
527  // Disable the power fault interrupt.
528  //
529  if(ui32Flags & USB_INTCTRL_POWER_FAULT)
530  {
531  HWREG(ui32Base + USB_O_EPCIM) = 0;
532  }
533 
534  //
535  // Disable the ID pin detect interrupt.
536  //
537  if(ui32Flags & USB_INTCTRL_MODE_DETECT)
538  {
539  HWREG(USB0_BASE + USB_O_IDVIM) = 0;
540  }
541 }
#define USB_O_IE
Definition: hw_usb.h:55
#define USB_INTCTRL_STATUS
Definition: usb.h:62
#define USB_O_IDVIM
Definition: hw_usb.h:399
#define HWREG(x)
Definition: hw_types.h:48
#define USB_INTCTRL_POWER_FAULT
Definition: usb.h:74
#define ASSERT(expr)
Definition: debug.h:67
#define USB_INTCTRL_MODE_DETECT
Definition: usb.h:73
#define USB_INTCTRL_ALL
Definition: usb.h:61
#define USB_O_EPCIM
Definition: hw_usb.h:379
#define HWREGB(x)
Definition: hw_types.h:52
#define USB0_BASE
Definition: hw_memmap.h:99
void USBIntDisableEndpoint ( uint32_t  ui32Base,
uint32_t  ui32Flags 
)

Disables endpoint interrupts on a specified USB controller.

Parameters
ui32Basespecifies the USB module base address.
ui32Flagsspecifies which endpoint interrupts to disable.

This function disables endpoint interrupts for the USB controller specified by the ui32Base parameter. The ui32Flags parameter specifies which endpoint interrupts to disable. The flags passed in the ui32Flags parameters must be the definitions that start with USB_INTEP_* and not any other USB_INT flags.

Returns
None.

Definition at line 702 of file usb.c.

References ASSERT, HWREGH, USB0_BASE, USB_INTEP_0, USB_INTEP_DEV_IN, USB_INTEP_DEV_OUT, USB_INTEP_HOST_IN, USB_INTEP_HOST_OUT, USB_INTEP_RX_SHIFT, USB_O_RXIE, and USB_O_TXIE.

703 {
704  //
705  // Check the arguments.
706  //
707  ASSERT(ui32Base == USB0_BASE);
708 
709  //
710  // If any transmit interrupts were disabled, then write the transmit
711  // interrupt settings out to the hardware.
712  //
713  HWREGH(ui32Base + USB_O_TXIE) &=
714  ~(ui32Flags & (USB_INTEP_HOST_OUT | USB_INTEP_DEV_IN | USB_INTEP_0));
715 
716  //
717  // If any receive interrupts were disabled, then write the receive
718  // interrupt settings out to the hardware.
719  //
720  HWREGH(ui32Base + USB_O_RXIE) &=
721  ~((ui32Flags & (USB_INTEP_HOST_IN | USB_INTEP_DEV_OUT)) >>
723 }
#define USB_INTEP_RX_SHIFT
Definition: usb.c:66
#define ASSERT(expr)
Definition: debug.h:67
#define USB_INTEP_0
Definition: usb.h:152
#define USB_INTEP_HOST_OUT
Definition: usb.h:118
#define USB_INTEP_DEV_OUT
Definition: usb.h:101
#define USB_INTEP_DEV_IN
Definition: usb.h:135
#define HWREGH(x)
Definition: hw_types.h:50
#define USB_O_TXIE
Definition: hw_usb.h:52
#define USB_O_RXIE
Definition: hw_usb.h:53
#define USB_INTEP_HOST_IN
Definition: usb.h:84
#define USB0_BASE
Definition: hw_memmap.h:99
void USBIntEnableControl ( uint32_t  ui32Base,
uint32_t  ui32Flags 
)

Enables control interrupts on a specified USB controller.

Parameters
ui32Basespecifies the USB module base address.
ui32Flagsspecifies which control interrupts to enable.

This function enables the control interrupts for the USB controller specified by the ui32Base parameter. The ui32Flags parameter specifies which control interrupts to enable. The flags passed in the ui32Flags parameters must be the definitions that start with USB_INTCTRL_* and not any other USB_INT flags.

Returns
None.

Definition at line 560 of file usb.c.

References ASSERT, HWREG, HWREGB, USB0_BASE, USB_EPCIM_PF, USB_IDVIM_ID, USB_INTCTRL_ALL, USB_INTCTRL_MODE_DETECT, USB_INTCTRL_POWER_FAULT, USB_INTCTRL_STATUS, USB_O_EPCIM, USB_O_IDVIM, and USB_O_IE.

561 {
562  //
563  // Check the arguments.
564  //
565  ASSERT(ui32Base == USB0_BASE);
566  ASSERT((ui32Flags & (~USB_INTCTRL_ALL)) == 0);
567 
568  //
569  // If any general interrupts were enabled, then write the general
570  // interrupt settings out to the hardware.
571  //
572  if(ui32Flags & USB_INTCTRL_STATUS)
573  {
574  HWREGB(ui32Base + USB_O_IE) |= ui32Flags;
575  }
576 
577  //
578  // Enable the power fault interrupt.
579  //
580  if(ui32Flags & USB_INTCTRL_POWER_FAULT)
581  {
582  HWREG(ui32Base + USB_O_EPCIM) = USB_EPCIM_PF;
583  }
584 
585  //
586  // Enable the ID pin detect interrupt.
587  //
588  if(ui32Flags & USB_INTCTRL_MODE_DETECT)
589  {
591  }
592 }
#define USB_O_IE
Definition: hw_usb.h:55
#define USB_INTCTRL_STATUS
Definition: usb.h:62
#define USB_O_IDVIM
Definition: hw_usb.h:399
#define HWREG(x)
Definition: hw_types.h:48
#define USB_INTCTRL_POWER_FAULT
Definition: usb.h:74
#define ASSERT(expr)
Definition: debug.h:67
#define USB_INTCTRL_MODE_DETECT
Definition: usb.h:73
#define USB_INTCTRL_ALL
Definition: usb.h:61
#define USB_O_EPCIM
Definition: hw_usb.h:379
#define USB_EPCIM_PF
Definition: hw_usb.h:2874
#define USB_IDVIM_ID
Definition: hw_usb.h:2965
#define HWREGB(x)
Definition: hw_types.h:52
#define USB0_BASE
Definition: hw_memmap.h:99
void USBIntEnableEndpoint ( uint32_t  ui32Base,
uint32_t  ui32Flags 
)

Enables endpoint interrupts on a specified USB controller.

Parameters
ui32Basespecifies the USB module base address.
ui32Flagsspecifies which endpoint interrupts to enable.

This function enables endpoint interrupts for the USB controller specified by the ui32Base parameter. The ui32Flags parameter specifies which endpoint interrupts to enable. The flags passed in the ui32Flags parameters must be the definitions that start with USB_INTEP_* and not any other USB_INT flags.

Returns
None.

Definition at line 742 of file usb.c.

References ASSERT, HWREGH, USB0_BASE, USB_INTEP_0, USB_INTEP_DEV_IN, USB_INTEP_DEV_OUT, USB_INTEP_HOST_IN, USB_INTEP_HOST_OUT, USB_INTEP_RX_SHIFT, USB_O_RXIE, and USB_O_TXIE.

743 {
744  //
745  // Check the arguments.
746  //
747  ASSERT(ui32Base == USB0_BASE);
748 
749  //
750  // Enable any transmit endpoint interrupts.
751  //
752  HWREGH(ui32Base + USB_O_TXIE) |=
754 
755  //
756  // Enable any receive endpoint interrupts.
757  //
758  HWREGH(ui32Base + USB_O_RXIE) |=
759  ((ui32Flags & (USB_INTEP_HOST_IN | USB_INTEP_DEV_OUT)) >>
761 }
#define USB_INTEP_RX_SHIFT
Definition: usb.c:66
#define ASSERT(expr)
Definition: debug.h:67
#define USB_INTEP_0
Definition: usb.h:152
#define USB_INTEP_HOST_OUT
Definition: usb.h:118
#define USB_INTEP_DEV_OUT
Definition: usb.h:101
#define USB_INTEP_DEV_IN
Definition: usb.h:135
#define HWREGH(x)
Definition: hw_types.h:50
#define USB_O_TXIE
Definition: hw_usb.h:52
#define USB_O_RXIE
Definition: hw_usb.h:53
#define USB_INTEP_HOST_IN
Definition: usb.h:84
#define USB0_BASE
Definition: hw_memmap.h:99
void USBIntRegister ( uint32_t  ui32Base,
void(*)(void)  pfnHandler 
)

Registers an interrupt handler for the USB controller.

Parameters
ui32Basespecifies the USB module base address.
pfnHandleris a pointer to the function to be called when a USB interrupt occurs.

This function registers the handler to be called when a USB interrupt occurs and enables the global USB interrupt in the interrupt controller. The specific desired USB interrupts must be enabled via a separate call to USBIntEnable(). It is the interrupt handler's responsibility to clear the interrupt sources via calls to USBIntStatusControl() and USBIntStatusEndpoint().

See also
IntRegister() for important information about registering interrupt handlers.
Returns
None.

Definition at line 859 of file usb.c.

References _USBIntNumberGet(), ASSERT, IntEnable(), IntRegister(), and USB0_BASE.

860 {
861  uint32_t ui32Int;
862 
863  //
864  // Check the arguments.
865  //
866  ASSERT(ui32Base == USB0_BASE);
867 
868  ui32Int = _USBIntNumberGet(ui32Base);
869 
870  ASSERT(ui32Int != 0);
871 
872  //
873  // Register the interrupt handler.
874  //
875  IntRegister(ui32Int, pfnHandler);
876 
877  //
878  // Enable the USB interrupt.
879  //
880  IntEnable(ui32Int);
881 }
static uint32_t _USBIntNumberGet(uint32_t ui32Base)
Definition: usb.c:818
#define ASSERT(expr)
Definition: debug.h:67
void IntRegister(uint32_t ui32Interrupt, void(*pfnHandler)(void))
Definition: interrupt.c:309
void IntEnable(uint32_t ui32Interrupt)
Definition: interrupt.c:610
#define USB0_BASE
Definition: hw_memmap.h:99

Here is the call graph for this function:

uint32_t USBIntStatusControl ( uint32_t  ui32Base)

Returns the control interrupt status on a specified USB controller.

Parameters
ui32Basespecifies the USB module base address.

This function reads control interrupt status for a USB controller. This call returns the current status for control interrupts only, the endpoint interrupt status is retrieved by calling USBIntStatusEndpoint(). The bit values returned are compared against the USB_INTCTRL_* values.

The following are the meanings of all USB_INCTRL_ flags and the modes for which they are valid. These values apply to any calls to USBIntStatusControl(), USBIntEnableControl(), and USBIntDisableControl(). Some of these flags are only valid in the following modes as indicated in the parentheses: Host, Device, and OTG.

  • USB_INTCTRL_ALL - A full mask of all control interrupt sources.
  • USB_INTCTRL_VBUS_ERR - A VBUS error has occurred (Host Only).
  • USB_INTCTRL_SESSION - Session Start Detected on A-side of cable (OTG Only).
  • USB_INTCTRL_SESSION_END - Session End Detected (Device Only)
  • USB_INTCTRL_DISCONNECT - Device Disconnect Detected (Host Only)
  • USB_INTCTRL_CONNECT - Device Connect Detected (Host Only)
  • USB_INTCTRL_SOF - Start of Frame Detected.
  • USB_INTCTRL_BABBLE - USB controller detected a device signaling past the end of a frame (Host Only)
  • USB_INTCTRL_RESET - Reset signaling detected by device (Device Only)
  • USB_INTCTRL_RESUME - Resume signaling detected.
  • USB_INTCTRL_SUSPEND - Suspend signaling detected by device (Device Only)
  • USB_INTCTRL_MODE_DETECT - OTG cable mode detection has completed (OTG Only)
  • USB_INTCTRL_POWER_FAULT - Power Fault detected (Host Only)
Note
This call clears the source of all of the control status interrupts.
Returns
Returns the status of the control interrupts for a USB controller.

Definition at line 635 of file usb.c.

References ASSERT, HWREG, HWREGB, USB0_BASE, USB_EPCISC_PF, USB_IDVRIS_ID, USB_INTCTRL_MODE_DETECT, USB_INTCTRL_POWER_FAULT, USB_O_EPCISC, USB_O_IDVISC, and USB_O_IS.

636 {
637  uint32_t ui32Status;
638 
639  //
640  // Check the arguments.
641  //
642  ASSERT(ui32Base == USB0_BASE);
643 
644  //
645  // Get the general interrupt status, these bits go into the upper 8 bits
646  // of the returned value.
647  //
648  ui32Status = HWREGB(ui32Base + USB_O_IS);
649 
650  //
651  // Add the power fault status.
652  //
653  if(HWREG(ui32Base + USB_O_EPCISC) & USB_EPCISC_PF)
654  {
655  //
656  // Indicate a power fault was detected.
657  //
658  ui32Status |= USB_INTCTRL_POWER_FAULT;
659 
660  //
661  // Clear the power fault interrupt.
662  //
663  HWREGB(ui32Base + USB_O_EPCISC) |= USB_EPCISC_PF;
664  }
665 
667  {
668  //
669  // Indicate an id detection.
670  //
671  ui32Status |= USB_INTCTRL_MODE_DETECT;
672 
673  //
674  // Clear the id detection interrupt.
675  //
677  }
678 
679  //
680  // Return the combined interrupt status.
681  //
682  return(ui32Status);
683 }
#define USB_O_EPCISC
Definition: hw_usb.h:381
#define HWREG(x)
Definition: hw_types.h:48
#define USB_INTCTRL_POWER_FAULT
Definition: usb.h:74
#define ASSERT(expr)
Definition: debug.h:67
#define USB_INTCTRL_MODE_DETECT
Definition: usb.h:73
#define USB_O_IS
Definition: hw_usb.h:54
#define USB_O_IDVISC
Definition: hw_usb.h:401
#define USB_EPCISC_PF
Definition: hw_usb.h:2881
#define USB_IDVRIS_ID
Definition: hw_usb.h:2957
#define HWREGB(x)
Definition: hw_types.h:52
#define USB0_BASE
Definition: hw_memmap.h:99
uint32_t USBIntStatusEndpoint ( uint32_t  ui32Base)

Returns the endpoint interrupt status on a specified USB controller.

Parameters
ui32Basespecifies the USB module base address.

This function reads endpoint interrupt status for a USB controller. This call returns the current status for endpoint interrupts only, the control interrupt status is retrieved by calling USBIntStatusControl(). The bit values returned are compared against the USB_INTEP_* values. These values are grouped into classes for USB_INTEP_HOST_* and USB_INTEP_DEV_* values to handle both host and device modes with all endpoints.

Note
This call clears the source of all of the endpoint interrupts.
Returns
Returns the status of the endpoint interrupts for a USB controller.

Definition at line 783 of file usb.c.

References ASSERT, HWREGH, USB0_BASE, USB_INTEP_RX_SHIFT, USB_O_RXIS, and USB_O_TXIS.

784 {
785  uint32_t ui32Status;
786 
787  //
788  // Check the arguments.
789  //
790  ASSERT(ui32Base == USB0_BASE);
791 
792  //
793  // Get the transmit interrupt status.
794  //
795  ui32Status = HWREGH(ui32Base + USB_O_TXIS);
796  ui32Status |= (HWREGH(ui32Base + USB_O_RXIS) << USB_INTEP_RX_SHIFT);
797 
798  //
799  // Return the combined interrupt status.
800  //
801  return(ui32Status);
802 }
#define USB_INTEP_RX_SHIFT
Definition: usb.c:66
#define USB_O_TXIS
Definition: hw_usb.h:50
#define ASSERT(expr)
Definition: debug.h:67
#define HWREGH(x)
Definition: hw_types.h:50
#define USB_O_RXIS
Definition: hw_usb.h:51
#define USB0_BASE
Definition: hw_memmap.h:99
void USBIntUnregister ( uint32_t  ui32Base)

Unregisters an interrupt handler for the USB controller.

Parameters
ui32Basespecifies the USB module base address.

This function unregisters the interrupt handler. This function also disables the USB interrupt in the interrupt controller.

See also
IntRegister() for important information about registering or unregistering interrupt handlers.
Returns
None.

Definition at line 899 of file usb.c.

References _USBIntNumberGet(), ASSERT, IntDisable(), IntUnregister(), and USB0_BASE.

900 {
901  uint32_t ui32Int;
902 
903  //
904  // Check the arguments.
905  //
906  ASSERT(ui32Base == USB0_BASE);
907 
908  ui32Int = _USBIntNumberGet(ui32Base);
909 
910  ASSERT(ui32Int != 0);
911 
912  //
913  // Disable the USB interrupt.
914  //
915  IntDisable(ui32Int);
916 
917  //
918  // Unregister the interrupt handler.
919  //
920  IntUnregister(ui32Int);
921 }
static uint32_t _USBIntNumberGet(uint32_t ui32Base)
Definition: usb.c:818
#define ASSERT(expr)
Definition: debug.h:67
void IntUnregister(uint32_t ui32Interrupt)
Definition: interrupt.c:381
void IntDisable(uint32_t ui32Interrupt)
Definition: interrupt.c:684
#define USB0_BASE
Definition: hw_memmap.h:99

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void USBModeConfig ( uint32_t  ui32Base,
uint32_t  ui32Mode 
)

Change the operating mode of the USB controller.

Parameters
ui32Basespecifies the USB module base address.
ui32Modespecifies the operating mode of the USB OTG pins.

This function changes the operating modes of the USB controller. When operating in full OTG mode, the USB controller uses the VBUS and ID pins to detect mode and voltage changes. While these pins are primarily used in OTG mode, they can also affect the operation of host and device modes. In device mode, the USB controller can be configured to monitor or ignore VBUS. Monitoring VBUS allows the controller to determine if it has been disconnected from the host. In host mode, the USB controller uses the VBUS pin to detect loss of VBUS caused by excessive power draw due to a drop in the VBUS voltage. This call takes the place of USBHostMode(), USBDevMode(), and USBOTGMode(). The ui32Mode value should be one of the following values:

  • USB_MODE_OTG enables operating in full OTG mode, VBUS and ID are used by the controller.
  • USB_MODE_HOST enables operating only as a host with no monitoring of VBUS or ID pins.
  • USB_MODE_HOST_VBUS enables operating only as a host with monitoring of VBUS pin. This configuration enables detection of VBUS droop while still forcing host mode.
  • USB_MODE_DEVICE enables operating only as a device with no monitoring of VBUS or ID pins.
  • USB_MODE_DEVICE_VBUS enables operating only as a device with monitoring of VBUS pin. This configuration enables disconnect detection while still forcing device mode.
Note
Some of the options above are not available on some Tiva devices. Please check the data sheet to determine if the USB controller supports a particular mode.

Example: Force device mode but allow monitoring of the USB VBUS pin.

//! //
//! // Force device mode but allow monitoring of VBUS for disconnect.
//! //
//! USBModeConfig(USB_MODE_DEVICE_VBUS);
//! 
\return None.  

Definition at line 4117 of file usb.c.

References ASSERT, HWREG, USB0_BASE, and USB_O_GPCS.

4118 {
4119  //
4120  // Check the arguments.
4121  //
4122  ASSERT(ui32Base == USB0_BASE);
4123 
4124  HWREG(ui32Base + USB_O_GPCS) = ui32Mode;
4125 }
#define HWREG(x)
Definition: hw_types.h:48
#define ASSERT(expr)
Definition: debug.h:67
#define USB_O_GPCS
Definition: hw_usb.h:388
#define USB0_BASE
Definition: hw_memmap.h:99
uint32_t USBModeGet ( uint32_t  ui32Base)

Returns the current operating mode of the controller.

Parameters
ui32Basespecifies the USB module base address.

This function returns the current operating mode on USB controllers with OTG or Dual mode functionality.

For OTG controllers:

The function returns one of the following values on OTG controllers:

USB_OTG_MODE_ASIDE_HOST indicates that the controller is in host mode on the A-side of the cable.

USB_OTG_MODE_ASIDE_DEV indicates that the controller is in device mode on the A-side of the cable.

USB_OTG_MODE_BSIDE_HOST indicates that the controller is in host mode on the B-side of the cable.

USB_OTG_MODE_BSIDE_DEV indicates that the controller is in device mode on the B-side of the cable. If an OTG session request is started with no cable in place, this mode is the default.

USB_OTG_MODE_NONE indicates that the controller is not attempting to determine its role in the system.

For Dual Mode controllers:

The function returns one of the following values:

USB_DUAL_MODE_HOST indicates that the controller is acting as a host.

USB_DUAL_MODE_DEVICE indicates that the controller acting as a device.

USB_DUAL_MODE_NONE indicates that the controller is not active as either a host or device.

Returns
Returns USB_OTG_MODE_ASIDE_HOST, USB_OTG_MODE_ASIDE_DEV, USB_OTG_MODE_BSIDE_HOST, USB_OTG_MODE_BSIDE_DEV, USB_OTG_MODE_NONE, USB_DUAL_MODE_HOST, USB_DUAL_MODE_DEVICE, or USB_DUAL_MODE_NONE.

Definition at line 3898 of file usb.c.

References ASSERT, HWREGB, USB0_BASE, USB_DEVCTL_DEV, USB_DEVCTL_HOST, USB_DEVCTL_SESSION, USB_DEVCTL_VBUS_M, and USB_O_DEVCTL.

3899 {
3900  //
3901  // Check the arguments.
3902  //
3903  ASSERT(ui32Base == USB0_BASE);
3904 
3905  //
3906  // Checks the current mode in the USB_O_DEVCTL and returns the current
3907  // mode.
3908  //
3909  // USB_OTG_MODE_ASIDE_HOST: USB_DEVCTL_HOST | USB_DEVCTL_SESSION
3910  // USB_OTG_MODE_ASIDE_DEV: USB_DEVCTL_SESSION
3911  // USB_OTG_MODE_BSIDE_HOST: USB_DEVCTL_DEV | USB_DEVCTL_SESSION |
3912  // USB_DEVCTL_HOST
3913  // USB_OTG_MODE_BSIDE_DEV: USB_DEVCTL_DEV | USB_DEVCTL_SESSION
3914  // USB_OTG_MODE_NONE: USB_DEVCTL_DEV
3915  //
3916  return(HWREGB(ui32Base + USB_O_DEVCTL) &
3919 }
#define ASSERT(expr)
Definition: debug.h:67
#define USB_DEVCTL_VBUS_M
Definition: hw_usb.h:619
#define USB_DEVCTL_DEV
Definition: hw_usb.h:616
#define USB_O_DEVCTL
Definition: hw_usb.h:67
#define USB_DEVCTL_HOST
Definition: hw_usb.h:624
#define USB_DEVCTL_SESSION
Definition: hw_usb.h:626
#define HWREGB(x)
Definition: hw_types.h:52
#define USB0_BASE
Definition: hw_memmap.h:99
uint32_t USBNumEndpointsGet ( uint32_t  ui32Base)

Returns the number of USB endpoint pairs on the device.

Parameters
ui32Basespecifies the USB module base address.

This function returns the number of endpoint pairs supported by the USB controller corresponding to the passed base address. The value returned is the number of IN or OUT endpoints available and does not include endpoint 0 (the control endpoint). For example, if 15 is returned, there are 15 IN and 15 OUT endpoints available in addition to endpoint 0.

Returns
Returns the number of IN or OUT endpoints available.

Definition at line 4215 of file usb.c.

References HWREGB, USB_EPINFO_TXEP_M, and USB_O_EPINFO.

4216 {
4217  //
4218  // Read the number of endpoints from the hardware. The number of TX and
4219  // RX endpoints are always the same.
4220  //
4221  return(HWREGB(ui32Base + USB_O_EPINFO) & USB_EPINFO_TXEP_M);
4222 }
#define USB_O_EPINFO
Definition: hw_usb.h:77
#define USB_EPINFO_TXEP_M
Definition: hw_usb.h:735
#define HWREGB(x)
Definition: hw_types.h:52
void USBOTGMode ( uint32_t  ui32Base)

Changes the mode of the USB controller to OTG.

Parameters
ui32Basespecifies the USB module base address.

This function changes the mode of the USB controller to OTG mode. This function is only valid on microcontrollers that have the OTG capabilities.

Returns
None.

Definition at line 4054 of file usb.c.

References ASSERT, HWREGB, USB0_BASE, and USB_O_GPCS.

4055 {
4056  //
4057  // Check the arguments.
4058  //
4059  ASSERT(ui32Base == USB0_BASE);
4060 
4061  //
4062  // Disable the override of the USB controller mode when running on an OTG
4063  // device.
4064  //
4065  HWREGB(ui32Base + USB_O_GPCS) = 0;
4066 }
#define ASSERT(expr)
Definition: debug.h:67
#define USB_O_GPCS
Definition: hw_usb.h:388
#define HWREGB(x)
Definition: hw_types.h:52
#define USB0_BASE
Definition: hw_memmap.h:99
void USBOTGSessionRequest ( uint32_t  ui32Base,
bool  bStart 
)

Starts or ends a session.

Parameters
ui32Basespecifies the USB module base address.
bStartspecifies if this call starts or ends a session.

This function is used in OTG mode to start a session request or end a session. If the bStart parameter is set to true, then this function starts a session and if it is false it ends a session.

Returns
None.

Definition at line 3805 of file usb.c.

References ASSERT, HWREGB, USB0_BASE, USB_DEVCTL_SESSION, and USB_O_DEVCTL.

3806 {
3807  //
3808  // Check the arguments.
3809  //
3810  ASSERT(ui32Base == USB0_BASE);
3811 
3812  //
3813  // Start or end the session as directed.
3814  //
3815  if(bStart)
3816  {
3817  HWREGB(ui32Base + USB_O_DEVCTL) |= USB_DEVCTL_SESSION;
3818  }
3819  else
3820  {
3821  HWREGB(ui32Base + USB_O_DEVCTL) &= ~USB_DEVCTL_SESSION;
3822  }
3823 }
#define ASSERT(expr)
Definition: debug.h:67
#define USB_O_DEVCTL
Definition: hw_usb.h:67
#define USB_DEVCTL_SESSION
Definition: hw_usb.h:626
#define HWREGB(x)
Definition: hw_types.h:52
#define USB0_BASE
Definition: hw_memmap.h:99
void USBPHYPowerOff ( uint32_t  ui32Base)

Powers off the internal USB PHY.

Parameters
ui32Basespecifies the USB module base address.

This function powers off the internal USB PHY, reducing the current consumption of the device. While in the powered-off state, the USB controller is unable to operate.

Returns
None.

Definition at line 4141 of file usb.c.

References HWREGB, USB_O_POWER, and USB_POWER_PWRDNPHY.

4142 {
4143  //
4144  // Set the PWRDNPHY bit in the PHY, putting it into its low power mode.
4145  //
4146  HWREGB(ui32Base + USB_O_POWER) |= USB_POWER_PWRDNPHY;
4147 }
#define USB_POWER_PWRDNPHY
Definition: hw_usb.h:428
#define USB_O_POWER
Definition: hw_usb.h:49
#define HWREGB(x)
Definition: hw_types.h:52
void USBPHYPowerOn ( uint32_t  ui32Base)

Powers on the internal USB PHY.

Parameters
ui32Basespecifies the USB module base address.

This function powers on the internal USB PHY, enabling it return to normal operation. By default, the PHY is powered on, so this function must only be called if USBPHYPowerOff() has previously been called.

Returns
None.

Definition at line 4163 of file usb.c.

References HWREGB, USB_O_POWER, and USB_POWER_PWRDNPHY.

4164 {
4165  //
4166  // Clear the PWRDNPHY bit in the PHY, putting it into normal operating
4167  // mode.
4168  //
4169  HWREGB(ui32Base + USB_O_POWER) &= ~USB_POWER_PWRDNPHY;
4170 }
#define USB_POWER_PWRDNPHY
Definition: hw_usb.h:428
#define USB_O_POWER
Definition: hw_usb.h:49
#define HWREGB(x)
Definition: hw_types.h:52