107 _I2CBaseValid(uint32_t ui32Base)
 
  133     int_fast8_t i8Idx, i8Rows;
 
  134     const uint32_t (*ppui32I2CIntMap)[2];
 
  139     ASSERT(_I2CBaseValid(ui32Base));
 
  154     for(i8Idx = 0; i8Idx < i8Rows; i8Idx++)
 
  159         if(ppui32I2CIntMap[i8Idx][0] == ui32Base)
 
  164             return(ppui32I2CIntMap[i8Idx][1]);
 
  205     uint32_t ui32SCLFreq;
 
  211     ASSERT(_I2CBaseValid(ui32Base));
 
  223         ui32SCLFreq = 400000;
 
  227         ui32SCLFreq = 100000;
 
  236     ui32TPR = ((ui32I2CClk + (2 * 10 * ui32SCLFreq) - 1) /
 
  237                (2 * 10 * ui32SCLFreq)) - 1;
 
  246         ui32TPR = ((ui32I2CClk + (2 * 3 * 3400000) - 1) /
 
  247                    (2 * 3 * 3400000)) - 1;
 
  274     ASSERT(_I2CBaseValid(ui32Base));
 
  275     ASSERT(!(ui8SlaveAddr & 0x80));
 
  312     ASSERT(_I2CBaseValid(ui32Base));
 
  313     ASSERT(!(ui8AddrNum > 1));
 
  314     ASSERT(!(ui8SlaveAddr & 0x80));
 
  358     ASSERT(_I2CBaseValid(ui32Base));
 
  383     ASSERT(_I2CBaseValid(ui32Base));
 
  413     ASSERT(_I2CBaseValid(ui32Base));
 
  438     ASSERT(_I2CBaseValid(ui32Base));
 
  480     ASSERT(_I2CBaseValid(ui32Base));
 
  524     ASSERT(_I2CBaseValid(ui32Base));
 
  561     ASSERT(_I2CBaseValid(ui32Base));
 
  608     ASSERT(_I2CBaseValid(ui32Base));
 
  633     ASSERT(_I2CBaseValid(ui32Base));
 
  677     ASSERT(_I2CBaseValid(ui32Base));
 
  702     ASSERT(_I2CBaseValid(ui32Base));
 
  734     ASSERT(_I2CBaseValid(ui32Base));
 
  759     ASSERT(_I2CBaseValid(ui32Base));
 
  791     ASSERT(_I2CBaseValid(ui32Base));
 
  821     ASSERT(_I2CBaseValid(ui32Base));
 
  859     ASSERT(_I2CBaseValid(ui32Base));
 
  897     ASSERT(_I2CBaseValid(ui32Base));
 
  935     ASSERT(_I2CBaseValid(ui32Base));
 
  979     ASSERT(_I2CBaseValid(ui32Base));
 
 1026     ASSERT(_I2CBaseValid(ui32Base));
 
 1062     ASSERT(_I2CBaseValid(ui32Base));
 
 1102     ASSERT(_I2CBaseValid(ui32Base));
 
 1134     ASSERT(_I2CBaseValid(ui32Base));
 
 1135     ASSERT(!(ui8SlaveAddr & 0x80));
 
 1165     ASSERT(_I2CBaseValid(ui32Base));
 
 1192     ASSERT(_I2CBaseValid(ui32Base));
 
 1227     ASSERT(_I2CBaseValid(ui32Base));
 
 1289     ASSERT(_I2CBaseValid(ui32Base));
 
 1341     ASSERT(_I2CBaseValid(ui32Base));
 
 1388     ASSERT(_I2CBaseValid(ui32Base));
 
 1414     ASSERT(_I2CBaseValid(ui32Base));
 
 1447     ASSERT(_I2CBaseValid(ui32Base));
 
 1477     ASSERT(_I2CBaseValid(ui32Base));
 
 1512     ASSERT(_I2CBaseValid(ui32Base));
 
 1566     ASSERT(_I2CBaseValid(ui32Base));
 
 1592     ASSERT(_I2CBaseValid(ui32Base));
 
 1618     ASSERT(_I2CBaseValid(ui32Base));
 
 1660     ASSERT(_I2CBaseValid(ui32Base));
 
 1693     ASSERT(_I2CBaseValid(ui32Base));
 
 1734     ASSERT(_I2CBaseValid(ui32Base));
 
 1767     ASSERT(_I2CBaseValid(ui32Base));
 
 1800     ASSERT(_I2CBaseValid(ui32Base));
 
 1831     ASSERT(_I2CBaseValid(ui32Base));
 
 1868     ASSERT(_I2CBaseValid(ui32Base));
 
 1906     ASSERT(_I2CBaseValid(ui32Base));
 
 1944     ASSERT(_I2CBaseValid(ui32Base));
 
 1986     ASSERT(_I2CBaseValid(ui32Base) && (ui8Length < 255));
 
 2017     ASSERT(_I2CBaseValid(ui32Base));
 
 2061     ASSERT(_I2CBaseValid(ui32Base));
 
 2101     ASSERT(_I2CBaseValid(ui32Base));
 
 2130     ASSERT(_I2CBaseValid(ui32Base));
 
bool I2CMasterBusy(uint32_t ui32Base)
#define I2C_MASTER_CMD_FIFO_BURST_SEND_START
void I2CSlaveAddressSet(uint32_t ui32Base, uint8_t ui8AddrNum, uint8_t ui8SlaveAddr)
static const int_fast8_t g_i8I2CIntMapSnowflakeRows
void I2CMasterEnable(uint32_t ui32Base)
void I2CMasterGlitchFilterConfigSet(uint32_t ui32Base, uint32_t ui32Config)
static const uint32_t g_ppui32I2CIntMapSnowflake[][2]
void I2CRxFIFOConfigSet(uint32_t ui32Base, uint32_t ui32Config)
#define I2C_MASTER_CMD_BURST_RECEIVE_FINISH
bool I2CMasterIntStatus(uint32_t ui32Base, bool bMasked)
void I2CTxFIFOFlush(uint32_t ui32Base)
#define I2C_SACKCTL_ACKOVAL
static const uint32_t g_ppui32I2CIntMap[][2]
bool I2CMasterBusBusy(uint32_t ui32Base)
uint32_t I2CFIFODataGet(uint32_t ui32Base)
void I2CMasterIntDisable(uint32_t ui32Base)
void I2CMasterDisable(uint32_t ui32Base)
#define I2C_MASTER_CMD_FIFO_BURST_RECEIVE_START
void I2CSlaveDataPut(uint32_t ui32Base, uint8_t ui8Data)
#define I2C_MASTER_CMD_FIFO_SINGLE_RECEIVE
uint32_t I2CSlaveStatus(uint32_t ui32Base)
uint32_t I2CMasterBurstCountGet(uint32_t ui32Base)
void I2CTxFIFOConfigSet(uint32_t ui32Base, uint32_t ui32Config)
void I2CSlaveIntEnableEx(uint32_t ui32Base, uint32_t ui32IntFlags)
#define I2C_MASTER_CMD_FIFO_BURST_SEND_ERROR_STOP
void I2CRxFIFOFlush(uint32_t ui32Base)
void I2CMasterDataPut(uint32_t ui32Base, uint8_t ui8Data)
#define I2C_MASTER_CMD_HS_MASTER_CODE_SEND
void I2CSlaveIntClear(uint32_t ui32Base)
void I2CFIFODataPut(uint32_t ui32Base, uint8_t ui8Data)
void I2CSlaveACKValueSet(uint32_t ui32Base, bool bACK)
void I2CMasterSlaveAddrSet(uint32_t ui32Base, uint8_t ui8SlaveAddr, bool bReceive)
void I2CMasterInitExpClk(uint32_t ui32Base, uint32_t ui32I2CClk, bool bFast)
uint32_t I2CMasterIntStatusEx(uint32_t ui32Base, bool bMasked)
void I2CSlaveInit(uint32_t ui32Base, uint8_t ui8SlaveAddr)
#define I2C_MASTER_CMD_BURST_SEND_START
void I2CSlaveIntEnable(uint32_t ui32Base)
#define I2C_MASTER_CMD_FIFO_BURST_RECEIVE_FINISH
void I2CMasterIntClear(uint32_t ui32Base)
#define I2C_MASTER_CMD_FIFO_BURST_SEND_FINISH
uint32_t I2CSlaveIntStatusEx(uint32_t ui32Base, bool bMasked)
uint32_t I2CFIFODataPutNonBlocking(uint32_t ui32Base, uint8_t ui8Data)
#define I2C_MASTER_CMD_BURST_RECEIVE_START
#define I2C_MASTER_ERR_NONE
static const int_fast8_t g_i8I2CIntMapRows
void I2CSlaveFIFOEnable(uint32_t ui32Base, uint32_t ui32Config)
void I2CSlaveDisable(uint32_t ui32Base)
void I2CMasterTimeoutSet(uint32_t ui32Base, uint32_t ui32Value)
void I2CMasterIntEnableEx(uint32_t ui32Base, uint32_t ui32IntFlags)
void I2CSlaveFIFODisable(uint32_t ui32Base)
uint32_t I2CFIFOStatus(uint32_t ui32Base)
#define I2C_MASTER_CMD_QUICK_COMMAND
#define I2C_FIFOSTATUS_RXFE
void I2CSlaveIntDisable(uint32_t ui32Base)
void I2CMasterIntEnable(uint32_t ui32Base)
void I2CMasterControl(uint32_t ui32Base, uint32_t ui32Cmd)
uint32_t I2CMasterLineStateGet(uint32_t ui32Base)
bool I2CSlaveIntStatus(uint32_t ui32Base, bool bMasked)
uint32_t I2CMasterErr(uint32_t ui32Base)
uint32_t I2CSlaveDataGet(uint32_t ui32Base)
#define I2C_MASTER_CMD_BURST_SEND_FINISH
#define I2C_MASTER_CMD_FIFO_BURST_SEND_CONT
#define I2C_MASTER_CMD_SINGLE_RECEIVE
uint32_t I2CMasterDataGet(uint32_t ui32Base)
uint32_t I2CFIFODataGetNonBlocking(uint32_t ui32Base, uint8_t *pui8Data)
void IntUnregister(uint32_t ui32Interrupt)
void I2CMasterBurstLengthSet(uint32_t ui32Base, uint8_t ui8Length)
void I2CSlaveEnable(uint32_t ui32Base)
static uint32_t _I2CIntNumberGet(uint32_t ui32Base)
#define I2C_MASTER_CMD_BURST_RECEIVE_CONT
#define I2C_MASTER_CMD_BURST_RECEIVE_ERROR_STOP
void I2CMasterIntDisableEx(uint32_t ui32Base, uint32_t ui32IntFlags)
#define I2C_MASTER_CMD_BURST_SEND_ERROR_STOP
#define I2C_SACKCTL_ACKOEN
#define I2C_MASTER_CMD_FIFO_BURST_RECEIVE_ERROR_STOP
#define I2C_FIFOCTL_RXFLUSH
#define I2C_MASTER_CMD_SINGLE_SEND
#define I2C_MASTER_CMD_FIFO_SINGLE_SEND
#define I2C_FIFOSTATUS_TXFF
void I2CMasterIntClearEx(uint32_t ui32Base, uint32_t ui32IntFlags)
#define I2C_MASTER_CMD_BURST_SEND_CONT
void I2CSlaveACKOverride(uint32_t ui32Base, bool bEnable)
#define I2C_SLAVE_INT_DATA
void I2CIntRegister(uint32_t ui32Base, void(*pfnHandler)(void))
void I2CSlaveIntClearEx(uint32_t ui32Base, uint32_t ui32IntFlags)
void I2CSlaveIntDisableEx(uint32_t ui32Base, uint32_t ui32IntFlags)
void IntDisable(uint32_t ui32Interrupt)
void IntRegister(uint32_t ui32Interrupt, void(*pfnHandler)(void))
void I2CIntUnregister(uint32_t ui32Base)
void IntEnable(uint32_t ui32Interrupt)
#define I2C_MASTER_CMD_FIFO_BURST_RECEIVE_CONT
#define I2C_FIFOCTL_TXFLUSH