pwm.c

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//*****************************************************************************
//
// pwm.c - API for the PWM modules
//
// Copyright (c) 2005-2014 Texas Instruments Incorporated.  All rights reserved.
// Software License Agreement
// 
//   Redistribution and use in source and binary forms, with or without
//   modification, are permitted provided that the following conditions
//   are met:
// 
//   Redistributions of source code must retain the above copyright
//   notice, this list of conditions and the following disclaimer.
// 
//   Redistributions in binary form must reproduce the above copyright
//   notice, this list of conditions and the following disclaimer in the
//   documentation and/or other materials provided with the  
//   distribution.
// 
//   Neither the name of Texas Instruments Incorporated nor the names of
//   its contributors may be used to endorse or promote products derived
//   from this software without specific prior written permission.
// 
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// 
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
//
//*****************************************************************************

//*****************************************************************************
//
//
//*****************************************************************************

#include <stdbool.h>
#include <stdint.h>
#include "inc/hw_ints.h"
#include "inc/hw_memmap.h"
#include "inc/hw_pwm.h"
#include "inc/hw_sysctl.h"
#include "inc/hw_types.h"
#include "driverlib/debug.h"
#include "driverlib/interrupt.h"
#include "driverlib/pwm.h"

//*****************************************************************************
//
// Misc macros for manipulating the encoded generator and output defines used
// by the API.
//
//*****************************************************************************
#define PWM_GEN_BADDR(_mod_, _gen_)                                           \
                                ((_mod_) + (_gen_))
#define PWM_GEN_EXT_BADDR(_mod_, _gen_)                                       \
                                ((_mod_) + PWM_GEN_EXT_0 +                    \
                                 ((_gen_) - PWM_GEN_0) * 2)
#define PWM_OUT_BADDR(_mod_, _out_)                                           \
                                ((_mod_) + ((_out_) & 0xFFFFFFC0))
#define PWM_IS_OUTPUT_ODD(_out_)                                              \
                                ((_out_) & 0x00000001)

//*****************************************************************************
//
//
//*****************************************************************************
#ifdef DEBUG
static bool
_PWMGenValid(uint32_t ui32Gen)
{
    return((ui32Gen == PWM_GEN_0) || (ui32Gen == PWM_GEN_1) ||
           (ui32Gen == PWM_GEN_2) || (ui32Gen == PWM_GEN_3));
}
#endif

//*****************************************************************************
//
//
//*****************************************************************************
#ifdef DEBUG
static bool
_PWMOutValid(uint32_t ui32PWMOut)
{
    return((ui32PWMOut == PWM_OUT_0) || (ui32PWMOut == PWM_OUT_1) ||
           (ui32PWMOut == PWM_OUT_2) || (ui32PWMOut == PWM_OUT_3) ||
           (ui32PWMOut == PWM_OUT_4) || (ui32PWMOut == PWM_OUT_5) ||
           (ui32PWMOut == PWM_OUT_6) || (ui32PWMOut == PWM_OUT_7));
}
#endif

//*****************************************************************************
//
//
//*****************************************************************************
void
PWMGenConfigure(uint32_t ui32Base, uint32_t ui32Gen,
                uint32_t ui32Config)
{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == PWM0_BASE) || (ui32Base == PWM1_BASE));
    ASSERT(_PWMGenValid(ui32Gen));

    //
    // Compute the generator's base address.
    //
    ui32Gen = PWM_GEN_BADDR(ui32Base, ui32Gen);

    //
    // Change the global configuration of the generator.
    //
    HWREG(ui32Gen + PWM_O_X_CTL) = ((HWREG(ui32Gen + PWM_O_X_CTL) &
                                     ~(PWM_X_CTL_MODE | PWM_X_CTL_DEBUG |
                                       PWM_X_CTL_LATCH | PWM_X_CTL_MINFLTPER |
                                       PWM_X_CTL_FLTSRC |
                                       PWM_X_CTL_DBFALLUPD_M |
                                       PWM_X_CTL_DBRISEUPD_M |
                                       PWM_X_CTL_DBCTLUPD_M |
                                       PWM_X_CTL_GENBUPD_M |
                                       PWM_X_CTL_GENAUPD_M |
                                       PWM_X_CTL_LOADUPD | PWM_X_CTL_CMPAUPD |
                                       PWM_X_CTL_CMPBUPD)) | ui32Config);

    //
    // Set the individual PWM generator controls.
    //
    if(ui32Config & PWM_X_CTL_MODE)
    {
        //
        // In up/down count mode, set the signal high on up count comparison
        // and low on down count comparison (that is, center align the
        // signals).
        //
        HWREG(ui32Gen + PWM_O_X_GENA) = (PWM_X_GENA_ACTCMPAU_ONE |
                                         PWM_X_GENA_ACTCMPAD_ZERO);
        HWREG(ui32Gen + PWM_O_X_GENB) = (PWM_X_GENB_ACTCMPBU_ONE |
                                         PWM_X_GENB_ACTCMPBD_ZERO);
    }
    else
    {
        //
        // In down count mode, set the signal high on load and low on count
        // comparison (that is, left align the signals).
        //
        HWREG(ui32Gen + PWM_O_X_GENA) = (PWM_X_GENA_ACTLOAD_ONE |
                                         PWM_X_GENA_ACTCMPAD_ZERO);
        HWREG(ui32Gen + PWM_O_X_GENB) = (PWM_X_GENB_ACTLOAD_ONE |
                                         PWM_X_GENB_ACTCMPBD_ZERO);
    }
}

//*****************************************************************************
//
//
//*****************************************************************************
void
PWMGenPeriodSet(uint32_t ui32Base, uint32_t ui32Gen,
                uint32_t ui32Period)
{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == PWM0_BASE) || (ui32Base == PWM1_BASE));
    ASSERT(_PWMGenValid(ui32Gen));

    //
    // Compute the generator's base address.
    //
    ui32Gen = PWM_GEN_BADDR(ui32Base, ui32Gen);

    //
    // Set the reload register based on the mode.
    //
    if(HWREG(ui32Gen + PWM_O_X_CTL) & PWM_X_CTL_MODE)
    {
        //
        // In up/down count mode, set the reload register to half the requested
        // period.
        //
        ASSERT((ui32Period / 2) < 65536);
        HWREG(ui32Gen + PWM_O_X_LOAD) = ui32Period / 2;
    }
    else
    {
        //
        // In down count mode, set the reload register to the requested period
        // minus one.
        //
        ASSERT((ui32Period <= 65536) && (ui32Period != 0));
        HWREG(ui32Gen + PWM_O_X_LOAD) = ui32Period - 1;
    }
}

//*****************************************************************************
//
//
//*****************************************************************************
uint32_t
PWMGenPeriodGet(uint32_t ui32Base, uint32_t ui32Gen)
{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == PWM0_BASE) || (ui32Base == PWM1_BASE));
    ASSERT(_PWMGenValid(ui32Gen));

    //
    // Compute the generator's base address.
    //
    ui32Gen = PWM_GEN_BADDR(ui32Base, ui32Gen);

    //
    // Figure out the counter mode.
    //
    if(HWREG(ui32Gen + PWM_O_X_CTL) & PWM_X_CTL_MODE)
    {
        //
        // The period is twice the reload register value.
        //
        return(HWREG(ui32Gen + PWM_O_X_LOAD) * 2);
    }
    else
    {
        //
        // The period is the reload register value plus one.
        //
        return(HWREG(ui32Gen + PWM_O_X_LOAD) + 1);
    }
}

//*****************************************************************************
//
//
//*****************************************************************************
void
PWMGenEnable(uint32_t ui32Base, uint32_t ui32Gen)
{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == PWM0_BASE) || (ui32Base == PWM1_BASE));
    ASSERT(_PWMGenValid(ui32Gen));

    //
    // Enable the PWM generator.
    //
    HWREG(PWM_GEN_BADDR(ui32Base, ui32Gen) + PWM_O_X_CTL) |= PWM_X_CTL_ENABLE;
}

//*****************************************************************************
//
//
//*****************************************************************************
void
PWMGenDisable(uint32_t ui32Base, uint32_t ui32Gen)
{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == PWM0_BASE) || (ui32Base == PWM1_BASE));
    ASSERT(_PWMGenValid(ui32Gen));

    //
    // Disable the PWM generator.
    //
    HWREG(PWM_GEN_BADDR(ui32Base, ui32Gen) + PWM_O_X_CTL) &=
        ~(PWM_X_CTL_ENABLE);
}

//*****************************************************************************
//
//
//*****************************************************************************
void
PWMPulseWidthSet(uint32_t ui32Base, uint32_t ui32PWMOut,
                 uint32_t ui32Width)
{
    uint32_t ui32GenBase, ui32Reg;

    //
    // Check the arguments.
    //
    ASSERT((ui32Base == PWM0_BASE) || (ui32Base == PWM1_BASE));
    ASSERT(_PWMOutValid(ui32PWMOut));

    //
    // Compute the generator's base address.
    //
    ui32GenBase = PWM_OUT_BADDR(ui32Base, ui32PWMOut);

    //
    // If the counter is in up/down count mode, divide the width by two.
    //
    if(HWREG(ui32GenBase + PWM_O_X_CTL) & PWM_X_CTL_MODE)
    {
        ui32Width /= 2;
    }

    //
    // Get the period.
    //
    ui32Reg = HWREG(ui32GenBase + PWM_O_X_LOAD);

    //
    // Make sure the width is not too large.
    //
    ASSERT(ui32Width < ui32Reg);

    //
    // Compute the compare value.
    //
    ui32Reg = ui32Reg - ui32Width;

    //
    // Write to the appropriate registers.
    //
    if(PWM_IS_OUTPUT_ODD(ui32PWMOut))
    {
        HWREG(ui32GenBase + PWM_O_X_CMPB) = ui32Reg;
    }
    else
    {
        HWREG(ui32GenBase + PWM_O_X_CMPA) = ui32Reg;
    }
}

//*****************************************************************************
//
//
//*****************************************************************************
uint32_t
PWMPulseWidthGet(uint32_t ui32Base, uint32_t ui32PWMOut)
{
    uint32_t ui32GenBase, ui32Reg, ui32Load;

    //
    // Check the arguments.
    //
    ASSERT((ui32Base == PWM0_BASE) || (ui32Base == PWM1_BASE));
    ASSERT(_PWMOutValid(ui32PWMOut));

    //
    // Compute the generator's base address.
    //
    ui32GenBase = PWM_OUT_BADDR(ui32Base, ui32PWMOut);

    //
    // Then compute the pulse width.  If mode is UpDown, set
    // width = (load - compare) * 2.  Otherwise, set width = load - compare.
    //
    ui32Load = HWREG(ui32GenBase + PWM_O_X_LOAD);
    if(PWM_IS_OUTPUT_ODD(ui32PWMOut))
    {
        ui32Reg = HWREG(ui32GenBase + PWM_O_X_CMPB);
    }
    else
    {
        ui32Reg = HWREG(ui32GenBase + PWM_O_X_CMPA);
    }
    ui32Reg = ui32Load - ui32Reg;

    //
    // If in up/down count mode, double the pulse width.
    //
    if(HWREG(ui32GenBase + PWM_O_X_CTL) & PWM_X_CTL_MODE)
    {
        ui32Reg = ui32Reg * 2;
    }

    //
    // Return the pulse width.
    //
    return(ui32Reg);
}

//*****************************************************************************
//
//
//*****************************************************************************
void
PWMDeadBandEnable(uint32_t ui32Base, uint32_t ui32Gen,
                  uint16_t ui16Rise, uint16_t ui16Fall)
{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == PWM0_BASE) || (ui32Base == PWM1_BASE));
    ASSERT(_PWMGenValid(ui32Gen));
    ASSERT(ui16Rise < 4096);
    ASSERT(ui16Fall < 4096);

    //
    // Compute the generator's base address.
    //
    ui32Gen = PWM_GEN_BADDR(ui32Base, ui32Gen);

    //
    // Write the dead band delay values.
    //
    HWREG(ui32Gen + PWM_O_X_DBRISE) = ui16Rise;
    HWREG(ui32Gen + PWM_O_X_DBFALL) = ui16Fall;

    //
    // Enable the deadband functionality.
    //
    HWREG(ui32Gen + PWM_O_X_DBCTL) |= PWM_X_DBCTL_ENABLE;
}

//*****************************************************************************
//
//
//*****************************************************************************
void
PWMDeadBandDisable(uint32_t ui32Base, uint32_t ui32Gen)
{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == PWM0_BASE) || (ui32Base == PWM1_BASE));
    ASSERT(_PWMGenValid(ui32Gen));

    //
    // Disable the deadband functionality.
    //
    HWREG(PWM_GEN_BADDR(ui32Base, ui32Gen) + PWM_O_X_DBCTL) &=
        ~(PWM_X_DBCTL_ENABLE);
}

//*****************************************************************************
//
//
//*****************************************************************************
void
PWMSyncUpdate(uint32_t ui32Base, uint32_t ui32GenBits)
{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == PWM0_BASE) || (ui32Base == PWM1_BASE));
    ASSERT(!(ui32GenBits & ~(PWM_GEN_0_BIT | PWM_GEN_1_BIT | PWM_GEN_2_BIT |
                             PWM_GEN_3_BIT)));

    //
    // Synchronize pending PWM register changes.
    //
    HWREG(ui32Base + PWM_O_CTL) = ui32GenBits;
}

//*****************************************************************************
//
//
//*****************************************************************************
void
PWMSyncTimeBase(uint32_t ui32Base, uint32_t ui32GenBits)
{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == PWM0_BASE) || (ui32Base == PWM1_BASE));
    ASSERT(!(ui32GenBits & ~(PWM_GEN_0_BIT | PWM_GEN_1_BIT | PWM_GEN_2_BIT |
                             PWM_GEN_3_BIT)));

    //
    // Synchronize the counters in the specified generators by writing to the
    // module's synchronization register.
    //
    HWREG(ui32Base + PWM_O_SYNC) = ui32GenBits;
}

//*****************************************************************************
//
//
//*****************************************************************************
void
PWMOutputState(uint32_t ui32Base, uint32_t ui32PWMOutBits,
               bool bEnable)
{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == PWM0_BASE) || (ui32Base == PWM1_BASE));
    ASSERT(!(ui32PWMOutBits & ~(PWM_OUT_0_BIT | PWM_OUT_1_BIT | PWM_OUT_2_BIT |
                                PWM_OUT_3_BIT | PWM_OUT_4_BIT | PWM_OUT_5_BIT |
                                PWM_OUT_6_BIT | PWM_OUT_7_BIT)));

    //
    // Read the module's ENABLE output control register and set or clear the
    // requested bits.
    //
    if(bEnable == true)
    {
        HWREG(ui32Base + PWM_O_ENABLE) |= ui32PWMOutBits;
    }
    else
    {
        HWREG(ui32Base + PWM_O_ENABLE) &= ~(ui32PWMOutBits);
    }
}

//*****************************************************************************
//
//
//*****************************************************************************
void
PWMOutputInvert(uint32_t ui32Base, uint32_t ui32PWMOutBits,
                bool bInvert)
{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == PWM0_BASE) || (ui32Base == PWM1_BASE));
    ASSERT(!(ui32PWMOutBits & ~(PWM_OUT_0_BIT | PWM_OUT_1_BIT | PWM_OUT_2_BIT |
                                PWM_OUT_3_BIT | PWM_OUT_4_BIT | PWM_OUT_5_BIT |
                                PWM_OUT_6_BIT | PWM_OUT_7_BIT)));

    //
    // Read the module's INVERT output control register and set or clear the
    // requested bits.
    //
    if(bInvert == true)
    {
        HWREG(ui32Base + PWM_O_INVERT) |= ui32PWMOutBits;
    }
    else
    {
        HWREG(ui32Base + PWM_O_INVERT) &= ~(ui32PWMOutBits);
    }
}

//*****************************************************************************
//
//
//*****************************************************************************
void
PWMOutputFaultLevel(uint32_t ui32Base, uint32_t ui32PWMOutBits,
                    bool bDriveHigh)
{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == PWM0_BASE) || (ui32Base == PWM1_BASE));
    ASSERT(!(ui32PWMOutBits & ~(PWM_OUT_0_BIT | PWM_OUT_1_BIT | PWM_OUT_2_BIT |
                                PWM_OUT_3_BIT | PWM_OUT_4_BIT | PWM_OUT_5_BIT |
                                PWM_OUT_6_BIT | PWM_OUT_7_BIT)));

    //
    // Read the module's FAULT output control register and set or clear the
    // requested bits.
    //
    if(bDriveHigh == true)
    {
        HWREG(ui32Base + PWM_O_FAULTVAL) |= ui32PWMOutBits;
    }
    else
    {
        HWREG(ui32Base + PWM_O_FAULTVAL) &= ~(ui32PWMOutBits);
    }
}

//*****************************************************************************
//
//
//*****************************************************************************
void
PWMOutputFault(uint32_t ui32Base, uint32_t ui32PWMOutBits,
               bool bFaultSuppress)
{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == PWM0_BASE) || (ui32Base == PWM1_BASE));
    ASSERT(!(ui32PWMOutBits & ~(PWM_OUT_0_BIT | PWM_OUT_1_BIT | PWM_OUT_2_BIT |
                                PWM_OUT_3_BIT | PWM_OUT_4_BIT | PWM_OUT_5_BIT |
                                PWM_OUT_6_BIT | PWM_OUT_7_BIT)));

    //
    // Read the module's FAULT output control register and set or clear the
    // requested bits.
    //
    if(bFaultSuppress == true)
    {
        HWREG(ui32Base + PWM_O_FAULT) |= ui32PWMOutBits;
    }
    else
    {
        HWREG(ui32Base + PWM_O_FAULT) &= ~(ui32PWMOutBits);
    }
}

//*****************************************************************************
//
//
//*****************************************************************************
static uint32_t
_PWMGenIntNumberGet(uint32_t ui32Base, uint32_t ui32Gen)
{
    //
    // Determine the generator and PWM module in question.
    //
    switch(ui32Base + ui32Gen)
    {
        //
        // The first PWM generator in the first PWM module.
        //
        case PWM0_BASE + PWM_GEN_0:
        {
            if(CLASS_IS_TM4C123)
            {
                return(INT_PWM0_0_TM4C123);
            }
            else if(CLASS_IS_TM4C129)
            {
                return(INT_PWM0_0_TM4C129);
            }
            else
            {
                return(0);
            }
        }

        //
        // The second PWM generator in the first PWM module.
        //
        case PWM0_BASE + PWM_GEN_1:
        {
            if(CLASS_IS_TM4C129)
            {
                return(INT_PWM0_1_TM4C129);
            }
            else
            {
                return(0);
            }
        }

        //
        // The third PWM generator in the first PWM module.
        //
        case PWM0_BASE + PWM_GEN_2:
        {
            if(CLASS_IS_TM4C129)
            {
                return(INT_PWM0_2_TM4C129);
            }
            else
            {
                return(0);
            }
        }

        //
        // The fourth PWM generator in the first PWM module.
        //
        case PWM0_BASE + PWM_GEN_3:
        {
            if(CLASS_IS_TM4C129)
            {
                return(INT_PWM0_3_TM4C129);
            }
            else
            {
                return(0);
            }
        }

        //
        // The first PWM generator in the second PWM module.
        //
        case PWM1_BASE + PWM_GEN_0:
        {
            if(CLASS_IS_TM4C123)
            {
                return(INT_PWM1_0_TM4C123);
            }
            else
            {
                return(0);
            }
        }

        //
        // The first PWM generator in the second PWM module.
        //
        case PWM1_BASE + PWM_GEN_1:
        {
            if(CLASS_IS_TM4C123)
            {
                return(INT_PWM1_1_TM4C123);
            }
            else
            {
                return(0);
            }
        }

        //
        // The first PWM generator in the second PWM module.
        //
        case PWM1_BASE + PWM_GEN_2:
        {
            if(CLASS_IS_TM4C123)
            {
                return(INT_PWM1_2_TM4C123);
            }
            else
            {
                return(0);
            }
        }

        //
        // The first PWM generator in the second PWM module.
        //
        case PWM1_BASE + PWM_GEN_3:
        {
            if(CLASS_IS_TM4C123)
            {
                return(INT_PWM1_3_TM4C123);
            }
            else
            {
                return(0);
            }
        }

        //
        // An unknown PWM module/generator was specified.
        //
        default:
        {
            return(0);
        }
    }
}

//*****************************************************************************
//
//
//*****************************************************************************
void
PWMGenIntRegister(uint32_t ui32Base, uint32_t ui32Gen,
                  void (*pfnIntHandler)(void))
{
    uint32_t ui32Int;

    //
    // Check the arguments.
    //
    ASSERT((ui32Base == PWM0_BASE) || (ui32Base == PWM1_BASE));
    ASSERT(_PWMGenValid(ui32Gen));

    //
    // Get the interrupt number associated with the specified generator.
    //
    ui32Int = _PWMGenIntNumberGet(ui32Base, ui32Gen);

    ASSERT(ui32Int != 0);

    //
    // Register the interrupt handler.
    //
    IntRegister(ui32Int, pfnIntHandler);

    //
    // Enable the PWMx interrupt.
    //
    IntEnable(ui32Int);
}

//*****************************************************************************
//
//
//*****************************************************************************
void
PWMGenIntUnregister(uint32_t ui32Base, uint32_t ui32Gen)
{
    uint32_t ui32Int;

    //
    // Check the arguments.
    //
    ASSERT((ui32Base == PWM0_BASE) || (ui32Base == PWM1_BASE));
    ASSERT(_PWMGenValid(ui32Gen));

    //
    // Get the interrupt number associated with the specified generator.
    //
    ui32Int = _PWMGenIntNumberGet(ui32Base, ui32Gen);

    ASSERT(ui32Int != 0);

    //
    // Disable the PWMx interrupt.
    //
    IntDisable(ui32Int);

    //
    // Unregister the interrupt handler.
    //
    IntUnregister(ui32Int);
}

//*****************************************************************************
//
//
//*****************************************************************************
static uint32_t
_PWMFaultIntNumberGet(uint32_t ui32Base)
{
    //
    // Return the fault interrupt number.
    //
    if(CLASS_IS_TM4C123)
    {
        return((ui32Base == PWM0_BASE) ? INT_PWM0_FAULT_TM4C123 :
               INT_PWM1_FAULT_TM4C123);
    }
    else if(CLASS_IS_TM4C129)
    {
        return((ui32Base == PWM0_BASE) ? INT_PWM0_FAULT_TM4C129 : 0);
    }
    else
    {
        return(0);
    }
}

//*****************************************************************************
//
//
//*****************************************************************************
void
PWMFaultIntRegister(uint32_t ui32Base, void (*pfnIntHandler)(void))
{
    uint32_t ui32Int;

    //
    // Check the arguments.
    //
    ASSERT((ui32Base == PWM0_BASE) || (ui32Base == PWM1_BASE));

    //
    // Get the interrupt number associated with the specified module.
    //
    ui32Int = _PWMFaultIntNumberGet(ui32Base);

    ASSERT(ui32Int != 0);

    //
    // Register the interrupt handler, returning an error if one occurs.
    //
    IntRegister(ui32Int, pfnIntHandler);

    //
    // Enable the PWM fault interrupt.
    //
    IntEnable(ui32Int);
}

//*****************************************************************************
//
//
//*****************************************************************************
void
PWMFaultIntUnregister(uint32_t ui32Base)
{
    uint32_t ui32Int;

    //
    // Check the arguments.
    //
    ASSERT((ui32Base == PWM0_BASE) || (ui32Base == PWM1_BASE));

    //
    // Get the interrupt number associated with the specified module.
    //
    ui32Int = _PWMFaultIntNumberGet(ui32Base);

    ASSERT(ui32Int != 0);

    //
    // Disable the PWM fault interrupt.
    //
    IntDisable(ui32Int);

    //
    // Unregister the interrupt handler, returning an error if one occurs.
    //
    IntUnregister(ui32Int);
}

//*****************************************************************************
//
//
//*****************************************************************************
void
PWMGenIntTrigEnable(uint32_t ui32Base, uint32_t ui32Gen,
                    uint32_t ui32IntTrig)
{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == PWM0_BASE) || (ui32Base == PWM1_BASE));
    ASSERT(_PWMGenValid(ui32Gen));
    ASSERT((ui32IntTrig & ~(PWM_INT_CNT_ZERO | PWM_INT_CNT_LOAD |
                            PWM_INT_CNT_AU | PWM_INT_CNT_AD | PWM_INT_CNT_BU |
                            PWM_INT_CNT_BD | PWM_TR_CNT_ZERO |
                            PWM_TR_CNT_LOAD | PWM_TR_CNT_AU | PWM_TR_CNT_AD |
                            PWM_TR_CNT_BU | PWM_TR_CNT_BD)) == 0);

    //
    // Enable the specified interrupts/triggers.
    //
    HWREG(PWM_GEN_BADDR(ui32Base, ui32Gen) + PWM_O_X_INTEN) |= ui32IntTrig;
}

//*****************************************************************************
//
//
//*****************************************************************************
void
PWMGenIntTrigDisable(uint32_t ui32Base, uint32_t ui32Gen,
                     uint32_t ui32IntTrig)
{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == PWM0_BASE) || (ui32Base == PWM1_BASE));
    ASSERT(_PWMGenValid(ui32Gen));
    ASSERT((ui32IntTrig & ~(PWM_INT_CNT_ZERO | PWM_INT_CNT_LOAD |
                            PWM_INT_CNT_AU | PWM_INT_CNT_AD | PWM_INT_CNT_BU |
                            PWM_INT_CNT_BD | PWM_TR_CNT_ZERO |
                            PWM_TR_CNT_LOAD | PWM_TR_CNT_AU | PWM_TR_CNT_AD |
                            PWM_TR_CNT_BU | PWM_TR_CNT_BD)) == 0);

    //
    // Disable the specified interrupts/triggers.
    //
    HWREG(PWM_GEN_BADDR(ui32Base, ui32Gen) + PWM_O_X_INTEN) &= ~(ui32IntTrig);
}

//*****************************************************************************
//
//
//*****************************************************************************
uint32_t
PWMGenIntStatus(uint32_t ui32Base, uint32_t ui32Gen, bool bMasked)
{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == PWM0_BASE) || (ui32Base == PWM1_BASE));
    ASSERT(_PWMGenValid(ui32Gen));

    //
    // Compute the generator's base address.
    //
    ui32Gen = PWM_GEN_BADDR(ui32Base, ui32Gen);

    //
    // Read and return the specified generator's raw or enabled interrupt
    // status.
    //
    if(bMasked == true)
    {
        return(HWREG(ui32Gen + PWM_O_X_ISC));
    }
    else
    {
        return(HWREG(ui32Gen + PWM_O_X_RIS));
    }
}

//*****************************************************************************
//
//
//*****************************************************************************
void
PWMGenIntClear(uint32_t ui32Base, uint32_t ui32Gen, uint32_t ui32Ints)
{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == PWM0_BASE) || (ui32Base == PWM1_BASE));
    ASSERT(_PWMGenValid(ui32Gen));
    ASSERT((ui32Ints &
            ~(PWM_INT_CNT_ZERO | PWM_INT_CNT_LOAD | PWM_INT_CNT_AU |
              PWM_INT_CNT_AD | PWM_INT_CNT_BU | PWM_INT_CNT_BD)) == 0);

    //
    // Clear the requested interrupts by writing ones to the specified bit
    // of the module's interrupt enable register.
    //
    HWREG(PWM_GEN_BADDR(ui32Base, ui32Gen) + PWM_O_X_ISC) = ui32Ints;
}

//*****************************************************************************
//
//
//*****************************************************************************
void
PWMIntEnable(uint32_t ui32Base, uint32_t ui32GenFault)
{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == PWM0_BASE) || (ui32Base == PWM1_BASE));
    ASSERT((ui32GenFault & ~(PWM_INT_GEN_0 | PWM_INT_GEN_1 | PWM_INT_GEN_2 |
                             PWM_INT_GEN_3 | PWM_INT_FAULT0 | PWM_INT_FAULT1 |
                             PWM_INT_FAULT2 | PWM_INT_FAULT3)) == 0);

    //
    // Read the module's interrupt enable register and enable interrupts
    // for the specified PWM generators.
    //
    HWREG(ui32Base + PWM_O_INTEN) |= ui32GenFault;
}

//*****************************************************************************
//
//
//*****************************************************************************
void
PWMIntDisable(uint32_t ui32Base, uint32_t ui32GenFault)
{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == PWM0_BASE) || (ui32Base == PWM1_BASE));
    ASSERT((ui32GenFault & ~(PWM_INT_GEN_0 | PWM_INT_GEN_1 | PWM_INT_GEN_2 |
                             PWM_INT_GEN_3 | PWM_INT_FAULT0 | PWM_INT_FAULT1 |
                             PWM_INT_FAULT2 | PWM_INT_FAULT3)) == 0);

    //
    // Read the module's interrupt enable register and disable interrupts
    // for the specified PWM generators.
    //
    HWREG(ui32Base + PWM_O_INTEN) &= ~(ui32GenFault);
}

//*****************************************************************************
//
//
//*****************************************************************************
void
PWMFaultIntClear(uint32_t ui32Base)
{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == PWM0_BASE) || (ui32Base == PWM1_BASE));

    //
    // Write the only writeable bit in the module's interrupt register.
    //
    HWREG(ui32Base + PWM_O_ISC) = PWM_ISC_INTFAULT0;
}

//*****************************************************************************
//
//*****************************************************************************
uint32_t
PWMIntStatus(uint32_t ui32Base, bool bMasked)
{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == PWM0_BASE) || (ui32Base == PWM1_BASE));

    //
    // Read and return either the module's raw or enabled interrupt status.
    //
    if(bMasked == true)
    {
        return(HWREG(ui32Base + PWM_O_ISC));
    }
    else
    {
        return(HWREG(ui32Base + PWM_O_RIS));
    }
}

//*****************************************************************************
//
//
//*****************************************************************************
void
PWMFaultIntClearExt(uint32_t ui32Base, uint32_t ui32FaultInts)
{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == PWM0_BASE) || (ui32Base == PWM1_BASE));
    ASSERT((ui32FaultInts & ~(PWM_INT_FAULT0 | PWM_INT_FAULT1 |
                              PWM_INT_FAULT2 | PWM_INT_FAULT3)) == 0);

    //
    // Clear the supplied fault bits.
    //
    HWREG(ui32Base + PWM_O_ISC) = ui32FaultInts;
}

//*****************************************************************************
//
//
//*****************************************************************************
void
PWMGenFaultConfigure(uint32_t ui32Base, uint32_t ui32Gen,
                     uint32_t ui32MinFaultPeriod,
                     uint32_t ui32FaultSenses)
{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == PWM0_BASE) || (ui32Base == PWM1_BASE));
    ASSERT(_PWMGenValid(ui32Gen));
    ASSERT(ui32MinFaultPeriod < PWM_X_MINFLTPER_M);
    ASSERT((ui32FaultSenses & ~(PWM_FAULT0_SENSE_HIGH | PWM_FAULT0_SENSE_LOW |
                                PWM_FAULT1_SENSE_HIGH | PWM_FAULT1_SENSE_LOW |
                                PWM_FAULT2_SENSE_HIGH | PWM_FAULT2_SENSE_LOW |
                                PWM_FAULT3_SENSE_HIGH |
                                PWM_FAULT3_SENSE_LOW)) == 0);

    //
    // Write the minimum fault period.
    //
    HWREG(PWM_GEN_BADDR(ui32Base, ui32Gen) + PWM_O_X_MINFLTPER) =
        ui32MinFaultPeriod;

    //
    // Write the fault senses.
    //
    HWREG(PWM_GEN_EXT_BADDR(ui32Base, ui32Gen) + PWM_O_X_FLTSEN) =
        ui32FaultSenses;
}

//*****************************************************************************
//
//
//*****************************************************************************
void
PWMGenFaultTriggerSet(uint32_t ui32Base, uint32_t ui32Gen,
                      uint32_t ui32Group, uint32_t ui32FaultTriggers)
{
    //
    // Check for valid parameters.
    //
    ASSERT((ui32Base == PWM0_BASE) || (ui32Base == PWM1_BASE));
    ASSERT(_PWMGenValid(ui32Gen));
    ASSERT((ui32Group == PWM_FAULT_GROUP_0) ||
           (ui32Group == PWM_FAULT_GROUP_1));
    ASSERT((ui32Group == PWM_FAULT_GROUP_0) &&
           ((ui32FaultTriggers & ~(PWM_FAULT_FAULT0 | PWM_FAULT_FAULT1 |
                                   PWM_FAULT_FAULT2 | PWM_FAULT_FAULT3)) ==
            0));
    ASSERT((ui32Group == PWM_FAULT_GROUP_1) &&
           ((ui32FaultTriggers & ~(PWM_FAULT_DCMP0 | PWM_FAULT_DCMP1 |
                                   PWM_FAULT_DCMP2 | PWM_FAULT_DCMP3 |
                                   PWM_FAULT_DCMP4 | PWM_FAULT_DCMP5 |
                                   PWM_FAULT_DCMP6 | PWM_FAULT_DCMP7)) == 0));

    //
    // Write the fault triggers to the appropriate register.
    //
    if(ui32Group == PWM_FAULT_GROUP_0)
    {
        HWREG(PWM_GEN_BADDR(ui32Base, ui32Gen) + PWM_O_X_FLTSRC0) =
            ui32FaultTriggers;
    }
    else
    {
        HWREG(PWM_GEN_BADDR(ui32Base, ui32Gen) + PWM_O_X_FLTSRC1) =
            ui32FaultTriggers;
    }
}

//*****************************************************************************
//
//
//*****************************************************************************
uint32_t
PWMGenFaultTriggerGet(uint32_t ui32Base, uint32_t ui32Gen,
                      uint32_t ui32Group)
{
    //
    // Check for valid parameters.
    //
    ASSERT((ui32Base == PWM0_BASE) || (ui32Base == PWM1_BASE));
    ASSERT(_PWMGenValid(ui32Gen));
    ASSERT((ui32Group == PWM_FAULT_GROUP_0) ||
           (ui32Group == PWM_FAULT_GROUP_1));

    //
    // Return the current fault triggers.
    //
    if(ui32Group == PWM_FAULT_GROUP_0)
    {
        return(HWREG(PWM_GEN_BADDR(ui32Base, ui32Gen) + PWM_O_X_FLTSRC0));
    }
    else
    {
        return(HWREG(PWM_GEN_BADDR(ui32Base, ui32Gen) + PWM_O_X_FLTSRC1));
    }
}

//*****************************************************************************
//
//
//*****************************************************************************
uint32_t
PWMGenFaultStatus(uint32_t ui32Base, uint32_t ui32Gen,
                  uint32_t ui32Group)
{
    //
    // Check for valid parameters.
    //
    ASSERT((ui32Base == PWM0_BASE) || (ui32Base == PWM1_BASE));
    ASSERT(_PWMGenValid(ui32Gen));
    ASSERT((ui32Group == PWM_FAULT_GROUP_0) ||
           (ui32Group == PWM_FAULT_GROUP_1));

    //
    // Return the current fault status.
    //
    if(ui32Group == PWM_FAULT_GROUP_0)
    {
        return(HWREG(PWM_GEN_EXT_BADDR(ui32Base, ui32Gen) + PWM_O_X_FLTSTAT0));
    }
    else
    {
        return(HWREG(PWM_GEN_EXT_BADDR(ui32Base, ui32Gen) + PWM_O_X_FLTSTAT1));
    }
}

//*****************************************************************************
//
//
//*****************************************************************************
void
PWMGenFaultClear(uint32_t ui32Base, uint32_t ui32Gen,
                 uint32_t ui32Group, uint32_t ui32FaultTriggers)
{
    //
    // Check for valid parameters.
    //
    ASSERT((ui32Base == PWM0_BASE) || (ui32Base == PWM1_BASE));
    ASSERT(_PWMGenValid(ui32Gen));
    ASSERT((ui32Group == PWM_FAULT_GROUP_0) ||
           (ui32Group == PWM_FAULT_GROUP_1));
    ASSERT((ui32Group == PWM_FAULT_GROUP_0) &&
           ((ui32FaultTriggers & ~(PWM_FAULT_FAULT0 | PWM_FAULT_FAULT1 |
                                   PWM_FAULT_FAULT2 | PWM_FAULT_FAULT3)) ==
            0));
    ASSERT((ui32Group == PWM_FAULT_GROUP_1) &&
           ((ui32FaultTriggers & ~(PWM_FAULT_DCMP0 | PWM_FAULT_DCMP1 |
                                   PWM_FAULT_DCMP2 | PWM_FAULT_DCMP3 |
                                   PWM_FAULT_DCMP4 | PWM_FAULT_DCMP5 |
                                   PWM_FAULT_DCMP6 | PWM_FAULT_DCMP7)) == 0));

    //
    // Clear the given faults.
    //
    if(ui32Group == PWM_FAULT_GROUP_0)
    {
        HWREG(PWM_GEN_EXT_BADDR(ui32Base, ui32Gen) + PWM_O_X_FLTSTAT0) =
            ui32FaultTriggers;
    }
    else
    {
        HWREG(PWM_GEN_EXT_BADDR(ui32Base, ui32Gen) + PWM_O_X_FLTSTAT1) =
            ui32FaultTriggers;
    }
}

//*****************************************************************************
//
//*****************************************************************************
void
PWMClockSet(uint32_t ui32Base, uint32_t ui32Config)
{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == PWM0_BASE) || (ui32Base == PWM1_BASE));
    ASSERT((ui32Config == PWM_SYSCLK_DIV_2) ||
           (ui32Config == PWM_SYSCLK_DIV_4) ||
           (ui32Config == PWM_SYSCLK_DIV_8) ||
           (ui32Config == PWM_SYSCLK_DIV_16) ||
           (ui32Config == PWM_SYSCLK_DIV_32) ||
           (ui32Config == PWM_SYSCLK_DIV_64));

    //
    // Set the PWM clock configuration into the PWM clock configuration
    // register.
    //
    HWREG(ui32Base + PWM_O_CC) = ((HWREG(ui32Base + PWM_O_CC) &
                                   ~(PWM_CC_USEPWM | PWM_CC_PWMDIV_M)) |
                                  ui32Config);
}

//*****************************************************************************
//
//
//*****************************************************************************
uint32_t
PWMClockGet(uint32_t ui32Base)
{
    //
    // Check the arguments.
    //
    ASSERT((ui32Base == PWM0_BASE) || (ui32Base == PWM1_BASE));

    //
    // Return the current PWM clock configuration.  Make sure that
    // PWM_SYSCLK_DIV_1 is returned in all cases where the divider is disabled.
    //
    if(!(HWREG(ui32Base + PWM_O_CC) & PWM_CC_USEPWM))
    {
        //
        // The divider is not active so reflect this in the value we return.
        //
        return(PWM_SYSCLK_DIV_1);
    }
    else
    {
        //
        // The divider is active so directly return the masked register value.
        //
        return(HWREG(ui32Base + PWM_O_CC) & (PWM_CC_USEPWM | PWM_CC_PWMDIV_M));
    }
}

//*****************************************************************************
//
//
//*****************************************************************************
void
PWMOutputUpdateMode(uint32_t ui32Base, uint32_t ui32PWMOutBits,
                    uint32_t ui32Mode)
{
    uint_fast8_t ui8Index;
    uint32_t ui32PWMOutputMask;
    uint32_t ui32UpdateValueMask;
    uint32_t ui32UpdateValue;
    uint32_t ui32Temp;

    //
    // Check the arguments.
    //
    ASSERT((ui32Base == PWM0_BASE) || (ui32Base == PWM1_BASE));
    ASSERT(!(ui32PWMOutBits & ~(PWM_OUT_0_BIT | PWM_OUT_1_BIT | PWM_OUT_2_BIT |
                                PWM_OUT_3_BIT | PWM_OUT_4_BIT | PWM_OUT_5_BIT |
                                PWM_OUT_6_BIT | PWM_OUT_7_BIT)));
    ASSERT((ui32Mode == PWM_OUTPUT_MODE_NO_SYNC) ||
           (ui32Mode == PWM_OUTPUT_MODE_SYNC_LOCAL) ||
           (ui32Mode == PWM_OUTPUT_MODE_SYNC_GLOBAL));

    //
    // Initialize the local variables
    //
    ui8Index = 0;
    ui32PWMOutputMask = 1;
    ui32UpdateValue = 0;
    ui32UpdateValueMask = 0;

    //
    // Loop to find out which PWM outputs are to be modified.
    //
    while(ui8Index < 8)
    {
        //
        // Check if this PWM output is to be modified.
        //
        if(ui32PWMOutputMask & ui32PWMOutBits)
        {
            //
            // Set the update mode value for the requested PWM output by
            // writing to the appropriate field.
            //
            ui32UpdateValue |= ui32Mode << (ui8Index * 2);

            //
            // Compute the mask for the bits to be updated.
            //
            ui32UpdateValueMask |= 3 << (ui8Index * 2);
        }

        //
        // Update the PWM output to be checked and the index.
        //
        ui32PWMOutputMask = ui32PWMOutputMask << 1;
        ui8Index++;
    }

    //
    // Read the Enable Update register and mask the bits that are to be
    // updated.
    //
    ui32Temp = ~ui32UpdateValueMask & HWREG(ui32Base + PWM_O_ENUPD);

    //
    // Write the updated values to Enable Update register.
    //
    HWREG(ui32Base + PWM_O_ENUPD) = ui32Temp | ui32UpdateValue;
}

//*****************************************************************************
//
// Close the Doxygen group.
//
//*****************************************************************************