EE445M RTOS
Taken at the University of Texas Spring 2015
gpio.c
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1 //*****************************************************************************
2 //
3 // gpio.c - API for GPIO ports
4 //
5 // Copyright (c) 2005-2014 Texas Instruments Incorporated. All rights reserved.
6 // Software License Agreement
7 //
8 // Redistribution and use in source and binary forms, with or without
9 // modification, are permitted provided that the following conditions
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34 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 //
36 // This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
37 //
38 //*****************************************************************************
39 
40 //*****************************************************************************
41 //
44 //
45 //*****************************************************************************
46 
47 #include <stdbool.h>
48 #include <stdint.h>
49 #include "inc/hw_gpio.h"
50 #include "inc/hw_ints.h"
51 #include "inc/hw_memmap.h"
52 #include "inc/hw_sysctl.h"
53 #include "inc/hw_types.h"
54 #include "driverlib/debug.h"
55 #include "driverlib/gpio.h"
56 #include "driverlib/interrupt.h"
57 
58 //*****************************************************************************
59 //
60 // A mapping of GPIO port address to interrupt number.
61 //
62 //*****************************************************************************
63 static const uint32_t g_ppui32GPIOIntMapBlizzard[][2] =
64 {
65  { GPIO_PORTA_BASE, INT_GPIOA_TM4C123 },
66  { GPIO_PORTA_AHB_BASE, INT_GPIOA_TM4C123 },
67  { GPIO_PORTB_BASE, INT_GPIOB_TM4C123 },
68  { GPIO_PORTB_AHB_BASE, INT_GPIOB_TM4C123 },
69  { GPIO_PORTC_BASE, INT_GPIOC_TM4C123 },
70  { GPIO_PORTC_AHB_BASE, INT_GPIOC_TM4C123 },
71  { GPIO_PORTD_BASE, INT_GPIOD_TM4C123 },
72  { GPIO_PORTD_AHB_BASE, INT_GPIOD_TM4C123 },
73  { GPIO_PORTE_BASE, INT_GPIOE_TM4C123 },
74  { GPIO_PORTE_AHB_BASE, INT_GPIOE_TM4C123 },
75  { GPIO_PORTF_BASE, INT_GPIOF_TM4C123 },
76  { GPIO_PORTF_AHB_BASE, INT_GPIOF_TM4C123 },
77  { GPIO_PORTG_BASE, INT_GPIOG_TM4C123 },
78  { GPIO_PORTG_AHB_BASE, INT_GPIOG_TM4C123 },
79  { GPIO_PORTH_BASE, INT_GPIOH_TM4C123 },
80  { GPIO_PORTH_AHB_BASE, INT_GPIOH_TM4C123 },
81  { GPIO_PORTJ_BASE, INT_GPIOJ_TM4C123 },
82  { GPIO_PORTJ_AHB_BASE, INT_GPIOJ_TM4C123 },
83  { GPIO_PORTK_BASE, INT_GPIOK_TM4C123 },
84  { GPIO_PORTL_BASE, INT_GPIOL_TM4C123 },
85  { GPIO_PORTM_BASE, INT_GPIOM_TM4C123 },
86  { GPIO_PORTN_BASE, INT_GPION_TM4C123 },
87  { GPIO_PORTP_BASE, INT_GPIOP0_TM4C123 },
88  { GPIO_PORTQ_BASE, INT_GPIOQ0_TM4C123 },
89 };
90 static const uint_fast32_t g_ui32GPIOIntMapBlizzardRows =
91  sizeof(g_ppui32GPIOIntMapBlizzard) / sizeof(g_ppui32GPIOIntMapBlizzard[0]);
92 
93 static const uint32_t g_ppui32GPIOIntMapSnowflake[][2] =
94 {
95  { GPIO_PORTA_BASE, INT_GPIOA_TM4C129 },
96  { GPIO_PORTA_AHB_BASE, INT_GPIOA_TM4C129 },
97  { GPIO_PORTB_BASE, INT_GPIOB_TM4C129 },
98  { GPIO_PORTB_AHB_BASE, INT_GPIOB_TM4C129 },
99  { GPIO_PORTC_BASE, INT_GPIOC_TM4C129 },
100  { GPIO_PORTC_AHB_BASE, INT_GPIOC_TM4C129 },
101  { GPIO_PORTD_BASE, INT_GPIOD_TM4C129 },
102  { GPIO_PORTD_AHB_BASE, INT_GPIOD_TM4C129 },
103  { GPIO_PORTE_BASE, INT_GPIOE_TM4C129 },
104  { GPIO_PORTE_AHB_BASE, INT_GPIOE_TM4C129 },
105  { GPIO_PORTF_BASE, INT_GPIOF_TM4C129 },
106  { GPIO_PORTF_AHB_BASE, INT_GPIOF_TM4C129 },
107  { GPIO_PORTG_BASE, INT_GPIOG_TM4C129 },
108  { GPIO_PORTG_AHB_BASE, INT_GPIOG_TM4C129 },
109  { GPIO_PORTH_BASE, INT_GPIOH_TM4C129 },
110  { GPIO_PORTH_AHB_BASE, INT_GPIOH_TM4C129 },
111  { GPIO_PORTJ_BASE, INT_GPIOJ_TM4C129 },
112  { GPIO_PORTJ_AHB_BASE, INT_GPIOJ_TM4C129 },
113  { GPIO_PORTK_BASE, INT_GPIOK_TM4C129 },
114  { GPIO_PORTL_BASE, INT_GPIOL_TM4C129 },
115  { GPIO_PORTM_BASE, INT_GPIOM_TM4C129 },
116  { GPIO_PORTN_BASE, INT_GPION_TM4C129 },
117  { GPIO_PORTP_BASE, INT_GPIOP0_TM4C129 },
118  { GPIO_PORTQ_BASE, INT_GPIOQ0_TM4C129 },
119 };
120 static const uint_fast32_t g_ui32GPIOIntMapSnowflakeRows =
121  (sizeof(g_ppui32GPIOIntMapSnowflake) /
122  sizeof(g_ppui32GPIOIntMapSnowflake[0]));
123 
124 //*****************************************************************************
125 //
126 // The base addresses of all the GPIO modules. Both the APB and AHB apertures
127 // are provided.
128 //
129 //*****************************************************************************
130 static const uint32_t g_pui32GPIOBaseAddrs[] =
131 {
132  GPIO_PORTA_BASE, GPIO_PORTA_AHB_BASE,
133  GPIO_PORTB_BASE, GPIO_PORTB_AHB_BASE,
134  GPIO_PORTC_BASE, GPIO_PORTC_AHB_BASE,
135  GPIO_PORTD_BASE, GPIO_PORTD_AHB_BASE,
136  GPIO_PORTE_BASE, GPIO_PORTE_AHB_BASE,
137  GPIO_PORTF_BASE, GPIO_PORTF_AHB_BASE,
138  GPIO_PORTG_BASE, GPIO_PORTG_AHB_BASE,
139  GPIO_PORTH_BASE, GPIO_PORTH_AHB_BASE,
140  GPIO_PORTJ_BASE, GPIO_PORTJ_AHB_BASE,
141  GPIO_PORTK_BASE, GPIO_PORTK_BASE,
142  GPIO_PORTL_BASE, GPIO_PORTL_BASE,
143  GPIO_PORTM_BASE, GPIO_PORTM_BASE,
144  GPIO_PORTN_BASE, GPIO_PORTN_BASE,
145  GPIO_PORTP_BASE, GPIO_PORTP_BASE,
146  GPIO_PORTQ_BASE, GPIO_PORTQ_BASE,
147  GPIO_PORTR_BASE, GPIO_PORTR_BASE,
148  GPIO_PORTS_BASE, GPIO_PORTS_BASE,
149  GPIO_PORTT_BASE, GPIO_PORTT_BASE,
150 };
151 
152 //*****************************************************************************
153 //
163 //
164 //*****************************************************************************
165 #ifdef DEBUG
166 static bool
167 _GPIOBaseValid(uint32_t ui32Port)
168 {
169  return((ui32Port == GPIO_PORTA_BASE) ||
170  (ui32Port == GPIO_PORTA_AHB_BASE) ||
171  (ui32Port == GPIO_PORTB_BASE) ||
172  (ui32Port == GPIO_PORTB_AHB_BASE) ||
173  (ui32Port == GPIO_PORTC_BASE) ||
174  (ui32Port == GPIO_PORTC_AHB_BASE) ||
175  (ui32Port == GPIO_PORTD_BASE) ||
176  (ui32Port == GPIO_PORTD_AHB_BASE) ||
177  (ui32Port == GPIO_PORTE_BASE) ||
178  (ui32Port == GPIO_PORTE_AHB_BASE) ||
179  (ui32Port == GPIO_PORTF_BASE) ||
180  (ui32Port == GPIO_PORTF_AHB_BASE) ||
181  (ui32Port == GPIO_PORTG_BASE) ||
182  (ui32Port == GPIO_PORTG_AHB_BASE) ||
183  (ui32Port == GPIO_PORTH_BASE) ||
184  (ui32Port == GPIO_PORTH_AHB_BASE) ||
185  (ui32Port == GPIO_PORTJ_BASE) ||
186  (ui32Port == GPIO_PORTJ_AHB_BASE) ||
187  (ui32Port == GPIO_PORTK_BASE) ||
188  (ui32Port == GPIO_PORTL_BASE) ||
189  (ui32Port == GPIO_PORTM_BASE) ||
190  (ui32Port == GPIO_PORTN_BASE) ||
191  (ui32Port == GPIO_PORTP_BASE) ||
192  (ui32Port == GPIO_PORTQ_BASE) ||
193  (ui32Port == GPIO_PORTR_BASE) ||
194  (ui32Port == GPIO_PORTS_BASE) ||
195  (ui32Port == GPIO_PORTT_BASE));
196 }
197 #endif
198 
199 //*****************************************************************************
200 //
209 //
210 //*****************************************************************************
211 static uint32_t
212 _GPIOIntNumberGet(uint32_t ui32Port)
213 {
214  uint_fast32_t ui32Idx, ui32Rows;
215  const uint32_t (*ppui32GPIOIntMap)[2];
216 
217  //
218  // Check the arguments.
219  //
220  ASSERT(_GPIOBaseValid(ui32Port));
221 
222  ppui32GPIOIntMap = g_ppui32GPIOIntMapBlizzard;
223  ui32Rows = g_ui32GPIOIntMapBlizzardRows;
224 
225  if(CLASS_IS_TM4C129)
226  {
227  ppui32GPIOIntMap = g_ppui32GPIOIntMapSnowflake;
228  ui32Rows = g_ui32GPIOIntMapSnowflakeRows;
229  }
230 
231  //
232  // Loop through the table that maps I2C base addresses to interrupt
233  // numbers.
234  //
235  for(ui32Idx = 0; ui32Idx < ui32Rows; ui32Idx++)
236  {
237  //
238  // See if this base address matches.
239  //
240  if(ppui32GPIOIntMap[ui32Idx][0] == ui32Port)
241  {
242  //
243  // Return the corresponding interrupt number.
244  //
245  return(ppui32GPIOIntMap[ui32Idx][1]);
246  }
247  }
248 
249  //
250  // The base address could not be found, so return an error.
251  //
252  return(0);
253 }
254 
255 //*****************************************************************************
256 //
295 //
296 //*****************************************************************************
297 void
298 GPIODirModeSet(uint32_t ui32Port, uint8_t ui8Pins, uint32_t ui32PinIO)
299 {
300  //
301  // Check the arguments.
302  //
303  ASSERT(_GPIOBaseValid(ui32Port));
304  ASSERT((ui32PinIO == GPIO_DIR_MODE_IN) ||
305  (ui32PinIO == GPIO_DIR_MODE_OUT) ||
306  (ui32PinIO == GPIO_DIR_MODE_HW));
307 
308  //
309  // Set the pin direction and mode.
310  //
311  HWREG(ui32Port + GPIO_O_DIR) = ((ui32PinIO & 1) ?
312  (HWREG(ui32Port + GPIO_O_DIR) | ui8Pins) :
313  (HWREG(ui32Port + GPIO_O_DIR) & ~(ui8Pins)));
314  HWREG(ui32Port + GPIO_O_AFSEL) = ((ui32PinIO & 2) ?
315  (HWREG(ui32Port + GPIO_O_AFSEL) |
316  ui8Pins) :
317  (HWREG(ui32Port + GPIO_O_AFSEL) &
318  ~(ui8Pins)));
319 }
320 
321 //*****************************************************************************
322 //
335 //
336 //*****************************************************************************
337 uint32_t
338 GPIODirModeGet(uint32_t ui32Port, uint8_t ui8Pin)
339 {
340  uint32_t ui32Dir, ui32AFSEL;
341 
342  //
343  // Check the arguments.
344  //
345  ASSERT(_GPIOBaseValid(ui32Port));
346  ASSERT(ui8Pin < 8);
347 
348  //
349  // Convert from a pin number to a bit position.
350  //
351  ui8Pin = 1 << ui8Pin;
352 
353  //
354  // Return the pin direction and mode.
355  //
356  ui32Dir = HWREG(ui32Port + GPIO_O_DIR);
357  ui32AFSEL = HWREG(ui32Port + GPIO_O_AFSEL);
358  return(((ui32Dir & ui8Pin) ? 1 : 0) | ((ui32AFSEL & ui8Pin) ? 2 : 0));
359 }
360 
361 //*****************************************************************************
362 //
399 //
400 //*****************************************************************************
401 void
402 GPIOIntTypeSet(uint32_t ui32Port, uint8_t ui8Pins,
403  uint32_t ui32IntType)
404 {
405  //
406  // Check the arguments.
407  //
408  ASSERT(_GPIOBaseValid(ui32Port));
409  ASSERT((ui32IntType == GPIO_FALLING_EDGE) ||
410  (ui32IntType == GPIO_RISING_EDGE) ||
411  (ui32IntType == GPIO_BOTH_EDGES) ||
412  (ui32IntType == GPIO_LOW_LEVEL) ||
413  (ui32IntType == GPIO_HIGH_LEVEL));
414 
415  //
416  // Set the pin interrupt type.
417  //
418  HWREG(ui32Port + GPIO_O_IBE) = ((ui32IntType & 1) ?
419  (HWREG(ui32Port + GPIO_O_IBE) | ui8Pins) :
420  (HWREG(ui32Port + GPIO_O_IBE) & ~(ui8Pins)));
421  HWREG(ui32Port + GPIO_O_IS) = ((ui32IntType & 2) ?
422  (HWREG(ui32Port + GPIO_O_IS) | ui8Pins) :
423  (HWREG(ui32Port + GPIO_O_IS) & ~(ui8Pins)));
424  HWREG(ui32Port + GPIO_O_IEV) = ((ui32IntType & 4) ?
425  (HWREG(ui32Port + GPIO_O_IEV) | ui8Pins) :
426  (HWREG(ui32Port + GPIO_O_IEV) & ~(ui8Pins)));
427 
428  //
429  // Set or clear the discrete interrupt feature. This is not available
430  // on all parts or ports but is safe to write in all cases.
431  //
432  HWREG(ui32Port + GPIO_O_SI) = ((ui32IntType & 0x10000) ?
433  (HWREG(ui32Port + GPIO_O_SI) | 0x01) :
434  (HWREG(ui32Port + GPIO_O_SI) & ~(0x01)));
435 }
436 
437 //*****************************************************************************
438 //
451 //
452 //*****************************************************************************
453 uint32_t
454 GPIOIntTypeGet(uint32_t ui32Port, uint8_t ui8Pin)
455 {
456  uint32_t ui32IBE, ui32IS, ui32IEV, ui32SI;
457 
458  //
459  // Check the arguments.
460  //
461  ASSERT(_GPIOBaseValid(ui32Port));
462  ASSERT(ui8Pin < 8);
463 
464  //
465  // Convert from a pin number to a bit position.
466  //
467  ui8Pin = 1 << ui8Pin;
468 
469  //
470  // Return the pin interrupt type.
471  //
472  ui32IBE = HWREG(ui32Port + GPIO_O_IBE);
473  ui32IS = HWREG(ui32Port + GPIO_O_IS);
474  ui32IEV = HWREG(ui32Port + GPIO_O_IEV);
475  ui32SI = HWREG(ui32Port + GPIO_O_SI);
476  return(((ui32IBE & ui8Pin) ? 1 : 0) | ((ui32IS & ui8Pin) ? 2 : 0) |
477  ((ui32IEV & ui8Pin) ? 4 : 0) | (ui32SI & 0x01) ? 0x10000 : 0);
478 }
479 
480 //*****************************************************************************
481 //
543 //
544 //*****************************************************************************
545 void
546 GPIOPadConfigSet(uint32_t ui32Port, uint8_t ui8Pins,
547  uint32_t ui32Strength, uint32_t ui32PinType)
548 {
549  uint8_t ui8Bit;
550 
551  //
552  // Check the arguments.
553  //
554  ASSERT(_GPIOBaseValid(ui32Port));
555  ASSERT((ui32Strength == GPIO_STRENGTH_2MA) ||
556  (ui32Strength == GPIO_STRENGTH_4MA) ||
557  (ui32Strength == GPIO_STRENGTH_6MA) ||
558  (ui32Strength == GPIO_STRENGTH_8MA) ||
559  (ui32Strength == GPIO_STRENGTH_8MA_SC) ||
560  (ui32Strength == GPIO_STRENGTH_10MA) ||
561  (ui32Strength == GPIO_STRENGTH_12MA));
562  ASSERT((ui32PinType == GPIO_PIN_TYPE_STD) ||
563  (ui32PinType == GPIO_PIN_TYPE_STD_WPU) ||
564  (ui32PinType == GPIO_PIN_TYPE_STD_WPD) ||
565  (ui32PinType == GPIO_PIN_TYPE_OD) ||
566  (ui32PinType == GPIO_PIN_TYPE_WAKE_LOW) ||
567  (ui32PinType == GPIO_PIN_TYPE_WAKE_HIGH) ||
568  (ui32PinType == GPIO_PIN_TYPE_ANALOG));
569 
570 
571  //
572  // Set the GPIO peripheral configuration register first as required. This
573  // register only appears in TM4E111 and later device classes, but is a
574  // harmless write on older devices. Walk pins 0-7 and clear or set the
575  // provided PC[EDMn] encoding.
576  //
577  for(ui8Bit = 0; ui8Bit < 8; ui8Bit++)
578  {
579  if(ui8Pins & (1 << ui8Bit))
580  {
581  HWREG(ui32Port + GPIO_O_PC) = (HWREG(ui32Port + GPIO_O_PC) &
582  ~(0x3 << (2 * ui8Bit)));
583  HWREG(ui32Port + GPIO_O_PC) |= (((ui32Strength >> 5) & 0x3) <<
584  (2 * ui8Bit));
585  }
586  }
587 
588  //
589  // Set the output drive strength.
590  //
591  HWREG(ui32Port + GPIO_O_DR2R) = ((ui32Strength & 1) ?
592  (HWREG(ui32Port + GPIO_O_DR2R) |
593  ui8Pins) :
594  (HWREG(ui32Port + GPIO_O_DR2R) &
595  ~(ui8Pins)));
596  HWREG(ui32Port + GPIO_O_DR4R) = ((ui32Strength & 2) ?
597  (HWREG(ui32Port + GPIO_O_DR4R) |
598  ui8Pins) :
599  (HWREG(ui32Port + GPIO_O_DR4R) &
600  ~(ui8Pins)));
601  HWREG(ui32Port + GPIO_O_DR8R) = ((ui32Strength & 4) ?
602  (HWREG(ui32Port + GPIO_O_DR8R) |
603  ui8Pins) :
604  (HWREG(ui32Port + GPIO_O_DR8R) &
605  ~(ui8Pins)));
606  HWREG(ui32Port + GPIO_O_SLR) = ((ui32Strength & 8) ?
607  (HWREG(ui32Port + GPIO_O_SLR) |
608  ui8Pins) :
609  (HWREG(ui32Port + GPIO_O_SLR) &
610  ~(ui8Pins)));
611 
612  //
613  // Set the 12-mA drive select register. This register only appears in
614  // TM4E111 and later device classes, but is a harmless write on older
615  // devices.
616  //
617  HWREG(ui32Port + GPIO_O_DR12R) = ((ui32Strength & 0x10) ?
618  (HWREG(ui32Port + GPIO_O_DR12R) |
619  ui8Pins) :
620  (HWREG(ui32Port + GPIO_O_DR12R) &
621  ~(ui8Pins)));
622 
623  //
624  // Set the pin type.
625  //
626  HWREG(ui32Port + GPIO_O_ODR) = ((ui32PinType & 1) ?
627  (HWREG(ui32Port + GPIO_O_ODR) | ui8Pins) :
628  (HWREG(ui32Port + GPIO_O_ODR) & ~(ui8Pins)));
629  HWREG(ui32Port + GPIO_O_PUR) = ((ui32PinType & 2) ?
630  (HWREG(ui32Port + GPIO_O_PUR) | ui8Pins) :
631  (HWREG(ui32Port + GPIO_O_PUR) & ~(ui8Pins)));
632  HWREG(ui32Port + GPIO_O_PDR) = ((ui32PinType & 4) ?
633  (HWREG(ui32Port + GPIO_O_PDR) | ui8Pins) :
634  (HWREG(ui32Port + GPIO_O_PDR) & ~(ui8Pins)));
635  HWREG(ui32Port + GPIO_O_DEN) = ((ui32PinType & 8) ?
636  (HWREG(ui32Port + GPIO_O_DEN) | ui8Pins) :
637  (HWREG(ui32Port + GPIO_O_DEN) & ~(ui8Pins)));
638 
639  //
640  // Set the wake pin enable register and the wake level register. These
641  // registers only appear in TM4E111 and later device classes, but are
642  // harmless writes on older devices.
643  //
644  HWREG(ui32Port + GPIO_O_WAKELVL) = ((ui32PinType & 0x200) ?
645  (HWREG(ui32Port + GPIO_O_WAKELVL) |
646  ui8Pins) :
647  (HWREG(ui32Port + GPIO_O_WAKELVL) &
648  ~(ui8Pins)));
649  HWREG(ui32Port + GPIO_O_WAKEPEN) = ((ui32PinType & 0x300) ?
650  (HWREG(ui32Port + GPIO_O_WAKEPEN) |
651  ui8Pins) :
652  (HWREG(ui32Port + GPIO_O_WAKEPEN) &
653  ~(ui8Pins)));
654 
655  //
656  // Set the analog mode select register.
657  //
658  HWREG(ui32Port + GPIO_O_AMSEL) =
659  ((ui32PinType == GPIO_PIN_TYPE_ANALOG) ?
660  (HWREG(ui32Port + GPIO_O_AMSEL) | ui8Pins) :
661  (HWREG(ui32Port + GPIO_O_AMSEL) & ~(ui8Pins)));
662 }
663 
664 //*****************************************************************************
665 //
681 //
682 //*****************************************************************************
683 void
684 GPIOPadConfigGet(uint32_t ui32Port, uint8_t ui8Pin,
685  uint32_t *pui32Strength, uint32_t *pui32PinType)
686 {
687  uint32_t ui32PinType, ui32Strength;
688 
689  //
690  // Check the arguments.
691  //
692  ASSERT(_GPIOBaseValid(ui32Port));
693  ASSERT(ui8Pin < 8);
694 
695  //
696  // Convert from a pin number to a bit position.
697  //
698  ui8Pin = (1 << ui8Pin);
699 
700  //
701  // Get the drive strength for this pin.
702  //
703  ui32Strength = ((HWREG(ui32Port + GPIO_O_DR2R) & ui8Pin) ? 1 : 0);
704  ui32Strength |= ((HWREG(ui32Port + GPIO_O_DR4R) & ui8Pin) ? 2 : 0);
705  ui32Strength |= ((HWREG(ui32Port + GPIO_O_DR8R) & ui8Pin) ? 4 : 0);
706  ui32Strength |= ((HWREG(ui32Port + GPIO_O_SLR) & ui8Pin) ? 8 : 0);
707  ui32Strength |= ((HWREG(ui32Port + GPIO_O_DR12R) & ui8Pin) ? 0x10 : 0);
708  ui32Strength |= (((HWREG(ui32Port + GPIO_O_PC) >>
709  (2 * ui8Pin)) & 0x3) << 5);
710  *pui32Strength = ui32Strength;
711 
712  //
713  // Get the pin type.
714  //
715  ui32PinType = ((HWREG(ui32Port + GPIO_O_ODR) & ui8Pin) ? 1 : 0);
716  ui32PinType |= ((HWREG(ui32Port + GPIO_O_PUR) & ui8Pin) ? 2 : 0);
717  ui32PinType |= ((HWREG(ui32Port + GPIO_O_PDR) & ui8Pin) ? 4 : 0);
718  ui32PinType |= ((HWREG(ui32Port + GPIO_O_DEN) & ui8Pin) ? 8 : 0);
719  if(HWREG(ui32Port + GPIO_O_WAKEPEN) & ui8Pin)
720  {
721  ui32PinType |= ((HWREG(ui32Port + GPIO_O_WAKELVL) & ui8Pin) ?
722  0x200 : 0x100);
723  }
724  *pui32PinType = ui32PinType;
725 }
726 
727 //*****************************************************************************
728 //
760 //
761 //*****************************************************************************
762 void
763 GPIOIntEnable(uint32_t ui32Port, uint32_t ui32IntFlags)
764 {
765  //
766  // Check the arguments.
767  //
768  ASSERT(_GPIOBaseValid(ui32Port));
769 
770  //
771  // Enable the interrupts.
772  //
773  HWREG(ui32Port + GPIO_O_IM) |= ui32IntFlags;
774 }
775 
776 //*****************************************************************************
777 //
800 //
801 //*****************************************************************************
802 void
803 GPIOIntDisable(uint32_t ui32Port, uint32_t ui32IntFlags)
804 {
805  //
806  // Check the arguments.
807  //
808  ASSERT(_GPIOBaseValid(ui32Port));
809 
810  //
811  // Disable the interrupts.
812  //
813  HWREG(ui32Port + GPIO_O_IM) &= ~(ui32IntFlags);
814 }
815 
816 //*****************************************************************************
817 //
830 //
831 //*****************************************************************************
832 uint32_t
833 GPIOIntStatus(uint32_t ui32Port, bool bMasked)
834 {
835  //
836  // Check the arguments.
837  //
838  ASSERT(_GPIOBaseValid(ui32Port));
839 
840  //
841  // Return the interrupt status.
842  //
843  if(bMasked)
844  {
845  return(HWREG(ui32Port + GPIO_O_MIS));
846  }
847  else
848  {
849  return(HWREG(ui32Port + GPIO_O_RIS));
850  }
851 }
852 
853 //*****************************************************************************
854 //
875 //
876 //*****************************************************************************
877 void
878 GPIOIntClear(uint32_t ui32Port, uint32_t ui32IntFlags)
879 {
880  //
881  // Check the arguments.
882  //
883  ASSERT(_GPIOBaseValid(ui32Port));
884 
885  //
886  // Clear the interrupts.
887  //
888  HWREG(ui32Port + GPIO_O_ICR) = ui32IntFlags;
889 }
890 
891 //*****************************************************************************
892 //
909 //
910 //*****************************************************************************
911 void
912 GPIOIntRegister(uint32_t ui32Port, void (*pfnIntHandler)(void))
913 {
914  uint32_t ui32Int;
915 
916  //
917  // Check the arguments.
918  //
919  ASSERT(_GPIOBaseValid(ui32Port));
920 
921  //
922  // Get the interrupt number associated with the specified GPIO.
923  //
924  ui32Int = _GPIOIntNumberGet(ui32Port);
925 
926  ASSERT(ui32Int != 0);
927 
928  //
929  // Register the interrupt handler.
930  //
931  IntRegister(ui32Int, pfnIntHandler);
932 
933  //
934  // Enable the GPIO interrupt.
935  //
936  IntEnable(ui32Int);
937 }
938 
939 //*****************************************************************************
940 //
954 //
955 //*****************************************************************************
956 void
957 GPIOIntUnregister(uint32_t ui32Port)
958 {
959  uint32_t ui32Int;
960 
961  //
962  // Check the arguments.
963  //
964  ASSERT(_GPIOBaseValid(ui32Port));
965 
966  //
967  // Get the interrupt number associated with the specified GPIO.
968  //
969  ui32Int = _GPIOIntNumberGet(ui32Port);
970 
971  ASSERT(ui32Int != 0);
972 
973  //
974  // Disable the GPIO interrupt.
975  //
976  IntDisable(ui32Int);
977 
978  //
979  // Unregister the interrupt handler.
980  //
981  IntUnregister(ui32Int);
982 }
983 
984 //*****************************************************************************
985 //
1003 //
1004 //*****************************************************************************
1005 int32_t
1006 GPIOPinRead(uint32_t ui32Port, uint8_t ui8Pins)
1007 {
1008  //
1009  // Check the arguments.
1010  //
1011  ASSERT(_GPIOBaseValid(ui32Port));
1012 
1013  //
1014  // Return the pin value(s).
1015  //
1016  return(HWREG(ui32Port + (GPIO_O_DATA + (ui8Pins << 2))));
1017 }
1018 
1019 //*****************************************************************************
1020 //
1035 //
1036 //*****************************************************************************
1037 void
1038 GPIOPinWrite(uint32_t ui32Port, uint8_t ui8Pins, uint8_t ui8Val)
1039 {
1040  //
1041  // Check the arguments.
1042  //
1043  ASSERT(_GPIOBaseValid(ui32Port));
1044 
1045  //
1046  // Write the pins.
1047  //
1048  HWREG(ui32Port + (GPIO_O_DATA + (ui8Pins << 2))) = ui8Val;
1049 }
1050 
1051 //*****************************************************************************
1052 //
1078 //
1079 //*****************************************************************************
1080 void
1081 GPIOPinTypeADC(uint32_t ui32Port, uint8_t ui8Pins)
1082 {
1083  //
1084  // Check the arguments.
1085  //
1086  ASSERT(_GPIOBaseValid(ui32Port));
1087 
1088  //
1089  // Make the pin(s) be inputs.
1090  //
1091  GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_IN);
1092 
1093  //
1094  // Set the pad(s) for analog operation.
1095  //
1096  GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA,
1097  GPIO_PIN_TYPE_ANALOG);
1098 }
1099 
1100 //*****************************************************************************
1101 //
1130 //
1131 //*****************************************************************************
1132 void
1133 GPIOPinTypeCAN(uint32_t ui32Port, uint8_t ui8Pins)
1134 {
1135  //
1136  // Check the arguments.
1137  //
1138  ASSERT(_GPIOBaseValid(ui32Port));
1139 
1140  //
1141  // Make the pin(s) be inputs.
1142  //
1143  GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_HW);
1144 
1145  //
1146  // Set the pad(s) for standard push-pull operation.
1147  //
1148  GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_8MA, GPIO_PIN_TYPE_STD);
1149 }
1150 
1151 //*****************************************************************************
1152 //
1180 //
1181 //*****************************************************************************
1182 void
1183 GPIOPinTypeComparator(uint32_t ui32Port, uint8_t ui8Pins)
1184 {
1185  //
1186  // Check the arguments.
1187  //
1188  ASSERT(_GPIOBaseValid(ui32Port));
1189 
1190  //
1191  // Make the pin(s) be inputs.
1192  //
1193  GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_IN);
1194 
1195  //
1196  // Set the pad(s) for analog operation.
1197  //
1198  GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA,
1199  GPIO_PIN_TYPE_ANALOG);
1200 }
1201 
1202 //*****************************************************************************
1203 //
1234 //
1235 //*****************************************************************************
1236 void
1237 GPIOPinTypeEPI(uint32_t ui32Port, uint8_t ui8Pins)
1238 {
1239  //
1240  // Check the arguments.
1241  //
1242  ASSERT(_GPIOBaseValid(ui32Port));
1243 
1244  //
1245  // Make the pin(s) be peripheral controlled.
1246  //
1247  GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_HW);
1248 
1249  //
1250  // Set the pad(s) for standard push-pull operation.
1251  //
1252  GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_8MA, GPIO_PIN_TYPE_STD);
1253 }
1254 
1255 //*****************************************************************************
1256 //
1284 //
1285 //*****************************************************************************
1286 void
1287 GPIOPinTypeEthernetLED(uint32_t ui32Port, uint8_t ui8Pins)
1288 {
1289  //
1290  // Check the arguments.
1291  //
1292  ASSERT(_GPIOBaseValid(ui32Port));
1293 
1294  //
1295  // Make the pin(s) be peripheral controlled.
1296  //
1297  GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_HW);
1298 
1299  //
1300  // Set the pad(s) for standard push-pull operation.
1301  //
1302  GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_8MA, GPIO_PIN_TYPE_STD);
1303 }
1304 
1305 //*****************************************************************************
1306 //
1334 //
1335 //*****************************************************************************
1336 void
1337 GPIOPinTypeEthernetMII(uint32_t ui32Port, uint8_t ui8Pins)
1338 {
1339  //
1340  // Check the arguments.
1341  //
1342  ASSERT(_GPIOBaseValid(ui32Port));
1343 
1344  //
1345  // Make the pin(s) be peripheral controlled.
1346  //
1347  GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_HW);
1348 
1349  //
1350  // Set the pad(s) for standard push-pull operation.
1351  //
1352  GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_8MA, GPIO_PIN_TYPE_STD);
1353 }
1354 
1355 //*****************************************************************************
1356 //
1379 //
1380 //*****************************************************************************
1381 void
1382 GPIOPinTypeGPIOInput(uint32_t ui32Port, uint8_t ui8Pins)
1383 {
1384  //
1385  // Check the arguments.
1386  //
1387  ASSERT(_GPIOBaseValid(ui32Port));
1388 
1389  //
1390  // Make the pin(s) be inputs.
1391  //
1392  GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_IN);
1393 
1394  //
1395  // Set the pad(s) for standard push-pull operation.
1396  //
1397  GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD);
1398 }
1399 
1400 //*****************************************************************************
1401 //
1424 //
1425 //*****************************************************************************
1426 void
1427 GPIOPinTypeGPIOOutput(uint32_t ui32Port, uint8_t ui8Pins)
1428 {
1429  //
1430  // Check the arguments.
1431  //
1432  ASSERT(_GPIOBaseValid(ui32Port));
1433 
1434  //
1435  // Set the pad(s) for standard push-pull operation.
1436  //
1437  GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD);
1438 
1439  //
1440  // Make the pin(s) be outputs.
1441  //
1442  GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_OUT);
1443 }
1444 
1445 //*****************************************************************************
1446 //
1469 //
1470 //*****************************************************************************
1471 void
1472 GPIOPinTypeGPIOOutputOD(uint32_t ui32Port, uint8_t ui8Pins)
1473 {
1474  //
1475  // Check the arguments.
1476  //
1477  ASSERT(_GPIOBaseValid(ui32Port));
1478 
1479  //
1480  // Set the pad(s) for standard push-pull operation.
1481  //
1482  GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_OD);
1483 
1484  //
1485  // Make the pin(s) be outputs.
1486  //
1487  GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_OUT);
1488 }
1489 
1490 //*****************************************************************************
1491 //
1519 //
1520 //*****************************************************************************
1521 void
1522 GPIOPinTypeI2C(uint32_t ui32Port, uint8_t ui8Pins)
1523 {
1524  //
1525  // Check the arguments.
1526  //
1527  ASSERT(_GPIOBaseValid(ui32Port));
1528 
1529  //
1530  // Make the pin(s) be peripheral controlled.
1531  //
1532  GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_HW);
1533 
1534  //
1535  // Set the pad(s) for open-drain operation with a weak pull-up.
1536  //
1537  GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_OD);
1538 }
1539 
1540 //*****************************************************************************
1541 //
1569 //
1570 //*****************************************************************************
1571 void
1572 GPIOPinTypeI2CSCL(uint32_t ui32Port, uint8_t ui8Pins)
1573 {
1574  //
1575  // Check the arguments.
1576  //
1577  ASSERT(_GPIOBaseValid(ui32Port));
1578 
1579  //
1580  // Make the pin(s) be peripheral controlled.
1581  //
1582  GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_HW);
1583 
1584  //
1585  // Set the pad(s) for push-pull operation.
1586  //
1587  GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD);
1588 }
1589 
1590 //*****************************************************************************
1591 //
1620 //
1621 //*****************************************************************************
1622 void
1623 GPIOPinTypeLCD(uint32_t ui32Port, uint8_t ui8Pins)
1624 {
1625  //
1626  // Check the arguments.
1627  //
1628  ASSERT(_GPIOBaseValid(ui32Port));
1629 
1630  //
1631  // Make the pin(s) be peripheral controlled.
1632  //
1633  GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_HW);
1634 
1635  //
1636  // Set the pad(s) for standard push-pull operation and beefed up drive.
1637  //
1638  GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_8MA, GPIO_PIN_TYPE_STD);
1639 }
1640 
1641 //*****************************************************************************
1642 //
1671 //
1672 //*****************************************************************************
1673 void
1674 GPIOPinTypeLPC(uint32_t ui32Port, uint8_t ui8Pins)
1675 {
1676  //
1677  // Check the arguments.
1678  //
1679  ASSERT(_GPIOBaseValid(ui32Port));
1680 
1681  //
1682  // Make the pin(s) be peripheral controlled.
1683  //
1684  GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_HW);
1685 
1686  //
1687  // Set the pad(s) for standard push-pull operation.
1688  //
1689  GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_8MA, GPIO_PIN_TYPE_STD);
1690 }
1691 
1692 //*****************************************************************************
1693 //
1721 //
1722 //*****************************************************************************
1723 void
1724 GPIOPinTypePECIRx(uint32_t ui32Port, uint8_t ui8Pins)
1725 {
1726  //
1727  // Check the arguments.
1728  //
1729  ASSERT(_GPIOBaseValid(ui32Port));
1730 
1731  //
1732  // Make the pin(s) be inputs.
1733  //
1734  GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_IN);
1735 
1736  //
1737  // Set the pad(s) for analog operation.
1738  //
1739  GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA,
1740  GPIO_PIN_TYPE_ANALOG);
1741 }
1742 
1743 //*****************************************************************************
1744 //
1772 //
1773 //*****************************************************************************
1774 void
1775 GPIOPinTypePECITx(uint32_t ui32Port, uint8_t ui8Pins)
1776 {
1777  //
1778  // Check the arguments.
1779  //
1780  ASSERT(_GPIOBaseValid(ui32Port));
1781 
1782  //
1783  // Make the pin(s) be inputs.
1784  //
1785  GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_HW);
1786 
1787  //
1788  // Set the pad(s) for analog operation.
1789  //
1790  GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD);
1791 }
1792 
1793 //*****************************************************************************
1794 //
1823 //
1824 //*****************************************************************************
1825 void
1826 GPIOPinTypePWM(uint32_t ui32Port, uint8_t ui8Pins)
1827 {
1828  //
1829  // Check the arguments.
1830  //
1831  ASSERT(_GPIOBaseValid(ui32Port));
1832 
1833  //
1834  // Make the pin(s) be peripheral controlled.
1835  //
1836  GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_HW);
1837 
1838  //
1839  // Set the pad(s) for standard push-pull operation.
1840  //
1841  GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD);
1842 }
1843 
1844 //*****************************************************************************
1845 //
1874 //
1875 //*****************************************************************************
1876 void
1877 GPIOPinTypeQEI(uint32_t ui32Port, uint8_t ui8Pins)
1878 {
1879  //
1880  // Check the arguments.
1881  //
1882  ASSERT(_GPIOBaseValid(ui32Port));
1883 
1884  //
1885  // Make the pin(s) be peripheral controlled.
1886  //
1887  GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_HW);
1888 
1889  //
1890  // Set the pad(s) for standard push-pull operation with a weak pull-up.
1891  //
1892  GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA,
1893  GPIO_PIN_TYPE_STD_WPU);
1894 }
1895 
1896 //*****************************************************************************
1897 //
1926 //
1927 //*****************************************************************************
1928 void
1929 GPIOPinTypeSSI(uint32_t ui32Port, uint8_t ui8Pins)
1930 {
1931  //
1932  // Check the arguments.
1933  //
1934  ASSERT(_GPIOBaseValid(ui32Port));
1935 
1936  //
1937  // Make the pin(s) be peripheral controlled.
1938  //
1939  GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_HW);
1940 
1941  //
1942  // Set the pad(s) for standard push-pull operation.
1943  //
1944  GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD);
1945 }
1946 
1947 //*****************************************************************************
1948 //
1977 //
1978 //*****************************************************************************
1979 void
1980 GPIOPinTypeTimer(uint32_t ui32Port, uint8_t ui8Pins)
1981 {
1982  //
1983  // Check the arguments.
1984  //
1985  ASSERT(_GPIOBaseValid(ui32Port));
1986 
1987  //
1988  // Make the pin(s) be peripheral controlled.
1989  //
1990  GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_HW);
1991 
1992  //
1993  // Set the pad(s) for standard push-pull operation.
1994  //
1995  GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD);
1996 }
1997 
1998 //*****************************************************************************
1999 //
2028 //
2029 //*****************************************************************************
2030 void
2031 GPIOPinTypeUART(uint32_t ui32Port, uint8_t ui8Pins)
2032 {
2033  //
2034  // Check the arguments.
2035  //
2036  ASSERT(_GPIOBaseValid(ui32Port));
2037 
2038  //
2039  // Make the pin(s) be peripheral controlled.
2040  //
2041  GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_HW);
2042 
2043  //
2044  // Set the pad(s) for standard push-pull operation.
2045  //
2046  GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD);
2047 }
2048 
2049 //*****************************************************************************
2050 //
2078 //
2079 //*****************************************************************************
2080 void
2081 GPIOPinTypeUSBAnalog(uint32_t ui32Port, uint8_t ui8Pins)
2082 {
2083  //
2084  // Check the arguments.
2085  //
2086  ASSERT(_GPIOBaseValid(ui32Port));
2087 
2088  //
2089  // Make the pin(s) be inputs.
2090  //
2091  GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_IN);
2092 
2093  //
2094  // Set the pad(s) for analog operation.
2095  //
2096  GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA,
2097  GPIO_PIN_TYPE_ANALOG);
2098 }
2099 
2100 //*****************************************************************************
2101 //
2134 //
2135 //*****************************************************************************
2136 void
2137 GPIOPinTypeUSBDigital(uint32_t ui32Port, uint8_t ui8Pins)
2138 {
2139  //
2140  // Check the arguments.
2141  //
2142  ASSERT(_GPIOBaseValid(ui32Port));
2143 
2144  //
2145  // Make the pin(s) be peripheral controlled.
2146  //
2147  GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_HW);
2148 
2149  //
2150  // Set the pad(s) for standard push-pull operation.
2151  //
2152  GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD);
2153 }
2154 
2155 //*****************************************************************************
2156 //
2179 //
2180 //*****************************************************************************
2181 void
2182 GPIOPinTypeWakeHigh(uint32_t ui32Port, uint8_t ui8Pins)
2183 {
2184  //
2185  // Check the arguments.
2186  //
2187  ASSERT(_GPIOBaseValid(ui32Port));
2188 
2189  //
2190  // Make the pin(s) inputs.
2191  //
2192  GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_IN);
2193 
2194  //
2195  // Set the pad(s) for wake-high operation.
2196  //
2197  GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA,
2198  GPIO_PIN_TYPE_WAKE_HIGH);
2199 }
2200 
2201 //*****************************************************************************
2202 //
2225 //
2226 //*****************************************************************************
2227 void
2228 GPIOPinTypeWakeLow(uint32_t ui32Port, uint8_t ui8Pins)
2229 {
2230  //
2231  // Check the arguments.
2232  //
2233  ASSERT(_GPIOBaseValid(ui32Port));
2234 
2235  //
2236  // Make the pin(s) inputs.
2237  //
2238  GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_IN);
2239 
2240  //
2241  // Set the pad(s) for wake-high operation.
2242  //
2243  GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA,
2244  GPIO_PIN_TYPE_WAKE_LOW);
2245 }
2246 
2247 //*****************************************************************************
2248 //
2277 //
2278 //*****************************************************************************
2279 void
2280 GPIOPinTypeKBRow(uint32_t ui32Port, uint8_t ui8Pins)
2281 {
2282  //
2283  // Check the arguments.
2284  //
2285  ASSERT(_GPIOBaseValid(ui32Port));
2286 
2287  //
2288  // Make the pin(s) be peripheral controlled.
2289  //
2290  GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_HW);
2291 
2292  //
2293  // Set the pad(s) for push/pull operation.
2294  //
2295  GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD);
2296 }
2297 
2298 //*****************************************************************************
2299 //
2328 //
2329 //*****************************************************************************
2330 void
2331 GPIOPinTypeKBColumn(uint32_t ui32Port, uint8_t ui8Pins)
2332 {
2333  //
2334  // Check the arguments.
2335  //
2336  ASSERT(_GPIOBaseValid(ui32Port));
2337 
2338  //
2339  // Make the pin(s) be peripheral controlled.
2340  //
2341  GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_HW);
2342 
2343  //
2344  // Set the pad(s) for standard push-pull operation.
2345  //
2346  GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA,
2347  GPIO_PIN_TYPE_STD_WPU);
2348 }
2349 
2350 //*****************************************************************************
2351 //
2379 //
2380 //*****************************************************************************
2381 void
2382 GPIOPinTypeLEDSeq(uint32_t ui32Port, uint8_t ui8Pins)
2383 {
2384  //
2385  // Check the arguments.
2386  //
2387  ASSERT(_GPIOBaseValid(ui32Port));
2388 
2389  //
2390  // Make the pin(s) be peripheral controlled.
2391  //
2392  GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_HW);
2393 
2394  //
2395  // Set the pad(s) for push/pull operation and 8mA strength. The external
2396  // hardware should be set up such that we sink current when the LED is
2397  // turned on, hence the 8mA configuration choice.
2398  //
2399  GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_8MA, GPIO_PIN_TYPE_STD);
2400 }
2401 
2402 //*****************************************************************************
2403 //
2431 //
2432 //*****************************************************************************
2433 void
2434 GPIOPinTypeCIR(uint32_t ui32Port, uint8_t ui8Pins)
2435 {
2436  //
2437  // Check the arguments.
2438  //
2439  ASSERT(_GPIOBaseValid(ui32Port));
2440 
2441  //
2442  // Make the pin(s) be peripheral controlled.
2443  //
2444  GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_HW);
2445 
2446  //
2447  // Set the pad(s) for standard push-pull operation.
2448  //
2449  GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD);
2450 }
2451 
2452 //*****************************************************************************
2453 //
2473 //
2474 //*****************************************************************************
2475 uint32_t
2476 GPIOPinWakeStatus(uint32_t ui32Port)
2477 {
2478  return(ui32Port + GPIO_O_WAKESTAT);
2479 }
2480 
2481 //*****************************************************************************
2482 //
2506 //
2507 //*****************************************************************************
2508 void
2509 GPIOPinConfigure(uint32_t ui32PinConfig)
2510 {
2511  uint32_t ui32Base, ui32Shift;
2512 
2513  //
2514  // Check the argument.
2515  //
2516  ASSERT(((ui32PinConfig >> 16) & 0xff) < 15);
2517  ASSERT(((ui32PinConfig >> 8) & 0xe3) == 0);
2518 
2519  //
2520  // Extract the base address index from the input value.
2521  //
2522  ui32Base = (ui32PinConfig >> 16) & 0xff;
2523 
2524  //
2525  // Get the base address of the GPIO module, selecting either the APB or the
2526  // AHB aperture as appropriate.
2527  //
2528  if(HWREG(SYSCTL_GPIOHBCTL) & (1 << ui32Base))
2529  {
2530  ui32Base = g_pui32GPIOBaseAddrs[(ui32Base << 1) + 1];
2531  }
2532  else
2533  {
2534  ui32Base = g_pui32GPIOBaseAddrs[ui32Base << 1];
2535  }
2536 
2537  //
2538  // Extract the shift from the input value.
2539  //
2540  ui32Shift = (ui32PinConfig >> 8) & 0xff;
2541 
2542  //
2543  // Write the requested pin muxing value for this GPIO pin.
2544  //
2545  HWREG(ui32Base + GPIO_O_PCTL) = ((HWREG(ui32Base + GPIO_O_PCTL) &
2546  ~(0xf << ui32Shift)) |
2547  ((ui32PinConfig & 0xf) << ui32Shift));
2548 }
2549 
2550 //*****************************************************************************
2551 //
2563 //
2564 //*****************************************************************************
2565 void
2566 GPIODMATriggerEnable(uint32_t ui32Port, uint8_t ui8Pins)
2567 {
2568  //
2569  // Check the arguments.
2570  //
2571  ASSERT(_GPIOBaseValid(ui32Port));
2572 
2573  //
2574  // Set the pin as a DMA trigger.
2575  //
2576  HWREG(ui32Port + GPIO_O_DMACTL) |= ui8Pins;
2577 }
2578 
2579 //*****************************************************************************
2580 //
2591 //
2592 //*****************************************************************************
2593 void
2594 GPIODMATriggerDisable(uint32_t ui32Port, uint8_t ui8Pins)
2595 {
2596  //
2597  // Check the arguments.
2598  //
2599  ASSERT(_GPIOBaseValid(ui32Port));
2600 
2601  //
2602  // Set the pin as a DMA trigger.
2603  //
2604  HWREG(ui32Port + GPIO_O_DMACTL) &= (~ui8Pins);
2605 }
2606 
2607 //*****************************************************************************
2608 //
2622 //
2623 //*****************************************************************************
2624 void
2625 GPIOADCTriggerEnable(uint32_t ui32Port, uint8_t ui8Pins)
2626 {
2627  //
2628  // Check the arguments.
2629  //
2630  ASSERT(_GPIOBaseValid(ui32Port));
2631 
2632  //
2633  // Set the pin as a DMA trigger.
2634  //
2635  HWREG(ui32Port + GPIO_O_ADCCTL) |= ui8Pins;
2636 }
2637 
2638 //*****************************************************************************
2639 //
2650 //
2651 //*****************************************************************************
2652 void
2653 GPIOADCTriggerDisable(uint32_t ui32Port, uint8_t ui8Pins)
2654 {
2655  //
2656  // Check the arguments.
2657  //
2658  ASSERT(_GPIOBaseValid(ui32Port));
2659 
2660  //
2661  // Set the pin as a DMA trigger.
2662  //
2663  HWREG(ui32Port + GPIO_O_ADCCTL) &= (~ui8Pins);
2664 }
2665 
2666 //*****************************************************************************
2667 //
2668 // Close the Doxygen group.
2670 //
2671 //*****************************************************************************
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